JP2015022373A - CONTROL DEVICE, ITS START-UP METHOD, AND IMAGE FORMING APPARATUS PROVIDED WITH THE CONTROL DEVICE - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable high-speed start using demand paging processing even in a RAM execution system.SOLUTION: A boot loader stored in a mask ROM 20 loads, from codes and data of a program to be loaded to RAM 17, only necessary ones to perform demand paging, such as the entry point of the program and the code to initialize a page table to the RAM 17. The boot loader jumps to the entry point of the program to perform the initialization of interruption processing and initialization of the page table, and thereby enabling the demand paging processing in the subsequent processing.

Description

  The present invention relates to a control device having a demand paging function, an activation processing method thereof, and an image forming apparatus including the control device.

  There is a technique for reducing the startup time by using demand paging processing when starting an electronic apparatus such as an image forming apparatus. The demand paging process is a process of loading program codes or data from a nonvolatile memory to a RAM in units of pages when necessary. If demand paging processing is used, only the minimum necessary code or data needs to be loaded, so that the startup time can be shortened. A startup acceleration technique using a demand paging function is already known (Patent Document 1).

  However, the conventional startup speed-up technology using demand paging processing has a problem that it cannot be applied to a RAM execution system due to a system restriction that it operates in a system premised on ROM execution.

  ROM execution is a method adopted in a system equipped with a ROM capable of executing a direct code, such as a mask ROM or a NOR flash ROM, and the code on the ROM is not directly expanded from the ROM to the RAM. Is to do. In addition, RAM execution is a method adopted in a system including a ROM such as a NAND flash ROM or a serial flash ROM that cannot directly execute a code. The code on the RAM is expanded after the code is expanded from the ROM to the RAM. Is to execute.

  ROM execution is advantageous in terms of cost because it can reduce RAM, but is disadvantageous in terms of speed, so it is used in electronic devices where cost is important, but in electronic devices that require speed, such as image forming apparatuses. In most cases, RAM execution is employed.

  In the invention described in Patent Document 1, the data on the ROM is expanded in the RAM by demand paging processing for the purpose of shortening the read time. However, the present invention assumes a system in which code is executed in ROM and data is accessed in RAM, and is not applicable to a system that executes RAM.

  The present invention has been made to solve such a problem, and an object of the present invention is to realize high-speed startup using demand paging processing even in a RAM execution system.

  The present invention is a control device, a non-volatile first storage unit for storing program codes and data, a second storage unit serving as a work area for the program, and codes necessary for demand paging processing And means for loading data from the first storage unit to the second storage unit, and means for performing initialization processing required for demand paging processing using the loaded code and data Device.

  According to the present invention, even in a RAM execution system, it is possible to realize high-speed startup using demand paging processing.

1 is a block diagram illustrating a hardware configuration of an image forming apparatus according to an embodiment of the present invention. It is a flowchart which shows the starting process of the controller board in FIG. FIG. 3 is a diagram showing a RAM map at the time when a boot loader loads code and data necessary for demand paging processing into the RAM in the flow of FIG. 2. FIG. 3 is a diagram for explaining an access attribute of a RAM after paging setting is performed in the flow of FIG. 2. FIG. 3 is a diagram for explaining a state in which initialization codes and data are loaded by demand paging processing in the flow of FIG. 2. FIG. 6 is a diagram for explaining a method of speeding up the activation by a low priority task performing read access to a RAM in the image forming apparatus according to the embodiment of the present invention.

Embodiments of the present invention will be described below with reference to the drawings.
<Hardware configuration of image forming apparatus>
FIG. 1 is a block diagram showing a hardware configuration of an image forming apparatus according to an embodiment of the present invention.

  The image forming apparatus 1 includes a controller board 10, a scanner 30, a plotter 40, and an operation panel 50 each connected to the controller board 10.

  The scanner 30 is an image input unit that reads an image such as a document and generates image data. The plotter 40 is an image output unit that forms an image on a print medium such as paper based on image data. The operation panel 50 includes various buttons, a display device such as an LCD, a touch panel arranged on the display device, and the like, and is an operation input unit for a user to input various instructions to the image forming apparatus 1.

  The controller board 10 as a control device has a function of controlling the entire image forming apparatus 1, and includes a bus 21, a CPU 11 connected to the bus 21, a scanner I / F (interface) 12, and a panel I / F 13. , Image processing H / W (hardware) 14, plotter I / F 15, nonvolatile memory 16, RAM 17, network I / F 18, USB I / F 19, and mask ROM 20.

  The CPU 11 is an arithmetic processing unit that executes various processes and arithmetic operations in order to control the entire image forming apparatus 1. In addition, the CPU 11 has a built-in MMU (Memory Management Unit) 11a that executes memory management such as address conversion during demand paging processing.

  The panel I / F 13 is an interface unit with the operation panel 50. The image processing H / W 14 performs predetermined image processing on the image data input from the scanner 30, the image data input from the network I / F 18, and the image data input from the USB I / F 19. The plotter I / F 15 is an interface unit with the plotter 40.

  The nonvolatile memory 16 includes a NAND flash ROM, a serial flash ROM, and the like, and stores programs (application programs such as a copy application and a FAX application) that provide services as an image forming apparatus. The RAM 17 is a main storage unit (main memory) used as a work area (work area) for programs loaded from the nonvolatile memory 16. The mask ROM 20 stores a boot loader.

  The network I / F 18 is an interface unit with a network such as a LAN. The USB I / F 19 is an interface unit with a USB device such as a nonvolatile memory (USB memory) compatible with USB.

  In the image forming apparatus 1 having the above-described configuration, the boot loader stored in the mask ROM 20 is executed by the CPU 11 at startup. The boot loader controls the scanner 30, the plotter 40, and the operation panel 50, reads a program that provides a service as the image forming apparatus 1 from the nonvolatile memory 16, and loads it into the RAM 17.

  The program loaded in the RAM 17 has a program start point called an entry point, and the boot loader jumps to the program start point to start execution of the program. Software initialization data and hardware such as the scanner 30 and the plotter 40 are initialized by the initialization code of the program. When the initialization is completed, the image forming apparatus 1 can accept instructions such as copying and printing. become.

  When the boot loader loads a program from the nonvolatile memory 16 to the RAM 17, if the entire program is loaded and then jumps to the entry point, the startup time becomes long. Therefore, a method for partially loading the program into the RAM 17 and reducing the startup time will be described below.

<Start-up processing of controller board>
FIG. 2 is a flowchart showing a startup process of the controller board 10 in FIG. The boot loader is executed first when the image forming apparatus 1 is powered on (step S101).

  The boot loader loads only the code and data necessary for performing the demand paging process among the programs loaded to the RAM 17 (step S102).

  Here, the code and data necessary for performing the demand paging process are a program entry point (hereinafter referred to as a program entry point), a code for initializing a page table (hereinafter referred to as a page table initialization code), a vector table, These are a non-volatile memory device driver (hereinafter, non-volatile memory device driver), demand paging processing code, and interrupt processing code. This nonvolatile memory is the nonvolatile memory 16 (NAND flash ROM, serial flash ROM, etc.) on the controller board 10. An SSD, HDD, USB memory, etc. are also possible.

  FIG. 3 is a diagram showing a RAM map when the boot loader loads code and data necessary for the demand paging process into the RAM 17, that is, when step S102 is completed.

  A vector table, a program entry point, a page table initialization code, a nonvolatile memory device driver, a demand paging processing code, and an interrupt processing code are loaded in the RAM area 171 at the top of the RAM 17. On the other hand, nothing is loaded in the RAM area 172 other than that, and it remains an indefinite value.

  As shown in the figure, a vector table, a program entry point, a page table initialization code, a nonvolatile memory device driver, a demand paging processing code, and an interrupt processing code are sequentially arranged with the lowest address being 0x0. This can be done by properly writing a linker script that is used when building the program. The linker script is a setting file that determines the RAM map of the program, and is written in a text file. Therefore, the software developer can freely change the layout of the RAM map.

  Returning to the description of FIG. In step S102, after the code and data necessary for the boot loader to perform demand paging processing are loaded into the RAM 17, the program jumps to the program entry point (step S103), interrupt processing initialization, page table initialization, non-volatile The memory device driver is initialized (step S104). Thereby, demand paging processing becomes possible in the subsequent processing.

  FIG. 4 is a diagram for explaining the access attributes of the RAM 17 after the paging setting, that is, the page table is initialized in step S104.

  The access attribute of the entire RAM 17 is determined by the initialization of the page table. As an access attribute, a general CPU can set write access prohibition, read / write access prohibition, and no access prohibition.

  Access attributes can be set on a page basis. In FIG. 4, a hatched portion (hereinafter, hatched portion) 174 is a read / write access prohibition attribute. When read access or write access occurs in the shaded portion 174, a page fault exception occurs, and demand paging processing is performed in response to this.

  In FIG. 4, a write access prohibition attribute or an access prohibitionless attribute is set in a white portion (hereinafter, white portion). In the area where the write access prohibition attribute is set, the read access succeeds, but a page fault exception occurs when the write access is made. The read access and the write access succeed in the area in which the no access prohibition attribute is set. Here, among the white portions, the area 171 loaded with the code and data necessary for the demand paging process is set to the write access prohibition attribute, and the data portion 173 including the page table is set to the no access prohibition attribute. That's fine.

  Returning to the description of FIG. After performing the initialization necessary for performing the demand paging process (step S104), the normal initialization process (program initialization process) is performed. Since the code and data for performing the normal initialization process are not yet loaded in the RAM 17, when a normal initialization process code is executed (step S105), a page fault exception occurs (step S106: YES).

  Demand paging processing is performed in response to the page fault exception (step S107). That is, the necessary code and data are read from the nonvolatile memory 16 in which the program code and data are stored, and developed in the RAM 17. This demand paging process is executed by the OS (operating system) and the MMU 11a.

  When the demand paging process is completed, the process returns to the original program and the normal initialization process is resumed (step S108: YES → step S105). This process is repeated until all the normal initialization processes have been executed (step S108: NO → start-up complete).

  Some normal initialization processes do not require the demand paging process (step S106: NO). In this case, when the demand paging process is performed by the previous normal initialization process, the code and data of the normal initialization process currently being executed are subsequently read.

  FIG. 5 is a diagram for explaining a state in which initialization codes and data are loaded by demand paging processing.

  When code execution or data access is performed on the area within the shaded portion 174 in which the RAM access attribute is set to the access prohibition attribute, demand paging processing is performed. As a result, the write access prohibition attribute (in the case of code) or the access prohibitionless attribute (in the case of data) is set in the area.

  In FIG. 5, white areas 175 and 176 represent areas loaded with initialization codes, and white areas 177 and 178 represent areas loaded with initialization data. As the initialization code and the initialization data are loaded by the demand paging process, white portions increase.

<High speed startup by reading low priority tasks>
FIG. 6 is a diagram for explaining a method of speeding up the activation by the low priority task performing read access to the RAM.

  During the initialization process, one low priority task (low priority task) 200 is generated and executed. The low priority task 200 has a role of reading and accessing the RAM 17 in units of pages. The range of read access is from the address immediately after the area 171 where the code and data necessary for demand paging processing are arranged to the end address of the RAM 17.

  The access unit is 1 byte, and read access is sequentially performed in page units. The page size depends on the CPU. If the page size is 4 KB and the address for starting read access is 0x4000, the low priority task 200 performs read access to 0x4000, 0x5000, 0x6000, 0x7000. When the read access to the end address of the RAM 17 is completed, this task ends.

The effect of this task is described below.
In the initialization process, there is a possibility that a process requiring a waiting time is performed. For example, in the code for initializing the peripheral device, there is a process of waiting for the status of the peripheral device to change. During such a waiting time, the CPU cannot perform effective processing, and only enters an idle state.

  Therefore, if the low priority task is moved during this period, the demand paging process can be caused by performing read access to the RAM address. As a result, there is a possibility that future demand paging processing can be anticipated, leading to a reduction in demand paging processing time. Further, since this task has a low priority, it does not interfere with the execution of the initialization process when the initialization process is being executed.

  Thus, when the CPU enters the idle state, the total startup time can be shortened by advancing the demand paging process as much as possible.

As described above in detail, according to the image forming apparatus 1 according to the embodiment of the present invention, the demand paging process is performed among the code and data of the program stored in the nonvolatile memory 16 at the time of startup. By loading only the necessary code and data (minimum necessary code and data) into the RAM 17, the load time can be shortened.
Thereafter, jumping to the entry point of the loaded program, initialization of the interrupt process, initialization of the page table, and initialization of the device driver of the nonvolatile memory enables the demand paging process. Thereafter, necessary code and data are loaded from the nonvolatile memory 16 to the RAM 17 by demand paging processing.
Thus, if the load and initialization that can perform the demand paging process are executed, the demand paging function can be provided, and as a result, the startup speed can be increased.
In other words, even a RAM execution system can achieve high startup speed.
In addition, the total startup time can be further shortened by intentionally causing demand paging by a low priority task in the background.

  In the embodiment described above, the present invention is applied to an image forming apparatus. However, the present invention can also be applied to electronic devices such as a digital camera, a smartphone, a tablet terminal, and a personal computer.

  DESCRIPTION OF SYMBOLS 1 ... Image forming apparatus, 10 ... Controller board, 11 ... CPU, 11a ... MMU, 16 ... Non-volatile memory, 17 ... RAM, 20 ... Mask ROM, 200 ... Low priority task.

Japanese Patent No. 4732432

Claims (8)

A nonvolatile first storage unit for storing program codes and data;
A second storage unit serving as a work area for the program;
Means for loading code and data required for demand paging processing from the first storage unit to the second storage unit;
And a control unit having an initialization process necessary for the demand paging process using the loaded code and data. The control device according to claim 1,
The code and data necessary for the demand paging process are a program entry point, a code for initializing a page table, a vector table, a device driver for the first storage unit, a demand paging process code, and an interrupt process code. Control device. In the control device according to claim 1 or 2,
A control device, wherein code and data necessary for the demand paging process are arranged in a continuous address area of the second storage unit. The control device according to claim 3,
The address of the area is set by a description of a linker script used when building a program. In the control device according to claim 3 or 4,
The control unit whose lowest address is 0x0. In the control device according to any one of claims 1 to 5,
During the initialization process, a task with a low priority is started, and the task is sequentially read and accessed in page units from the lowest address where the demand paging process is not performed to the end address. A control device that causes demand paging in the background.   An image forming apparatus comprising the control device according to claim 1. A control device activation processing method comprising: a nonvolatile first storage unit storing program codes and data; and a second storage unit serving as a work area for the program,
Loading code and data required for demand paging processing from the first storage unit to the second storage unit;
Using the loaded code and data to perform initialization processing required for demand paging processing;
A processing method for starting a control device having

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