JP2015012008A - Chip resistor and mounting structure of chip resistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a chip resistor capable of enhancing adhesion strength of a resin sealant for a circuit board, and to provide a mounting structure therefor.SOLUTION: A chip resistor 1 has an inclined surface 2a formed between both side faces of a ceramic substrate 2 in the transverse direction and the back surface thereof, and satisfies following relationship; 1/3<H/T<2/3, where T is the thickness of the ceramic substrate 2, and H is the height of the inclined surface 2a. The chip resistor 1 is mounted on a land 31 provided on a circuit board 30 while directing the back electrode 3 downward, and surface mounted by joining the external electrode 8 of the outermost layer covering an end face electrode 6 with solder 32. Circumference of the chip resistor 1 is entirely sealed with a resin sealant 40, and protected against environment of light, heat, humidity, and the like.

Description

  The present invention relates to a chip resistor mounted on a circuit board by soldering and a mounting structure of the chip resistor.

  FIG. 7 is a cross-sectional view showing a conventional chip resistor disclosed in Patent Document 1 and its mounting structure. As shown in the figure, the chip resistor 21 includes a rectangular parallelepiped insulating base 22 and a pair of internal electrodes (surface electrodes) 23 provided at both ends in the longitudinal direction of the upper surface of the insulating base 22 in the figure. A resistor 24 provided between the pair of internal electrodes 23, a two-layer protective coat (undercoat 25 and overcoat 26) covering the resistor 24, and the length of the insulating base 22 And an external electrode 27 that covers both end faces in a U-shaped cross section, and the external electrode 27 is coated with a plating layer. The upper end side of the external electrode 27 overlaps the internal electrode 23, and the lower end side of the external electrode 27 covers the area corresponding to the back electrode 28 on the lower surface of the insulating base 22. The thus configured chip resistor 21 is mounted on the land 31 provided on the circuit board 30 with the back electrode 28 facing downward, and the external electrode 27 is joined to the land 31 with the solder 32 to provide a circuit. Surface mounted on the substrate 30.

  By the way, in order to protect this type of chip resistor 21 from an environment such as light, heat, or humidity, the chip resistor 21 on the circuit board 30 may be sealed with a resin sealant. In this case, in a state where the chip resistor 21 is soldered on the circuit board 30, a paste-like resin sealant is supplied around the chip resistor 21 with a dispenser or the like, and a damming member is used as necessary. By heating in a state where the outflow of the resin sealant is blocked, the resin sealant is cured and the chip resistor 21 is sealed.

JP 2010-225660 A

  However, when the chip resistor 21 is soldered to the land 31 of the circuit board 30, a narrow space between the lower surface of the insulating base 22 and the circuit board 30 in the portion between the pair of back electrodes 28 (reference numeral in FIG. 7). Therefore, when a paste-like resin sealant is supplied after soldering, the resin sealant may not flow into the space A and remain as a cavity. If such cavities are formed, the air in the cavities expands when the resin sealant is heated and cured in the subsequent steps, so the adhesion strength of the resin sealant to the insulating base 22 is increased. In the worst case, the solder 32 may flow into the space A and cause a short-circuit accident.

  The present invention has been made in view of the actual situation of the prior art, and a first object thereof is to provide a chip resistor capable of increasing the adhesion strength of a resin sealant. A second object of the present invention is to provide a chip resistor mounting structure capable of increasing the adhesion strength of the resin sealant.

  In order to achieve the first object, a chip resistor of the present invention includes a rectangular parallelepiped insulating base and a pair of surface electrodes provided at both longitudinal ends of the surface of the insulating base. A resistor provided on the surface of the insulating base so as to be connected to the pair of surface electrodes, a pair of back electrodes provided at both longitudinal ends of the back surface of the insulating base, and the insulating property A pair of end surface electrodes provided on both end surfaces of the base and bridging the front surface electrode and the back surface electrode, and chamfered between both lateral surfaces and the back surface of the insulating base in the short direction. An inclined surface having a shape is formed, and when the thickness dimension of the insulating base is T and the height dimension of the inclined surface is H, these relationships are 1/3 <H / T <2/3. And the angle between the side surface in the short direction of the insulating base and the inclined surface is set as θ. And the configuration of this θ is set in a range of 30 ° to 60 °.

  In the chip resistor configured in this way, a chamfered inclined surface is formed between both lateral surfaces and the back surface of the insulating base in the short direction, and the size and angle of the inclined surface are set in the above range. Therefore, when the resin sealant is supplied with the chip resistor soldered onto the circuit board, the resin sealant flows into the narrow space between the lower surface of the insulating base and the circuit board. It becomes easy and the adhesive strength with respect to the circuit board of resin sealing agent can be raised.

  In order to achieve the second object, the chip resistor mounting structure according to the present invention includes a back electrode mounted on a land on which a chip resistor having an inclined surface as described above is provided on a circuit board. The chip resistor is entirely sealed with a resin sealing material.

  In the chip resistor mounting structure configured as described above, the chip resistor is mounted on the circuit board land with the back electrode facing downward, the end surface electrode and the land are soldered, and then the periphery of the chip resistor. When the paste-like resin sealant is supplied to the substrate, the resin sealant easily flows into a narrow space existing between the lower surface of the insulating base and the circuit board. By curing the chip resistor, it is possible to seal the chip resistor using a resin sealant having high adhesion strength to the circuit board.

  Since the chip resistor of the present invention has a chamfered inclined surface set in a predetermined size and an angle range between the both side surfaces and the back surface in the short direction of the insulating base, the chip resistor When the resin sealant is supplied in a state where it is soldered onto the circuit board, the resin sealant easily flows into the narrow space existing between the lower surface of the insulating base and the circuit board. The adhesion strength to the substrate can be increased.

  Further, the mounting structure of the chip resistor according to the present invention has a chamfered inclined surface set to a predetermined size and an angle range between both side surfaces and the back surface of the insulating base of the chip resistor in the short direction. After the chip resistor is mounted on the circuit board land with the back electrode facing downward, the end surface electrode and the land are soldered together, and then a paste-like resin seal is formed around the chip resistor. When supplying the stop agent, this resin sealant is likely to flow into a narrow space existing between the lower surface of the insulating base and the circuit board, so by curing the resin sealant in the subsequent heating step, The chip resistor can be sealed using a resin sealant having high adhesion strength to the circuit board.

It is a top view of the chip resistor concerning the example of an embodiment of the present invention. It is sectional drawing which follows the II-II line of FIG. It is sectional drawing which follows the III-III line of FIG. It is explanatory drawing which shows an example of the manufacturing process of this chip resistor. It is explanatory drawing which shows the other example of the manufacturing process of this chip resistor. It is sectional drawing which shows the mounting state of this chip resistor. It is sectional drawing which shows the mounting state of the chip resistor which concerns on a prior art example.

  Hereinafter, embodiments of the invention will be described with reference to the drawings. As shown in FIGS. 1 to 3, a chip resistor 1 according to an embodiment of the present invention includes a rectangular parallelepiped ceramic substrate 2 and longitudinal ends of the back surface (lower surface in FIG. 2) of the ceramic substrate 2. A pair of back electrodes 3 provided, a pair of surface electrodes 4 provided at both longitudinal ends of the surface of the ceramic substrate 2 (upper surface in FIG. 2), and both ends overlapped with the pair of surface electrodes 4 A resistor 5 provided on the surface of the ceramic substrate 2, a pair of end surface electrodes 6 provided on both end surfaces in the longitudinal direction of the ceramic substrate 2 to bridge the back electrode 3 and the surface electrode 4, and the resistor 5 And a protective layer 7 having a two-layer structure covering the surface, and an external electrode 8 having a U-shaped cross-section covering the front electrode 4, the end surface electrode 6 and the back electrode 3.

  The ceramic substrate 2 is an insulating base mainly composed of alumina, and the ceramic substrate 2 is obtained by dividing a large-sized substrate, which will be described later, along a vertical and horizontal dividing groove and by taking a large number. FIG. 3 is a cross-sectional view taken along the line III-III shown in FIG. 1. As shown in FIG. 3, a chamfered inclined surface 2a is formed between both side surfaces and the back surface of the ceramic substrate 2 in the short direction. When the thickness dimension of the ceramic substrate 2 is T and the height dimension of the inclined surface 2a is H, these relationships are set to 1/3 <H / T <2/3. Further, if the angle formed between the lateral surface of the ceramic substrate 2 and the inclined surface 2a is θ, this θ is set in a range of 30 ° to 60 °. That is, this inclined surface 2a is set as a considerably large tapered surface as compared with a taper applied for chipping prevention or the like.

  The back electrode 3 is obtained by screen-printing Ag paste and drying and firing, and the front electrode 4 is also obtained by screen-printing Ag paste and drying and firing. The resistor 5 is obtained by screen-printing a resistor paste such as ruthenium oxide, drying and firing, and the resistance value of the chip resistor 1 is adjusted by forming a trimming groove (not shown) in the resistor 5. Has been. The end face electrode 6 is formed on the end face of the ceramic substrate 2 by sputtering, and is made of a sputtered film containing chromium (Cr) having good adhesion to the ceramic substrate 2 and a barrier layer material. The barrier layer functions as a cushioning material against thermal stress (heat shock), and nickel (Ni) or copper (Cu) is used. The external electrode 8 is formed by electrolytic plating, and is made of tin (Sn) -lead (Pb), lead-free Sn, or the like. When the chip resistor 1 is manufactured, a large number of back surface electrodes 3, front surface electrodes 4, resistors 5, protective layers 7 and the like are collectively formed on a large substrate.

  Next, the manufacturing process of the chip resistor 1 configured as described above will be described with reference to FIG.

  First, as shown in FIG. 4A, a large-sized substrate 10 on which a large number of ceramic substrates 2 are taken is prepared, and a laser scribe is used for the large-sized substrate 10 to form a lattice as shown in FIG. The surface-shaped surface split slits (primary surface slit 10a and secondary surface slit 10b) are formed, and a primary back slit 10c as shown in FIG. 4C is formed. Thereafter, a V-shaped groove is formed on the back surface of the large-sized substrate 10 by using a V-shaped dicing blade 11 as shown in FIG. 4D, so that the large-sized substrate is formed as shown in FIG. A secondary back V-groove 10d extending in a direction orthogonal to the primary back slit 10c is formed on the back surface of 10. The secondary back V-groove 10d is a groove having a size and an angle corresponding to the inclined surface 2a of the ceramic substrate 2, and the depth of the secondary back V-groove 10d is determined by the surface division slits 10a and 10b and the primary back surface. It is set to a sufficiently large value compared to the groove depth of the slit 10b.

  Thus, after forming the division | segmentation groove | channel including the secondary back V-groove 10d previously in the large format board | substrate 10, by printing Ag paste on the surface and the back surface of the large format substrate 10 and baking it as a 1st process, a primary surface A surface electrode which overlaps with the slit 10a and does not overlap with the secondary surface slit 10b is formed, and a back electrode which overlaps with the primary back surface slit 10c and does not overlap with the secondary back V-groove 10d is formed. Next, as a second step, a resistor paste such as ruthenium oxide is screen-printed on the surface of the large-sized substrate 10 and baked, thereby forming a resistor in which both end portions overlap with the surface electrode.

  Next, as a third step, an undercoat layer that covers the resistor is formed by screen-printing and baking a glass paste in a region that covers the resistor. Thereafter, as a fourth step, a laser is irradiated onto the undercoat to form a trimming groove in a part of the resistor, thereby adjusting to a desired resistance value. Next, as a fifth step, an epoxy resin paste is screen printed so as to cover the undercoat layer and baked to form an overcoat layer covering the resistor and the undercoat layer. A protective layer having a two-layer structure is formed by the coat layer.

  The process up to this point is a batch process for the large-sized substrate 10 for taking a large number of pieces. In the next sixth step, the large-sized substrate 10 is divided along the primary surface slit 10a and the primary back surface slit 10b (primary division). ), A large number of strip-shaped substrates 12 as shown in FIG. Then, in the next seventh step, Cr / Ni is sputtered onto the split surface of the strip-shaped substrate 12 to form an end face electrode that bridges the front electrode and the back electrode.

  Thereafter, as an eighth step, the strip-shaped substrate 12 is divided (secondary division) along the secondary surface slit 10b and the secondary back V-groove 10d, whereby individualization as shown in FIG. The obtained chip 13 is obtained. Next, as a ninth step, a barrier layer (Ni plating layer) covering the front surface electrode, the back surface electrode, and the end surface electrode is formed by performing electroplating on the end surface of the separated chip unit 13, and finally In the tenth step, the chip resistor 1 having the external electrodes as shown in FIGS. 1 to 3 is completed by forming the solder plating by electrolytic plating so as to cover the barrier layer.

  In the manufacturing process of the chip resistor 1 described above, a large substrate 10 in which all the divided grooves including the secondary back V-groove 10d are prepared in advance is prepared. Although the chip resistor 1 is obtained by performing 10 steps, it is also possible to form only the secondary back V-groove 10d later. Specifically, the first step (front and back electrode forming step) described above for the large-sized substrate 10 on which only the surface division slits (the primary surface slit 10a and the secondary surface slit 10b) and the primary back surface slit 10c are formed. After the fifth step (protective layer forming step) is executed, the secondary back V-groove 10d is formed on the large-sized substrate 10, and then the sixth step (primary division step) to the tenth step (external electrode formation). Steps) may be executed. Thus, if the secondary back V-groove 10d having a large groove depth is formed later, cracks in the printing process of the front and back electrodes and the resistor can be reliably prevented.

  In the manufacturing process of the chip resistor 1 described above, the chip unit 13 having the inclined surface 2a is obtained by performing secondary division along the secondary back V-groove 10d previously formed on the large substrate 10. However, it is also possible to form the inclined surface 2a when the large substrate 10 is secondarily divided by dicing. Hereinafter, this manufacturing process will be described with reference to FIG.

  First, as shown in FIG. 5A, a large-sized substrate 10 on which a large number of ceramic substrates 2 are taken is prepared, and laser scribing is performed on the front and back surfaces of the large-sized substrate 10 in FIG. 5B. A primary surface slit 10a and a primary back slit 10c as shown are formed. In this case, the secondary surface slit 10b and the secondary back V-groove 10d described above are not formed.

  Next, after performing the above-described first step (front and back electrode forming step) to fifth step (protective layer forming step) on such a large substrate 10, the large substrate 10 is changed to 1 in the next sixth step. By dividing (primary division) along the next front surface slit 10a and the first back surface slit 10b, a large number of strip-shaped substrates 12 as shown in FIG. 5C are obtained. Next, after forming an end face electrode by sputtering on the dividing surface of the strip-shaped substrate 12 as a seventh step, in the next eighth step, the strip-shaped substrate 12 using the dicing blade 14 having the shape shown in FIG. Is cut (secondary division) in a direction perpendicular to the primary surface slit 10a. Since the dicing blade 14 has an inclined surface 14a having a predetermined angle, as shown in FIG. 5E, an inclined surface corresponding to the shape of the dicing blade 14 is formed by secondary division of the strip-shaped substrate 12. The chip | tip simple substance 13 which has is obtained.

  Thereafter, as a ninth step, a barrier layer (Ni plating layer) that covers the front surface electrode, the back surface electrode, and the end surface electrode is formed by performing electrolytic plating on the end surface of the separated chip 13, and finally, As a tenth step, the chip resistor 1 having the external electrodes as shown in FIGS. 1 to 3 is completed by forming a solder plating by electrolytic plating so as to cover the barrier layer. In addition, it is possible to omit the primary surface slit 10a and the primary back slit 10c shown in FIG. 5B. In that case, the large substrate 10 is cut by dicing in the sixth step to perform primary division. Just do it.

  As shown in FIG. 6, the chip resistor 1 according to the present embodiment is mounted on the land 31 provided on the circuit board 30 with the back surface electrode 3 facing downward, and is the outermost layer covering the end surface electrode 6. The external electrode 8 is surface-mounted on the circuit board 30 by bonding with the solder 32. Further, the entire periphery of the chip resistor 1 is sealed with a resin sealant 40 in order to protect the chip resistor 1 from an environment such as light, heat, or humidity.

  The filling method of the resin sealing agent 40 will be described. First, after mounting the chip resistor 1 on the circuit board 30 and soldering the external electrode 8 to the land 31, an epoxy resin or the like around the chip resistor 1. Resin paste is supplied by a dispenser or the like, and if necessary, the outflow of the resin paste is stopped using a blocking member. At this time, a narrow space exists between the lower surface of the ceramic substrate 2 and the circuit board 30 in a portion between the pair of back surface electrodes 3, but an inclined surface is formed between both side surfaces of the ceramic substrate 2 in the short direction and the back surface. Since 2a is formed, the resin paste smoothly flows into the space along the inclined surface 2a, and the amount of cavities remaining in the space can be reduced as much as possible. After that, if the circuit board 30 on which the chip resistor 1 is mounted is conveyed to a reflow furnace and the resin paste is heated and cured to form the resin sealant 40, the chip resistor 1 is mounted as shown in FIG. A structure is obtained.

  As described above, in the chip resistor 1 according to the present embodiment example, the inclined surface 2a is formed between the lateral surface and the back surface of the ceramic substrate 2 in the short direction, and the thickness dimension of the ceramic substrate 2 is T, When the height dimension of the inclined surface 2a is H, these relationships are set to 1/3 <H / T <2/3. Therefore, the chip resistor 1 is soldered on the circuit board 30. When the resin sealant 40 is supplied, the resin sealant 40 easily flows into a narrow space existing between the lower surface of the ceramic substrate 2 and the circuit board 30, and the adhesion strength of the resin sealant 40 to the circuit board 30 is increased. Can be increased.

  In the above embodiment, the chip resistor 1 soldered onto the circuit board 30 is sealed with the resin sealant 40. However, the chip resistor 1 may be an internal type such as a network resistor. The present invention is applicable.

1 Chip resistor 2 Ceramic substrate (insulating base)
2a Inclined surface 3 Back electrode 4 Surface electrode 5 Resistor 6 End surface electrode 7 Protective layer 8 External electrode 10 Large format substrate 10a Primary surface slit 10b Secondary surface slit 10c Primary back slit 10d Secondary back V-groove 11, 14 Dicing blade 12 Strip board 13 Chip unit 30 Circuit board 31 Land 40 Resin sealant

Claims (2)

A rectangular parallelepiped insulating base, a pair of surface electrodes provided at both longitudinal ends of the surface of the insulating base, and provided on the surface of the insulating base so as to be connected to the pair of surface electrodes A pair of back electrodes provided at both ends in the longitudinal direction of the back surface of the insulating base, and the surface electrode and the back electrode provided at both end surfaces of the insulating base. A pair of end electrodes in contact with each other;
A chamfered inclined surface is formed between both lateral surfaces and the back surface of the insulating base in the lateral direction, and the thickness dimension of the insulating base is T and the height dimension of the inclined surface is H. When these relationships are set to 1/3 <H / T <2/3, and the angle formed between the side surface in the short direction of the insulating base and the inclined surface is θ, The chip resistor, wherein θ is set in a range of 30 ° to 60 °.   The chip resistor according to claim 1 is mounted by soldering the back electrode on a land provided on a circuit board, and the entire chip resistor is sealed with a resin sealing material. A chip resistor mounting structure characterized by that.