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JP2014229963A - Terminator - Google Patents

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JP2014229963A
JP2014229963A JP2013105866A JP2013105866A JP2014229963A JP 2014229963 A JP2014229963 A JP 2014229963A JP 2013105866 A JP2013105866 A JP 2013105866A JP 2013105866 A JP2013105866 A JP 2013105866A JP 2014229963 A JP2014229963 A JP 2014229963A
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conductor
conductor pattern
line
resistor
substrate
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JP6115305B2 (en
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晃洋 安藤
Akihiro Ando
晃洋 安藤
実人 木村
Makoto Kimura
実人 木村
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Mitsubishi Electric Corp
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Abstract

【課題】 終端器はマイクロ波回路に広く使われているが、入力電力の増加に伴い線路導体が大型化してインピーダンス整合できる帯域が狭くなり、またマイクロ波を熱に変換する上で、発熱に分布ができ耐電力が低くなる問題があった。【解決手段】 円形の抵抗体及び当該抵抗体に接続される導電性ビア、当該導電性ビアに接続される導体パターン、当該導体パターンとマイクロストリップ線路またはトリプレート線路に接続される導電性ビア、とを備えて終端器を構成する。【選択図】 図1PROBLEM TO BE SOLVED: A terminator is widely used in a microwave circuit. However, as the input power increases, the line conductor becomes larger and the impedance matching band becomes narrower. In addition, the microwave is converted into heat. There was a problem that the distribution could be made and the withstand power was lowered. A circular resistor and a conductive via connected to the resistor, a conductor pattern connected to the conductive via, a conductive via connected to the conductor pattern and a microstrip line or a triplate line, And the terminator is configured. [Selection] Figure 1

Description

本発明は、マイクロ波またはミリ波帯の高周波回路に用いられ、伝送線路を伝搬する高周波信号を吸収するための終端器に関するものである。   The present invention relates to a terminator for absorbing a high frequency signal propagating in a transmission line, which is used in a microwave or millimeter wave high frequency circuit.

マイクロ波終端器またはミリ波終端器(以下、終端器と略す)は、伝送線路を伝搬するマイクロ波帯の高周波信号を吸収する。終端器は、マイクロ波回路を含む高周波回路に広く用いられている。   A microwave terminator or a millimeter wave terminator (hereinafter abbreviated as a terminator) absorbs a microwave band high-frequency signal propagating through a transmission line. Terminators are widely used in high-frequency circuits including microwave circuits.

一方、マイクロストリップ線路の線路導体と地導体の間を、該線路導体よりも幅の広い抵抗体で接続し、線路導体の幅に合わせて抵抗体の幅を徐々に広げることによって、インピーダンスの不整合を解消する終端器が知られている(例えば特許文献1参照)。   On the other hand, by connecting the line conductor and ground conductor of the microstrip line with a resistor wider than the line conductor and gradually increasing the width of the resistor in accordance with the width of the line conductor, impedance is reduced. A terminator that eliminates matching is known (see, for example, Patent Document 1).

特開2005−260454JP 2005-260454 A

しかしながら、特許文献1に示されるような従来の終端器は、マイクロストリップ線路の端部に該線路導体より幅の広い抵抗膜を接続している。このため、入力電力の増加に伴い整合をとるための線路導体が大型化し、整合できる帯域が狭くなってしまうという問題があった。   However, in the conventional terminator as shown in Patent Document 1, a resistance film having a width wider than that of the line conductor is connected to the end of the microstrip line. For this reason, there is a problem in that the line conductor for matching is increased with an increase in input power, and the matching band is narrowed.

また、線路導体と該線路導体よりも幅の広い導体を接続し、この幅の広い導体を抵抗体に接続することで、終端器の広帯域化を図ることができる。しかし、この場合は線路導体の広がる箇所から抵抗膜までの距離を同じとすることはできず、抵抗体における発熱分布を均一とすることはできない。このため耐電力は最も発熱が集中する部分に依存する。   Further, by connecting a line conductor and a conductor wider than the line conductor and connecting the wide conductor to the resistor, the bandwidth of the terminator can be increased. However, in this case, the distance from the portion where the line conductor spreads to the resistance film cannot be made the same, and the heat generation distribution in the resistor cannot be made uniform. For this reason, the power durability depends on the portion where heat generation is most concentrated.

本発明は係る課題を解決するためになされたものであり、インピーダンス整合できるマイクロ波の帯域を広くするとともに、均等な発熱分布を得ることにより高耐電力を実現することを目的とする。   SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to widen a microwave band in which impedance matching can be performed and to achieve high power resistance by obtaining an even heat distribution.

本発明による終端器は、線路導体、導体パターンおよび接地導体パターンが接合された複数の層で形成され、それぞれの層間をそれぞれ導体ビアによって接続した多層基板と、上記多層基板に形成された抵抗体と、を備え、上記導体パターンは、上記導体ビアにより上記線路導体に接続される接続導体パターンを形成し、上記接続導体パターンは、上記導体ビアにより上記抵抗体に接続され、上記接地導体パターンは、上記抵抗体に接続されたものである。   A terminator according to the present invention is formed of a plurality of layers in which a line conductor, a conductor pattern, and a ground conductor pattern are joined, and each layer is connected by a conductor via, and a resistor formed on the multilayer substrate. The conductor pattern forms a connection conductor pattern connected to the line conductor by the conductor via, the connection conductor pattern is connected to the resistor by the conductor via, and the ground conductor pattern is , Connected to the resistor.

本発明によれば、終端器のインピーダンスを広帯域に整合するとともに、終端器に入力されたマイクロ波による発熱分布を均等化することができる。   ADVANTAGE OF THE INVENTION According to this invention, while matching the impedance of a termination | terminus device to a wide band, the heat_generation | fever distribution by the microwave input into the termination | terminus device can be equalized.

実施の形態1による終端器の構成を示す側面図である。It is a side view which shows the structure of the termination | terminus device by Embodiment 1. FIG. 実施の形態1による終端器の構成を示す各層の平面図である。FIG. 3 is a plan view of each layer showing the configuration of the terminator according to the first embodiment. 実施の形態1による終端器の特性を説明するための小信号特性のシミュレーション結果を示す図である。It is a figure which shows the simulation result of the small signal characteristic for demonstrating the characteristic of the termination | terminus device by Embodiment 1. FIG.

実施の形態1.
図1は、この発明に係る実施の形態1による終端器の構成を示す側面図である。図2は、実施の形態1による終端器の構成を示す平面図であり、(a)は基板1層目の配線パターンを示した上面図(図1の紙面上方から基板1層目の上面を見た図)、(b)は基板2層目のパターンを示した上面透視図(図1の紙面上方から基板2層目の上面を透視した図)である。図2(c)は基板3層目のパターンを示した上面透視図(図1の紙面上方から基板3層目の上面を透視した図)である。図2(d)は基板4層目のパターンを示した上面透視図(図1の紙面上方から基板4層目の上面を透視した図)である。
Embodiment 1 FIG.
1 is a side view showing a configuration of a terminator according to Embodiment 1 of the present invention. 2 is a plan view showing the configuration of the terminator according to the first embodiment. FIG. 2A is a top view showing the wiring pattern of the first layer of the substrate (the upper surface of the first layer of the substrate from the upper side of FIG. 1). FIGS. 2A and 2B are top perspective views showing a pattern of the second layer of the substrate (views of the top surface of the second layer of the substrate from above in FIG. 1). FIG. 2C is a top perspective view showing a pattern of the third layer of the substrate (a view seen through the upper surface of the third layer of the substrate from the upper side of FIG. 1). FIG. 2D is a top perspective view showing a pattern of the fourth layer of the substrate (a view seen through the upper surface of the fourth layer of the substrate from the upper side in FIG. 1).

図1、2において、実施の形態1による終端器500は、基板1層目から基板4層目までの積層された基板として構成される。基板1層目10、基板2層目20、基板3層目30及び基板4層目40は、電子回路が形成された多層基板を構成している。基板1層目10、基板2層目20、基板3層目30及び4層目40は、この順番を保ったまま任意の層数からなる多層基板の層に隣接して配置される。基板1層目には電力の入力側線路としてマイクロストリップ線路2が配置されている。基板1層目10のマイクロストリップ線路2は、導電性のビア(VIA)1により基板3層目30の円形導体パターン3に接続される。ここで基板2層目20の導体パターンは基板1層目10のマイクロストリップ線路2の接地導体パターン4となっている。また、ビア1は接地導体パターン4における導体部が円形に刳り貫かれた部分に配置されており、接地導体パターン4と電気的に非接触となっている。   1 and 2, the terminator 500 according to the first embodiment is configured as a stacked substrate from the first layer to the fourth layer of the substrate. The first substrate layer 10, the second substrate layer 20, the third substrate layer 30 and the fourth substrate layer 40 constitute a multilayer substrate on which electronic circuits are formed. The first substrate layer 10, the second substrate layer 20, the third substrate layer 30 and the fourth layer 40 are arranged adjacent to the multilayer substrate layer having any number of layers while maintaining this order. On the first layer of the substrate, a microstrip line 2 is arranged as an electric power input side line. The microstrip line 2 on the first layer 10 of the substrate is connected to the circular conductor pattern 3 on the third layer 30 of the substrate by a conductive via (VIA) 1. Here, the conductor pattern of the second substrate layer 20 is the ground conductor pattern 4 of the microstrip line 2 of the first substrate layer 10. In addition, the via 1 is disposed in a portion where the conductor portion of the ground conductor pattern 4 is circularly penetrated, and is not in electrical contact with the ground conductor pattern 4.

基板3層目30は、円形導体パターン3からなる。円形導体パターン3における上側の表面は、マイクロストリップ線路2に接続する導体ビア1が接続されている。また、円形導体パターン3における下側の表面(裏面)は、導体ビア5が上側表面の導体ビア1から一定の距離をとった円上(円形導体パターン3の外周に沿った部位および当該外周よりも内側部位)に複数本形成されている。円形導体パターン3に接続された導体ビア5は、基板4層目40の抵抗体6に接続されている。   The third layer 30 of the substrate is composed of the circular conductor pattern 3. A conductor via 1 connected to the microstrip line 2 is connected to the upper surface of the circular conductor pattern 3. Further, the lower surface (back surface) of the circular conductor pattern 3 is on a circle in which the conductor via 5 takes a certain distance from the conductor via 1 on the upper surface (from the portion along the outer periphery of the circular conductor pattern 3 and the outer periphery). Are also formed in the inner part). The conductor via 5 connected to the circular conductor pattern 3 is connected to the resistor 6 in the fourth layer 40 of the substrate.

基板4層目40の抵抗体6の周囲は、接地導体パターン100が形成されており、基板2層目の接地導体パターン4とも接続されており同電位である。接地導体パターン4と接地導体パターン100は、図示しないビア(VIA)により接続されている。   A ground conductor pattern 100 is formed around the resistor 6 in the fourth layer 40 of the substrate, and is connected to the ground conductor pattern 4 in the second layer of the substrate and has the same potential. The ground conductor pattern 4 and the ground conductor pattern 100 are connected by a via (VIA) (not shown).

ここで入力側線路としている基板1層目10のマイクロストリップ線路2はストリップ線路に置き換えた場合でも同様の機能を果たす。他にトリプレート線路や導波管でも同様の機能を果たす。そのほかの電力が伝搬できる線路であれば基板1層目10のマイクロストリップ線路は置き換えることが可能である。   Here, the microstrip line 2 on the first layer 10 of the substrate as the input side line performs the same function even when it is replaced with a strip line. In addition, a triplate line and a waveguide perform the same function. The microstrip line on the first layer 10 of the substrate can be replaced if it is a line through which other power can propagate.

図3は、上記効果を確認するために行った小信号特性のシミュレーション結果である。図3(a)及び(b)は長方形の抵抗体の1辺にマイクロストリップ線路より電力が供給される従来構造に対するシミュレーション結果を、図3(c)及び(d)は図1に示した構造に対するシミュレーション結果をそれぞれ示す。シミュレーションには有限要素法電磁界シミュレーションを用いた。   FIG. 3 is a simulation result of small signal characteristics performed to confirm the above effect. 3 (a) and 3 (b) show simulation results for a conventional structure in which power is supplied from one microstrip line to one side of a rectangular resistor, and FIGS. 3 (c) and 3 (d) show the structure shown in FIG. The simulation results for are shown respectively. A finite element electromagnetic field simulation was used for the simulation.

図3に示した(a)及び(c)のグラフはスミスチャートで周波数8GHzから12GHzの特性を示している。50Ωである円の中心に対して(c)は(a)に対して内側を回っており、整合が取れている。また、グラフの横軸は周波数を示しており、縦軸に反射損失を示している。反射損失15dB以下で見ると図3(d)は(b)に対して広い周波数にわたって、広帯域に良好な反射が得られていることが確認できる。   The graphs (a) and (c) shown in FIG. 3 are Smith charts showing characteristics of frequencies from 8 GHz to 12 GHz. With respect to the center of the circle of 50Ω, (c) turns inward with respect to (a) and is matched. Further, the horizontal axis of the graph indicates the frequency, and the vertical axis indicates the reflection loss. When viewed at a reflection loss of 15 dB or less, FIG. 3 (d) confirms that good reflection is obtained in a wide band over a wide frequency with respect to (b).

実施の形態1による終端器は、多層基板の構造を用いて入力側線路と異なる層に抵抗体を配置したことを特徴とするもので、多層基板を樹脂で形成しても良いし、他の多層を構成できる基板材料によりたとえばLTCC(:Low Temperature Co-fired Ceramics;低温焼成基板)やHTCC(High Temperature Co-fired Ceramics;高温焼成基板)において構成してもよい。また基板1層目、基板2層目、基板3層目及び基板4層目のうち、複数層を別材料によって構成してもよい。これにより例えば基板1層目、基板2層目及び基板3層目を材料価格の高いセラミック基板でなく材料価格のより安い樹脂基板で構成することができるので、基板全体をセラミック基板で構成する場合に比べて、より安価に高周波電力終端器を構成することもできる。   The terminator according to the first embodiment is characterized in that a resistor is arranged in a layer different from the input-side line using the structure of the multilayer substrate, and the multilayer substrate may be formed of a resin. For example, LTCC (Low Temperature Co-fired Ceramics) or HTCC (High Temperature Co-fired Ceramics) may be used depending on the substrate material that can form a multilayer. Further, among the first layer, the second layer, the third layer, and the fourth layer of the substrate, a plurality of layers may be made of different materials. As a result, for example, the first substrate, the second substrate, and the third substrate can be configured with a resin substrate with a lower material price instead of a ceramic substrate with a higher material price. Compared to the above, the high-frequency power terminator can be configured at a lower cost.

以上説明した通り、実施の形態1による終端器は、線路導体(マイクロストリップ線路2)、導体パターンおよび接地導体パターン(接地導体パターン4)が接合された複数の層で形成され、それぞれの層間をそれぞれ導体ビア(5)によって接続した多層基板と、上記多層基板に形成された抵抗体(抵抗体パターン6)と、を備え、上記導体パターンは、上記導体ビアにより上記線路導体に接続される接続導体パターン(円形導体パターン3)を形成し、上記接続導体パターンは、上記導体ビアにより上記抵抗体に接続され、上記接地導体パターンは、上記抵抗体に接続されたことを特徴とする。   As described above, the terminator according to the first embodiment is formed of a plurality of layers in which a line conductor (microstrip line 2), a conductor pattern, and a ground conductor pattern (ground conductor pattern 4) are joined. A multi-layer substrate each connected by a conductor via (5) and a resistor (resistor pattern 6) formed on the multi-layer substrate, wherein the conductor pattern is connected to the line conductor by the conductor via A conductor pattern (circular conductor pattern 3) is formed, the connection conductor pattern is connected to the resistor by the conductor via, and the ground conductor pattern is connected to the resistor.

また、上記接続導体パターン(円形導体パターン3)は、上下層にそれぞれ配置された第1の接地導体パターン(4)、第2の接地導体パターン(100)に挟まれている。また、上記第1の接地導体パターン(4)は、上記線路導体とともにマイクロストリップ線路(2)またはトリプレート線路を構成し、上記線路導体と上記接続導体パターンを接続する導体ビアを非接触に取り囲むように配置され、上記第2の接地導体パターン(100)は、上記抵抗体(抵抗体パターン6)と同一面に形成される。また、上記接続導体パターン(円形導体パターン3)は円形状であって、上記抵抗体(抵抗体パターン6)は円形状である。なお、上記線路導体(マイクロストリップ線路2)は整合回路を有している。   Further, the connection conductor pattern (circular conductor pattern 3) is sandwiched between the first ground conductor pattern (4) and the second ground conductor pattern (100) respectively disposed in the upper and lower layers. The first ground conductor pattern (4) constitutes a microstrip line (2) or a triplate line together with the line conductor, and surrounds a conductor via connecting the line conductor and the connection conductor pattern in a non-contact manner. The second ground conductor pattern (100) is formed on the same surface as the resistor (resistor pattern 6). The connection conductor pattern (circular conductor pattern 3) is circular, and the resistor (resistor pattern 6) is circular. The line conductor (microstrip line 2) has a matching circuit.

このように実施の形態1の高周波電力終端器500は、抵抗体が形成された基板4層に複数の導体ビアを接続することによって、入力側主線路から熱に変換する抵抗体までの距離を完全に均一にすることで広帯域の整合かつ均等な発熱分布を得ることができる。   As described above, the high frequency power terminator 500 according to the first embodiment connects the plurality of conductor vias to the four layers of the substrate on which the resistor is formed, thereby reducing the distance from the input main line to the resistor that converts heat. By making it completely uniform, a broadband matching and uniform heat distribution can be obtained.

1 導体ビア、2 マイクロストリップ線路、3 円形導体パターン、4 接地導体パターン、5 導体ビア、6 抵抗体パターン、10 基板1層目、20 基板2層目、30 基板3層目、40 基板4層目、100 接地導体パターン、500 高周波電力増幅器。   1 conductor via, 2 microstrip line, 3 circular conductor pattern, 4 ground conductor pattern, 5 conductor via, 6 resistor pattern, 10 substrate first layer, 20 substrate second layer, 30 substrate third layer, 40 substrate four layers Eye, 100 Ground conductor pattern, 500 High-frequency power amplifier.

Claims (5)

線路導体、導体パターンおよび接地導体パターンが接合された複数の層で形成され、それぞれの層間をそれぞれ導体ビアによって接続した多層基板と、
上記多層基板に形成された抵抗体と、
を備え、
上記導体パターンは、上記導体ビアにより上記線路導体に接続される接続導体パターンを形成し、
上記接続導体パターンは、上記導体ビアにより上記抵抗体に接続され、
上記接地導体パターンは、上記抵抗体に接続された
ことを特徴とする終端器。
A multi-layer board formed by a plurality of layers joined with a line conductor, a conductor pattern and a ground conductor pattern, and each layer connected by a conductor via,
A resistor formed on the multilayer substrate;
With
The conductor pattern forms a connection conductor pattern connected to the line conductor by the conductor via,
The connection conductor pattern is connected to the resistor by the conductor via,
The terminator characterized in that the ground conductor pattern is connected to the resistor.
上記接続導体パターンは、上下層にそれぞれ配置された第1、第2の接地導体パターンに挟まれたことを特徴とする請求項1記載の終端器。   2. The terminator according to claim 1, wherein the connection conductor pattern is sandwiched between first and second ground conductor patterns respectively disposed on upper and lower layers. 上記第1の接地導体パターンは、上記線路導体とともにマイクロストリップ線路またはトリプレート線路を構成し、上記線路導体と上記接続導体パターンを接続する導体ビアを非接触に取り囲むように配置され、
上記第2の接地導体パターンは、上記抵抗体と同一面に形成されたことを特徴とする請求項2記載の終端器。
The first ground conductor pattern constitutes a microstrip line or a triplate line together with the line conductor, and is disposed so as to surround a conductor via connecting the line conductor and the connection conductor pattern in a non-contact manner.
The terminator according to claim 2, wherein the second ground conductor pattern is formed on the same surface as the resistor.
上記接続導体パターンは円形状であって、上記抵抗体は円形状であることを特徴とする請求項1から請求項3の何れか1項に記載の終端器。   The terminator according to any one of claims 1 to 3, wherein the connection conductor pattern has a circular shape, and the resistor has a circular shape. 上記線路導体は、整合回路を具備したことを特徴とする請求項1から請求項4の何れか1項に記載の終端器。   The terminator according to any one of claims 1 to 4, wherein the line conductor includes a matching circuit.
JP2013105866A 2013-05-20 2013-05-20 Terminator Expired - Fee Related JP6115305B2 (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3509495A (en) * 1966-12-01 1970-04-28 Raytheon Co Strip transmission line termination device
US5208561A (en) * 1990-12-27 1993-05-04 Thomson-Csf Load for ultrahigh frequency three-plate stripline with dielectric substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3509495A (en) * 1966-12-01 1970-04-28 Raytheon Co Strip transmission line termination device
US5208561A (en) * 1990-12-27 1993-05-04 Thomson-Csf Load for ultrahigh frequency three-plate stripline with dielectric substrate

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