JP2014110311A - Semiconductor device - Google Patents

Abstract

A semiconductor device including a diode and a transistor having a low current density in a main electrode is provided.
A lateral semiconductor device including a diode and a transistor monolithically and electrically connected in parallel, wherein a main current flows on a main surface side, wherein the diode and the transistor receive a main current. A main electrode to be flown is shared, and the shared main electrode allows a main current to flow alternately to the diode and the transistor one by one.
[Selection] Figure 1A

Description

  The present invention relates to a semiconductor device in which a diode and a transistor are monolithically connected.

  A so-called semiconductor device used for electric power is mainly composed of a diode and a transistor. In particular, in an inverter application, a diode and a transistor are generally used by being electrically connected in parallel. Furthermore, in the same way for power supplies, diodes and transistors are often connected in parallel.

  When the connected load is a motor or other inductance, the diode and the transistor are connected in parallel. When the current flowing in the transistor is cut off, the inductance generates a reverse voltage to maintain the current. However, the current due to the reverse voltage can be temporarily returned by the diode.

  FIG. 3 is an example of a circuit diagram of the inverter circuit. This circuit diagram is a three-phase inverter in which three inverters in which a diode D and a transistor T are connected in parallel are connected, to which a power source P and a motor M are connected. In this circuit, when a current flows through the diode D, no current flows through the transistor T. Conversely, no current flows through the diode D while a current flows through the transistor T.

  Conventionally, silicon has been mainly used for power semiconductor devices. On the other hand, nitride-based, particularly gallium nitride (GaN) -based compound semiconductors are used as semiconductor materials in high-frequency device semiconductor devices (hereinafter referred to as GaN-based semiconductor devices). A GaN-based semiconductor device has a structure in which a buffer layer or a GaN-based semiconductor operation layer formed using, for example, metal organic chemical vapor deposition (MOCVD) method is provided on the surface of a semiconductor substrate. is there. Recently, in addition to the high-frequency applications of GaN-based semiconductor devices, GaN-based semiconductor devices that handle high withstand voltages and large currents have been studied based on the recognition that GaN-based semiconductor devices can also be applied to power semiconductor devices. (For example, refer to Patent Document 1). Under such circumstances, a semiconductor device in which a diode using a GaN-based semiconductor device and a transistor are connected in parallel is extremely practical.

  FIG. 4 is a schematic cross-sectional view of a semiconductor device in which a diode using a GaN-based semiconductor and a transistor using a GaN-based semiconductor according to the related art are connected in parallel. Here, in FIG. 4, a diode D2 using a GaN-based semiconductor is a Schottky Barrier Diode (SBD), and a transistor T2 using the GaN-based semiconductor is a high electron mobility transistor (HEMT: High Electron Mobility Transistor). ). To configure the circuit of FIG. 3, the anode electrode a of the diode D2 and the source electrode s of the transistor T2 are connected, and the cathode electrode c of the diode D2 and the drain electrode d of the transistor T2 are connected by wiring. The The semiconductor device 200 composed of the diode D2 and the semiconductor device 300 composed of the transistor T2 are separately manufactured as separate devices, and then assembled into a package, wired as shown in FIG. .

  Next, the semiconductor device 200 composed of the diode D2 and the semiconductor device 300 composed of the transistor T2 constituting the semiconductor device 1000 shown in FIG. 4 will be described. FIG. 5A is a schematic cross-sectional view of an example of a semiconductor device including a diode using the GaN-based semiconductor shown in FIG. A diode D2 shown in FIG. 5A is an SBD, and a buffer layer 202 for laminating a GaN layer, a GaN layer 203, and an AlGaN layer 204 are sequentially laminated on a substrate 201. A two-dimensional electron gas (2DEG) layer 203a whose concentration is controlled by controlling the Al composition ratio and thickness of the AlGaN layer 204 is formed at the interface between the GaN layer 203 and the AlGaN layer 204. The 2DEG layer 203a serves as a passage through which electrons flow. Further, an anode electrode a and a cathode electrode c are formed on the AlGaN layer 204 as main electrodes.

  FIG. 5B is a schematic plan view of the semiconductor device made of a diode using the GaN-based semiconductor shown in FIG. 5A as viewed from above. As shown in FIG. 5B, in the semiconductor device 200, the anode electrode a and the cathode electrode c are formed on the 2DEG layer 203a on the same plane. The main electrodes, which are the anode electrode a and the cathode electrode c, have elongated finger shapes, and are connected to the anode electrode pad 211 and the cathode electrode pad 212, respectively, in order to extract current from the outside. The device width of the semiconductor device 200 is W2, and the length of the finger electrode that is the finger-shaped main electrode is L2.

  6A is a schematic cross-sectional view of an example of a semiconductor device including a transistor using the GaN-based semiconductor shown in FIG. The transistor T2 illustrated in FIG. 6A is a HEMT, and a buffer layer 302, a GaN layer 303, and an AlGaN layer 304 are sequentially stacked on a substrate 301, and 2DEG that allows electrons to flow at the interface between the GaN layer 303 and the AlGaN layer 304. A layer 303a is formed. Further, a source electrode s, a drain electrode d, and a gate electrode g are formed as main electrodes on the AlGaN layer 304.

  6B is a schematic plan view of the semiconductor device including the transistor using the GaN-based semiconductor illustrated in FIG. 6A as viewed from above. As shown in FIG. 6B, in the semiconductor device 300, the source electrode s, the drain electrode d, and the gate electrode g are formed on the 2DEG layer 303a in the same plane. The main electrodes, which are the source electrode s, the drain electrode d, and the gate electrode g, have an elongated finger shape, and are connected to the source electrode pad 311, the drain electrode pad 312, and the gate electrode pad 313, respectively, in order to extract current to the outside. It is connected. The device width of the semiconductor device 300 is W3, and the length of the finger electrode that is the finger-shaped main electrode is L3.

JP 2006-100635 A

  However, in such a semiconductor device including a diode and a transistor, when the main electrode is a finger-shaped wiring as shown in FIGS. 5B and 6B, there is a problem that the current density in the main electrode increases.

  The present invention has been made in view of the above, and an object thereof is to provide a semiconductor device including a diode and a transistor having a low current density in a main electrode.

  In order to solve the above-described problems and achieve the object, a semiconductor device according to the present invention includes a diode and a transistor monolithically and electrically connected in parallel, and a main current flows on the main surface side. A horizontal semiconductor device, wherein the diode and the transistor share a main electrode through which a main current flows, and the shared main electrode allows a main current to flow alternately through the diode and the transistor one by one. And

  The semiconductor device according to the present invention is characterized in that, in the above invention, the main electrode is a finger electrode formed on an upper portion of the semiconductor device.

  In the semiconductor device according to the present invention, the anode electrode of the diode and the source electrode of the transistor share one main electrode, and the cathode electrode of the diode and the drain electrode of the transistor are one in the above invention. The main electrode is shared.

  Further, in the semiconductor device according to the present invention, in the above invention, a current cutoff region is provided below the main electrode shared by the anode electrode of the diode and the source electrode of the transistor, and the current cutoff region is The current path between the cathode electrode of the diode and the source electrode of the transistor is cut off.

  In the semiconductor device according to the present invention, the diode and the transistor are formed in at least a part of the first compound semiconductor layer made of a nitride compound semiconductor and the first compound semiconductor layer. A second compound semiconductor layer made of a nitride compound semiconductor having a band gap energy larger than that of the first compound semiconductor layer, and the electrically conductive layer of the diode and the transistor includes the first compound semiconductor layer and the second compound semiconductor layer. It is a two-dimensional electron gas layer formed near the interface with the second compound semiconductor layer.

  In the semiconductor device according to the present invention as set forth in the invention described above, the current cutoff region includes the two-dimensional electron gas layer, the two-dimensional electron gas layer on the diode side using the main electrode as an anode electrode, and the main It is a two-dimensional electron gas layer separation region that separates into a two-dimensional electron gas layer on the transistor side using an electrode as a source electrode.

  In the semiconductor device according to the present invention as set forth in the invention described above, the diode is a Schottky barrier diode.

  According to the present invention, it is possible to provide a semiconductor device including a diode and a transistor having a low current density in the main electrode.

FIG. 1A is a schematic cross-sectional view of the semiconductor device according to the embodiment. 1B is a schematic plan view of the semiconductor device shown in FIG. 1A as viewed from above. FIG. 2 is a diagram for explaining the time change of the current flowing through the semiconductor device shown in FIG. 4 constituting the inverter circuit and the semiconductor device according to the present embodiment. FIG. 3 is an example of a circuit diagram of the inverter circuit. FIG. 4 is a schematic cross-sectional view of a semiconductor device in which a diode using a GaN-based semiconductor and a transistor using a GaN-based semiconductor according to the related art are connected in parallel. FIG. 5A is a schematic cross-sectional view of an example of a semiconductor device including a diode using the GaN-based semiconductor shown in FIG. FIG. 5B is a schematic plan view of the semiconductor device made of a diode using the GaN-based semiconductor shown in FIG. 5A as viewed from above. 6A is a schematic cross-sectional view of an example of a semiconductor device including a transistor using the GaN-based semiconductor shown in FIG. 6B is a schematic plan view of the semiconductor device including the transistor using the GaN-based semiconductor illustrated in FIG. 6A as viewed from above. FIG. 7 is a schematic cross-sectional view illustrating a state where the anode electrode and the source electrode of the semiconductor device according to the embodiment share the main electrode. FIG. 8 is a schematic cross-sectional view showing a state in which the anode electrode and the source electrode of the semiconductor device according to the modification of the embodiment share the main electrode. FIG. 9 is a schematic cross-sectional view of a PN type semiconductor device according to the present invention.

  Embodiments of a semiconductor device according to the present invention will be described below with reference to the drawings. Note that the present invention is not limited to the embodiments. In the description of the drawings, the same or corresponding elements are appropriately denoted by the same reference numerals. Further, the drawings are schematic, and it should be noted that the relationship between the thickness and width of each layer, the ratio of each layer, and the like may differ from the actual situation. Even between the drawings, there are cases in which portions having different dimensional relationships and ratios are included.

(Embodiment)
First, a semiconductor device according to an embodiment of the present invention will be described. FIG. 1A is a schematic cross-sectional view of the semiconductor device according to the present embodiment. The semiconductor device 100 according to the present embodiment includes a plurality of AlN layers and GaN layers alternately as a buffer layer 102 for stacking a nitride-based semiconductor compound semiconductor layer on a substrate 101 made of silicon (Si). Layers are stacked. However, the substrate is not limited to Si, but may be sapphire, SiC, ZnO, GaN, or the like.

Further, a GaN layer 103 as a first compound semiconductor layer made of a nitride compound semiconductor and an AlGaN layer 104 as a second compound semiconductor layer made of a nitride compound semiconductor are sequentially stacked on the buffer layer 102. The AlGaN layer 104 is a mixed crystal of AlN and GaN, and has a larger band gap energy than the GaN layer 103, and the characteristics of the band gap, spontaneous polarization, and piezoelectric polarization change depending on the composition ratio. The AlGaN layer 104 is a single layer of, for example, Al _0.25 Ga _0.75 N. However, the AlGaN layer as the second compound semiconductor layer is not limited to an AlGaN single layer, and may be a pseudo mixed crystal layer in which a plurality of AlN layers and GaN layers are alternately stacked. In that case, the thickness of the AlN layer and the GaN layer may be adjusted to such an extent that 2DEG is not generated in the pseudo mixed crystal layer.

  At the interface between the GaN layer 103 and the AlGaN layer 104, a 2DEG layer 103 a whose concentration is controlled by controlling the Al composition ratio and thickness of the AlGaN layer 104 is formed. The 2DEG layer 103a serves as a passage through which electrons flow. Since the 2DEG layer 103 a has low electron impurity scattering, it becomes a high-mobility, low-resistance electrically conductive layer, and provides a current path between electrodes formed on the AlGaN layer 104.

  On the AlGaN layer 104, an anode electrode a and a cathode electrode c for forming a diode D1 that is an SBD are formed, and a source electrode s, a drain electrode d, and a gate for forming a transistor T1 that is a HEMT. An electrode g is formed. Further, the diode D1 and the transistor T1 share one main electrode E1 constituted by the anode electrode a of the diode D1 and the source electrode s of the transistor T1, and further, the diode D1 and the transistor T1 are the cathode of the diode D1. One main electrode E2 constituted by the electrode c and the drain electrode d of the transistor T1 is shared.

  The 2DEG layer isolation region 105 is formed below the main electrode E1 shared by the anode electrode a of the diode D1 and the source electrode s of the transistor T1, and the 2DEG layer 103a is used on the diode D1 side using the main electrode E1 as the anode electrode a. The 2DEG layer 103a and the 2DEG layer 103a on the transistor T1 side using the main electrode E1 as the source electrode s are separated. At this time, the 2DEG layer isolation region 105 may be formed in a region immediately below the main electrode E1 so as to electrically insulate the 2DEG layer 103a into two regions.

  Here, when the transistor T1 is in the ON state and a positive voltage is applied to the transistor T1, the transistor T1 conducts from the source electrode s through the 2DEG layer 103a in the transistor T1 to the drain electrode d. On the other hand, when the transistor T1 is in the off state and a positive voltage is applied to the transistor T1, the 2DEG layer 103a is depleted below the gate electrode d to prevent conduction, so that the source electrode s in the transistor T1. To the drain electrode d is prevented. However, when the 2DEG layer isolation region 105 is not formed, the source electrode s is electrically connected to the adjacent main electrode E2 via the 2DEG layer 103a of the diode D1 sharing the main electrode E1 with the diode D1 interposed therebetween. As a result, a large leakage current is generated. In order to prevent such a leakage current, the 2DEG layer isolation region 105 is formed. Therefore, the 2DEG layer isolation region 105 may block the current path between the cathode electrode c of the diode D1 and the source electrode s of the transistor T1. As shown in FIG. 1A, the position is not limited to the position in contact with the source electrode s and the anode electrode a, and may be formed in the position in contact with only the anode electrode a, for example.

  Next, FIG. 1B is a schematic plan view of the semiconductor device shown in FIG. 1A as viewed from above. As shown in FIG. 1B, in the semiconductor device 100 according to the present embodiment, on the 2DEG layer 103a, the main electrode E1 shared by the anode electrode a of the diode D1 and the source electrode s of the transistor T1, and the cathode of the diode D1 The main electrode E2 shared by the electrode c and the drain electrode d of the transistor T1 and the gate electrode g of the transistor T1 are formed on the same plane. Each main electrode has an elongated finger shape, and is connected to the anode / source electrode pad 111, the cathode / drain electrode pad 112, and the gate pad electrode 113, respectively, in order to extract a current to the outside. Thereby, the semiconductor device 100 has a structure in which the diodes D1 and the transistors T1 are alternately formed. The device width of the semiconductor device 100 is W1, and the length of the finger electrode that is the finger-shaped main electrode is L1.

  In FIG. 1B, it can be seen that the diodes D1 and the transistors T1 are alternately formed. Furthermore, the diode D1 and the transistor T1 share the main electrodes E1 and E2. Here, the transistor T1 has a positive direction in which a current flows from the lower side to the upper side in the drawing, and the diode D1 has a positive direction in which a current flows from the upper side to the lower side in the drawing. There is no structure. Therefore, when a positive voltage is applied to the transistor T1 with the gate turned on, a current flows from the source electrode s on the lower side of the paper to the drain electrode d on the upper side of the paper. At this time, since a reverse voltage is applied to the diode D1, no current flows. Here, when the gate is turned off, a voltage in the reverse direction is generated in the circuit by the inductance of the motor or the like. Since this is a positive voltage with respect to the diode D1, a current flows from the anode electrode a on the upper side of the diode D1 to the cathode electrode c on the lower side of the paper. On the other hand, no current flows through the transistor T1. Therefore, the shared main electrodes E1 and E2 alternately pass current through the transistor T1 and the diode D1.

  Next, the diode D1 and the transistor T1 constituting the semiconductor device 100 according to the present embodiment will be described. First, the diode D1 is an SBD, and an anode electrode a and a cathode electrode c are formed on the AlGaN layer 104 as main electrodes. The anode electrode a is in Schottky contact with the AlGaN layer 104 and is electrically connected to the 2DEG layer 103a by an electron tunneling current. The cathode electrode c is in ohmic contact with the AlGaN layer 104.

  Here, when a positive bias voltage is applied to the cathode electrode c side, the anode electrode a side is in a reverse bias state, the 2DEG layer 103a in the region immediately below the anode electrode a is depleted, and a high breakdown voltage is maintained with respect to the voltage. On the other hand, when a positive bias voltage is applied to the anode electrode a side, electrons tunnel from the anode electrode a side to the 2DEG layer 103a, and a large current flows. As a result, the diode D1 functions as a diode having a rectifying characteristic. In addition, since the diode D1 has a low band resistance of the 2DEG layer 103a and a wide band gap of the GaN-based material, the insulation electric field strength is one digit or more larger than that of silicon, and a high breakdown voltage can be realized. Suitable for application to.

  Next, the transistor T1 is a HEMT, and a source electrode s, a gate electrode g, and a drain electrode d are formed on the AlGaN layer 104 as main electrodes. Such a GaN-based HEMT is suitable as a high breakdown voltage transistor because it has a high breakdown voltage characteristic and a low on-resistance characteristic. In particular, when a GaN-HEMT using a silicon substrate is used, the wafer diameter can be relatively easily increased, and the HEMT can be prepared at a lower cost. Recently, there is a device that employs a normally-off type structure as such a HEMT. However, the transistor T1 is a general HEMT and is a normally-on device having a threshold value of about −3 to −10V.

Next, the operation of the semiconductor device 100 according to the present embodiment will be described by comparing the operation of the semiconductor element 100 and the operation of the semiconductor device 1000 according to the related art shown in FIG. FIG. 2 is a diagram for explaining the time change of the current flowing through the semiconductor device shown in FIG. 4 constituting the inverter circuit and the semiconductor device according to the present embodiment. First, it is assumed that a current is input to the semiconductor device 1000 and the current flowing through each main electrode is I ₀ . At this time, the current input to the semiconductor device 1000 first flows into the transistor T2 in the on state, and the time change of the current flowing through each main electrode of the transistor T2 is as shown in FIG. As can be seen from Figure 6B, at time 0 to t _1, the main electrodes of the transistors T2 share the respective main electrodes, for supplying a current to the two transistors in the up-down direction T2.

Next, at time _{t 1,} when the transistor T2 is turned off, current flows through the diode D2. At this time, a current of I ₀ flows through each main electrode of the diode D2, and the time change of the current flowing through each main electrode of the diode D2 is as shown in FIG. As it can be seen from Figure 5B, at time t ₁ ~t _2, each main electrode of the diode D2 share the respective main electrodes, for supplying a current to up and down direction of the two diodes D2. As described above, the semiconductor device 1000 causes the current of I ₀ to alternately flow through each main electrode of the diode D2 and each main electrode of the transistor T2 by the input current.

On the other hand, if you enter the equivalent of a current to the semiconductor device 100, as can be seen from Figure 1B, at time 0 to t _1, the main electrodes of the semiconductor device 100, a current in one transistor T1 to the main electrode in contact with it may be supplied, ideally compared to the main electrodes of the semiconductor device 1000, so that the may be allowed to flow I _0/2 which is half the current. Further, at times t _{1 to} t ₂ , each main electrode of the semiconductor device 100 _only needs to supply a current to one diode D1 in contact with each main electrode, and a current of I _0/2 flows through each main electrode. . Accordingly, as shown in FIG. 2 (c), the current flowing in each of the main electrodes of the semiconductor device 100 is I _0/2, and the current is temporally leveling flowing in the diode D1 and the transistor T1 from the main electrodes Alternating current is supplied. As a result, the current flowing through each main electrode is halved, and the current density proportional to the current is also halved.

  In other words, the present invention focuses on the fact that current flows alternately between the diode and the transistor in a switching circuit such as an inverter circuit or a power supply circuit, and by sharing the main electrode between the diode and the transistor, each main electrode is shared. The flowing current is leveled over time to improve the characteristics of the semiconductor device.

  As described above, the semiconductor device 100 according to the present embodiment is a semiconductor device including a diode and a transistor having a low current density in the main electrode.

  Here, when the current density of the main electrode is increased, it may directly affect the long-term reliability and the series resistance of the device, which is not preferable. Therefore, when the current density of the main electrode is lowered by the semiconductor device 100 according to the present embodiment, a semiconductor device with improved long-term reliability and series resistance of the device can be realized.

  Furthermore, semiconductor devices are generally incorporated into packages that are close to square, and elongated devices are likely to become large in size and free space increases when they are incorporated into such packages. However, according to the present invention, this problem can be solved as follows.

  First, when the main electrode is an elongated finger-shaped finger electrode as shown in FIGS. 1B, 5B, and 6B, for example, the finger electrode is made of aluminum and has a thickness of about 5 μm and a width of about 10 μm. Is about 600V and 10A. At this time, in the semiconductor device 1000 according to the related art, the finger length L2 which is the length of the finger electrode shown in FIG. 5B and FIG. 6B due to the influence of the voltage drop due to the electrical resistance of the finger electrode portion and the restrictions such as electromigration L3 must be limited to about 1 mm. At this time, if the semiconductor device 1000 is designed in consideration of the number of finger electrodes in order not to make the current density per finger electrode too high, the device width of the semiconductor device 1000 is about 3 mm and is 1 mm × 3 mm long and narrow. It becomes a device of shape. If this semiconductor device 1000 is to be incorporated into, for example, a 3 mm × 3 mm package, the vacant space in the package is large and the area efficiency is poor. Furthermore, since the semiconductor device 1000 has an elongated shape, the area of the electrode pad also increases.

  On the other hand, in the semiconductor device according to the present embodiment 100, since the current density can be halved, the finger length L1 shown in FIG. 1B can be extended to 2 mm. Therefore, ideally, the semiconductor device 100 can have a size of 2 mm × 1.5 mm and can be close to a square. If this semiconductor device 100 is to be incorporated into a 2 mm × 2 mm package, for example, the free space in the package is small and the area efficiency is good. Furthermore, since the semiconductor device 100 is nearly square, the area of the electrode pad is small.

  Furthermore, when the input current is 600 V and 20 A, in the semiconductor device 1000 according to the prior art, the finger lengths L2 and L3 have to be limited to about 1 mm, and the device width has to be 6 mm. Therefore, the semiconductor device 1000 has an elongated shape of 1 mm × 6 mm. On the other hand, in the semiconductor device 100 according to the present embodiment, the finger length L1 can be set to 2 mm, and the device can be 2 mm × 3 mm. Thus, when the input current increases, the effect of bringing the shape of the device closer to a square becomes significant. As a result, the semiconductor device having a long and narrow shape in the prior art can be made into a shape close to a square that can be easily packaged in the semiconductor device 100 according to the present embodiment.

  Next, an example of a method for manufacturing the semiconductor device 100 according to the present embodiment will be described. In this manufacturing method, first, a buffer layer 102 having a thickness of, for example, about 2 μm is formed by alternately forming a plurality of AlN layers and GaN layers on a substrate 101 made of Si as a support substrate. Subsequently, the GaN layer 103 is formed on the buffer layer 102 so as to have a thickness of about 1 μm, for example. For example, a metal organic chemical vapor deposition method (MOCVD method) can be used for forming each thin film in the buffer layer 102 and the GaN layer 103. However, the present invention is not limited to this, and various film forming methods such as a hydride vapor phase epitaxy method (HVPE method) and a molecular beam epitaxy method (MBE method) may be used.

Next, an Al _0.25 Ga _0.75 N film is formed on the GaN layer 103 to form the AlGaN layer 104 having a thickness of, for example, about 25 nm. For the formation of the AlGaN layer 104, various film formation methods such as the HVPE method and the MBE method can be used in addition to the MOCVD method, as with the GaN layer 103. However, in this embodiment, the AlGaN layer 104 is formed so that the carbon (C) concentration in the film is about 2 × 10 ¹⁷ cm ⁻³ or more, for example, about 2.5 × 10 ¹⁷ cm ⁻³ . For example, when the MOCVD method is used, the AlGaN layer 104 containing C as an acceptor can be formed by autodoping with carbon (C) contained in an organometallic element.

As described above, the SBD and HEMT structure laminated film including the GaN layer 103 and the AlGaN layer 104 is formed on the substrate 101 with the buffer layer 102 interposed therebetween. Next, a groove for forming the 2DEG layer isolation region 105 is formed by a photolithography process using a photoresist as an etching mask. This groove needs to be deeper than at least the interface between the GaN layer 103 and the AlGaN layer 104 in order to separate the 2DEG layer. Then, a 2DEG layer isolation region 105 is formed by depositing, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiN) as an insulator in the groove. However, by directly implanting fluorine (F) or boron (B) into the 2DEG layer without forming such a trench or embedding an insulator in the trench, the electrical resistance of the ion-implanted region is extremely reduced. The 2DEG layer separation region 105 can be made high.

  Subsequently, the anode electrode a and the cathode electrode c of the diode D1, the source electrode s, the drain electrode d, and the gate electrode g of the transistor T1 are formed on the AlGaN layer 104. First, since the cathode electrode c of the diode D1 and the source electrode s and drain electrode d of the transistor T1 are in ohmic contact with the AlGaN layer 104, for example, a Ti / Al material is formed by sputtering and further patterned, and 300 to 600 is formed. Heat treatment is performed at ℃. Thereafter, since the anode electrode a of the diode D1 and the gate electrode g of the transistor T1 are in Schottky contact with the AlGaN layer 104, a material such as Ni is formed by sputtering or vapor deposition. In order to stabilize the Schottky contact interface, heat treatment at about 300 ° C. may be performed. Next, as shown in FIG. 7, a wiring electrode w made of, for example, Al or the like is formed by sputtering on both electrodes adjacent to the anode electrode a and the source electrode s and patterned. At this time, the wiring electrode w is formed so as to straddle the anode electrode a and the source electrode s, and both the electrodes are in a state in which the main electrode E1 is electrically shared. As a result, the anode electrode a of the diode D1 and the source electrode s of the transistor T1 share the main electrode E1. Further, the cathode electrode c of the diode D1 and the drain electrode d of the transistor T1 are integrally formed as a main electrode E2.

  Here, the anode electrode a of the diode D1 and the gate electrode g of the transistor T1 are electrodes that are in Schottky contact with the AlGaN layer 104. The laminated metal film is formed using a Pt / Au film). However, the present invention is not limited to this. For example, nickel (Ni), platinum (Pt), palladium (Pd), tungsten (W), gold (Au), silver (Ag), copper (Cu), tantalum (Ta ), A metal film containing at least one of aluminum (Al), or a metal film made of an alloy containing at least one of Ni, Pt, Pd, W, Au, Ag, Cu, Ta, and Al, Any metal material that satisfies the above conditions, such as a metal film including at least one, may be used.

  In addition, the cathode electrode c of the diode D1 and the source electrode s and drain electrode d of the transistor T1 are electrodes that are in ohmic contact with the AlGaN layer 104 or in a state where the contact resistance is sufficiently small. It is formed using a laminated metal film in which (Ti), aluminum (Al), and gold (Au) are laminated (hereinafter, this laminated metal film is referred to as a Ti / Al / Au film). However, the present invention is not limited to this. For example, at least one of titanium (Ti), aluminum (Al), silicon (Si), lead (Pb), chromium (Cr), indium (In), and tantalum (Ta). A metal film made of an alloy containing at least one of Ti, Al, Si, Pb, Cr, In, Ta, or a silicide alloy containing at least one of Ti, Al, Si, Ta Any metal film satisfying the above conditions, such as a metal film including at least one of the metal films formed, may be used.

  As described above, according to the present embodiment, a semiconductor device including a diode and a transistor having a low current density in the main electrode can be provided.

The main electrode E1 shared by the anode electrode a of the diode D1 and the source electrode s of the transistor D1 can also be realized by the following modification.
(Modification 1)
As shown in FIG. 8A, after forming the source electrode s, the anode electrode a is formed so that the anode electrode a covers a part of the source electrode s, and the source electrode s and the anode electrode are further formed thereon. A wiring electrode w is formed so as to be in contact with both a. As a result, the anode electrode a of the diode D1 and the source electrode s of the transistor T1 share the main electrode E1.
(Modification 2)
As shown in FIG. 8B, the source electrode s and the anode electrode a are formed apart from each other, and then the wiring electrode w is in contact with both the source electrode s and the anode electrode a on both electrodes. Form. As a result, the anode electrode a of the diode D1 and the source electrode s of the transistor T1 share the main electrode E1.

In the above embodiment, the lateral semiconductor device 100 having the 2DEG layer 103a is taken as an example of the semiconductor device according to the semiconductor device of the present invention. However, the present invention is not limited to this, and as shown in FIG. A PN type semiconductor device 400 may be used. The semiconductor device 400 has the following configuration. First, a p-GaN layer 402 is formed on a base layer 401 made of p-GaN which is a p-type semiconductor or i-GaN which is not doped with impurities, which is formed on a substrate (not shown). . Then, some regions of the p-GaN layer 402, the Si which is a kind of n-type dopant is an n-type semiconductor by ion implantation, for example, the concentration of Si is about ¹⁰ 17 ^{cm -3} n A -GaN region 403 is formed. Further, in a part of the n-GaN region 403, a contact region 404 made of n ⁺ -GaN in which Si is implanted at a high concentration, for example, the Si concentration is about 10 ¹⁹ to 10 ²⁰ cm ⁻³ is formed. ing. Further, in the semiconductor device 400, a current blocking region 405 is formed by etching or ion implantation, like the 2DEG layer isolation region 105 of the semiconductor device 100 according to the above embodiment. The current blocking region 405 needs to be formed deeper than at least the interface between the base layer 401 and the p-GaN layer 402 in order to block the current path between the diode D3 and the transistor T3 with which the current blocking region 405 is in contact. There is.

In the gate region of the transistor T3, a SiO ₂ layer 406 is formed as a gate insulating film. Further, in the semiconductor device 400, an anode electrode a and a cathode electrode c of the diode D3, a source electrode s, a drain electrode d, and a gate electrode g of the transistor T3 are formed. Here, the diode D3 and the transistor T3 share one main electrode E3 composed of the anode electrode a of the diode D3 and the source electrode s of the transistor T3, and further, the diode D3 and the transistor T3 are connected to the diode D3. One main electrode E4 composed of the cathode electrode c and the drain electrode d of the transistor T3 is shared. Therefore, the effect of the present invention can also be obtained by such a semiconductor device 400.

  In the above embodiment, the SBD is exemplified as the diode of the semiconductor device according to the present invention. However, the present invention is not limited to this, and the present invention is applied to various diodes such as a PN diode. It is possible to apply.

  In the above-described embodiment, the HEMT which is a kind of FET is given as an example of the transistor of the semiconductor device according to the present invention. However, the present invention is not limited to this, and the MISFET (Metal Insulator Semiconductor FET) or MOSFET ( The present invention can be applied to various transistors such as Metal Oxide Semiconductor FET) and MESFET.

  Further, the present invention is not limited by the above embodiment. What was comprised combining each component mentioned above suitably is also contained in this invention. Further effects and modifications can be easily derived by those skilled in the art. Therefore, the broader aspect of the present invention is not limited to the above-described embodiment, and various modifications can be made.

100, 200, 300, 400, 1000 Semiconductor device 101, 201, 301 Substrate 102, 202, 302 Buffer layer 103, 203, 303 GaN layer 103a, 203a, 303a 2DEG layer 104, 204, 304 AlGaN layer 105 2DEG layer isolation region 111 Anode / source electrode pad 112 Cathode / drain electrode pad 113, 313 Gate electrode pad 211 Anode electrode pad 212 Cathode electrode pad 311 Source electrode pad 312 Drain electrode pad 401 Underlayer 402 p-GaN layer 403 n-GaN region 404 Contact region 405 current blocking region 406 SiO ₂ layer D, D1, D2, D3 diodes E1, E2, E3, E4 main electrode L1, L2, L3 finger length M motor P power T T1, T2, T3 transistors W1, W2, W3 device width a anode electrode c cathode d drain electrode g gate electrode s source electrode w wiring electrode

Claims (7)

A lateral semiconductor device including a diode and a transistor monolithically and electrically connected in parallel, and a main current flows on the main surface side,
The semiconductor device, wherein the diode and the transistor share a main electrode through which a main current flows, and the shared main electrode allows a main current to flow alternately through the diode and the transistor.   The semiconductor device according to claim 1, wherein the main electrode is a finger electrode formed on an upper portion of the semiconductor device.   The anode electrode of the diode and the source electrode of the transistor share one main electrode, and the cathode electrode of the diode and the drain electrode of the transistor share one main electrode. 2. The semiconductor device described in 2. A current blocking region under the main electrode shared by the anode electrode of the diode and the source electrode of the transistor;
The semiconductor device according to claim 1, wherein the current blocking region blocks a current path between a cathode electrode of the diode and a source electrode of the transistor. The diode and the transistor are:
A first compound semiconductor layer made of a nitride compound semiconductor;
A second compound semiconductor layer formed on at least a part of the first compound semiconductor layer and made of a nitride-based compound semiconductor having a band gap energy larger than that of the first compound semiconductor layer;
With
The electrically conductive layer of the diode and the transistor is a two-dimensional electron gas layer formed in the vicinity of an interface between the first compound semiconductor layer and the second compound semiconductor layer. The semiconductor device described in any one.   The current blocking region includes the two-dimensional electron gas layer, the two-dimensional electron gas layer on the diode side using the main electrode as an anode electrode, and the two-dimensional electron gas layer on the transistor side using the main electrode as a source electrode. 6. The semiconductor device according to claim 5, wherein the semiconductor device is a two-dimensional electron gas layer separation region that is separated into two layers.   The semiconductor device according to claim 1, wherein the diode is a Schottky barrier diode.

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