JP2014030077A - Image processing device - Google Patents

Abstract

In an image processing apparatus having an external storage unit, power consumption of the image processing apparatus is suppressed.
A multifunction machine includes an ASIC and an SDRAM provided outside the ASIC and storing a control program. The multifunction machine 10 performs control using a control program stored in the SDRAM 34 in an operation mode in which image processing is executed using the image processing unit 50. In the sleep mode in which the image processing unit 50 is stopped, the control program of the SDRAM 34 is copied to the SRAM 56 in which the processing conditions of the image processing unit 50 are stored in the operation mode, the SDRAM 34 is stopped, and the control stored in the SDRAM 34 is stored. Control using a program. In the sleep mode, power consumption in the sleep mode can be suppressed by stopping the SDRAM 34 in which the control program is stored.
[Selection] Figure 2

Description

  The invention disclosed in this specification relates to an image processing apparatus having an external storage unit.

  2. Description of the Related Art Conventionally, an apparatus that executes image processing using an external storage unit provided outside a control system has been used (for example, Patent Document 1). In the prior art, power consumption in the storage unit is maintained by holding the storage unit in a self-refresh mode when no image data is transmitted to or received from an image memory provided outside the CPU (central processing unit) / memory controller. A technique for suppressing the above is disclosed.

JP 2006-262099 A

  For example, when a storage unit storing a control program necessary for controlling the apparatus is provided outside an ASIC functioning as a control system, it is desirable that power consumption in these storage units is also suppressed. However, since the storage unit storing the control program uses a predetermined control program such as monitoring the operation instruction from the user even when the apparatus is stopped, these storage units are held in the self-refresh mode. Power consumption cannot be suppressed.

  Therefore, in addition to the storage unit provided outside the ASIC, a separate storage unit for storing the control program is also provided inside the ASIC, and the storage unit provided outside the ASIC is held in the self-refresh mode. It is also conceivable to use a storage unit provided inside the ASIC. However, in this case, while the power consumption in the storage unit provided outside the ASIC can be suppressed, there arises a problem that the power consumption of the ASIC increases.

  The present specification discloses a technique for suppressing power consumption of an image processing apparatus in an image processing apparatus having an external storage unit.

  An image processing apparatus disclosed in the present specification is an image processing apparatus that includes an ASIC and an external storage unit that is provided outside the ASIC and stores a control program. The ASIC is connected to the external storage unit Connected to the external storage unit and storing parameters for determining operating conditions of the image processing unit in the operation mode; and the internal storage in the operation mode. And a switching unit that switches the connection of the internal storage unit so as to connect the internal storage unit and the CPU in a sleep mode different from the operation mode. In the operation mode, an operation control process in which control is performed by the control program stored in the external storage unit, and the sleep mode operation is performed. The external storage unit is stopped, and executes a resting control processing for controlling at said external replicated from the storage unit by the control program stored in the internal storage unit.

  In this image processing apparatus, since the external storage unit is stopped in the pause mode, the power consumption of the external storage unit in the pause mode can be suppressed. Further, since the internal storage unit in which the control program is stored in the sleep mode is used for the operation of the image processing unit in the operation mode, the sleep mode is used even when these internal storage units are used in the sleep mode. There is no change in the power consumption of the ASIC. Therefore, power consumption of the image processing apparatus can be suppressed in the pause mode.

  In the image processing apparatus, the CPU is connected between the external storage unit and the switching unit, the external storage unit and the CPU are connected in the operation mode, and the switching is performed in the sleep mode. It is good also as a structure further provided with the connection control part which connects a part and said CPU. According to this image processing apparatus, it is possible to suppress an increase in power consumption in the sleep mode due to erroneous transmission / reception to / from the external storage unit in the sleep mode and the operation of the external storage unit.

  In the image processing apparatus, the CPU further executes a pause transition process for shifting from the operation control process to the pause control process, and the pause transition process includes the internal storage from the external storage unit. It is good also as a structure including the duplication process which duplicates the said control program to a part, and the stop process which stops the said external storage part after the said duplication process. According to this image processing apparatus, by copying the control program from the external storage unit to the internal storage unit in the pause transition process, the external storage unit can be stopped in the pause control process.

  In the image processing apparatus, the ASIC includes a plurality of internal storage units and a plurality of switching units corresponding to the internal storage units, and the CPU performs the internal storage in the pause transition process. It is good also as a structure which duplicates the said control program for every part. According to this image processing apparatus, even when the capacity of each internal storage unit is small, the control program can be copied to the internal storage unit by collecting a plurality of them.

  In the image processing apparatus, the ASIC further includes a wireless communication unit that performs communication using a wireless communication method, and the CPU further performs a communication determination process that determines whether to perform communication using the wireless communication unit. It is good also as a structure which performs a control process at the time of performing, when it is determined in the said communication determination process that it communicates in the said wireless communication part. According to this image processing apparatus, when it is determined that the wireless communication unit performs communication and a program for controlling the wireless communication unit is required in the sleep mode, the program can be copied to the internal storage unit.

  In the image processing apparatus, the CPU may store the communication data in the internal storage unit when the CPU acquires the communication data via the wireless communication unit in the suspension control process. . According to this image processing apparatus, it is not necessary to switch the ASIC to the operation mode every time communication data is acquired via the wireless communication unit in the sleep mode, and power consumption can be suppressed by maintaining the sleep mode.

  In the image processing apparatus, the external storage unit may be an SDRAM, and the CPU may be configured to set the external storage unit in a self-refresh mode in the sleep mode. According to this image processing apparatus, the power consumption of the SDRAM in the sleep mode can be suppressed.

  In the image processing apparatus, the sleep mode may be a sleep mode that accepts an operation instruction from a user. According to this image processing apparatus, power consumption in the sleep mode can be suppressed.

  In the image processing device disclosed in this specification, power consumption of the image processing device can be suppressed in the image processing device having the external storage unit.

Multi-function machine perspective view Block diagram of multifunction device Flow chart showing control processing of main CPU Flow chart showing print processing Flow chart showing SDRAM stop processing Flow chart showing control processing of sub CPU Table showing contents stored in sleep SRAM and SRAM

<Embodiment>
An embodiment of the invention disclosed in this specification will be described with reference to FIGS.

1. Configuration of Multifunction Device FIG. 1 is a perspective view showing an appearance of a multifunction device 10 according to the present embodiment. The multifunction machine 10 of the present embodiment includes an apparatus main body 12 and an image reading unit 20 that is arranged on the upper part of the apparatus main body 12 and reads an image from a document. The apparatus main body 12 includes image data of a document read by the image reading unit 20, an external USB interface (hereinafter referred to as I / F) 24, a WLAN (Wireless Local Area Network) I / F 25, or a wired LAN I / F 27 (FIG. The image forming unit 22 that forms an image on a sheet using image data input from the outside of the multi-function peripheral 10 via the MFP 2 is incorporated. In addition to this, on the front side of the multi-function device 10, there are a display unit 26 composed of a liquid crystal display, and a button group composed of a start key, a stop key, a numeric keypad, etc., and an operation unit 28 that receives an operation instruction from a user. , Is provided. The WLAN I / F 25 is an example of a wireless communication unit, and the multifunction machine 10 is an example of an image processing apparatus.

  FIG. 2 shows an electrical configuration of the multifunction machine 10. The multifunction machine 10 further includes an ASIC (Application Specific Integrated Circuit) 30 that controls each unit of the multifunction machine 10, and a ROM 32 and an SDRAM 34 provided outside the ASIC 30. The ROM 32 stores various control programs for controlling the operation of the multifunction machine 10, and a central processing unit (hereinafter referred to as CPU) 44 of the ASIC 30 to be described later controls each unit according to the control program. The operation mode of the multifunction machine 10 is switched. When controlling the multifunction machine 10, the CPU 44 copies the control program stored in the ROM 32 to the SDRAM 34 having a higher communication speed than the ROM 32 and performs control according to the control program read from the SDRAM 34. The SDRAM 34 stores image data of a document read by the image reading unit 20 and temporarily stores image data input from the outside of the multifunction machine 10. The SDRAM 34 is an example of an external storage unit.

  As shown in FIG. 7, the multi-function device 10 has at least two modes of an operation mode M1 and a sleep mode M2. In the operation mode M1, when an operation instruction such as an image reading instruction or an image forming instruction is received via the external USB I / F 24 and the operation unit 28, the image reading unit 20 is used to read an image from the document or image formation In this mode, an image is formed on a sheet using the unit 22. The sleep mode M2 is a mode for waiting for an operation instruction to be input via the external USB I / F 24, the WLAN I / F 25, and the operation unit 28. The sleep mode M2 is an example of a sleep mode.

  As shown in FIG. 2, the ASIC 30 includes two CPUs 44, an external USB I / F 24, a WLAN I / F 25, a wired LAN I / F 27, a ROM controller 46, a RAM controller 47, and an image processing unit 50. A system controller 52, which are connected via a bus 48. The ASIC 30 further includes a sleep SRAM 54, five SRAMs 56, and five selectors 58 corresponding to the respective SRAMs 56. The RAM controller 47 is an example of a connection control unit. The SRAM 56 is an example of an internal storage unit. The selector 58 is an example of a switching unit.

  The main CPU 44A performs various processes for controlling the multifunction machine 10 in the operation mode M1, and stops the processes in the sleep mode M2. The sub CPU 44B mainly performs processing in the sleep mode M2. The external USB I / F 24 is configured to be connectable to an information processing terminal (PC) that is an external device. The WLAN I / F 25 communicates with an external device in a wireless communication (hereinafter referred to as WLAN communication) format. The wired LAN I / F 27 communicates with an external device in a wired communication format. The ROM controller 46 is connected to the ROM 32 and controls reading of a control program from the ROM 32.

  The RAM controller 47 is connected to the SDRAM 34 and controls writing and reading of a control program and image data to and from the SDRAM 34. The RAM controller 47 is connected to the sleep SRAM 54 and is also connected to the SRAM 56 via the selector 58 to control writing and reading to these storage units. That is, the RAM controller 47 is connected between the CPU 44 and the SDRAM 34, the sleep SRAM 54 and the SRAM 56, and in accordance with a command from the CPU 44, the CPU 44 and the SDRAM 34 are connected, and the CPU 44 and the sleep SRAM 54 and the SRAM 56 are connected. Switch between states.

  The sleep SRAM 54 is connected to the SDRAM 34 via the RAM controller 47, and stores a control program used by the CPU 44 in the sleep mode M2 (see FIG. 7). The SRAM 56 is connected to the image processing unit 50 via the selector 58, and stores parameters such as a threshold value and a table for determining processing conditions of the image processing unit 50 in the operation mode M1 (see operation (printing) in FIG. 7). ). The processing conditions are an example of operating conditions.

  The SRAM 56 is connected to the RAM controller 47 via the selector 58, and is connected to the SDRAM 34 via the RAM controller 47. The SRAM 56 stores a control program and the like used by the CPU 44 in the sleep mode M2 in a predetermined case (see FIG. 7 at the time of sleep (WLAN setting)).

  The image processing unit 50 includes a dither unit 50A and a CMYK conversion unit 50B, and performs image processing such as binarization processing and enhancement processing on the image data stored in the SDRAM 34. The CMYK conversion unit 50B is connected to the SRAM 56E via the selector 58E, performs a known triangular pyramid interpolation process on the image data input via the bus 48 using a triangular pyramid table stored in the SRAM 56E, and performs RGB processing. Image data input in three color data (red, green, blue) is converted into four color data of CMYK (cyan, magenta, yellow, black). The CMYK conversion unit 50B transmits the converted four color data to the dither unit 50A.

  The dither unit 50A performs a known dithering process on the four color data input from the CMYK conversion unit 50B, and transmits the processed image data to the image forming unit 22 via the bus 48. The dither unit 50A is connected to the SRAMs 56A to 56D via the selectors 58A to 58D. The SRAMs 56A to 56D store threshold values C, M, Y, and K corresponding to the four color data. When performing the dithering process on each color data, the dither unit 50A reads the threshold values corresponding to the respective color data from the SRAMs 56A to 56D, and performs the dithering process using the threshold values.

  The system controller 52 is connected to the selector 58, and transmits a switching signal for switching between the first state and the second state to the selector 58 in accordance with instructions from the CPU 44 and the image processing unit 50. The selector 58 changes the connection destination of the corresponding SRAM 56 according to the switching signal transmitted from the system controller 52. That is, the selector 58 connects the SRAM 56 and the image processing unit 50 when the first state switching signal is input, and connects the SRAM 56 and the RAM controller 47 when the second state switching signal is input. .

2. Control Process of Multifunction Device Next, a control process of the multifunction device 10 will be described with reference to FIGS. 3 to 7. FIG. 3 shows a flowchart of control processing executed by the main CPU 44A in accordance with a predetermined program. The main CPU 44A starts the control process when power is supplied to the multifunction machine 10 by the user. Here, “power is supplied” includes not only the case where the power of the multifunction device 10 is turned on by the user but also the case where the mode of the multifunction device 10 is changed from the sleep mode M2 to the operation mode M1. Hereinafter, when simply described as the CPU 44, it means the main CPU 44A in the operation mode M1, and the sub CPU 44B in the sleep mode M2.

  When starting the control process, the main CPU 44A first executes a WLAN setting process (S2 to S8). The main CPU 44A confirms whether or not the power of the multifunction device 10 has been turned on (S2). When the power of the multifunction device 10 is input (S2: YES), whether or not to further perform WLAN communication with the external device is determined. Set (S4). When the instruction to perform WLAN communication is input from the user via the operation unit 28 (S4: YES), the main CPU 44A sets the WLAN flag to on (S6). If the user inputs an instruction not to perform WLAN communication (S4: NO), the WLAN flag is set to off (S8). When the WLAN flag is set, the main CPU 44A ends the WLAN setting process. The WLAN setting process is an example of a communication determination process.

  On the other hand, when the mode of the multifunction machine 10 is changed from the sleep mode M2 to the operation mode M1 (S2: YES), the WLAN setting process is terminated because the WLAN flag has already been set.

  When the main CPU 44A completes the WLAN setting process, the main CPU 44A sets the mode of the multifunction machine 10 to the operation mode M1. When the control program is not copied to the SDRAM 34, the main CPU 44A copies the control program from the ROM 32 to the SDRAM 34. The ROM 32 stores parameters that determine the processing conditions of the image processing unit 50. If the parameters are not copied to the SDRAM 34, the parameters are copied from the ROM 32 to the SDRAM 34. The main CPU 44A controls the RAM controller 47, connects the main CPU 44A and the SDRAM 34, reads the control program stored in the SDRAM 34, and executes the control process in the operation mode M1 (hereinafter, operation control process) (S10 to S10). S20).

  In the control process during operation, the main CPU 44A controls the system controller 52 to switch the switching signal to the first state, and the selector 58 maintains the state where the SRAM 56 and the image processing unit 50 are connected. Further, the main CPU 44A confirms whether an image reading instruction and an image forming instruction are input via the operation unit 28, and measures an elapsed time after starting the operation control process. When the image reading instruction is input (S10: YES), the main CPU 44A causes the image reading unit 20 to execute a reading process (S16). The image reading unit 20 reads a document and stores image data read from the document in the SDRAM 34. When the image reading unit 20 finishes the reading process, the main CPU 44A repeats the processes from S10.

  Further, when an image formation instruction is input (S10: NO, S12: YES), the main CPU 44A transmits an activation command to the image processing unit 50 to activate the image processing unit 50 (S18), and the image processing unit 50 Then, the image forming unit 22 is caused to execute printing processing (S20).

(Printing process)
FIG. 4 shows a flowchart of the printing process. In the printing process, the image processing unit 50 executes processing on a unit image data basis on image data configured by a plurality of unit image data extending in the main scanning direction. The SDRAM 34 stores threshold values C, M, Y, and K determined for each unit image data, and a triangular pyramid table that is used in common for all unit image data.

  When starting the printing process, the image processing unit 50 copies the triangular pyramid table stored in the SDRAM 34 to the SRAM 56E via the bus 48 and the RAM controller 47 (S32). Next, the image processing unit 50 reads RGB unit image data from the SDRAM 34 via the bus 48, and converts it into CMYK unit image data using the triangular pyramid table stored in the SRAM 56E and the CMYK conversion unit 50B (S34). ). The CMYK conversion unit 50B transmits the converted CMYK unit image data to the dither unit 50A.

  The image processing unit 50 selects threshold values C, M, Y, and K corresponding to the unit image data transmitted to the dither unit 50A from the threshold values stored in the SDRAM 34 (S36), and selects the selected threshold values C, M, Y and K are copied to the corresponding SRAMs 56A to 56D (S38).

  Next, the image processing unit 50 performs dithering processing on the unit image data transmitted to the dither unit 50A using the threshold values C, M, Y, and K stored in the SRAMs 56A to 56D and the dither unit 50A. Then, the processed unit image data is transmitted to the image forming unit 22 (S42). The image forming unit 22 forms an image on a sheet using the CMYK unit image data transmitted from the image processing unit 50.

  The image processing unit 50 repeats the processing from S34 when the target image data includes RGB unit image data that has not been subjected to image processing (S44: YES). On the other hand, when the image processing is completed for all unit image data included in the target image data (S44: NO), the image processing unit 50 ends the printing process.

  When the image reading instruction and the image forming instruction are not input (S10, S12, S14: NO), the main CPU 44A waits for the image reading instruction and the image forming instruction to be input. When the period in which these instructions are not input continues for a predetermined time or more (S10, S12: NO, S14: YES), the mode of the multifunction device 10 is shifted from the operation mode M1 to the sleep mode M2. A sleep mode transition process is executed (S22 to S26). In the sleep mode transition process, the main CPU 44A first executes an SDRAM stop process for stopping the SDRAM 34 (S22). The sleep mode transition process is an example of a stop transition process.

(SDRAM stop processing)
FIG. 5 shows a flowchart of the SDRAM stop process. The main CPU 44A transmits a stop command to the image processing unit 50 to stop the image processing unit 50 (S52). Next, the main CPU 44A checks the WLAN flag (S54). When the WLAN flag is turned on and the WLAN is set (S54: YES), the main CPU 44A executes a replication process for copying the control program used by the CPU 44 to the SRAM 56 in the sleep mode M2 (S56, 58). In the duplication processing, the main CPU 44A duplicates the WLAN control program for WLAN communication in the sleep mode M2 in the SRAM 56.

  The main CPU 44A controls the system controller 52 to switch the switching signal to the second state (S56) and connects the SRAM 56 and the SDRAM 34 via the RAM controller 47.

  Next, the main CPU 44A copies the WLAN control program stored in the SDRAM 34 to the SRAM 56 via the RAM controller 47 (S58). Based on the capacity of the WLAN control program, the main CPU 44A replicates the WLAN control program to the SRAMs 56A to 56D among the SRAMs 56A to 56E included in the ASIC 30. As a result, as shown in FIG. 7 at the time of sleep (WLAN setting 1), the SRAMs 56A to 56D store the WLAN control program in place of the threshold values C, M, Y, and K for the image processing unit 50. On the other hand, the state in which the triangular pyramid table for the image processing unit 50 is stored in the SRAM 56E is maintained.

  On the other hand, when the WLAN flag is off and the WLAN is not set (S54: NO), the main CPU 44A does not use the WLAN control program in the sleep mode M2, so the WLAN control program is transferred to the SRAMs 56A to 56D. Do not duplicate. As a result, as shown in FIG. 7 at the time of sleep (non-WLAN setting), the SRAMs 56A to 56E are maintained in a state where the same contents as those at the time of print control are stored.

  Next, the main CPU 44A transmits a self-refresh command to the SDRAM 34 to place the SDRAM 34 in the self-refresh mode (S60). As a result, the SDRAM 34 holds the stored contents stored in the built-in memory. As a result, in the SDRAM 34, power consumption is suppressed in the self-refresh mode. The process of transmitting a self-refresh command to the SDRAM 34 is an example of a stop process.

  After the SDRAM stop process, the main CPU 44A controls the RAM controller 47 to connect the sub CPU 44B to the sleep SRAM 54 and SRAM 56, and causes the sub CPU 44B to read the control program stored in the sleep SRAM 54 and SRAM 56 (S24). When the sub CPU 44B starts control processing according to the control program read from the sleep SRAM 54 and SRAM 56, the main CPU 44A autonomously stops (S26) and ends the control processing.

  FIG. 6 shows a flowchart of control processing executed by the sub CPU 44B according to a predetermined program. When the control process is started, the sub CPU 44B sets the mode of the multifunction machine 10 to the sleep mode M2, and executes the control process in the sleep mode M2 (hereinafter, the sleep time control process) (S62 to S74). In the sleep mode M2, the selector 58 is maintained in a state in which the SRAM 56 and the sub CPU 44B are connected.

  In the sleep control process, the sub CPU 44B first checks the WLAN flag (S62). When the WLAN flag is on and the WLAN setting is made (S62: YES), the sub CPU 44B performs WLAN communication with the external device in the sleep mode M2. The sub CPU 44B confirms whether communication data has been received for each reference time via the WLAN I / F 25 (S64). If the communication data is received within the reference time (S64: YES), FIG. As shown in WLAN setting 2), the communication data is stored in the SRAM 56E (S66).

The sub CPU 44B checks the communication data stored in the SRAM 56E (S68), and if it is determined that the content of the communication data can be processed by the sub CPU 44B (S68: YES), the sub CPU 44B processes the content of the communication data. To repeat the process from S64. Examples of contents that can be processed by the sub CPU 44B include the following contents.
Inquiry about the model name of the multifunction device 10 Inquiry about the remaining amount of ink used in the image forming unit 22 Inquiry about the current mode of the multifunction device 10

On the other hand, if the sub CPU 44B determines that the content of the communication data is not the content that can be processed by the sub CPU 44B and that the processing by the main CPU 44A is necessary (S68: YES), the mode of the multifunction machine 10 is changed from the sleep mode M2. An operation mode transition process to be described later for shifting to the operation mode M1 is executed (S76 to S80). Examples of contents that cannot be processed by the sub CPU 44B include the following contents.
・ Launch command for MFP 10 ・ Inquiry about internal temperature of MFP 10

Further, the sub CPU 44B has the WLAN flag turned off and the WLAN setting is not made (S62: NO), or the WLAN data is set and the communication data is not received within the reference time. (S62: YES, S64: NO), it is confirmed whether the following processing has been executed within the reference time. In addition, the reference time in each process and the reference time in S64 may be set to the same time, or may be set to different times.
(1) Input of image data via wired LAN I / F 27 (S70)
(2) Instruction input from the user via the operation unit 28 (S72)
(3) Connection via external USB I / F 24 by PC (S74)

  The processes (1) to (3) cannot be processed by the sub CPU 44B, and need to be processed by the main CPU 44A. When any one of the above-described (1) to (3) is executed within the reference time (S70: YES or S72: YES or S74: YES), the sub CPU 44B executes an operation mode transition process described later. . On the other hand, when any process is not executed within the reference time (S70, S72, S74: NO), the processes from S62 are repeated.

  On the other hand, when the sub CPU 44B receives communication data whose contents cannot be processed by the sub CPU 44B via the WLAN I / F 25 (S68: NO), the image data is input from the outside of the multifunction machine 10 via the wired LAN I / F 27. (S70: YES), when an instruction is input from the user via the operation unit 28 (S72: YES), or when there is a connection via the external USB I / F 24 by the PC (S74: YES) ), An operation mode transition process is executed.

  In the operation mode transition process, the sub CPU 44B controls the RAM controller 47 to connect the sub CPU 44B and the SDRAM 34, and transmits a self-refresh cancel command to the SDRAM 34 to set the SDRAM 34 to the normal mode (S76). As a result, the SDRAM 34 can write and read control programs and image data to and from the SDRAM 34 by the main CPU 44A.

  The sub CPU 44B controls the system controller 52 to switch the switching signal to the first state (S78), and connects the SRAM 56 and the image processing unit 50. The sub CPU 44B transmits an activation command to the main CPU 44A to activate the main CPU 44A (S80), and ends the control process. When the main CPU 44A is activated by the activation command from the sub CPU 44B, the main CPU 44A starts the control process shown in FIG.

3. Advantages of the present embodiment (1) In the MFP 10 of the present embodiment, the control program used by the CPU 44 in the sleep mode M2 is duplicated in the SRAM 56 in the ASIC 30, and is provided outside the ASIC 30 in the sleep mode M2. The SDRAM 34 is set to the self refresh mode. Therefore, the power consumption of the SRAM 56 in the sleep mode M2 can be suppressed.

(2) Further, even if the SRAM 56 is used for storing the control program in the sleep mode M2, the power consumption of the ASIC 30 is hardly changed compared to the case where the SRAM 56 is not used. Therefore, in the multifunction machine 10 including the ASIC 30 and the SDRAM 34, power consumption in the sleep mode M2 can be suppressed.

(3) Furthermore, the SRAM 56 is for storing the parameters of the image processing unit 50 in the operation mode M1, and is not newly installed in the ASIC 30 for storing the control program. Therefore, even if the SRAM 56 is used to store the control program, the ASIC 30 does not increase in cost.

(4) In the MFP 10 of the present embodiment, in the sleep time control process of the sleep mode M2, the RAM controller 47 connects the sub CPU 44B, the sleep SRAM 54 and the SRAM 56, and does not connect the sub CPU 44B and the SDRAM 34. Therefore, it is possible to prevent the signal from being erroneously transmitted to the SDRAM 34 in the sleep mode M2, and switching the SDRAM 34 from the self-refresh mode to the normal mode, thereby increasing the power consumption in the sleep mode M2.

(5) The multi-function device 10 of this embodiment has a plurality of SRAMs 56 for storing the parameters of the image processing unit 50 in the ASIC 30, and the control program used by the CPU 44 in the sleep mode M2 is stored in the plurality of SRAMs 56. Duplicate. Therefore, even when the capacity of each SRAM 56 is small, the control program can be copied to the SRAM 56 by collecting a plurality of the SRAMs.

(6) In the MFP 10 of this embodiment, the WLAN control program is copied to the SRAM 56 when the WLAN setting is made. When the WLAN setting is performed, the number of control programs used by the CPU 44 in the sleep mode M2 is larger than that when the WLAN setting is not performed. Therefore, by duplicating the WLAN control program in the SRAM 56, it is not necessary to increase the capacity of the sleep SRAM 54 by the capacity for storing the WLAN control program, and the cost of the ASIC 30 is not increased.

(7) The WLAN control program has a larger program capacity than the wired control program for wired communication control. Therefore, the use of the SRAM 56 for duplicating the WLAN control program is useful for suppressing an increase in the capacity of the sleep SRAM 54.

(8) In the MFP 10 according to the present embodiment, when communication data is received via the WLAN I / F 25 in the sleep time control process of the sleep mode M2, the received communication data is not stored in the SDRAM 34. And stored in the SRAM 56 in the ASIC 30. Therefore, in the sleep mode M2, the SDRAM 34 is switched from the self-refresh mode to the normal mode every time communication data is received, and it is possible to suppress an increase in power consumption in the sleep mode M2.

(9) As a result of checking the communication data stored in the SRAM 56, if the content can be processed by the sub CPU 44B that performs control in the sleep mode M2, the mode of the multifunction machine 10 is changed from the sleep mode M2 to the operation mode M1. The sub CPU 44B executes the processing without switching to. Therefore, the SDRAM 34 that is in the self-refresh mode in the sleep mode M2 is switched to the normal mode in the operation mode M1, or the main CPU 44A that has been stopped in the sleep mode M2 is switched to the operation state in the operation mode M1. Occurrence of an event that increases power consumption when switching the ten modes from the sleep mode M2 to the operation mode M1 can be suppressed.

<Other embodiments>
The present invention is not limited to the embodiments described with reference to the above description and the drawings, and for example, the following various aspects are also included in the technical scope of the present invention.
(1) In the above embodiment, the description has been given using the multifunction machine 10 having the scan function and the print function, but the present invention is not limited to this. The present invention only needs to have at least one of a scan function, a print function, a fax function, and a copy function, and the apparatus itself does not have these functions, and these functions of other apparatuses. Therefore, an apparatus that performs only image processing may be used.

  That is, the present invention can be applied to any device that has an external storage unit arranged outside the ASIC 30 and switches between the operation mode M1 for performing image processing and the sleep mode M2 for not performing image processing. Also, the image processing method and type are not particularly limited.

(2) In the above embodiment, the MFP 10 has one ASIC 30, and the two CPUs 44 included in the ASIC 30 are used to execute various processes. However, the present invention is not limited to this. For example, if the ASIC 30 may have one CPU 44, the multi-function device 10 may have different ASICs 30.

(3) Further, the program executed by the CPU 44 is not necessarily stored in the ROM 32, and may be stored in the SDRAM 34 from the beginning. In this case, the ROM 32 is not always necessary.

(4) In the above embodiment, the sleep mode M2 of the multifunction device 10 has been described using the SDRAM 34 in the self-refresh mode. However, the multifunction device 10 is in a mode other than the operation mode M1 and the sleep mode M2. In other modes, the SDRAM 34 may be set in the self-refresh mode.

(5) In the above embodiment, the description has been made using the mode in which the SDRAM 34 is set to the self-refresh mode in the sleep mode M2 of the multifunction machine 10, but the mode for suppressing the power consumption of the SDRAM 34 is not limited thereto. For example, the power consumption of the SDRAM 34 may be suppressed by stopping the SDRAM 34.

(6) In the above embodiment, the case of having both the WLAN I / F 25 and the wired LAN I / F 27 has been described. However, only one of the I / Fs may be provided. Further, the control program copied to the SRAM 56 in the sleep mode M2 is not limited to the WLAN control program, and other control programs used for the CPU 44 in the sleep mode M2 may be stored.

(7) In the above embodiment, the description has been given using the form in which the plurality of SRAMs 56 are included in the ASIC 30, but a single SRAM 56 may be included in the ASIC 30. Thereby, the number of selectors 58 included in the ASIC 30 can also be made singular, and the structure in the ASIC 30 can be simplified.

10: MFP, 24: External USB I / F, 25: WLAN I / F, 27: Wired I / F, 30: ASIC, 32: ROM, 34: SDRAM, 44: CPU, 46: ROM controller, 47: RAM controller, 50: image processing unit, 54: sleep SRAM, 56: SRAM, 58: selector, M1: operation mode, M2: sleep mode

Claims (8)

An image processing apparatus including an ASIC and an external storage unit that is provided outside the ASIC and stores a control program,
The ASIC is
A CPU connected to the external storage unit;
An image processing unit for performing image processing;
An internal storage unit that is connected to the external storage unit and stores parameters for determining operating conditions of the image processing unit in an operation mode;
A switching unit that connects the internal storage unit and the image processing unit in the operation mode, and switches the connection of the internal storage unit so as to connect the internal storage unit and the CPU in a pause mode different from the operation mode; Have
The CPU
In the operation mode, an operation control process for performing control with the control program stored in the external storage unit;
An image processing apparatus that, in the sleep mode, executes the pause control process in which the external storage unit is stopped and controlled by the control program copied from the external storage unit and stored in the internal storage unit . The image processing apparatus according to claim 1,
Connected between the CPU and the external storage unit and the switching unit, connecting the external storage unit and the CPU in the operation mode, and connecting the switching unit and the CPU in the sleep mode An image processing apparatus further comprising a control unit. The image processing apparatus according to claim 1 or 2,
The CPU further executes a suspension transition process for transitioning from the operation control process to the suspension control process,
The hibernation transition process includes
A replication process for copying the control program from the external storage unit to the internal storage unit;
And a stop process for stopping the external storage unit after the duplication process. The image processing apparatus according to claim 3,
The ASIC includes a plurality of the internal storage units and a plurality of the switching units corresponding to the internal storage units,
The CPU
An image processing apparatus that replicates the control program for each internal storage unit in the pause transition process. The image processing apparatus according to claim 4,
The ASIC is
A wireless communication unit that performs communication using a wireless communication method;
The CPU
Further executing communication determination processing for determining whether to perform communication in the wireless communication unit,
In the communication determination process, an image processing apparatus that executes a suspension control process when it is determined that communication is performed by the wireless communication unit. The image processing apparatus according to claim 5,
The CPU
An image processing apparatus that stores the communication data in the internal storage unit when the communication data is acquired via the wireless communication unit in the suspension control process. An image processing apparatus according to any one of claims 1 to 6,
The external storage unit is an SDRAM,
The CPU
An image processing apparatus in which the external storage unit is set in a self-refresh mode in the pause mode. An image processing apparatus according to any one of claims 1 to 7,
The sleep mode is an image processing apparatus that is a sleep mode that receives an operation instruction from a user.

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