JP2014026347A - Monitoring device, computer program, and monitoring method - Google Patents

Abstract

A monitoring apparatus, a computer program, and a monitoring method capable of monitoring the execution order of a plurality of processes in a program are provided.
When a memory access process in a monitoring target program is executed by an execution unit, monitoring position information related to the memory access process is notified to the monitoring unit. Using the monitoring table 4, the ID specifying unit 221 sequentially specifies the order information corresponding to the monitoring position information for each monitoring position information notified of the rank from the execution unit 21. The memory access order determination unit 222 executes the execution order of the memory access I / F executed by the execution unit 21 according to the order information in the monitoring table 4 that matches the order information specified by the ID specification unit 221. It is determined whether it is an order.
[Selection] Figure 20

Description

  The present invention relates to a monitoring apparatus that monitors the order of processes executed by an execution unit that executes a plurality of processes in a program, a computer program for realizing the monitoring apparatus, and a monitoring method.

  In an embedded device or an embedded system in which a program is incorporated, by inserting a monitoring code into a program (module) to be monitored in advance, the order of processing executed in the embedded device or the embedded system can be changed. A monitoring function for determining whether or not it is correct is realized.

  For example, a detection unit for detecting a module to be monitored from a program source code, a sequence monitoring table in which an identification code for identifying the module to be monitored is defined, and a generation for generating a monitoring code for the module to be monitored And a sequence monitoring automatic programming device including an output unit that outputs a source code obtained by inserting the generated monitoring code into the source code of each module (see Patent Document 1).

JP 2011-159115 A

  In the apparatus of Patent Document 1, the execution order (sequence) of each module of a program can be monitored. In such a module, a plurality of memory access processes such as data reading and data writing are executed by accessing the memory area. In addition, such memory access processing uses an external function dedicated to memory access that can be called from a plurality of modules.

  In general, when a program accesses a memory area to perform processing, the order of memory access processing is performed even in the same module so that the data is read after the initial data is written. There are restrictions on the order of memory access processing.

  For example, memory access may be executed only when a specific condition is satisfied in the same module. For this reason, even if the modules are executed in the correct order, if attention is paid to the processing in each module, the memory access processing in each module may be executed in the wrong order. However, since the apparatus of Patent Document 1 monitors only the execution order of each module, it cannot monitor the order of such memory access processing.

  Further, when there is an interrupt process executed by the occurrence of an interrupt in the module, the interrupt process may be executed at a plurality of places in the same module, and the execution place is determined during the execution of the program. The memory access from the interrupt process has restrictions on the memory access order such that the normal process before the interrupt once writes the data in the memory area and then the interrupt process reads the data in the memory area. Even in such a case, since the apparatus of Patent Document 1 monitors only the execution order of the modules, it cannot monitor the order of such interrupt processing.

  The present invention has been made in view of such circumstances, and provides a monitoring device capable of monitoring the execution order of a plurality of processes in a program, a computer program for realizing the monitoring device, and a monitoring method. For the purpose.

  A monitoring apparatus according to a first aspect of the present invention includes an execution unit that executes a plurality of processes in a program, and monitors the order of processes executed by the execution unit. In the monitoring apparatus, a plurality of monitoring target access processes related to memory access When a plurality of access processes are sequentially executed by the execution unit, the storage unit storing a monitoring table in which the order information for determining the execution order of the monitoring target and the specific information related to the memory access by the access process to be monitored is associated Detection means for sequentially detecting unique information related to memory access by processing, specification means for sequentially specifying order information corresponding to the unique information detected by the detection means using the monitoring table, and order specified by the specification means Monitoring means for monitoring the order of access processing to be monitored executed by the execution unit according to information. To.

  The monitoring device according to a second aspect of the present invention includes a determination unit that determines whether or not order information corresponding to the unique information detected by the detection unit exists in the monitoring table in the first invention, and the specifying unit includes: The order information determined to be present by the determination means is specified.

  In the monitoring device according to a third aspect of the present invention, in the first or second aspect, the monitoring table specifies a predetermined execution order of the access processing to be monitored based on the order information, and the monitoring means includes: In accordance with the order information in the monitoring table that matches the order information specified by the specifying means, it is determined whether or not the order of the access processing to be monitored executed by the execution unit is the predetermined execution order. An order determining means is provided.

  A monitoring apparatus according to a fourth invention performs a predetermined error process in the third invention, when the order determination means determines that the order of the monitoring target access processes executed by the execution unit is not the predetermined execution order. An error processing means is provided.

  According to a fifth aspect of the present invention, in the monitoring apparatus according to any one of the first to fourth aspects, the unique information includes a memory address of a machine language corresponding to the access process to be monitored.

  The monitoring device according to a sixth aspect of the present invention is the monitoring device according to any one of the first to fifth aspects, wherein the specific information includes a type of a process of reading from or writing to a memory, an address of a memory to be accessed, or a memory It contains the information regarding the write value to.

  A computer program according to a seventh aspect of the present invention is a computer program for causing a computer to monitor the order of processes executed by an execution unit that executes a plurality of processes constituting the program. Sequentially detecting specific information related to memory access by the access processing, order information for determining the execution order of a plurality of monitoring target access processing related to memory access, and memory by the monitoring target access processing A step of sequentially specifying order information corresponding to the detected unique information using a monitoring table that associates specific information related to access, and an order of access processing to be executed by the execution unit according to the specified order information And a step of monitoring To.

  A monitoring method according to an eighth aspect of the present invention is a monitoring method by a monitoring device that includes an execution unit that executes a plurality of processes constituting a program, and that monitors the order of processes executed by the execution unit. Storing a monitoring table associating sequence information for determining the execution order of the target access processing with specific information relating to memory access by the access processing of the monitoring target, and executing the plurality of access processing in the execution unit sequentially A step of sequentially detecting unique information regarding memory access by the access processing, a step of sequentially specifying order information corresponding to the detected unique information using the monitoring table, and a step according to the specified order information Monitoring the order of monitored access processes executed by the execution unit. To.

  In the first invention, the seventh invention, and the eighth invention, the order information for determining the execution order of a plurality of monitoring target access processes related to memory access is associated with the specific information related to the memory access by the monitoring target access process. The monitoring table is stored in the storage unit. The order information is information that can specify the order of memory access. The order information includes, for example, information such as a series indicating the distinction of modules and the like, and an ID indicating the execution order of access processing within the series. The unique information is monitoring position information. For example, a function name for calling an access process for executing memory access, a memory area to be accessed (memory address), a memory access process content (separate from read process or write process), memory A write value when the access is a write process, a number for identifying the execution order of the access process having the same process content in the same function, an address of an instruction code (object code) corresponding to the access process, and the like are included.

  When a plurality of access processes are sequentially executed by the execution unit, the detection unit sequentially detects specific information related to memory access by the access process. The unique information can be detected by the following method, for example. In other words, each time a memory access process is executed, a monitoring code for acquiring and notifying unique information is inserted into the target code for performing the access process.

  The specifying unit sequentially specifies the order information corresponding to the detected unique information using the monitoring table. As described above, the order information is information that can specify the order of memory access. For example, the order information includes information such as a series indicating the distinction of modules and the like, and an ID indicating the execution order of access processing within the series. Therefore, the execution order of the access processing can be detected by sequentially specifying the order information corresponding to the detected unique information.

  The monitoring unit monitors the order of the access processing to be monitored that is executed by the execution unit according to the specified order information. For example, if the order of access processing to be monitored is as planned, it can be determined that the access processing is being performed in the correct order, and the order of access processing to be monitored is different from the schedule order In this case, it can be determined that the access processing is performed in an incorrect order, and the execution order of a plurality of processes in the program can be monitored.

  In the second invention, the determination means determines whether or not the order information corresponding to the unique information detected by the detection means exists in the monitoring table. The specifying means specifies the order information determined that the determining means exists. In other words, by associating the monitoring target access processing sequence information and unique information with the monitoring table, even if monitoring target access processing and non-monitoring access processing coexist in the monitoring target program, the monitoring target By excluding external access processes, only the access processes that need to be monitored can be extracted and monitored. As a result, even when the monitoring target access process changes due to the specification change or function change of the monitoring target program, the access process that needs to be monitored can be identified using the monitoring table. The target program can be used without change.

  In the third invention, the monitoring table specifies a predetermined execution order of the access processing to be monitored based on the order information. For example, the order information may be order information including information such as a series indicating the distinction of modules and the like, and an ID indicating the execution order of access processing within the series. The order determination means determines whether or not the order of the monitored access processing executed by the execution unit is a predetermined execution order (scheduled execution order) according to the order information in the monitoring table that matches the specified order information. Determine. For example, when an ID detected by executing a plurality of access processes matches an ID in the monitoring table, it can be determined that the access process is being executed in a scheduled order. If the IDs in the table do not match, it can be determined that the access processes are being executed in the wrong order.

  In the fourth invention, the error processing means performs predetermined error processing when the order determination means determines that the order of the monitored access processes executed by the execution unit is not the predetermined execution order. The error process can be determined, for example, according to the content of the access process that has been determined that the execution order is incorrect. The error process is, for example, a process preceding the access process in which it is determined that the execution order is incorrect, and the execution (retry) is performed again from a predetermined point, and an error has occurred in the execution order. Record an error log. As another error processing, for example, when it is determined that the execution order is incorrect, the execution of the modules is temporarily stopped, and it is possible to notify that an error has occurred in the execution order.

  In the fifth invention, the unique information includes a machine language memory address corresponding to the monitored access process. The machine language is also referred to as an object code, an instruction code, and a purpose code. The address of the machine language (instruction code) can be regarded as the address of the caller of the memory access process. Since the machine language address is used as unique information that can identify (distinguish) each access process to be monitored in the monitoring program, the execution order of the access processes to be monitored can be accurately monitored.

  In the sixth invention, the unique information includes information related to the type of processing for reading from or writing to the memory, the address of the memory to be accessed, or the value written to the memory. As a result, if the specific information related to reading from the memory or the specific information related to writing to the memory is known, the order information of the access processing can be specified, and the execution order of the access processing can be monitored.

  According to the present invention, the order of memory access processing can be monitored.

It is a block diagram which shows an example of a structure of the program production | generation apparatus of this Embodiment. It is explanatory drawing which shows an example of the program (source code) input. It is explanatory drawing which shows an example of the program (source code) input. It is explanatory drawing which shows an example of the program (source code) input. It is explanatory drawing which shows an example of I / F for memory access as object code. It is explanatory drawing which shows an example of the execution order defined in advance of memory access I / F. It is explanatory drawing which shows an example of a related table. It is explanatory drawing which shows an example of the object code (reading from memory) by which the code for monitoring was inserted. It is explanatory drawing which shows an example of the object code (writing to memory) by which the code for monitoring was inserted. It is explanatory drawing which shows an example of the monitoring table. It is a flowchart which shows an example of the production | generation process of the source code by which the code for monitoring by the program production | generation apparatus of this Embodiment was inserted. It is a flowchart which shows an example of the production | generation process of the monitoring table by the program production | generation apparatus of this Embodiment. It is explanatory drawing which shows the example of a related database when the designation | designated function of memory access I / F is set. It is explanatory drawing which shows the example of the execution order defined in advance of memory access I / F when a repetition top ID is set. It is explanatory drawing which shows the example of a related database when a repetition top ID is set. It is explanatory drawing which shows the example of a program (source code) when notification schedule ID is set. It is explanatory drawing which shows the example of the predefined execution order of I / F for memory access when notification plan ID is set. It is explanatory drawing which shows the example of a related database when notification plan ID is set. It is explanatory drawing which shows the example of a related table when a deadline (threshold time) is provided. It is a block diagram which shows an example of a structure of the monitoring apparatus of this Embodiment. It is explanatory drawing which shows an example of the monitoring position information which the monitoring code inserted into the target code notifies to the monitoring unit when the monitoring target program is executed. It is explanatory drawing which shows an example of the execution order of each series in the monitoring object program. It is explanatory drawing which shows an example of the order information of each series X of a monitoring table. It is explanatory drawing which shows an example of the execution order of memory access I / F determined by the memory access order determination part. It is a flowchart which shows an example of the procedure of the specific process of the order information by the monitoring apparatus of this Embodiment. It is a flowchart which shows an example of the procedure of the monitoring process by the monitoring apparatus 200 of this Embodiment. It is explanatory drawing which shows the example of a determination at the time of using the monitoring table based on the related table illustrated in FIG. It is explanatory drawing which shows the example of a determination at the time of using the monitoring table based on the related table illustrated in FIG. It is explanatory drawing which shows the example of determination at the time of using the monitoring table based on the related table illustrated in FIG. It is explanatory drawing which shows the example of determination at the time of using the monitoring table based on the related table illustrated in FIG.

  Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof. FIG. 1 is a block diagram illustrating an example of the configuration of the program generation device 100 according to the present embodiment. The program generation apparatus 100 includes a control unit 10 for controlling the entire apparatus, a program (source code) 1, an input unit 11 for acquiring a related table 2, a storage unit 12, a monitoring code inserted program 3, and a monitoring table 4. An output unit 13, a monitoring target specifying unit 14, a monitoring code generation unit 15 and the like are provided.

  When the program (source code) 1 and the association table 2 are input, the program generation device 100 generates and outputs the monitoring code inserted program 3 and the monitoring table 4.

  The program (source code) 1 is a program incorporated in an embedded device or an embedded system, and is before the monitoring code is inserted. The program 1 includes, for example, a plurality of modules (also referred to as a series).

  2, 3, and 4 are explanatory diagrams illustrating an example of the input program (source code) 1. 2 is a sequence X source code, FIG. 3 is a sequence Y source code, and FIG. 4 is a sequence Z source code. For example, the series X, Y, and Z are composed of different modules, and the series X, Y, and Z are executed in a predetermined order.

  As shown in FIG. 2, in the module of the series X, functions called moduleA_input and moduleA_output are executed in this order in a function called moduleA_main. The functions moduleA_input and moduleA_output are memory access I / Fs called Write (write destination memory area and write data) and Read (read source memory area and read data storage destination) when accessing the memory area such as variables. Call (interface). The memory access I / F is a target code for monitoring the execution order, and can be, for example, an assembler code (described in assembly language). In FIG. 2, the target code is a code surrounded by a broken line.

  FIG. 5 is an explanatory diagram showing an example of a memory access I / F as a target code. As shown in FIG. 5A, Read (read source memory area, read data storage destination) is a read I / F, and read from a specified read source memory area mem (eg, variable name, memory address, etc.). Data is stored (set) in the designated data storage destination area. For example, Read (variable MEM_A, variable x) performs a process of storing data read from the memory area indicated by the constant MEM_A in the variable x.

  Further, as shown in FIG. 5B, Write (write destination memory area, write data) is a write I / F, and is designated by a designated write destination memory area mem (for example, variable name, memory address, etc.). Write the data data. For example, Write (variable MEM_A, variable x) performs a process of writing the data stored in the variable x into the memory area pointed to by the constant MEM_A.

  In the source code 1 of the series X illustrated in FIG. 2, Write (MEM_J, 0) called from the function moduleA_input, Read (MEM_J, a), Read (MEM_J, a), Write (MEM_J, b) called from the function moduleA_output. ) Four memory access I / Fs are executed in this order.

  Also, as shown in FIG. 3, when the module of series Y executes a function called moduleB_main, for example, a function called moduleC_interrupt is called every time one second elapses due to an interrupt process. In the source code 1 of the series Y illustrated in FIG. 3, Write (MEM_K, 1) called from the function moduleB_main, Write (MEM_L, x) called from the function moduleC_interrupt, and Read (MEM_L, l) called from the function moduleB_main again. ) Three memory access I / Fs are executed in this order. In FIG. 3, the target code is a code surrounded by a broken line.

  Further, as shown in FIG. 4, the module of the series Z is configured to execute a function called moduleW_sleep when one of the functions moduleX_ctrl, moduleY_ctrl, or moduleZ_ctrl is executed. In the source code 1 of the series Z illustrated in FIG. 4, Write (MEM_S, 1) called from one of the functions of moduleX_ctrl, moduleY_ctrl, or moduleZ_ctrl, and Write (MEM_P, 1) called from the function moduleW_sleep. The access I / F is executed in this order. In FIG. 4, the target code is a code surrounded by a broken line.

  FIG. 6 is an explanatory diagram showing an example of a predefined execution order of the memory access I / F. The example of FIG. 6 corresponds to the above-described examples of FIGS. As shown in FIG. 6, in the series X, a process of writing 0 to the memory area J with the function moduleA_input (order information ID of target code = 1), and the data read from the memory area J with the function moduleA_output Processing to store in variable a (target code sequence information ID = 2), and processing to store data read from memory area J in function variable A_output again into variable a (target code sequence information ID = 3) , The function moduleA_output performs the process of writing the value of the variable b in the memory area J (target code sequence information ID = 4, end ID = 4), and returns to the first process (start ID = 1) to perform the same process. repeat.

  In series Y, the function moduleB_main performs a process of writing 1 to the memory area K (target code order information ID = 1), and the function moduleC_interrupt performs a process of writing the value of the variable x to the memory area L. (The target code sequence information ID = 2), and the function moduleB_main performs the process of storing the data read from the memory area L in the variable l (target code sequence information ID = 3, end ID = 3). Returning to the process (first ID = 1), the same process is repeated.

  Further, in the series Z, a process of writing 1 to the memory area S with one of the functions moduleX_ctrl, moduleY_ctrl, or moduleZ_ctrl (order information ID = 1 of the target code), and 1 to the memory area P with the function moduleW_sleep. Is written (target code sequence information ID = 2, end ID = 2), and the process returns to the first process (start ID = 1) and the same process is repeated.

  The execution order of the functions of each series illustrated in FIG. 6, that is, the execution order of the memory access I / Fs to be monitored can be defined in advance by the user, for example, using a related table.

  FIG. 7 is an explanatory diagram showing an example of the association table 2. The association table 2 illustrated in FIG. 7 corresponds to the examples of FIGS. The association table 2 is a table for monitoring the function call order (execution order of the memory access I / F) of the programs exemplified in FIGS. 2 to 4 and is created by the user in advance. .

  The association table 2 is a table in which order information that determines the execution order of a plurality of memory access I / Fs (target codes) related to memory access and specific information related to memory access of the memory access I / F are associated in advance. . The order information is information that can specify the order of memory access. In the example of FIG. 7, the order information includes a series indicating the distinction between modules and the like, an ID indicating the execution order of the memory access I / F (or a function that calls the memory access I / F) in the series, and the like. Contains information.

  The unique information is unique information related to memory access by the memory access I / F. In the example of FIG. 7, the monitoring position information is unique information. The monitoring position information represents a position where a memory access to be monitored exists, for example, a function name for calling a memory access I / F for executing memory access, a memory area to be accessed (memory address), and a memory access process. Contents (separate from read process or write process), write value when memory access is write process, number for identifying execution order of memory access I / F which is memory access process of the same process content in the same function, memory An address of an instruction code (object code) corresponding to the access I / F is included.

  The function name of the monitoring position information is the name of the function that calls the memory access I / F. The reason for specifying in units of functions is that there are multiple functions such as input functions and output functions even in the same module. For example, the processing order such as executing the output function after executing the input function is defined in the function. It is. Although the function name can be omitted, the user can easily recognize the function name by specifying the function name.

  The reason why the write value is described in the monitoring position information is that the contents of processing may vary greatly depending on the data to be written even in the same memory area. For example, the subsequent processing contents vary greatly depending on whether a normal value or an abnormal value is written in a memory area representing the communication state of the network.

  In addition, the number of the monitoring position information is distinguished depending on what number the memory access is executed from the beginning of the function when the function name, the memory area, the processing content, and the write value of the monitoring position information are all the same. belongs to. In the example of FIG. 7, since the memory access of ID = 2 and ID = 3 of the series X is the same, numbers 1 and 2 are used to specify the first and second memory accesses of the function moduleA_output. Yes. The number may be omitted.

  As described above, the order information of the association table 2 defines the execution order of memory access specified by the monitoring position information. For example, when memory accesses in the same series are executed in the order of designated IDs, it can be determined that they are normal. The ID can be a serial number that increases by a constant C. In the example of FIG. 7, the constant C is 1, but is not limited to this.

  The program generation apparatus 100 according to the present embodiment uses the information (order information, monitoring position information) defined in the association table 2 to store the memory access I / F used in the program 1 to be monitored. Then, a monitoring code (detection code) for monitoring the order in which the program accesses the memory is automatically inserted to generate a program (source code) 3 in which the monitoring code is inserted. Further, the program generation apparatus 100 according to the present embodiment uses the association table 2 to generate the monitoring table 4 used when monitoring whether or not the memory accesses in the program to be monitored are executed in the correct order. To do. Hereinafter, these points will be described.

  The monitoring target specifying unit 14 has a function as specifying means for specifying the memory access I / F (target code) from the source code 1. The monitoring target specifying unit 14 uses the association table 2 to specify a plurality of memory access I / Fs from the source code 1. For example, the monitoring target specifying unit 14 searches the source code 1 using the function name of the monitoring position information in the association table 2 and specifies the memory access I / F called from the function.

  The monitoring code generation unit 15 has a function as insertion means for inserting a monitoring code (detection code) into the memory access I / F. The monitoring code is a code for detecting unique information (monitoring position information) related to memory access executed by the memory access I / F.

  FIG. 8 is an explanatory diagram showing an example of a target code (reading from a memory) into which a monitoring code is inserted. When the monitoring target specifying unit 14 specifies Read (mem, area), which is a memory access I / F (target code), the monitoring code generation unit 15 includes the specified Read (mem, area). , A monitoring code Check (r1, 0, 0, r3) is inserted.

  As shown in FIG. 8, the monitoring code Check (r1, 0, 0, r3) corresponding to Read (mem, area), which is a memory access I / F, detects and monitors four arguments as specific information. Notify the module (not shown).

  The first argument r1 is a register storing a memory address to be accessed, and is a memory area accessed by the memory access I / F. The second argument is 0, indicating that the processing content of the memory access I / F is read. The third argument is 0, and is fixed to 0 when the processing content is read. The fourth argument r3 is a register in which the address of the Read call source is stored, and is the address of the instruction code (assembler) that is the call source of the memory access I / F.

  The address of the instruction code (assembler) can be obtained as follows. That is, the control unit 10 converts the source code including the memory access I / F into which the monitoring code is inserted into an object code, and assigns a unique memory address to the object code corresponding to the memory access I / F. It has a function as a means. That is, the control unit 10 has a compiler function, and a compiler can be used for conversion from source code to object code. The control unit 10 may be provided with a compiler separately from the control unit 10 instead of having a compiler function. If a library exists in addition to the source code, the library can be linked to the object code by the linker.

  The object code is also called an instruction code, a purpose code, or a machine language. The memory address assigned by the compiler is the address of the instruction code (object code), but can be regarded as the address of the caller of the memory access I / F.

  FIG. 9 is an explanatory diagram showing an example of a target code (writing to a memory) into which a monitoring code is inserted. When the monitoring target specifying unit 14 specifies Write (mem, data) which is a memory access I / F (target code), the monitoring code generation unit 15 includes the specified Write (mem, data) in the specified Write (mem, data). , The monitoring code Check (r1, 1, r2, r3) is inserted.

  As shown in FIG. 9, the monitoring code Check (r1, 1, r2, r3) corresponding to Write (mem, data), which is an I / F for memory access, detects and monitors four arguments as specific information. Notify the module (not shown).

  The first argument r1 is a register storing a memory address to be accessed, and is a memory area accessed by the memory access I / F. The second argument is 1, indicating that the processing content of the memory access I / F is writing. The third argument r2 is a register storing a write value when the processing content is write. The fourth argument r3 is a register that stores the address of the caller of Write, and is the address of the instruction code (assembler) that is the caller of the memory access I / F.

  The monitoring code inserted program (source code) 3 generated by the monitoring code generator 15 is exemplified in the memory access I / F to be monitored in the program (source code) 1 as shown in FIGS. The monitoring code Check is inserted.

  The monitoring code generation unit 15 has a function as a generation unit that generates the monitoring table 4 (detection table). That is, the monitoring code generation unit 15 generates the monitoring table 4 that associates the order information for specifying the memory access I / F, the monitoring position information, and the address of the above-described instruction code.

  FIG. 10 is an explanatory diagram showing an example of the monitoring table 4. As shown in FIG. 10, the monitoring table 4 has a configuration in which the address of the instruction code corresponding to each memory access I / F of the related table 1 is added to the related table 1. In the monitoring table 4 as well, the function name and number can be omitted as in the related table 1. In addition, a head ID (ID of a target code executed first) and a tail ID (ID of a target code executed last) can be added to the monitoring table 4 for each series.

  Next, the operation of the program generation device 100 of this embodiment will be described. FIG. 11 is a flowchart illustrating an example of a generation process of the source code 3 into which the monitoring code is inserted by the program generation apparatus 100 according to the present embodiment. In the following description, the main subject of processing is the control unit 10 for convenience.

  The control unit 10 acquires the source code 1 of the program (S11), and acquires the association table 2 defined by the user in advance (S12). For example, the control unit 10 searches the source code 1 using the function name (S13), and specifies the target code to be monitored, that is, the memory access I / F (S14).

  The control unit 10 determines whether or not the identified target code is a read code from the memory (memory access I / F for reading) (S15), and when the target code is a read code from the memory (S15). The monitoring code for reading from the memory is inserted into the memory access I / F that is the target code (S16).

  When the target code is not a read code from the memory (NO in S15), that is, when the target code is a write code to the memory (memory access I / F for writing), the control unit 10 performs the writing to the memory. Is inserted into the memory access I / F that is the target code (S17).

  The control unit 10 determines whether or not all the target codes in the source code 1 have been searched (S18). If all the target codes have not been searched (NO in S18), the processing from step S13 is repeated. . When all the target codes have been searched (YES in S18), the control unit 10 generates the source code 3 in which the monitoring code is inserted (S19), and ends the process.

  FIG. 12 is a flowchart showing an example of the generation process of the monitoring table 4 by the program generation apparatus 100 according to the present embodiment. The control unit 10 compiles the source code 3 into which the monitoring code has been inserted, generated by the process illustrated in FIG. 11 (S31), and converts the source code into an object code. By converting to an object code, the address of the instruction code corresponding to the memory access I / F (target code) can be obtained.

  The control unit 10 searches the source code 3 into which the monitoring code has been inserted, and specifies the target code (memory access I / F) corresponding to the monitoring position information in the related table 2 (S32). The control unit 10 acquires the address of the instruction code corresponding to the identified target code (S33).

  The control unit 10 determines whether or not the identification of the target code has been completed for all the monitoring position information in the related table 2 (S34). If the identification is not completed (NO in S34), the process from step S33 is repeated. .

  When the identification of the target code is completed for all the monitoring position information in the related table 2 (YES in S34), the control unit 10 acquires the sequence information of the identified target code from the related table 2 (S35).

  Based on the acquired order information, the control unit 10 specifies the head ID (the ID of the target code to be executed first) and the tail ID (the ID of the target code to be executed last) for each series (S36). The monitoring table 4 is generated by adding the identified head ID, tail ID, and the address of the instruction code acquired in step S33 to the related table 2 (S37), and the process ends.

  As described above, according to the present embodiment, a program is composed of a plurality of modules (for example, series X, Y,...), And there is a target code for executing a plurality of memory accesses in each module. In addition, the monitoring code is inserted (embedded) into the target code, and the order of the target code to be executed is determined according to the order of the specific information detected by the inserted monitoring code. It is possible to generate a program (source code) that can determine whether the processes are executed in the correct order. Further, it is possible to generate a program that can monitor the order of memory access from interrupt processing.

  Further, according to the present embodiment, the address of an object individually and uniquely corresponding to each target code is identified as unique information that can identify (distinguish) each target code (code that performs memory access) in the source code. By using it, a program capable of accurately monitoring the execution order of the target code can be generated.

  Further, according to the present embodiment, for example, by generating the monitoring table 4 that associates the address of the sequence, ID, and instruction code for each target code, if the address of the instruction code corresponding to the target code is known, The order information of the target code is specified, and a program that can monitor the execution order of the target code can be generated.

  According to the present embodiment, since the monitoring code that can detect the position monitoring information related to reading from the memory or the position monitoring information related to writing to the memory is inserted into the target code, it corresponds to the target code. If the position monitoring information related to reading from the memory or the position monitoring information related to writing to the memory is known, the order information of the target code can be specified, and a program that can monitor the execution order of the target code can be generated.

  Further, as a method of inserting the monitoring code, for example, a method of inserting as many monitoring codes as the number of the monitoring target codes before or after the monitoring target code may be considered. However, in such a case, the monitoring code is added to the source code separately from the monitoring target code, and the size of the program can increase dramatically by inserting the monitoring code. There is sex. In particular, when there are a large number of codes to be monitored, the problem that the ROM size of the program increases becomes significant. However, according to the present embodiment, since the monitoring code is embedded in the memory access I / F that is the target code, the ROM consumption of the program is not proportional to the number of processes to be monitored. There is no problem that the ROM size of the program increases.

  The association table 2 described in the present embodiment is not limited to the example of FIG. Another example of the related table will be described below.

  FIG. 13 is an explanatory diagram showing an example of the related database 2b when the memory access I / F designation function is set. The designation function designates one of a plurality of different functions even in the same read or write process. For example, the memory access I / F is determined depending on the size of data to be read or the size of data to be written. Can be used properly.

  In the example of FIG. 13, when the data size is 8 bits, Write08 or Read08 is used, and when the data size is 16 bits, Write16 or Read16 is used. In this case, different instruction code addresses correspond to Write08, Read08, Write16, and Read16. Similar to the example of FIG. 10, the monitoring table can be generated by adding the address of the instruction code to each memory access I / F in FIG.

  In the program in which the execution order is defined in the relation table 2b as in the example of FIG. 13, it is determined that the program is executed in the planned order only when accessed from a specific memory access I / F. A function for detecting an access from the memory access I / F as an error can be provided. For example, when a memory area to be read by an 8-bit read I / F is read by a 16-bit read I / F, it can be determined that an error has occurred.

  As another example of the related table, a function (repetitive head ID setting function) for setting an ID (an ID different from the head ID) to be executed next to the tail ID of the position information can be provided.

  FIG. 14 is an explanatory diagram showing an example of a predefined execution order of the memory access I / F when the repeated head ID is set. FIG. 15 is a related database when the repeated head ID is set. It is explanatory drawing which shows the example of 2c.

  In the example of FIG. 14, for the series X, after the memory access I / F with the tail ID = 4 is executed, the memory access I / F with the head ID = 1 is not executed, but the repeated head. The memory access I / F with ID = 2 is set to repeatedly execute toward the end ID again. For the series Y, after the memory access I / F with the tail ID = 3 is executed, the memory access I / F with the head ID = 1 is not executed, but the repeated head ID = 3. The memory access I / F is set to be repeatedly executed.

  Further, as shown in FIG. 15, in the related table 2 c, a repeated head ID is provided for each of the series X and Y in the order information. Similar to the example of FIG. 10, the monitoring table can be generated by adding the address of the instruction code to each memory access I / F in FIG. 15.

  By setting the repetition head ID, for example, when a specific condition such as power-on is satisfied, an initialization function that initializes the data is called, and thereafter a periodic process that processes the data every time a certain period elapses A program for monitoring the execution order of memory access in a program that calls a function can be generated. In the examples of FIGS. 14 and 15, the function moduleA_init is an initialization function, and the function moduleA_main is a periodic processing function.

Also, by setting the repeated head ID, for example, executing memory access in a program that starts only under specific conditions such as when returning from the sleep state and calls a stop processing function that continues to stop after startup A program for monitoring the order can be generated. In the examples of FIGS. 14 and 15, the function moduleB_wakeup and the function moduleC_wakeup are functions that are called under specific conditions, and the function moduleB_main is a stop processing function.
In addition, as another example of the related table, a function of setting a plurality of notification schedule IDs with the ID of the order information may be provided. The notification schedule ID is an ID of a memory access I / F executed next to the memory access I / F currently being executed. That is, in the above-described example, the ID of the memory access I / F is a serial number that increases by a constant C (for example, 1), and the ID obtained by adding the constant C to the current ID is the notification schedule ID. However, a notification schedule ID may be set in advance for each ID, and a plurality of notification schedule IDs can be set when setting a notification schedule ID.

  FIG. 16 is an explanatory diagram showing an example of a program (source code) 1b when a notification schedule ID is set, and FIG. 17 shows a predefined memory access I / F when a notification schedule ID is set. FIG. 18 is an explanatory diagram illustrating an example of an execution order, and FIG. 18 is an explanatory diagram illustrating an example of the related database 2d when a notification schedule ID is set.

  In the example of FIGS. 16 and 17, data read from the memory area Q by the function moduleB_main is stored in the variable q (ID = 1), and then 1 is written in the memory area K according to a required condition (ID = 2 ) Or a process of writing 0 to the memory area K (ID = 3). When the process of writing 1 to the memory area K (ID = 2) is performed, the process of writing the variable m to the memory area L (ID = 4) is performed, and the process returns to the process of the head ID = 1. On the other hand, when the process of writing 0 in the memory area K (ID = 3) is performed, the process of writing the variable n in the memory area L (ID = 5) is performed, and the process returns to the process of the head ID = 1.

  As shown in FIG. 18, a notification schedule ID is provided for the series X in the related table 2d. In the series X, the memory access I / F with ID = 2 or 3 is executed next to ID = 1 depending on the condition, and the memory access I / F with ID = 4 is executed next to ID = 2. F is executed, and after ID = 3, a memory access I / F with ID = 5 is executed. Similarly to the example of FIG. 10, the monitoring table can be generated by adding the address of the instruction code to each memory access I / F in FIG. 18.

  By using the relation table 2d as shown in FIG. 18, it is possible to generate a program that can monitor conditional branch processing that branches into a plurality of processes depending on the operating state of the program.

  As another example of the related table, after a certain memory access I / F is executed, the time until the next memory access I / F is executed is measured to obtain a predetermined deadline (threshold time). ) Can be handled as an error.

  FIG. 19 is an explanatory diagram showing an example of the association table 2e when a deadline (threshold time) is provided. As shown in FIG. 19, the related table 2e is provided with time measurement information in addition to the order information and the monitoring position information. The time measurement information includes, for example, whether or not time measurement is necessary, deadline (threshold time). Information.

  For the memory access I / F whose time measurement necessity is “necessary”, the elapsed time from the start of processing is measured. If the ID memory access I / F is executed next before the elapsed time exceeds the deadline, it is determined to be normal, and after the elapsed time exceeds the deadline, the next ID memory access is performed. When the use I / F is executed, it is determined that there is an abnormality.

  The program generation device 100 acquires the series, ID, and time measurement information from the related table, and generates the monitoring table 4 by collecting the acquired information for each memory access I / F. In this case, the monitoring position information may be stored in the monitoring table 4 or may not be stored.

  Further, the program generation device 100 generates the source code 3 in which the monitoring code is inserted by embedding the elapsed time measurement function in the source code 1 of the program as a function called from an interrupt process that occurs at regular intervals. .

  In the related table illustrated in FIG. 7 and the like, a source file name can be designated instead of the function name of the monitoring position information. In this case, the memory access I / F corresponding to the memory area, processing contents, write value, and number of the related table is searched from the head of the specified source file, and the instruction code corresponding to the searched memory access I / F Can be used as the address of the caller of the memory access I / F.

  Further, in the related table illustrated in FIG. 7 and the like, information other than the memory area, the processing content, and the written value can be omitted from the monitoring position information. For example, for the series X, a relation table in which ID = 1 (first) is a write process to the memory area and ID = 2 (end) is a read process from the memory area. As a result, it is desired to monitor that the data has been read after the data has been written to a specific memory area, but the function of the program that performed the processing and the value of the written data are monitored. Can be generated.

  The above-described program generation device 100 can also be realized using a computer including a CPU, a RAM, and the like. That is, as shown in FIGS. 11 and 12, a recording medium recording a computer program that defines each processing procedure is read by a recording medium reading unit provided in the computer, and the computer program obtained by reading is loaded into a RAM. By executing the computer program with the CPU, the program generating apparatus 100 can be realized on the computer.

  Next, the monitoring apparatus 200 of this embodiment will be described. FIG. 20 is a block diagram illustrating an example of the configuration of the monitoring apparatus 200 according to the present embodiment. The monitoring device 200 is, for example, an ECU (Electronic Control Unit) mounted on a vehicle, and determines whether or not the processes in the monitoring target program (monitoring code inserted source code) 3 are executed in a predetermined order. Monitor.

  The monitoring device 200 includes a microcomputer (hereinafter referred to as a microcomputer) 20, storage units 24 and 25, a device interface 26, a communication interface 27, and the like. The microcomputer 20 includes an execution unit 21, a monitoring unit 22, an error processing unit 23, and the like. The monitoring unit 22 includes an ID specifying unit 221, a memory access order determining unit 222, a correspondence determining unit 223, and the like.

  The device interface 26 has an interface function with the in-vehicle device 300 mounted on the vehicle, and the microcomputer 20 can control the in-vehicle device 300. The in-vehicle device 300 is, for example, an interior lighting, a headlight, a brake lamp, a heater, an air conditioner, an alarm device, a door lock mechanism, meters, a blinker, a car navigation device, and the like, but is not limited thereto.

  The communication interface 27 has an interface function with another ECU 210 or the like via the in-vehicle LAN. The microcomputer 20 can transmit / receive data to / from another ECU 210 or the like via the communication interface 27.

  The storage unit 24 stores the monitoring target program 3. The monitoring target program 3 is, for example, a program in which a monitoring code generated by the program generation device 100 described above is inserted. The monitoring target program 3 is an execution format program.

  The storage unit 25 stores the monitoring table 4. The monitoring table 4 is a table illustrated in FIG. 10, for example, and is a monitoring table generated by the above-described program generation device 100. The storage units 24 and 25 are rewritable nonvolatile memories, for example, and can be combined into one.

  The execution unit 21 includes a CPU (Central Processor Unit) that performs arithmetic processing, a RAM, and the like, reads the monitoring target program 3 stored in the storage unit 24, and performs a plurality of processes (instructions and instructions) in the monitoring target program 3. Is executed to control the in-vehicle device 300.

  When the monitoring target program 3 is executed by the execution unit 21, the monitoring target code in the monitoring target program 3, that is, the monitoring code (detection code) inserted (embedded) in the memory access I / F is ( 1) Memory area (memory address) accessed by the memory access I / F, (2) Processing contents of the memory access I / F (read, write), (3) Processing contents of the memory access I / F are written (4) Notify (output) monitoring position information (specific information related to memory access) such as the address of the instruction code that is the call source of the memory access I / F.

  That is, the execution unit 21 or the monitoring code has a function as a detection unit that detects monitoring position information (unique information) related to memory access by the access processing to the memory.

  FIG. 21 is an explanatory diagram showing an example of monitoring position information notified to the monitoring unit 22 by the monitoring code inserted into the target code when the monitoring target program 3 is executed. As shown in FIG. 21, it is assumed that Read (mem, area) and Write (mem, data), which are memory access I / Fs, are executed in the monitoring target program of the series X in this order. In this case, since the monitoring code Check (r1, 0, 0, r3) illustrated in FIG. 8 is inserted into Read (mem, area), a memory address (for example, read (mem, area)) accessed (for example, , MEM_J), “0” indicating the processing contents (reading), and the monitoring position information such as the address of the instruction code (for example, “36AC”) are notified to the monitoring unit 22.

  Similarly, since the monitoring code Check (r1, 1, r2, r3) illustrated in FIG. 9 is inserted into Write (mem, data), the memory address accessed by Write (mem, data) Monitoring position information such as (for example, MEM_J), “1” indicating the processing content (writing), and the address of the instruction code (for example, “5A1F”) is notified to the monitoring unit 22.

  The ID specifying unit 221 has a function as specifying means for specifying order information corresponding to the monitoring position information. Using the monitoring table 4, the ID specifying unit 221 sequentially specifies the order information corresponding to the monitoring position information for each monitoring position information notified of the rank from the execution unit 21 (monitoring code). Each time a plurality of memory access I / Fs are executed in sequence, monitoring position information unique to the memory access I / F is notified to the ID specifying unit 221. Therefore, the order corresponding to the notified monitoring position information By sequentially specifying information, the execution order of access processing can be detected.

  The monitoring unit 22 has a function as monitoring means for monitoring the order of access processing to be monitored (processing by the memory access I / F). The monitoring unit 22 monitors the execution order of the memory access I / Fs to be monitored that are executed by the execution unit 21 according to the specified order information. For example, if the execution order of the monitoring target memory access I / F is as planned, it can be determined that the access processing is being performed in the correct order, and the monitoring target memory access I / F can be determined. When the execution order of F is different from the scheduled order, it can be determined that the access processing is performed in an incorrect order, and the execution order of the plurality of memory access processes in the monitoring target program can be monitored. .

  The ID specifying unit 221 has a function as a determination unit that determines whether or not the order information corresponding to the monitoring position information notified from the execution unit 21 exists in the monitoring table 4. When the ID specifying unit 221 determines that the order information corresponding to the monitoring position information notified from the execution unit 21 exists in the monitoring table 4, the ID specifying unit 221 specifies the order information. That is, by associating the monitoring target sequence information and the monitoring position information with the monitoring table 4, even if the monitoring target program 3 includes both the monitoring target access processing and the non-monitoring target access processing, By excluding access processes that are not monitored, only access processes that need to be monitored can be extracted and monitored. Thus, even when the monitoring target access process becomes different due to the specification change, function change, etc. of the monitoring target program 3, the access process that needs to be monitored can be specified using the monitoring table 4. The monitoring target program 3 can be used as it is without changing the monitoring code from the memory access I / F.

  The memory access order determination unit 222 has a function as an order determination unit. The memory access order determination unit 222 determines the execution order of the monitoring target memory access I / F executed by the execution unit 21 according to the order information in the monitoring table 4 that matches the order information specified by the ID specifying unit 221. It is determined whether or not a predetermined execution order (scheduled execution order). For example, when the ID detected by executing a plurality of access processes and the ID in the monitoring table 4 match, it can be determined that the access processes are being executed in the planned order, and the detected ID and If the IDs in the monitoring table do not match, it can be determined that the access processes are being executed in the wrong order.

  In the following, even when the modules (series) in the monitoring target program 3 are executed in a predetermined order, the plurality of memory access processes in the modules are not necessarily executed in the correct order. Even in such a case, a description will be given of the fact that the execution order of the memory access processing can be monitored by the monitoring apparatus 200 of the present embodiment.

  FIG. 22 is an explanatory diagram showing an example of the execution order of each series in the monitoring target program 3. Each series X, Y can be considered as a module X, Y. In the example of FIG. 22, it is assumed that after the series Y (module Y) is executed, the series X (module X) is executed next, and then the series Y (module Y) is executed. Is the order of the series Y, X, Y. Note that in the conventional apparatus such as Patent Document 1, the execution order of each module illustrated in FIG. 22 can be monitored.

  FIG. 23 is an explanatory diagram showing an example of order information of each series X, Y of the monitoring table 4. FIG. 23A defines the order of memory access I / Fs in the series X, and the memory access I / Fs corresponding to ID = 1, 2, 3, 4 are executed in this order. After the memory access I / F with ID = 4 (end ID) is executed, the execution is repeated in the same order from the memory access I / F with ID = 1 (start ID).

  FIG. 23B defines the order of the memory access I / Fs in the series Y, and the memory access I / Fs corresponding to ID = 1, 2, and 3 are executed in this order. After the memory access I / F with ID = 3 (end ID) is executed, the execution is repeated in the same order from the memory access I / F with ID = 1 (start ID).

  FIG. 24 is an explanatory diagram showing an example of the execution order of the memory access I / F determined by the memory access order determination unit 222. In the case of FIG. 24A, the IDs in the position information sequentially specified (detected) by the memory access order determination unit 222 are ID = 1, 2, 3, 4, 1,..., And in the monitoring table 4 illustrated in FIG. Therefore, it can be determined that the execution order of the memory access I / F is correct.

  On the other hand, in the case of FIG. 24B, the IDs in the position information sequentially identified (detected) by the memory access order determination unit 222 are ID = 1, 2, and 4, and the execution order in the monitoring table 4 illustrated in FIG. Since they do not match, it can be determined that the execution order of the memory access I / F is incorrect. As described above, according to the monitoring apparatus 200 of the present embodiment, as shown in FIG. 22, even if the modules are executed in the correct order, the memory access processes in the modules are executed in the predetermined order. If not, it can be determined that an error related to the execution order has occurred.

  The correspondence determination unit 223 updates the value of the notification schedule ID based on the ID of the order information stored in the monitoring table 4 and the ID of the order information specified by the ID specifying unit 221. The notification schedule ID is an ID of a memory access I / F executed next to the memory access I / F currently being executed. For example, a serial number in which the ID of the memory access I / F increases by a constant C (for example, 1) can be used, and an ID obtained by adding the constant C to the current ID can be used as the notification schedule ID.

  Further, when there is an error in the execution order of the memory access I / F, the correspondence determination unit 223 determines the correspondence content according to the content of the error, and outputs the determined correspondence content to the error processing unit 23. The correspondence content is, for example, a process preceding the access process in which it is determined that the execution order is incorrect, and the execution (retry) is performed again from a predetermined point and an error has occurred in the execution order. Record an error log. As another correspondence, for example, when it is determined that the execution order is incorrect, the execution of the modules is temporarily stopped, and notification that an error has occurred in the execution order is notified.

  The error processing unit 23 performs processing of the correspondence content determined by the correspondence determination unit 223. In the example of the correspondence content described above, the error processing unit 23 performs the execution (retry) process and the error log recording process again. Alternatively, processing for stopping execution of the module and processing for notifying occurrence of an error are performed.

  Next, the operation of the monitoring apparatus 200 according to this embodiment will be described. FIG. 25 is a flowchart illustrating an example of the order information specifying process performed by the monitoring apparatus 200 according to the present embodiment. In the following description, the processing subject is referred to as the microcomputer 20 for convenience.

  The microcomputer 20 acquires the monitoring position information notified by the memory access process (S101). That is, the monitoring position information regarding the memory access by the access processing to the memory detected by the execution unit 21 or the monitoring code is acquired. The microcomputer 20 searches the monitoring table 4 for order information (series, ID) corresponding to the acquired monitoring position information (S102).

  The microcomputer 20 determines whether or not the order information (series, ID) corresponding to the address of the instruction code in the monitoring position information is in the monitoring table 4 (S103), and if there is corresponding order information (in S103) YES), the order information (series, ID) is output to the monitoring unit 22 (S104), and the process ends.

  If there is no corresponding order information in step S103 (NO in S103), the microcomputer 20 accesses the memory address (memory area) accessed in the memory access process, the contents of the access process, and the order corresponding to the write value in the write process. It is determined whether the information (series, ID) is in the monitoring table 4 (S105).

  If there is corresponding order information (YES in S105), the microcomputer 20 performs the process of step S104. If there is no corresponding order information (NO in S105), information indicating that there is no order information corresponding to the memory access process. Is output to the monitoring unit 22 (S106), and the process ends. Note that the process of FIG. 25 is performed each time the memory access process is executed.

  FIG. 26 is a flowchart illustrating an example of a procedure of monitoring processing by the monitoring apparatus 200 according to the present embodiment. The microcomputer 20 acquires the order information (series, ID) output in the process illustrated in FIG. 25 (S110). The acquired order information is a notification ID. It is determined whether or not the acquired order information matches the planned order information (series, ID) (S111). The schedule order information is a notification schedule ID updated by the correspondence determination unit 223.

  If the acquired order information (notification ID) matches the scheduled order information (notification schedule ID) (YES in S111), the microcomputer 20 determines that the memory access processing is being executed in the correct order (S112), and acquires it. It is determined whether or not the order information (notification ID) is the end order information (end ID) (S113).

  When the acquired order information (notification ID) is not the end order information (end ID) (NO in S113), the microcomputer 20 sets the next order information as the scheduled order information (S114) and ends the process. That is, a value obtained by adding a constant C to the notification ID notified in the series is set as the notification schedule ID.

  When the acquired order information (notification ID) is the end order information (end ID) (YES in S113), the microcomputer 20 sets the next order information as the start order information (S115) and ends the process. That is, the head ID of the series is set as the notification schedule ID.

  If the order information (notification ID) acquired in step S111 does not match the scheduled order information (notification schedule ID) (NO in S111), the microcomputer 20 determines an error process according to the acquired order information (S116). The determined error process is executed (S117), and the processes after step S113 are performed.

  As described above, according to the monitoring apparatus 200 of this embodiment, the execution order of a plurality of memory access processes in a program can be monitored. In particular, when the modules are executed in the correct order, even when the memory access processing in any module is executed in the wrong order, the execution order of the memory access processing is accurately monitored and determined. Can do.

  Further, as described above, the monitoring position information (unique information) includes a machine language memory address corresponding to the monitoring target access processing. The machine language is also referred to as an object code, an instruction code, and a purpose code. The address of the machine language (instruction code) can be regarded as the address of the caller of the memory access process. Since the machine language address is used as unique information that can identify (discriminate) each access process to be monitored in the monitoring program, the execution order of the access processes to be monitored can be accurately monitored.

  Further, as described above, the monitoring position information (unique information) includes information regarding the type of processing for reading from or writing to the memory, the address of the memory to be accessed, or the value written to the memory. As a result, if the specific information related to reading from the memory or the specific information related to writing to the memory is known, the order information of the access processing can be specified, and the execution order of the access processing can be monitored.

  Next, another determination example of the execution order of the memory access processing by the monitoring apparatus 200 according to the present embodiment will be described.

  FIG. 27 is an explanatory diagram showing a determination example when a monitoring table based on the related table 2b illustrated in FIG. 13 is used. FIG. 13 illustrates a related database when the memory access I / F designation function is set. Here, the designation function designates any one of a plurality of different functions even in the same read or write process. For example, the memory access I is determined depending on the size of data to be read or the size of data to be written. / F can be used properly.

  In the example of FIG. 13, when the data size is 8 bits, Write08 or Read08 is used, and when the data size is 16 bits, Write16 or Read16 is used. In this case, different instruction code addresses correspond to Write08, Read08, Write16, and Read16.

  In the program in which the execution order is defined in the relation table 2b as in the example of FIG. 13, the position information is specified in the order of ID = 1, 2, 1, 2,... In this case, it can be determined that the memory access processing is performed in the correct order.

  However, as shown in FIG. 27B, when position information is specified in the order of series X ID = 1 and series Y ID = 2, it is read out by, for example, an 8-bit read I / F. The memory area to be read is read by the 16-bit read I / F, and it can be determined that the memory access processing is performed in the wrong order. Processing can be performed.

  FIG. 28 is an explanatory diagram showing a determination example when a monitoring table based on the related table 2c illustrated in FIG. 15 is used. FIG. 15 illustrates a related table 2c in which the repeated head ID is provided for each of the series X and Y in the order information.

  In the program in which the execution order is defined in the related table 2c as in the example of FIG. 15, the position information is stored in the order of ID = 1, 2, 3, 4, 2,. If specified, the memory access process is repeated with the repeated head ID = 2, so that it can be determined that the memory access process is performed in the correct order.

  However, as shown in FIG. 28B, for example, when the position information is specified in the order of ID = 1, 2, 3, 4, 1, the memory access process is not repeated with repeated head ID = 2. It can be determined that the memory access processing is performed in the wrong order, and an error relating to the execution order can be detected and error processing can be performed.

  FIG. 29 is an explanatory diagram showing a determination example when a monitoring table based on the related table 2d illustrated in FIG. 18 is used. FIG. 18 illustrates the related database 2d when the notification schedule ID is set.

  In the program in which the execution order is defined in the related table 2d as in the example of FIG. 18, the position information is specified in the order of ID = 1, 2, 4, 1,... The notification schedule ID of ID = 1 is ID = 2 or 3, the notification schedule ID of ID = 2 is ID = 4, the notification schedule ID of ID = 4 is ID = 1, and the notification schedule ID Since the memory access processes are executed in the order specified in (1), it can be determined that the memory access processes are performed in the correct order.

  However, as shown in FIG. 29B, for example, when position information is specified in the order of ID = 1, 2, 4, 3, ID = 4 although the notification schedule ID of ID = 4 is ID = 1. Since the memory access process with ID = 3 is performed next to the memory access process, it can be determined that the memory access process is performed in the wrong order, and an error related to the execution order can be detected and the error process can be performed. it can.

  FIG. 30 is an explanatory diagram showing a determination example when a monitoring table based on the related table 2e illustrated in FIG. 19 is used. FIG. 19 illustrates an association table 2e when a deadline (threshold time) is provided.

  In the program in which the execution order is defined in the association table 2e as in the example of FIG. 19, for example, 50 ms (<100 ms which is the threshold time) after the memory access process of ID = 2 for the series X as shown in FIG. 30A. ) Since the memory access process with ID = 3 is executed later, it can be determined that the memory access process is correct.

  However, as shown in FIG. 30B, for example, for the series X, after the memory access process with ID = 2, for example, when the memory access process with ID = 3 is executed after 300 ms (> 100 ms which is the threshold time). Since the elapsed time from the start of the memory access process of ID = 2 to the start of the memory access process of ID = 3 exceeds the deadline (threshold time), the memory access process is erroneous Can be determined, and error processing can be performed.

  The monitoring device 200 described above can also be realized using a computer including a CPU, a RAM, and the like. That is, as shown in FIG. 25 and FIG. 26, a recording medium in which a computer program defining each processing procedure is recorded is read by a recording medium reading unit provided in the computer, and the computer program obtained by reading is loaded into a RAM. By executing the computer program on the CPU, the monitoring device 200 can be realized on the computer.

  The disclosed embodiments are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

1 program (source code)
2, 2a, 2b, 2c, 2d, 2e Related table 3 Monitoring code inserted program (monitoring target program)
DESCRIPTION OF SYMBOLS 4 Monitoring table 10 Control part 14 Monitoring object specific | specification part 15 Monitoring code generation part 20 Microcomputer 21 Execution part 22 Monitoring part 221 ID specific part 222 Memory access order determination part 223 Correspondence determination part 23 Error processing part 24, 25 Storage part

Claims (8)

In a monitoring apparatus that includes an execution unit that executes a plurality of processes in a program, and that monitors the order of processes executed by the execution unit,
A storage unit for storing a monitoring table in which order information for determining an execution order of a plurality of monitoring target access processes related to memory access and specific information regarding memory access by the monitoring target access process are associated;
Detecting means for sequentially detecting specific information related to memory access by the access processing when a plurality of access processing is sequentially executed by the execution unit;
Using the monitoring table, specifying means for sequentially specifying order information corresponding to the unique information detected by the detecting means;
A monitoring device comprising: monitoring means for monitoring the order of access processing to be executed by the execution unit according to the order information specified by the specifying means. Determining means for determining whether or not order information corresponding to the unique information detected by the detecting means exists in the monitoring table;
The specifying means is:
The monitoring apparatus according to claim 1, wherein order information determined to include the determination unit is specified. The monitoring table is
A predetermined execution order of the monitoring target access processing is specified by the order information;
The monitoring means includes
An order for determining whether or not the order of access processing to be executed by the execution unit is the predetermined execution order according to the order information in the monitoring table that matches the order information specified by the specifying unit The monitoring apparatus according to claim 1, further comprising a determination unit.   4. The apparatus according to claim 3, further comprising an error processing unit that performs a predetermined error process when the order determination unit determines that the order of the monitoring target access processes executed by the execution unit is not the predetermined execution order. The monitoring device described. The specific information is
5. The monitoring apparatus according to claim 1, further comprising a machine language memory address corresponding to the monitoring target access processing. The specific information is
6. The information according to claim 1, further comprising information on a type of a process of reading from or writing to a memory, an address of a memory to be accessed, or a write value to the memory. Monitoring device. In a computer program for causing a computer to monitor the order of processes executed by an execution unit that executes a plurality of processes constituting the program,
On the computer,
When the execution unit sequentially executes a plurality of access processes, detecting specific information regarding memory access by the access processes sequentially;
Order information corresponding to detected unique information using a monitoring table in which order information for determining the execution order of a plurality of monitoring target access processes related to memory access is associated with specific information related to memory access by the monitored target access process Sequentially identifying
And a step of monitoring the order of the monitored access processing executed by the execution unit in accordance with the specified order information. In a monitoring method by a monitoring device that includes an execution unit that executes a plurality of processes constituting a program, and that monitors the order of processes executed by the execution unit,
Storing a monitoring table associating sequence information for determining an execution order of a plurality of monitoring target access processes related to memory access and specific information regarding memory access by the monitoring target access process;
When the execution unit sequentially executes a plurality of access processes, detecting specific information regarding memory access by the access processes sequentially;
Sequentially identifying order information corresponding to the detected unique information using the monitoring table;
Monitoring the order of the monitoring target access processes executed by the execution unit according to the specified order information.

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