JP2014017931A - Dc-dc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a DC-DC converter capable of preventing an output current from overcurrent.SOLUTION: In a DC-DC converter that is a synchronous rectifying SEPIC, a control circuit CC outputting a control signal controlling on and off of MOS transistors Nch and Pch is provided with an overcurrent prevention circuit outputting a determination signal indicating the state of the increase when any one of the current value of a current iflowing through a coil Land the current value of a current iflowing through a coil Lis larger than a predetermined reference value Vref1 in charging operation of the coil, and turns off the MOS transistor Nch according to the determination signal. When an output of a current-voltage conversion section Sexceeds the Vref1, a CMP1 outputs a low-level signal. An AND circuit AND1 outputs a low-level signal, and a PWM-signal generating circuit PWMSG turns off the MOS transistor Nch.

Description

  The present invention relates to a DC-DC converter used for a power source of an electronic device, and more particularly to a SEPIC synchronous rectification type DC-DC converter.

  Electronic devices such as mobile phones and personal computers are supplied with voltage from secondary batteries such as lithium ion batteries. The output voltage of the secondary battery varies depending on the remaining amount and load conditions. For example, the power consumption of a processor such as a CPU (Central Processing Unit) or a DSP (Digital Signal Processor) varies depending on the instruction processing number MIPS (Million Instruction Per Second) per unit time. That is, when the processor power is directly supplied from a secondary battery or the like, the power supply voltage fluctuates due to load fluctuations. Thus, stable power supply is an important issue in the field of electronic devices such as processors.

  A DC-DC converter is known as a circuit that converts the voltage of the secondary battery into a stable voltage.

  The DC-DC converter is a circuit for converting a power supply voltage of a battery or the like into a required voltage for driving a load such as an electronic device, and is roughly classified into a step-down type, a step-up type, and a step-up / step-down type.

  A step-down DC-DC converter, for example, uses a relatively high voltage battery output voltage in a personal computer as a power supply voltage for an integrated circuit such as a CPU that is driven at a relatively low voltage and consumes a large current. Used to convert.

  A step-up DC-DC converter, for example, in a power generation system using solar cells, converts a relatively low voltage output voltage of a solar cell into a relatively high voltage power supply voltage such as a household power supply. To be used.

  The step-up / step-down DC-DC converter is used, for example, in a low fuel consumption environment vehicle equipped with an idling stop system. In an idling stop vehicle, the engine is started with the internal electrical components operating, and the battery voltage drops due to the initial rush current (initial inrush current) of the cell motor used to start the engine. To do. A step-up / step-down DC-DC converter is used to supply voltage / current necessary for the operation of the electrical components even when the battery voltage is lowered. The step-up / step-down DC-DC converter steps down the voltage of the battery when idling is stopped or stable after the engine is started, and supplies a stable power supply voltage to the internal electrical components. Boosts and supplies a stable power supply voltage to internal electrical components.

  FIG. 8 is a circuit diagram of a conventional DC-DC converter described in Patent Document 1. In FIG.

  The conventional DC-DC converter is a DC-DC converter called SEPIC. SEPIC is an acronym for Single-Ended Primary Inductive Converter, and is a step-up / step-down DC-DC converter.

The conventional DC-DC converter includes a coil L _S , a capacitor C _C , a coil L _L , and a common connection between the capacitor C _C and the coil L _L and an output terminal connected in series from the input power source _VIN to the ground. connected diodes D1, constitutes a connected N-channel MOS transistor Nch, in SEPIC between the common connection portion and the ground between the coil _{L S} and capacitor _{C C.} Further, a P-channel MOS transistor Pch for performing synchronous rectification is connected in parallel to the diode D1.

The synchronous rectification MOS transistor Pch is arranged to reduce the loss due to the forward resistance of the diode D1 when performing the step-up / step-down operation. Synchronous rectification MOS transistor Pch is complementarily turned on and off the MOS transistor Nch, is turned on when a current flows to the output capacitor _{C L.}

In the conventional DC-DC converter, a feedback voltage FB obtained by dividing the output voltage V _O by resistors R1 and R2 is input to a control circuit CC, and a PWM signal having a pulse width corresponding to the magnitude of the output voltage V _O is input to the control circuit. Output from the CC to the MOS transistors Pch and Nch. First, Nch is turned on and MOS transistor Pch is turned off. At this time, the coil _L input voltage _{V IN} is applied to the _S current _{i LS} flows to ground via the MOS transistor Nch from the coil _{L S,} the voltage _{V C} is applied to the _{L L} coil _{L L} and a capacitor _{C C} , Current i _LL flows through MOS transistor Nch, and energy is stored in coils L _S and L _L.

When the MOS transistor Nch is MOS transistor Pch turned off and turned on, current _{i LS} flows through the MOS transistor Pch coil _{L S} and the capacitor C _C, the current _{i LL} via the MOS transistor Pch from the coil _{L L} Flowing. With the voltage V _O with pressure elevating the input voltage V _IN to the output capacitor C _L by repeating these operations is output, the load R _L is driven.

US Patent Application Publication No. 2006/0250826

  However, the conventional DC-DC converter described in Patent Document 1 has a problem that the output current becomes an overcurrent when the load becomes extremely heavy, such as when the load is short-circuited.

  The present invention has been made in view of the above points, and an object thereof is to provide a DC-DC converter capable of preventing an output current from becoming an overcurrent.

  In order to solve the above-mentioned problem, the invention described in claim 1 is a DC-DC converter that is a synchronous rectification type SEPIC, wherein the current value of the first current that flows through the input side coil and the first current that flows through the output side coil. And a control circuit for adjusting a period during which the input side MOS transistor is turned off when a voltage is applied to the input side coil and the output side coil.

  According to a second aspect of the present invention, in the DC-DC converter according to the first aspect, the control circuit is configured such that one of the first and second current values is greater than a predetermined value. The input side MOS transistor is turned off when it becomes larger.

  According to a third aspect of the present invention, in the DC-DC converter according to the second aspect, the control circuit converts the first current into a first voltage, a first current-voltage converter, and the first A first current-voltage converter that converts the second current into a second voltage, and a first determination signal that outputs a first determination signal by comparing the first voltage with a reference voltage corresponding to the predetermined value. And a second comparator that compares the second voltage with the reference voltage and outputs a second determination signal, and inputs the input according to the first and second determination signals. The side MOS transistor is turned off.

  According to a fourth aspect of the present invention, in the DC-DC converter according to the second or third aspect, after the control circuit reaches the predetermined value after the current values of the first and second currents reach the predetermined value, The predetermined value is lowered as the output voltage output from the output terminal of the DC-DC converter decreases.

  The invention according to claim 5 is the DC-DC converter according to any one of claims 1 to 4, wherein the synchronous rectification type SEPIC is connected in series from the input terminal to the ground in order. A capacitor and a second coil; a first MOS transistor connected between a connection between the first coil and the capacitor and the ground; a connection between the capacitor and the second coil; and an output terminal A second MOS transistor connected between the first and second coils, wherein the first coil is the input-side coil, the second coil is the output-side coil, and the first MOS The transistor is the input-side MOS transistor, and the second MOS transistor is a synchronous rectification MOS transistor.

  A sixth aspect of the present invention is the DC-DC converter according to any one of the first to fifth aspects, wherein the control circuit is responsive to an output voltage output from an output terminal of the DC-DC converter. The control circuit outputs a control signal for controlling on / off of the input side MOS transistor and the synchronous rectification MOS transistor.

  According to the present invention, there is an effect of preventing the output current from becoming an overcurrent by turning off the input side transistor based on the current flowing through the input side coil and the output side coil.

1 is a circuit diagram of a DC-DC converter according to Embodiment 1 of the present invention. DC-DC converter of the current-voltage converting unit S _S according to the first embodiment of the present _invention, is a circuit diagram embodying the S _L. It is the circuit diagram which actualized the control circuit of the DC-DC converter which concerns on Embodiment 1 of this invention. In the DC-DC converter which concerns on Embodiment 1 of this invention, it is a graph of output voltage versus output current which shows a drooping type characteristic when output current turns into overcurrent. It is a circuit diagram of the DC-DC converter which concerns on Embodiment 2 of this invention. It is the circuit diagram which actualized the control circuit CC of the DC-DC converter which concerns on Embodiment 2 of this invention, and the concrete circuit diagram of a variable voltage source. In the DC-DC converter which concerns on Embodiment 2 of this invention, it is a graph of the output voltage versus output current which shows the U-shaped characteristic which decreases with a linear function characteristic after an output current reaches a predetermined current value. It is a circuit diagram of the conventional DC-DC converter.

  Hereinafter, embodiments of the present invention will be described in detail.

(Embodiment 1)
(Constitution)
FIG. 1 is a circuit diagram of a DC-DC converter according to Embodiment 1 of the present invention.

The DC-DC converter of this embodiment includes a coil L _S (input side coil), a capacitor _CC and a coil L _L (output side coil), a coil L _S and a capacitor C _C that are connected in series from the input terminal to the ground. the connections and the parallel-connected MOS transistor Nch connected to a diode D1 and a diode D1 between the ground (input side MOS transistor), between a connection portion of the capacitor C _C and the coil L _L and the output terminal The connected MOS transistor Pch (synchronous rectification MOS transistor), the MOS transistor Nch, and the Pch have a control circuit CC that outputs a control signal for controlling on / off. That is, the coils L _S and L _L , the capacitor C _C , the diode D1, the MOS transistors Nch and Pch, and the control circuit CC constitute a DC-DC converter that is a synchronous rectification type SEPIC.

Then, the control circuit CC is configured to determine whether the current value of the current i _LS flowing through the coil L _S or the current value i _LL of the current flowing through the coil L _L during the energization operation (charging operation) of the coil, An overcurrent prevention circuit that outputs a determination signal indicating that the voltage has become larger when the reference voltage Vref1 becomes larger than a predetermined reference voltage Vref1 is provided, and the MOS transistor Nch is turned off according to the determination signal.

The overcurrent prevention circuit is realized by the comparators CMP1, CMP2, the AND circuit AND1, and the reference voltage source RVS1 that supplies the reference voltage Vref1. The negative input terminal of the comparator CMP1 is connected to the current-to-voltage conversion unit S _S, the positive input terminal is connected to the reference voltage source Vref1. The negative input terminal of the comparator CMP2 is connected to the current-to-voltage conversion unit S _L, the positive input terminal is connected to the Vref1. Vref1 is a voltage corresponding to the maximum current that may flow through the coils L _S and L _L and is a voltage for determining whether or not the output current is an overcurrent.

When the output terminal is short-circuited and the load becomes extremely heavy, the synchronous rectification type SEPIC tries to supply a large amount of current to the load R _L , so that the current flowing through the coil L _S becomes an overcurrent. When the output of the current-voltage converter _{S S} exceeds Vref1, CMP1 outputs a low. The AND circuit AND1 outputs low, and the PWM signal generation circuit PWMSG turns off the MOS transistor Nch.

The time during which the MOS transistor Nch is on is D * T _S (D: time ratio (on duty), T _S : period), and the time during which the MOS transistor Nch is off is D ′ * T _S (D ′ = 1−D). Then, the current i _O flowing out to the output terminal is expressed as follows: i _O = i _LS * D ′ * T _S + i _LL * D ′ * T _S (1)
It becomes.

Since the voltage of the capacitor C _C is constant in the steady state,
i _LS * D ′ * T _S = i _LL * D * T _S (2)
And
_{i O = i LL * D *} T S + i LL * D '* T S ··· (3)
= I _LL * T _S
It becomes.

Thus, since the current _{i LL} becomes equal to the output current _{i O,} when the current _{i LL} exceeds the corresponding Vref1, performing the overcurrent limiting in the coil _{L L} off the MOS transistor Nch is the output current Is the same as limiting the overcurrent.

As described above, when the load _RL becomes a short circuit or the like, when the load becomes extremely heavy, by turning off the MOS transistor Nch, a current larger than the current charged in the coils L _S and L _L is output. Since no output is made from the terminal, it is possible to prevent the output current from becoming an overcurrent.

In the present embodiment, the current flowing through the input side coil L _S and the output side coil L _L is monitored, and when any of these currents exceeds a predetermined value, the input side MOS transistor Nch is turned off. As a result, the output current can be prevented from becoming an overcurrent. That is, the present embodiment, on the basis of the current flowing through the input-side coil L _S to the output side coil L _L, due to so as to turn off the input-side MOS transistor Nch, possible to prevent the output current becomes an overcurrent. Moreover, since only the currents of the coils L _S and L _L are monitored, the configuration is simple.

  Here, MOS transistor Nch is formed of an N channel MOS transistor, and MOS transistor Pch is formed of a P channel MOS transistor. The MOS transistor Pch is a so-called synchronous rectification MOS transistor. The predetermined value is realized by the reference voltage Vref1 of the reference voltage source RVS1, and is a voltage indicating that the output current is an overcurrent.

Further, the MOS transistor Pch, coil _{L L} Output excess current of the capacitor _{C L} and the load _{R L} diode D1 so that it can supply to are connected in parallel when the MOS transistor Pch is off. In addition, the MOS transistor Pch is formed with a body diode in which the bulk and the source are connected and the direction from the drain to the source is the forward direction so that no current flows from the source to the drain when the transistor is off. That is, the diode D1 may be replaced with a body diode of the MOS transistor Pch.

Moreover, the current _{i LS} current voltage converter Ss, is converted into a voltage value corresponding to the current _{i LS,} the current _{i LL} by current-voltage conversion unit _{S L,} is converted into a voltage value corresponding to the current _{i LL.} The current-voltage converters S _S and S _L are realized by sense resistors SR and LR, a current mirror circuit, and the like.

The control circuit controls on / off of the MOS transistors Nch and Pch from the PWM signal generation circuit PWMSG during normal operation in which no overcurrent prevention operation is performed (when either i _LS or i _LL is smaller than a predetermined value). Outputs the PWM signal. The control circuit CC that outputs a control signal for controlling on / off of the MOS transistors Nch and Pch is not limited to the PWM signal generation circuit PWMSG that outputs a PWM signal, but may be a PFM signal generation circuit that outputs a PFM signal, or ΔΣ A ΔΣ modulator that outputs a modulation signal may be used. PWM signal generation circuit PWMSG monitors the output voltage Vo by resistance division circuit consisting of resistors R1, R2 connected in series, and outputs the duty of the PWM signal corresponding to the output voltage _{V O} MOS transistor Nch, the Pch .

  Here, the control circuit CC forcibly turns off the MOS transistor Nch according to the determination signal output from the comparator CMP1 or CMP2 when overcurrent is prevented.

(Specific example of current-voltage converter)
FIG. 2 is a circuit diagram embodying the current-voltage converters S _S and S _L of the DC-DC converter according to Embodiment 1 of the present invention.

Current-to-voltage converter _{S S} is constituted by a sense resistor SR and a differential amplifier SAMP. The sense resistor SR, current flows _{i LS} flowing through the coil _{L S} is, a voltage is generated in accordance with the _{i LS} at both ends of the sense resistor SR. The differential amplifier SAMP amplifies and outputs the voltage across the sense resistor SR.

Current-to-voltage converter _{S L} is constituted by a sense resistor LR and a differential amplifier LAMP. The sense resistor LR, current flows _{i LL} flowing through the coil _{L L} is, voltage is generated in accordance with the _{i LL} at both ends of the sense resistor LR. The differential amplifier LAMP amplifies and outputs the voltage across the sense resistor LR.

  Thus, signal processing can be performed with a simple configuration by converting current into voltage.

(Specific example of control circuit)
Next, a specific example of the control circuit of this embodiment will be described.

  FIG. 3 is a circuit diagram specifically illustrating the control circuit of the DC-DC converter according to the first embodiment of the present invention.

  The PWM signal generation circuit PWMSG includes an error amplifier Error AMP, a reference voltage source RVS2, an impedance element Z, an adder Adder, a sawtooth generation circuit RAMP, a comparator CMP3, a flip-flop FF1, and a buffer BUF.

  An AND circuit AND2 ANDs the output terminals of the comparators CMP1 and CMP2 to which a determination signal from the overcurrent prevention circuit is output and the output terminal of the comparator CMP3. That is, a 3-input AND circuit is used instead of the AND circuit AND1. The output of the AND circuit AND1 and the output of the comparator CMP3 may be further input to a 2-input AND circuit. When the AND circuit AND2 outputs low, the flip-flop FF1 is reset, the MOS transistor Nch is turned off, and the MOS transistor Pch is turned on. And it can prevent that output current turns into overcurrent.

(Operation)
Hereinafter, a specific operation will be described.

<During normal operation>
The output voltage _{V O} by dividing, divided voltage FB is input to the negative input terminal of the error amplifier Error AMP, a current corresponding to the error of the reference voltage Vref2 of the reference voltage source RVS2 is output to the impedance element Z, Converted to error voltage. The reference voltage Vref2 is a voltage corresponding to a desired output voltage.

Error voltage is summed with the sawtooth an adder Adder output from sawtooth wave generator circuit RAMP, is compared with the voltage corresponding to the i _LS comparator CMP3, a duty signal corresponding to the error voltage to the flip-flop FF1 outputs Then, the PWM signal is output from the flip-flop FF1 in synchronization with the clock signal CLK. This PWM signal is input to the MOS transistors Nch and Pch via the buffer BUF.

<When overcurrent is prevented>
The output signal of the comparator CMP3 is a PWM control signal, and the MOS transistor Nch is turned on when the output signal of the comparator CMP3 is high. MOS transistor Nch is the current flowing in the coil _{L S} during the on (CMP2 is high) becomes an overcurrent, when the output of the current-voltage converter _{S S} exceeds Vref1, the comparator CMP1 outputs a low. As a result, the output of the AND circuit AND2 becomes low, the flip-flop FF connected to the AND circuit AND2 is reset, Q becomes low, and the MOS transistor Nch is turned off.

  In this way, it is possible to prevent the output current from becoming an overcurrent when an extremely heavy load occurs, such as when the output terminal is short-circuited.

Next, the load is shorted, the current flowing through the coil L _L is an overcurrent, when the output of the current-voltage converting unit S _L exceeds Vref1, and the comparator CMP2 outputs a low, resetting the flip-flop FF1, Since the MOS transistor Nch is turned off, no further output current flows. Then, the energy stored in the coils L _S and L _L is released, and the MOS transistor Nch is not turned on until the voltage falls below the reference voltage Vref1 (predetermined value) corresponding to the overcurrent protection set voltage value VOCL. Is supplied.

Since the output current is to be smoothed by the output capacitor C _L at that time, the output voltage V _O is down to ground level, the output current is maintained at a constant value. That is, the output current has a drooping characteristic.

  FIG. 4 is a graph of output voltage versus output current showing drooping characteristics when the output current becomes an overcurrent in the DC-DC converter according to Embodiment 1 of the present invention.

  In the present embodiment, when the output current becomes an overcurrent, it can be protected with a drooping type characteristic.

Thus, DC-DC converter of this embodiment monitors the current flowing through the input-side coil L _S to the output side coil L _L, when one of these currents is greater than a predetermined value, the input Since the side MOS transistor Nch is turned off, it is possible to prevent the output current from becoming an overcurrent. That is, the present embodiment, on the basis of the current flowing through the input-side coil L _S to the output side coil L _L, due to so as to turn off the input-side MOS transistor Nch, possible to prevent the output current becomes an overcurrent.

  As a result, a part with a large loss tolerance is unnecessary, and the size of the DC-DC converter can be reduced.

(Embodiment 2)
(Constitution)
FIG. 5 is a circuit diagram of a DC-DC converter according to Embodiment 2 of the present invention.

In this embodiment, in the first embodiment, the control circuit CC determines that the output voltage V _O output from the output terminal after the voltage value representing the current values of the currents i _LS and i _LL reaches the predetermined reference voltage Vref1 The predetermined reference voltage Vref1 is lowered in accordance with the decrease.

By lowering the reference voltage Vref1, the currents flowing through the coils L _S and L _L become smaller, and the output current also decreases as the output voltage V _O decreases. That is, the output voltage V _O has a waveform with a U-shaped characteristic with respect to the output current.

  That is, the DC-DC converter according to the present embodiment has an effect that it is possible to further reduce the burden on the components constituting the DC-DC converter in addition to the effect of the first embodiment.

(Specific example of control circuit)
FIG. 6 is a circuit diagram that embodies the control circuit CC of the DC-DC converter according to Embodiment 2 of the present invention and a specific circuit diagram of the variable voltage source. The upper side is a circuit diagram that embodies the control circuit CC, and the lower side is a specific circuit diagram of the variable voltage source.

As shown in the upper, the control circuit CC is input to the reference voltage source Vref1 to the output voltage _{V O} divided voltage FB as a feedback voltage _{V FB.} The reference voltage Vref1 output from the reference voltage source RVS1 changes according to the feedback voltage _VFB .

As shown on the lower side, the variable voltage source RVS1 includes a transconductance amplifier gm (gm amplifier), a resistor R3, and a current source _IO . The feedback voltage _VFB is input to the gm amplifier. The overcurrent protection setting voltage VOCL is obtained from the product of the sum of the current of the current source _{IO and} the current output from the gm amplifier and the resistance value of the resistor R3 according to Kirchhoff's current law. Therefore, the overcurrent protection setting voltage VOCL is
VOCL = _IO * R3 + gm * V _FB * R
It becomes.

From the above equation, the overcurrent protection setting voltage VOCL is a linear function of the feedback voltage V _FB, the feedback voltage V _FB decreases, overcurrent protection setting voltage VOCL also seen to decrease.

  Here, the voltage of the reference voltage Vref2 is the voltage of the overcurrent protection setting voltage VOCL.

(Operation)
<During normal operation>
The same as in the first embodiment.

<When overcurrent is prevented>
FIG. 7 is a graph of output voltage versus output current showing a U-shaped characteristic that decreases in a linear function characteristic after the output current reaches a predetermined current value in the DC-DC converter according to Embodiment 2 of the present invention. .

  When the output current becomes larger than that, the output voltage is constant until a predetermined current value indicating an overcurrent is reached. When the output current reaches a predetermined current value, overcurrent protection is applied.

As the output voltage V _O decreases, the feedback voltage V _FB also decreases, and the overcurrent protection set voltage VOCL, that is, the reference voltage Vref1, also decreases, so that the output current also decreases as the reference voltage Vref1 decreases.

  As described above, when the output current flowing through the output terminal reaches a predetermined current value, the DC-DC converter of the present embodiment turns off the MOS transistor Nch and stops the operation of the DC-DC converter. In addition to preventing overcurrent, the output current can be reduced as the output voltage is reduced, so that the burden on the components constituting the DC-DC converter can be further reduced.

  As a result, a part with a large loss tolerance is unnecessary, and the size of the DC-DC converter can be further reduced.

  The present invention can be suitably used in the field of power supply systems.

CC control circuit PWMSG PWM signal generation circuit CMP comparator RVS reference voltage source Nch, Pch MOS transistor R _L load RAMP sawtooth wave generation circuit Z impedance element gm transconductance amplifier S current voltage converter

Claims (6)

In a DC-DC converter which is a synchronous rectification type SEPIC,
Based on the current value of the first current flowing in the input side coil and the current value of the second current flowing in the output side coil, the input side MOS transistor is turned on when a voltage is applied to the input side coil and the output side coil. A DC-DC converter comprising a control circuit for adjusting a period for turning off.   The control circuit turns off the input-side MOS transistor when one of current values of the first and second currents becomes larger than a predetermined value. Item 4. The DC-DC converter according to Item 1. The control circuit includes:
A first current-voltage converter that converts the first current into a first voltage;
A second current-voltage converter for converting the second current into a second voltage;
A first comparator that compares the first voltage with a reference voltage corresponding to the predetermined value and outputs a first determination signal;
A second comparator that compares the second voltage with the reference voltage and outputs a second determination signal;
Have
3. The DC-DC converter according to claim 2, wherein the input side MOS transistor is turned off according to the first and second determination signals.   The control circuit has the predetermined value in response to a decrease in output voltage output from the output terminal of the DC-DC converter after the current values of the first and second currents reach the predetermined value. The DC-DC converter according to claim 2, wherein the DC-DC converter is lowered. The synchronous rectification type SEPIC is
A first coil, a capacitor and a second coil connected in series from the input terminal to the ground in order, a first MOS transistor connected between the connection between the first coil and the capacitor and the ground; A second MOS transistor connected between a connection portion between the capacitor and the second coil and an output terminal;
The first coil is the input side coil;
The second coil is the output coil;
The first MOS transistor is the input-side MOS transistor;
5. The DC-DC converter according to claim 1, wherein the second MOS transistor is a synchronous rectification MOS transistor. 6.   The control circuit outputs a control signal for controlling on / off of the input side MOS transistor and the synchronous rectification MOS transistor according to an output voltage output from an output terminal of the DC-DC converter. The DC-DC converter according to any one of claims 1 to 5.

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