JP2014096422A - Substrate support member, substrate processing apparatus, manufacturing method for substrate support member, and substrate processing method - Google Patents

Abstract

A substrate to be processed is securely and easily temporarily bonded to a substrate support member, and the temporary bonding to the substrate to be processed is easily released without damaging or warping the processed substrate to be processed.
A substrate support member removably supports a substrate to be processed on a flat support surface 17 on which an adhesive layer 19 is formed. The adhesive layer 19 has at least a first adhesive region 41 and a plurality of second adhesive regions 43 having higher adhesive force than the first adhesive region. The plurality of second adhesive regions 43 are discretely arranged on the flat support surface 17, and the first adhesive regions 41 are directed from the outer peripheral side edge 19 a of the adhesive layer 19 toward the center position of the flat support surface 17. It is arranged continuously.
[Selection] Figure 5

Description

  The present invention relates to a substrate support member, a substrate processing apparatus, a method for manufacturing a substrate support member, and a substrate processing method.

  Based on integrated circuits, power semiconductors, light emitting diodes, photonic circuits, microelectromechanical system (MEMS) devices, embedded passive arrays, packaging interposers, CCDs, CMOS image sensors, and many other silicon and compound semiconductors There are various types of micro devices. Many of these micro devices are formed on a device wafer which is a substrate to be processed, and are separated into pieces by dicing. Microdevices mounted on electronic devices are required to be further miniaturized and highly integrated in accordance with needs for further miniaturization and higher performance of electronic devices. However, in the manufacture of micro devices, the high integration in the substrate surface direction of device wafers is approaching its limit.

  Therefore, in recent years, three-dimensional mounting technology has been attracting attention, in which a through-hole is provided in a device wafer, and through-electrodes (TSV: Tab-Separated Values) as external terminals are installed in the through-hole to make electrical connection with the outside. ing. In this three-dimensional mounting, the thickness of the device wafer is obtained by polishing the back surface of the device wafer having an integrated circuit or the like after being bonded to a protective glass or silicon substrate serving as a substrate support member (carrier) and thermally cured. It is essential to make the film thinner. In general, a silicon wafer having a thickness of about 700 to 900 μm is widely known as a silicon wafer used in a semiconductor device manufacturing process. However, in the above three-dimensional mounting, the thickness is reduced to 200 μm or less, and further to 50 μm or less. It has been tried.

  However, a silicon wafer having a thickness of 200 μm or less is very thin, and it is difficult to stably support a member made of such a brittle material without damaging the member when further processing or movement is performed. . In order to solve this problem, when temporarily bonding the device surface of the device wafer on which the microdevices are provided and the carrier substrate supporting the device wafer, bonding is performed between the central area of the device surface and the carrier substrate. There is a technique in which a filling layer that does not contribute is interposed, and the outer peripheral portion of the device surface and the carrier substrate are temporarily bonded with an adhesive (see, for example, Patent Document 1). In addition, there is a technique of using a sheet-like adhesive without using a liquid adhesive when performing temporary bonding (see, for example, Patent Document 2). According to these techniques, when the carrier substrate is detached from the device wafer, it is possible to reduce breakage of the device wafer and internal damage of the device.

Special table 2011-510518 gazette JP 2007-131791 A

  In the case where the surface of the device wafer and the carrier substrate are temporarily bonded via an adhesive layer known from Patent Document 1, Patent Document 2, etc., in order to stably support the device wafer, the adhesive layer has a certain amount. A strong degree of adhesion is required. For this reason, the adhesive strength between the device wafer and the carrier substrate becomes excessive as the device wafer is stably supported with sufficient adhesive strength. As a result, when the device wafer is detached from the carrier substrate, the device wafer after the removal is easily damaged.

In Patent Document 1, when a device wafer is detached from a carrier substrate, the device wafer is mechanically separated using a razor blade or a pointed circular disk. When such mechanical peeling is performed, damage may be caused to a device that has been thinned by polishing and is particularly vulnerable to external force, or a bump provided on the device. In addition, when polishing the backside of a device wafer, there is a difference in the polishing pressure between the wafer center with low adhesion and the outer periphery with high adhesion, resulting in a distribution in the thickness of the device wafer after polishing. Warpage may occur.
This becomes more conspicuous as the device wafer becomes thinner and the device wafer has a larger diameter (especially 8 inches or more), and it becomes difficult to ignore the quality of the finally obtained semiconductor device.
In Patent Document 2, the unevenness based on the surface roughness of the silicone rubber or fluorine-based rubber serving as a support for the sheet causes a distribution in the thickness of the device wafer after polishing, or 200 to 300 ° C. during processing of the device wafer. In the high-temperature process, warping based on the difference between the thermal expansion coefficients of the carrier substrate and the sheet is generated, so that high-precision processing becomes difficult.

  The present invention has been made in view of the above-mentioned background. The substrate to be processed is securely and easily temporarily bonded to the substrate support member, and the substrate to be processed is temporarily bonded without damaging or warping the processed substrate. An object of the present invention is to provide a substrate support member, a substrate processing apparatus, a method for manufacturing a substrate support member, and a substrate processing method that can easily release the adhesion.

The present invention has the following configuration.
(1) A substrate support member that removably supports a substrate to be processed on a flat support surface on which an adhesive layer is formed,
The adhesive layer has at least a first adhesive region and a plurality of second adhesive regions having a higher adhesive force than the first adhesive region,
The plurality of second adhesive regions are discretely disposed on the flat support surface, surrounded by the first adhesive regions,
The first support region is a substrate support member that is continuously arranged from at least a part of an outer peripheral side edge of the adhesive layer toward a center position of the adhesive layer.
(2) the substrate support member;
A substrate processing unit that performs at least one of mechanical processing and chemical processing on the target substrate supported by the substrate support member;
A desorption processing unit for detaching the substrate to be processed, which has been subjected to the processing, from the substrate support member;
A substrate processing apparatus comprising:
(3) A method for manufacturing a substrate support member for removably supporting a substrate to be processed on a flat support surface on which an adhesive layer is formed,
In defining each of the first adhesive region and the plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface,
The plurality of second adhesive regions are discretely arranged on the flat support surface so as to surround the first adhesive region,
The manufacturing method of the board | substrate support member which arrange | positions the said 1st adhesive region continuously toward the center position of the adhesive layer from the outer peripheral side edge part of the said adhesive layer.
(4) A substrate processing method for processing a substrate to be processed using a substrate support member that detachably supports the substrate to be processed on a flat support surface on which an adhesive layer is formed,
In defining the first adhesive region and the plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface, the plurality of second adhesive regions are defined. The first adhesive region is discretely arranged on the flat support surface so as to surround the first adhesive region, and the first adhesive region is continuously extended from the outer peripheral side edge of the adhesive layer toward the center position of the adhesive layer. And an adhesive layer forming step to be arranged,
A temporary bonding step of temporarily bonding the substrate to be processed to the flat support surface on which the adhesive layer is formed;
A substrate processing step of performing at least one of mechanical processing and chemical processing on the target substrate temporarily bonded to the substrate support member;
A substrate detachment step of detaching the substrate to be processed from the substrate support member;
A substrate processing method.

  According to the present invention, the substrate to be processed is securely and easily temporarily bonded to the substrate support member, and the temporary bonding to the substrate to be processed can be easily released without damaging or warping the processed substrate to be processed.

(A) is a figure for demonstrating embodiment of this invention, and is a schematic sectional drawing which shows the state before temporary bonding of a board | substrate support member and a device wafer, (B) is provisional of a board | substrate support member and a device wafer. FIG. 4C is a schematic cross-sectional view showing a state after bonding, and FIG. 5C is a schematic cross-sectional view showing a state where the temporarily bonded device wafer shown in FIG. It is a top view of a device wafer. (A) is a schematic sectional drawing explaining the process of sticking a tape on a device wafer, (B) is a schematic sectional drawing explaining the process of peeling a thin device wafer from a board | substrate support member. It is a block block diagram of a substrate processing apparatus. It is a top view of the adhesive layer formed in the flat support surface of a carrier member. It is AA sectional drawing of FIG. (A), (B) is a schematic diagram which shows the mode of peeling of an adhesive layer in steps. It is explanatory drawing which expands and shows a part at the time of peeling of a device wafer. It is a figure which shows the mode of the change of the rate of peeling force with respect to high adhesive dot size, and is a graph which shows the analysis result at the time of setting the film thickness of a high adhesive dot to 2 micrometers. It is a figure which shows the mode of the change of the rate of peeling force with respect to high adhesive dot size, and is a graph which shows the analysis result at the time of setting the film thickness of a high adhesive dot to 5 micrometers. It is a graph which shows the relationship between the area rate of a high adhesive dot, and peeling force when the adhesive force of a high adhesive dot is 20 N / cm ² . (A), (B), (C) is a schematic perspective view explaining temporary adhesion | attachment with a substrate support member and a device wafer. FIG. 13 is a schematic top view of the interface between the thin device wafer and the substrate support member in FIG. (A), (B), (C) is explanatory drawing which shows the mode of melt | dissolution of a high adhesion | attachment area | region in steps. It is a graph which shows the mode of the change of the peeling time with respect to highly adhesive dot size when a melt | dissolution rate is 45 min / mm. It is a graph which shows the mode of the change of the peeling time with respect to highly adhesive dot size when a melt | dissolution rate is 90 min / mm. It is a top view which shows the 2nd structural example of an adhesive layer. It is a top view which shows the 3rd structural example of an adhesive layer. It is a top view which shows the 4th structural example of an adhesive layer. It is a top view which shows the 5th structural example of an adhesive layer.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Here, the structure of the substrate support member that removably supports the substrate to be processed on the flat support surface on which the adhesive layer is formed will be described in detail as an example when applied to the manufacture of a semiconductor substrate.

  FIG. 1A is a diagram for explaining an embodiment of the present invention, and is a schematic cross-sectional view showing a state before temporary bonding between a substrate support member 11 and a device wafer 13, and FIG. 1B is a substrate support member. 11 is a schematic cross-sectional view showing a state after temporary bonding between the device wafer 13 and the device wafer 13, and FIG. 1C is a schematic cross-sectional view showing a state where the temporarily bonded device wafer 13 shown in FIG. 1B is thinned. is there. In the embodiments described below, the members and the like described in the already referenced drawings are given the same reference numerals, and the description is simplified or omitted.

  In this substrate processing method, first, a substrate support member 11 and a device wafer (substrate to be processed) 13 which is a semiconductor substrate are prepared. As shown in FIG. 1A, the substrate support member 11 is provided with an adhesive layer 19 on the flat support surface 17 of the carrier member 15.

  The device wafer 13 has a circular shape as shown in the plan view of the device wafer in FIG. 2, and a large number of device chips 21 are arranged on one surface. Regardless of its shape, the device wafer 13 has, on the device surface 23 on which the device chip 21 is arranged, an outer edge region 25 that is a region including the outer edge and a central region 27 that includes a central portion inside the outer edge region 25. The thickness of the device wafer 13 before temporary bonding is, for example, in the range of 200 to 1200 μm.

  The device chip 21 is a device such as an integrated circuit, a MEMS, a microsensor, a power semiconductor, a light emitting diode, a photonic circuit, an interposer, a CCD, a CMOS image sensor, and an embedded passive element. In addition to the above devices, the semiconductor device may be processed from another semiconductor material such as silicon, silicon-germanium, gallium arsenide, gallium nitride, or processed on the semiconductor material. The device chip 21 may be one selected from the above or a combination of a plurality of selected ones.

  The surface of the device chip 21 generally includes a structure formed from one or more of the following materials: silicon, polysilicon, silicon dioxide, (oxy) silicon nitride, metal (eg, copper, aluminum, gold, tungsten, Tantalum), low dielectric (Low-k), polymer dielectric, various metal nitrides and metal silicides. The surface of the device chip 21 may further include raised structures such as solder bumps, metal posts, and pillars.

  The material of the carrier member 15 is not particularly limited. For example, various materials such as silicon (for example, blank silicon wafer), sapphire, crystal, metal (for example, aluminum, copper, steel), soda lime glass, borosilicate glass, and the like. Made of a material selected from the group consisting of glass and ceramics.

  The carrier member 15 is less likely to contaminate a silicon wafer typically used as a substrate of a substrate processing apparatus, can use an electrostatic chuck widely used in the manufacturing process of the substrate processing apparatus, and has a thermal expansion coefficient of a silicon wafer. In view of the same points as those described above, a silicon substrate is preferable. The carrier member 15 may be square or rectangular, but more generally, it is preferable that the carrier member 15 is a circle having a size that fits the device wafer 13. The carrier member 15 can further include other materials deposited on the substrate surface. For example, it is possible to deposit silicon nitride on a silicon substrate. In this case, the adhesive property of the adhesive layer 19 can be changed.

  The thickness of the carrier member 15 is, for example, in the range of 0.3 mm to 5 mm, but is not particularly limited.

  An adhesive layer 19 is formed on the circular flat support surface 17 of the carrier member 15. The thickness of the adhesive layer 19 (measured at the thickest point) is preferably about 0.5 μm or more and about 100 μm or less, more preferably about 0.5 μm or more and about 50 μm or less, and about 1 μm or more and about 20 μm or less. Is even more preferred.

  Next, the device surface 23 on which the device chip 21 of the device wafer 13 is placed is pressed against the adhesive layer 19 on the flat support surface 17 on the carrier member 15. Then, as shown in FIG. 1B, the device surface 23 of the device wafer 13 and the adhesive layer 19 are brought into close contact with each other, as shown in a state after temporary adhesion between the substrate support member 11 and the device wafer 13. As a result, the substrate support member 11 and the device wafer 13 are temporarily bonded.

  Thereafter, if necessary, the adhesive body between the substrate support member 11 and the device wafer 13 may be heated (for example, irradiation with heat rays) to make the adhesive layer 19 more tough. Thereby, the cohesive failure of the adhesive layer 19 which is likely to occur when the device wafer 13 is subjected to mechanical or chemical treatment described later can be suppressed, and the adhesiveness of the substrate support member 11 can be improved. In particular, the adhesive layer 19 preferably contains a thermal polymerization initiator from the viewpoint of promoting a crosslinking reaction in a reactive compound having a crosslinkable group by heat. In addition, it is preferable that the heating temperature at this time is 50 to 300 degreeC.

  Next, the back surface 29 opposite to the device surface 23 of the device wafer 13 is mechanically or chemically processed by the substrate processing unit 31, for example, thin-walled such as grinding or chemical mechanical polishing (CMP). The process is applied. Thereby, as shown in FIG. 1C, the thickness of the device wafer 13 is reduced (for example, a thickness of 1 μm or more and 200 μm or less), and a thin device wafer 33 is obtained.

  As the mechanical or chemical treatment, a through hole (not shown) penetrating the device wafer 13 is formed from the back surface 29 of the thin device wafer 33 after the thinning process, and silicon is penetrated into the through hole. You may perform the process which forms an electrode (not shown) as needed.

  Next, the thin device wafer 33 is detached from the substrate support member 11 by peeling the thin device wafer 33 from the adhesive layer 19 of the substrate support member 11.

  FIG. 3A is a schematic cross-sectional view illustrating a process of attaching a tape to the device wafer 13, and FIG. 3B is a schematic cross-sectional view illustrating a process of peeling the thin device wafer 33 from the substrate support member 11.

  Next, as shown in FIG. 3A, an adhesive tape 35 is attached to the back surface 29 of the thin device wafer 33, and as shown in FIG. 3B, the tape 35 is placed in the normal direction of the substrate surface. By pulling up, the thin device wafer 33 is peeled from the substrate support member 11. Further, the peeling process may be performed by sliding the thin device wafer 33 in a direction parallel to the substrate surface with respect to the substrate support member 11.

  Furthermore, the substrate support member 11 and the device wafer 13 can be separated by mechanically separating or destroying the continuity at the joint surfaces. For this, high energy techniques such as laser cutting, plasma etching, and water jet are used. In addition, various methods such as sawing and inserting a razor blade into the joint surface can be used.

  In addition to the above mechanical peeling method, a chemical peeling method can also be employed. In the chemical peeling method, the bonded substrate support member 11 and device wafer 13 are immersed in a peeling solution, or the peeling solution is jet sprayed to dissolve or decompose the polymer adhesive. The solvent of the stripping solution that can be used for the stripping treatment is ethyl lactate, cyclohexanone, N-methylpyrrolidone, N-methyl-2-pyrrolidone, an aliphatic solvent (for example, hexane, decane, dodecane, and dodecene), 2- Including those selected from the group consisting of butanone, methyl amyl ketone, limonene and mixtures thereof.

  According to this chemical peeling method, since the affinity of the adhesive layer 19 to the peeling solution is high, the temporary adhesion between the adhesive layer 19 and the device surface 23 of the thin device wafer 33 can be easily released.

  In the chemical peeling method, the device wafer 13 can be completely separated from the substrate support member 11 by applying a low mechanical force (for example, finger pressure, gentle splitting). The separated device wafer 13 and substrate support member 11 can easily wash off the residue on the peeled surface with an appropriate solvent.

Examples of other peeling methods include the following methods.
(1) Photodecomposition ·· The device wafer temporarily bonded to the substrate support member is irradiated with light source light through a translucent carrier member, and the adhesive boundary layer adjacent to the carrier member is photodecomposed. The carrier member can now be separated from the device wafer, and the remaining polymeric adhesive is stripped while the device wafer is secured to the chuck.
(2) Thermodynamics: The device wafer temporarily bonded to the substrate support member is heated beyond the softening point of the polymer adhesive, and then the device wafer is slid away from or pulled away from the carrier member while being supported by the chuck.
(3) Thermal decomposition: The device wafer temporarily bonded to the substrate support member is heated to a temperature higher than the decomposition temperature of the polymer adhesive, and this is vaporized to lose the adhesion between the device wafer and the carrier member.

  By peeling the substrate support member 11 and the thin device wafer 33 as described above, a target semiconductor substrate is manufactured. Then, after the thin device wafer 33 is peeled off, various known processes such as dicing and molding are performed on the thin device wafer 33 as necessary, whereby a semiconductor device on which the device chip of the thin device wafer 33 is mounted. Can be manufactured.

Next, the substrate processing apparatus will be described.
The substrate support member 11 is mounted on the substrate processing apparatus 100 schematically shown in FIG. 4 after an adhesive layer forming step for forming the adhesive layer 19 is performed. The substrate processing apparatus 100 performs gliding or chemical mechanical polishing (CMP) on the substrate support member 11 having the carrier member 15 and the adhesive layer 19 and the device wafer 13 temporarily bonded and fixed to the substrate support member 11. The above-described substrate processing unit 31 that performs mechanical or chemical processing such as) is provided. In addition, the substrate processing apparatus 100 further includes a drive unit 47 including an actuator for rotating or slidingly driving the substrate support member 11 in accordance with the processing by the substrate processing unit 31, and a peeling tape 35 for the device wafer 13. A desorption processing unit 49 having a mechanism for attaching to and peeling off or a mechanism for supplying a stripping solution for chemical separation, an input unit 51 for accepting a switch operation by an operator, and a signal to each of these units And a control unit 53 for outputting and controlling.

  The control unit 53 controls each unit with a control program stored in the internal memory in advance or a control program input from the outside. For example, when the device wafer 13 is fixed to the substrate support member 11 by the operator and the input unit 51 receives a setting completion operation, a setting completion signal is output from the input unit 51 to the control unit 53. In response to the set completion signal from the input unit 51, the control unit 53 outputs a drive signal for driving the drive unit 47 and a processing signal for causing the substrate processing unit 31 to perform processing.

  The drive unit 47 receives, for example, a drive signal from the control unit 53 and rotationally drives the substrate support member 11, and the substrate processing unit 31 receives the processing signal from the control unit 53 and polishes the device wafer 13. (Substrate processing step). When the polishing process is completed, the control unit 53 stops the rotation of the substrate support member 11 and outputs a desorption start signal to the desorption processing unit 49. In response to the detachment start signal from the control unit 53, the detachment processing unit 49 detaches the processed device wafer 13 (substrate detachment process).

  The substrate processing described above may be performed according to a control program prepared in advance, or each processing may be performed manually.

Next, the configuration of the adhesive layer 19 for easily releasing the temporary bonding between the substrate support member 11 and the device wafer 13 without causing damage or warping to the device wafer 13 after peeling will be described. .
<First configuration example>
5 is a plan view of the adhesive layer 19 formed on the flat support surface 17 of the carrier member 15, and FIG. 6 is a cross-sectional view taken along the line AA of FIG. The adhesive layer 19 includes a low adhesive region 41 that is a first adhesive region and a high adhesive region 43 that is a second adhesive region having a higher adhesive force than the first adhesive region. In the present specification, the “low-adhesion region” means a region having low adhesion compared to the “high-adhesion region”, and is a region having no adhesion (that is, “non-adhesive region”). ). Details of the materials of these adhesive regions will be described later.

  In the present configuration example, a plurality of high adhesion regions 43 are discretely present on the flat support surface 17 of the carrier member 15. The individual high adhesion regions 43 have the same circular shape, and the maximum size is 0.005 mm or more and 15 mm or less. More preferably, they are 0.1 mm or more and 10 mm or less, More preferably, they are 1 mm or more and 5 mm or less.

  The individual high adhesion regions 43 are arranged at positions that are point-symmetric with respect to the center position of the flat support surface 17, so that when the carrier member 15 is driven to rotate, the device wafer 13 is moved in the circumferential direction. Fix with equal adhesive strength. As a result, the device wafer 13 can be stably supported. For example, when the processing by the substrate processing unit 31 shown in FIG. 1B is performed, uniform processing can be performed over the entire circumference of the device wafer 13.

  The low adhesion region 41 exists in a region excluding the position of the high adhesion region 43 on the flat support surface 17, and the high adhesion region 43 is discretely arranged. Therefore, the low adhesion region 41 has a high adhesion property. Arranged along the gap between the regions 43. Therefore, the low adhesion region 41 is continuously present without being divided from the outer peripheral side edge 19a of the adhesive layer 19 on the flat support surface 17 toward the center position of the flat support surface 17. .

  The low adhesive region 41 and the high adhesive region 43 form a halftone dot pattern on the surface of the adhesive layer 19, and the low adhesive region 41 corresponds to a peripheral region surrounding the halftone dot region of the halftone dot pattern. The adhesive region 43 corresponds to the halftone dot region. In the illustrated example, the pattern includes five high adhesion regions 43, but an arbitrary number of halftone dot patterns may be used.

  The low adhesion region 41 and the high adhesion region 43 can be formed as follows, for example. That is, the adhesive composition having high adhesiveness is surface-coated on the flat support surface 17 of the carrier member 15. On this surface-coated surface, a resist mask having a specific pattern that opens only a portion to be left as a highly adhesive region is formed, and a solution of fluorinated silane is applied. The region in contact with the fluorinated silane is chemically modified to be a low adhesion region 41, and the region covered with the resist and not in contact with the fluorinated silane is a high adhesion region 43. For this reason, the low adhesive region 41 and the high adhesive region 43 are defined in a specific pattern according to the region where the surface coat is formed by the resist mask and the region where the surface coat is not formed.

  According to the configuration of the adhesive layer 19, when the device wafer 13 is mechanically peeled from the substrate support member 11 as shown in FIG. 3B, the adhesive layer 19 on the flat support surface 17 shown in FIG. Peeling starts from any one of the peripheral positions of the outer peripheral side edge. FIGS. 7A and 7B are schematic diagrams showing the state of peeling of the adhesive layer 19 step by step. Specifically, as shown in FIG. 7A, first, the peeling line L1 reaches the highly adhesive region 43A near the outer periphery of the flat support surface. This peeling line L1 means the boundary line between the area before peeling and the area after peeling. Since the peeling line L1 is the low adhesive region 41 on both sides of the high adhesive region 43A, the low adhesive region 41 moves faster in the P direction (peeling progress direction) in the drawing than the high adhesive region 43A. As a result, the peeling line L1 is bent with the outer edge 43a at the outermost peripheral position of the highly adhesive region 43A as a vertex, and the peeling force concentrates on the outer edge 43a.

  When a large peeling force acts on the outer edge portion 43a at the outermost peripheral position, minute peeling occurs in the outer edge portion 43a, and this minute peeling starts the peeling of the high adhesion region 43A. Then, as shown in FIG. 7B, a peeling line L2 enters the high adhesive region 43A, and an inflection point Pi is formed at the boundary between the high adhesive region 43A and the low adhesive region 41. Peeling in the adhesive region 43A proceeds. The peeling force concentrates on the inflection point Pi, and the peeling is promoted. When the peeling of the high adhesive region 43A and the adjacent high adhesive region applied to the peeling line L2 is completed through the state of the peeling line L2, the peeling is performed on the outer edge portion 43b of the next high adhesive region 43B. The line L3 is reached.

  In this way, the presence of the low adhesive region 41 at the outer edge of each of the high adhesive regions 43A and 43B allows the peeling line of the low adhesive region 41 to always be within the adhesive layer 19 before the high adhesive region 43A. Proceed circumferentially. And the outer peripheral side of the outer edge parts 43a and 43b of each highly adhesive area | region 43A and 43B becomes a vertex which a peeling line bends one by one, and peeling force concentrates on this local narrow vertex. Therefore, micro-peeling that triggers peeling occurs without requiring a large force, whereby the highly adhesive region can be easily peeled with a relatively small force. On the contrary, when the low adhesive region 41 does not exist at the outer edge of the high adhesive region 43A and the area of the high adhesive region 43A is increased, peeling is unlikely to occur and a large peeling force is required. In this case, an excessive force is applied to the device wafer 13, and the device wafer 13 after peeling is likely to be warped.

  In this configuration, since the peeling force at the time of peeling is small, even if the device wafer 13 is peeled from the substrate support member 11, the bending stress generated in the device wafer 13 is reduced. Further, the occurrence of warpage with respect to the device wafer 13 after peeling is suppressed.

  Each of the high adhesion regions 43 shown in the figure is circular, but is not limited thereto, and may be polygonal shapes such as triangles and quadrangles, elliptical shapes, and the like. In particular, by disposing a corner portion or a portion with a small radius of curvature on the side close to the outer periphery of the flat support surface 17, the peeling force at the time of peeling concentrates on the corner portion. This also reduces the peeling force.

  FIG. 8 shows a partially enlarged view when the device wafer 13 is peeled off. The minute bumps 45 provided on each device chip 21 of the thin device wafer 33 are such that, when the adhesive force of the adhesive layer 19 is large, a part of the bumps 45 </ b> A indicated by broken lines is easily placed in the adhesive layer 19 as an example. Become. However, according to this configuration, since the high adhesion region of the adhesive layer 19 can be peeled off with a relatively small force, the bump 45 is damaged and is not left on the adhesive layer 19 side.

Next, the result of analytically determining the relationship between the size of each high adhesion region 43 and the peeling force by mechanical peeling will be described.
Hereinafter, the individual high adhesion regions will be referred to as “high adhesion dots”. Here, the analysis model is such that highly adhesive dots are present in a circular area having a diameter of 300 mm at an area ratio of 30%. The area ratio here means the ratio of the occupied area of the high adhesion region to the total area of the low adhesion region and the high adhesion region.

  First, since the area corresponding to the film thickness at the outer edge of the high adhesive dot, that is, the part corresponding to the film thickness from the outer edge of the high adhesive dot is easily peeled off, the entire area of the high adhesive dot is 100% (outer edge The dot size at which the peel force is reduced by 10% or more is obtained with respect to the peel force when the entire surface of the high-adhesive dot including the surface is highly adhesive. FIG. 9 is a graph showing a change in the peel force ratio with respect to the high adhesive dot size. The analysis result when the film thickness of the high adhesive dot is 2 μm, FIG. 10 is a graph similar to FIG. This is an analysis result when the film thickness of the conductive dots is 5 μm.

  As shown in FIGS. 9 and 10, in order to reduce the peeling force by 10% or more from the state in which the entire surface of the high adhesive dot is highly adhesive, the size of the strong adhesive dot size is 2 μm. Is desirably 80 μm or less, and when the film thickness is 5 μm, the strongly adhesive dot size is desirably 200 μm or less.

Next, the result of analytically determining the area ratio of the high adhesion dots from the allowable peeling force considering the capability of the substrate processing apparatus will be described.
In order to reduce the price of the apparatus, it is preferable that the desorption processing unit 49 of the substrate processing apparatus 100 shown in FIG. 4 sets the peeling force for peeling a circular region having a diameter of 300 mm to 0.5 kN / s or less per second. . That is, when the separation processing unit 49 peels 3 cm per second, the peeled area per second is the wafer maximum width 30 cm × 3 cm = 90 cm ² . If a material of 20 N / cm ² is peeled 90 cm ² per second, a peel force of 1.8 kN per second is required, but if the area ratio is 30%, a peel force of 0.5 kN per second is sufficient.

Now, assuming that the adhesive force of the high adhesive dots is 20 N / cm ² , the relationship between the area ratio of the high adhesive dots and the peeling force is as shown in the graph of FIG.

  According to FIG. 11, the area ratio of the high-adhesion dots with a peeling force of 0.5 kN is about 28%. For this reason, the area ratio of highly adhesive dots is preferably 30% or less. Since the area ratio of highly adhesive dots is 30% or less, the peeling force during peeling does not become excessive, and smooth peeling is possible even when the output of the detachment processing section 49 is 0.5 kN / s or less. It becomes.

Next, the result of analytically determining the relationship between the area of the high adhesive dots and the circumference ratio and the film thickness of the high adhesive dots will be described.
<When high-adhesion dots are circular>
The outer diameter of the strong adhesive dot is 2r (mm), the width of the outer edge of the dot corresponding to the film thickness is Δr (mm), and the target surface has a high peelability in the state where the entire surface of the high adhesive dot is highly adhesive. When the ratio with respect to the peeling force is F, the peeling force ratio F can be expressed by equation (1).

F = π (r−Δr) ² / πr ² (1)
When (1) is solved for r, (2) and (3) are obtained: r = A × Δr (2)
A = (1 + √F) / (1-F) (3)

If F = 90%, the peeling force reduction effect can be expected to be 10%. Therefore, the diameter of the high adhesive dot in that case is obtained. If Δr is substantially equal to the film thickness (t) of the adhesive layer,
From Equation (2) and Equation (3),
2r = 39 × t (t: film thickness of the adhesive layer) (4)

Here, when the area of the high adhesive dot is S (mm ² ) and the circumference of the high adhesive dot is L (mm), the value of S / L is used as an index, and S / L = 9.7 t. ,
Index S / L ≦ 10t (5)
It can be determined that there is an effect of reducing the peeling force depending on whether or not the above is satisfied.

  When the index S / L satisfies the expression (5), the device wafer can be peeled from the substrate support member without causing damage or large warpage.

<When the high adhesion dots are rectangular>
A state in which the long side of the strong adhesive dot is p × r (mm), the short side is r (mm), the width of the outer edge of the dot is Δr (mm), and the entire surface of the dot is highly adhesive with a target peeling force. Assuming that the ratio of the peeling force to F is F, the peeling force ratio F can be expressed by equation (6). Here, p is the ratio of the long side to the short side of the rectangle.

F = (r1-2Δr) (r2-2Δr) / (r1 · r2) (6)
If equation (6) is set as r1 = r, r2 = p × r, equation (7) is obtained.
F = (r−2Δr) (p × r−2Δr) / (p × r) ² (7)
Solving equation (6) for r yields equation (8): r = 2Δr × (1 + p + √ (p ² +2 (1−p) +1) / [2p (1−F)] (8)

If F = 90%, the effect of reducing the peeling force can be expected to be 10%. Therefore, the shape of the highly adhesive dot in that case is obtained. If Δr is substantially equal to the film thickness (t) of the adhesive layer, from equation (8),
r = 2 × B × t (t: film thickness of the adhesive layer) (9)
B = (1 + p + √ (p ² +2 (1−p) +1) /0.2p (10)

For example, when p = 4 (the long side is four times the short side),
r = 21 × t (t: film thickness of the adhesive layer) (11)
It becomes. This is a result proportional to the film thickness t, similarly to the equation (4) in the case of a circle.
In this case, the index S / L = 8.3t, and the same index S / L ≦ 10t as in the case of a circle (12)
It can be determined that there is an effect of reducing the peeling force depending on whether or not the above is satisfied.

  From the above, the high-adhesion dot is a device in which the index S / L, which is the ratio of the area S and the circumference L of the high-adhesion dot, is 10 times or less the film thickness t of the adhesive layer. The wafer can be peeled from the substrate support member without causing damage or large warpage.

Next, a specific example in the case of performing chemical peeling will be described.
FIG. 12A is a schematic perspective view for explaining temporary bonding between the substrate support member 11 and the device wafer 13, and FIG. 12B is a schematic view showing a state where the vice wafer that has been temporarily bonded to the substrate support member 11 is thinned. FIG. 12C is a schematic perspective view for explaining the step of bringing the release liquid into contact with the adhesive interface between the substrate support member 11 and the thin device wafer 33. FIG.

  Similar to the case shown in FIG. 1A, the device surface 23 of the device wafer 13 is pressed against the adhesive layer 19 of the substrate support member 11 as shown in FIG. As a result, the device surface 23 of the device wafer 13 and the high adhesion region 43 of the adhesive layer 19 are bonded, and the substrate support member 11 and the device wafer 13 are temporarily bonded.

  Next, as shown in FIG. 12B, the device wafer 13 is made, for example, by subjecting the back surface 29 of the device wafer 13 to mechanical or chemical processing (for example, thinning processing) similar to the above. The thin device wafer 33 is obtained by reducing the thickness to 1 μm to 200 μm.

  As described above, as a mechanical or chemical treatment, a through hole (not shown) that penetrates the thin device wafer 33 is formed from the back surface of the thin device wafer 33 after the thinning process. You may perform the process which forms a silicon penetration electrode (not shown) in it as needed.

  Next, as shown in FIG. 12C, the stripping solution S is brought into contact with the outer edge portion of the adhesive layer 19 of the substrate support member 11 by dipping or jet spraying to dissolve and remove the highly adhesive region 43. . Thereafter, as shown in FIGS. 3A and 3B, the thin device wafer 33 is detached from the substrate support member 11 by peeling the thin device wafer 33 from the adhesive layer 19 of the substrate support member 11. Let Since the subsequent processing is the same as described above, description thereof is omitted.

  When the substrate support member 11 and the thin device wafer 33 are peeled off using the peeling liquid as described above, the peeling liquid is obtained by using the arrangement pattern of the low adhesive area 41 and the high adhesive area 43 shown in FIG. S quickly penetrates from the outer peripheral portion of the flat support surface 17 to the central region, and the dissolution of the highly adhesive region 43 is promoted.

  FIG. 13 is a schematic top view of the interface between the thin device wafer 33 and the substrate support member 11 in FIG. The stripping solution S supplied to the outer peripheral surface of the thin device wafer 33 penetrates while diffusing from the outer peripheral portion of the flat support surface 17 (see FIG. 12A) toward the central region mainly through the low adhesion region 41. .

  In many cases, the low-adhesion region 41 can easily accept the stripping solution S because its internal structure is more flexible than the high-adhesion region 43. Furthermore, since the low adhesion region 41 and the thin device wafer 33 have low adhesion or no adhesion, the stripping solution S uses the low adhesion region 41 on the outer peripheral portion of the flat support surface 17 as an entrance to the central region. Enter the low-adhesion area 41 at high speed.

  Therefore, the high-adhesion region 43 is surrounded by the low-adhesion region 41 into which the stripping solution S is permeated at a high speed, and the edges of the outer edge portions of the individual high-adhesion regions 43 come into contact with the stripping solution S to adhere. The dissolution of the sex layer proceeds rapidly.

  14A to 14C show the dissolution of the high adhesion region 43 step by step. From the initial state shown in FIG. 14 (A), the stripping solution permeates the entire low adhesive region 41 at high speed, and the outer edge portions of the high adhesive regions 43A and 43B come into contact with the stripping solution. As described above, the high adhesion regions 43 are discretely arranged in the adhesive layer 19. Therefore, each high adhesive region 43 comes into contact with the stripping solution by the low adhesive region 41 into which the stripping solution has entered, over the entire circumference of each outer edge.

  Then, as shown in FIG. 14B, the dissolution of the high adhesion regions 43A and 43B proceeds from all directions, and the high adhesion regions 43A and 43B rapidly become equal as shown in FIG. Is dissolved. In the highly adhesive region 43A close to the outer periphery of the substrate support surface 17, the release liquid enters from the outer peripheral side of the substrate support surface 17, and therefore the reaction start timing (release solution arrival timing) is earlier than the high adhesive region 43B. . As a result, the high adhesion region 43 </ b> A on the side close to the outer periphery of the substrate support surface 17 is first dissolved. Therefore, particularly when the area of the highly adhesive region in the outer peripheral portion of the substrate support surface 17 is larger than the central portion of the substrate support surface 17, the dissolution of the entire adhesive layer can be completed in a short time.

  According to this configuration, the dissolution of the adhesive layer in the high adhesion region 43 is completed quickly as described above, and the subsequent peeling process of the thin device wafer 33 from the substrate support member 11 can be performed quickly.

Here, the result of analytically determining the relationship between the size of each high adhesion region 43 and the peeling time by dissolution peeling will be described.
The time required for the peeling process is preferably 100 seconds or less in order to shorten the processing cycle time of the substrate processing apparatus 100 shown in FIG. FIG. 15 is a graph showing a change in peeling time with respect to the high adhesive dot size when the dissolution rate is 45 min / mm, and FIG. 16 is a graph with respect to the high adhesive dot size when the dissolution rate is 90 min / mm. It is a graph which shows the mode of conversion of peeling time.

  As shown in FIGS. 15 and 16, a dot size of 75 μm or less is preferable at a dissolution rate of 45 min / mm, and a dot size of 38 μm or less is preferable at a dissolution rate of 90 min / mm.

  As described above, the adhesive layer 19 of this configuration has the low adhesive region 41 and the high adhesive region evenly distributed in the adhesive layer 19 on the flat support surface 17, so that the machine Even when the peeling method is either the chemical peeling method or the chemical peeling method, the peeling can be performed smoothly when the device wafer 13 is peeled from the substrate support member 11. As a result, the occurrence of warpage can be suppressed without damaging the device wafer 13 after peeling. As a result, the device wafer 13 is peeled off while maintaining a bonding strength that can withstand a TSV forming process including back grinding, chemical mechanical polishing (CMP), lithography, etching, vapor deposition, annealing, or cleaning. It is possible to prevent the device chip or the like formed on itself or the device wafer 13 from being damaged.

  A device wafer thinned to less than 100 μm, particularly a device wafer thinned to less than 60 μm, is very fragile. However, according to the configuration of the adhesive layer 19 of this configuration, uniform adhesiveness is provided over the entire area of the device wafer. Thus, the peeling force at the time of peeling is small. Therefore, even a thin device wafer can be reliably prevented from being broken or broken, and damage and warpage of the device wafer after peeling can be suppressed.

Next, other structural examples of the adhesive layer 19 will be sequentially described below.
<Second configuration example>
FIG. 17 is a plan view showing a second configuration example of the adhesive layer. The adhesive layer 19B of this configuration includes an outer peripheral side high adhesive region 43B1 in which a rectangular high adhesive region is disposed on the outer peripheral side of the flat support surface 17, and an inner peripheral side high adhesive region disposed on the inner peripheral side. 43B2 and the other region is a low adhesion region 41.

  The outer peripheral side high adhesive region 43B1 and the inner peripheral side high adhesive region 43B2 are high adhesive regions each having a plurality of rectangular shapes each having a short side and a long side. Each of the high adhesion regions 43B1 and 43B2 has a long side along the radial direction around the center position of the flat support surface 17, and a short side along the circumferential direction. The individual high adhesion regions 43B1 and 43B2 are distributed on the flat support surface 17 without overlapping each other. The area of the outer peripheral high adhesive region 43B1 is larger than the area of the inner peripheral high adhesive region 43B2, thereby enhancing the outer peripheral adhesiveness.

  The high adhesive regions 43B1 and 43B2 have a maximum short side size along the outer periphery of the circular flat support surface 17 (circumferential direction) of 0.005 mm to 15 mm, as in the first configuration example. Has been. More preferably, they are 0.1 mm or more and 10 mm or less, More preferably, they are 1 mm or more and 5 mm or less. In the high adhesive regions 43B1 and 43B2, the index S / L, which is the ratio of the area S and the circumferential length L of each high adhesive region, is 10 times or less the film thickness t of the adhesive layer 19B. Yes.

  And the space | interval of adjacent outer peripheral side high adhesiveness area | region 43B1 is wider than the space | interval of inner peripheral side high adhesiveness area | region 43B2. That is, as the high adhesive regions 43B1 and 43B2 are closer to the outer periphery of the flat support surface 17, the intervals between the adjacent high adhesive regions 43B1 and the adjacent high adhesive regions 43B2 are wider.

  According to the configuration of the adhesive layer 19B, when mechanical peeling is performed, the peeling starts from the outer peripheral side end of the outer peripheral high adhesive region 43B1, and the peeling progresses toward the inner peripheral side of the flat support surface 17. To do. Around the outer peripheral side high adhesive region 43B1, there is a low adhesive region 41 that continues from the outer peripheral side outer edge portion 19a of the adhesive layer 19B toward the center position, so that the end portion of the outer peripheral side high adhesive region 43B1 The peeling force concentrates on the surface. For this reason, even with a small driving force, each highly adhesive region 43B1 (same for 43B2) can be peeled off, and damage to the device wafer after peeling or warping can be suppressed.

  In addition, since the outer peripheral side high adhesive region 43B1 and the inner peripheral side high adhesive region 43B2 are arranged in a ring shape with a plurality of high adhesive regions at equal intervals, the in-plane distribution of the adhesive force is in the circumferential direction. Uniform, uniform and strong temporary bonding is possible.

  On the other hand, when chemical peeling is performed, the peeling solution penetrates into the low adhesion region 41 between the adjacent outer peripheral side high adhesion regions 43B1, and the peeling solution is directed toward the inner circumferential side of the flat support surface 17. Penetration proceeds. Since the low adhesive region 41 exists around the outer peripheral high adhesive region 43B1, the outer edge portion of the outer peripheral high adhesive region 43B1 is in contact with the stripping solution. As a result, dissolution of the outer peripheral side highly adhesive region 43B1 is promoted. Similarly, in the inner peripheral side high-adhesion region 43B2, the peeling solution comes into contact with the outer edge portion and the dissolution is promoted. Thereby, dissolution of the adhesive layer of the high adhesive regions 43B1 and 43B2 is completed quickly, and the subsequent peeling process of the thin device wafer 33 from the substrate support member 11 can be started quickly.

<Third configuration example>
FIG. 18 is a plan view showing a third configuration example of the adhesive layer. The adhesive layer 19 </ b> C of this configuration has high adhesive regions 43 </ b> C <b> 1 and 43 </ b> C <b> 2 in which a part of the annular shape along the outer periphery of the flat support surface 17 is cut, and the other regions are low adhesive regions 41. The notched end portion 53a of the high adhesive region 43C1 is opposed to the notched end portion 55a of the high adhesive region 43C2, and the opposite end portion 53b is opposed to the end portion 55b.

  Low adhesive regions 41a, which are continuous from the outer peripheral side edge of the adhesive layer 19C toward the center position, are provided at two positions between the end portions 53a-55a and between the end portions 53b-55b. 41b is provided.

  The adhesive layer 19 </ b> C of this configuration has a higher adhesion region on the outer peripheral portion than the central portion of the flat support surface 17. Thereby, the adhesive strength between the substrate support member and the device wafer can be increased, and the occurrence rate of troubles that may occur when both are not desired to be peeled can be reduced.

  Note that the adhesive layer 19C may have a configuration in which a high adhesive region is additionally arranged in the low adhesive region 41 inside the high adhesive regions 43C1 and 43C2, although not shown. In that case, the in-plane distribution of the adhesive force is made more uniform.

  In the high adhesive regions 43C1 and 43C2, the index S / L, which is the ratio of the area S and the circumferential length L of each high adhesive region, is 10 times or less the film thickness t of the adhesive layer 19C.

  According to the adhesive layer 19C having the above configuration, when mechanical peeling is performed, first, peeling starts from the outer peripheral side corners of the notched end portions 53a, 53b, 55a, and 55b of the high adhesive regions 43C1 and 43C2. Then, peeling proceeds toward the inner peripheral side of the flat support surface 17. As described above, the peeling force concentrates on the outer peripheral side corners of the high adhesion regions 43C1 and 43C2 and triggers the peeling. Therefore, even if the driving force for pulling up the tape 35 shown in FIG. The regions 43C1 and 43C2 can be easily peeled off.

  On the other hand, when chemical peeling is performed, the peeling solution penetrates into the low adhesion regions 41 a and 41 b, and the penetration of the peeling solution proceeds toward the inner peripheral side of the flat support surface 17. A low adhesive region 41 is arranged on the inner peripheral side of the high adhesive regions 43C1 and 43C2, and the peeling liquid penetrates into the low adhesive region 41. Therefore, the entire outer edges of the individual high adhesive regions 43C1 and 43C2 are peeled off. It comes in contact with the liquid. Accordingly, the dissolution of the high adhesion regions 43C1 and 43C2 is promoted, the dissolution of the adhesive layer 19D is completed quickly, and the subsequent peeling process of the thin device wafer 33 from the substrate support member 11 can be started quickly.

<Fourth configuration example>
FIG. 19 is a plan view showing a fourth configuration example of the adhesive layer. The adhesive layer 19D of this configuration is obtained by further increasing the number of notches in the high adhesive regions 43C1 and 43C2 (see FIG. 18) in which the annular shape is notched in the third configuration example. Each of the high adhesive regions 43D is rectangular, and the regions other than the region where the high adhesive regions 43D are arranged are low adhesive regions 41 that continue from the outer peripheral side edge 19a of the adhesive layer 19D toward the center position. Be placed. Each highly adhesive region 43D has a long side along the radial direction centered on the center position of the flat support surface 17 and a short side along the circumferential direction, and is distributed and arranged without overlapping each other. Yes.

  Each of the high adhesion regions 43D has a maximum size of a short side in a direction along the outer periphery of the circular flat support surface 17 (circumferential direction), which is 0.005 mm or more and 15 mm or less, as in the first configuration example. ing. More preferably, they are 0.1 mm or more and 10 mm or less, More preferably, they are 1 mm or more and 5 mm or less. In the high adhesive region 43D, the index S / L, which is the ratio of the area S and the circumferential length L of each high adhesive region, is 10 times or less the film thickness t of the adhesive layer 19D.

  According to the adhesive layer 19D having the above configuration, as in the third configuration example, more highly adhesive regions are arranged in the outer peripheral portion than in the central portion. As a result, the adhesive strength between the substrate support member and the device wafer can be increased, and the occurrence rate of troubles that may occur when it is not desired to peel both of them can be reduced.

  Moreover, when mechanical peeling is performed, peeling starts from the outer peripheral side end of each highly adhesive region 43D, and peeling progresses toward the inner peripheral side of the flat support surface 17 as described above. Since the peeling force concentrates on the outer peripheral side end of the high adhesion region 43D, and the outer peripheral side end triggers the peeling, the peeling progresses, so the high adhesive region 43D can be easily formed even with a small driving force. Can be peeled off.

  When chemical peeling is performed, the peeling solution penetrates into the low adhesion region 41 between the high adhesion regions 43D, and the penetration of the peeling solution proceeds toward the inner peripheral side of the flat support surface 17. Since each individual high adhesive region 43D is surrounded by the low adhesive region 41, the entire outer edge portion of each individual high adhesive region 43D is in contact with the stripping solution. Thereby, the dissolution of the high adhesion region 43D is promoted, the dissolution of the adhesive layer 19D is completed quickly, and the subsequent peeling process of the thin device wafer 33 from the substrate support member 11 can be started quickly.

<Fifth configuration example>
FIG. 20 is a plan view showing a fifth configuration example of the adhesive layer. In the adhesive layer 19E of this configuration, a large number of circular high-adhesion regions 43E are distributed without being overlapped with each other, and continuous from the outer peripheral side edge 19a of the adhesive layer 19E toward the center position in other regions. A low-adhesion region 41 is arranged to form a halftone dot pattern. The high adhesion region 43E is a random pattern in addition to the arrangement pattern arranged at equal intervals in the circumferential direction on a plurality of circular rings that are equidistant from the center position of the flat support surface 17 as shown in the illustrated example. It may be a simple arrangement pattern.

  Each of the high adhesion regions 43E has a maximum size in the direction along the outer side of the circular flat support surface 17 (circumferential direction), as in the first configuration example, 0.005 mm or more and 15 mm or less. . More preferably, they are 0.1 mm or more and 10 mm or less, More preferably, they are 1 mm or more and 5 mm or less. In the adhesive layer 19E of this configuration, since a large number of highly adhesive regions 43E are finely dispersed on the flat support surface 17, the in-plane distribution of the adhesive force is made more uniform, and damage to the device wafer after peeling or The occurrence of warpage can be suppressed.

  In the high adhesion region 43E, the index S / L, which is the ratio of the area S and the circumferential length L of each high adhesion region, is 10 times or less the film thickness t of the adhesive layer 19E. By setting the index S / L to 10 times or less of the film thickness t, the device wafer can be peeled from the substrate support member without causing damage or large warpage.

  The area ratio of the high adhesive region 43E (ratio of the area occupied by the high adhesive region to the total area of the low adhesive region and the high adhesive region) is preferably 30% or less. When the area ratio of the high adhesion dots is 30% or less, the peeling force at the time of peeling does not become excessive, and even if the output of the detachment processing unit 49 shown in FIG. 4 is a low output of 1 kN / s or less. Smooth peeling becomes possible.

  In addition, the form (size, shape, etc.) of the halftone dot (high adhesion region 43E) in the halftone dot pattern can be freely selected, for example, a circle, a square, a rectangle, a rhombus, a triangle, a star, or these May have a shape in which two or more types are combined in an arbitrary dimension.

  In addition to the configuration of each of the adhesive layers 19, 19A, 19B, 19C, 19D, and 19E, for example, the carrier member is flatly supported in accordance with the arrangement position of the device chip 21 on the device surface 23 shown in FIG. A structure in which a low-adhesion region is provided on the surface can also be used. In that case, about the area | region which does not correspond to the arrangement position of the device chip | tip 21 of an adhesive layer, the area | region turns into a highly adhesive area | region. For this reason, the bonding area between the device wafer and the substrate support member can be sufficiently secured, and the device wafer can be temporarily supported more reliably by the substrate support member.

  Further, in this temporarily supported state, the device chip 21 comes into contact with the low adhesion region of the adhesive layer. Therefore, when the thin device wafer is detached from the substrate support member after a mechanical or chemical treatment such as a thinning process on the device wafer, the possibility of damaging or warping the thin device wafer can be further reduced.

  In the case of performing mechanical peeling, the peeling force can be further reduced by reducing the number of high adhesion regions to be peeled simultaneously. Therefore, the peeling force can be further reduced by making the degree of peeling progress in the high adhesive region different for each high adhesive region so that the peeling line does not become parallel to the arrangement of the high adhesive region. Further, even when the arrangement of the individual high adhesion regions is made random, the peeling force can be further reduced.

  In addition, when each area of the high adhesive region that is peeled off substantially simultaneously with each high adhesive region is made different between adjacent high adhesive regions, the high adhesive region having a smaller area is first peeled off, and the area Large adhesive areas remain until later. By carrying out like this, the fluctuation | variation of the peeling force during peeling processing can be suppressed small. Therefore, not only the arrangement of each high-adhesion region is random, but also the area of each high-adhesion region is made random, so that the peeling force during peeling can be reduced and the fluctuation of the peeling force is also kept small. be able to.

Next, the material used for the adhesive layer 19 described above will be described in detail.
The adhesive used to temporarily bond the device wafer 13 to the substrate support member 11 is generally applied as a polymer adhesive or a dry film tape (for example, a die bonding tape) by spin coating or spray coating from a solution. Polymer adhesive. The adhesive layer applied by spin coating or spray coating is superior in film thickness uniformity compared to the adhesive layer formed from a tape. Therefore, the adhesive layer 19 is preferably formed by spin coating or spray coating.

  The application of the adhesive layer 19 is not limited to spin coating or spray coating, but other conventional methods including solution pouring (for example, meniscus coating, roller coating, flow coating, doctor coating), dipping method, and inkjet method. It can also be implemented by a method. When applied by spin coating, the material forming the adhesive layer 19 is generally spin coated at about 500 rpm to 5000 rpm for about 60 seconds to about 120 seconds. The spin-coated layer is then baked for about 1 minute to about 15 minutes near or above the boiling point of the solvent present in the adhesive layer 19 (eg, from about 80 ° C. to about 250 ° C.) to form the adhesive layer 19. The residual solvent content is reduced to less than about 1% by weight.

  The adhesive layer 19 is generally formed of a material including monomers, oligomers, and / or polymers dispersed or dissolved in a solvent system. If the adhesive layer 19 is applied by spin coating, the solids content of this material is preferably about 1% to about 50% by weight, more preferably about 5% to about 40% by weight. Even more preferred is from about 10% by weight to about 30% by weight. Suitable monomers, oligomers, and / or polymers include amorphous fluoro, such as cyclic olefin polymers and copolymers and fluorinated siloxane polymers with high atomic fluorine content (greater than about 30% by weight). Included are those selected from the group consisting of polymers, fluorinated ethylene-propylene copolymers, polymers with pendant perfluoroalkoxy groups, among which tetrafluoroethylene and 2,2-bis-trifluoromethyl-4,5- Particularly preferred are copolymers of difluoro-1,3-dioxole. Of course, the bonding strength of these materials depends on their inherent chemical structure and the coating and firing conditions used to apply them.

  Suitable solvent systems for the cyclic olefin polymers and copolymers are selected from the group consisting of aliphatic solvents such as hexane, decane, dodecane, and dodecene; alkyl-substituted aromatic solvents such as mesitylene; and mixtures thereof. Added solvent. Suitable solvent systems for amorphous fluoropolymers include, for example, fluorocarbon solvents commercially available as FLUORINERT ™ from 3M.

  The adhesive layer 19 can be formed of a polymer material containing dispersed nanoparticles in addition to the above materials. Suitable nanoparticles include those selected from the group consisting of alumina, ceria, titania, silica, zirconia, graphite, and mixtures thereof.

  The material of the adhesive layer 19 should remain stable at a temperature of about 150 ° C. to about 350 ° C., preferably about 200 ° C. to about 300 ° C. In addition, the material must be stable under the chemical exposure conditions encountered in the particular backside treatment process experienced by the backside. That is, the adhesive layer 19 must not decompose (i.e., less than about 1% weight loss) otherwise it loses its mechanical integrity, e.g. it melts under these conditions. End up.

  The adhesive layer 19 should not release gases that cause the thinner device wafer 13 to swell or deform, especially when undergoing a high vacuum process such as the deposition of a CVD dielectric layer.

The adhesive layer 19 preferably does not form a high adhesive bond, which facilitates subsequent separation. In general terms, it is known that amorphous polymer materials are: (1) low surface free energy; (2) non-tacky and do not adhere strongly to glass, silicon, and metal surfaces (ie generally hydroxyl or carboxylic (3) Can be poured from solution or formed into a thin film for lamination; (4) Under typical joining conditions Flow, fills irregularities on the surface of the device wafer, forms a bond-free bond line between the substrates; and (5) machines encountered even if performed under high temperature or high vacuum conditions during the backside processing step Those that do not crack, flow or redistribute under dynamic stress are desirable. The low surface free energy used herein is a contact angle with water of at least about 90 ° and a critical surface tension of less than about 40 × 10 ⁻⁵ N / cm, preferably less than about 30 × 10 ⁻⁵ N / cm, more Preferably, it is defined as a polymeric material exhibiting from about 12 × 10 ⁻⁵ N / cm to about 25 × 10 ⁻⁵ N / cm, and is determined by contact angle measurement.

The low adhesive strength refers to the adhesive strength of a polymer material that can be peeled off from a substrate only by light hand pressure to the extent that it is used to peel off a sticky note with no adhesive or adhesive. The material of the low adhesion region of the adhesive layer 19 has an adhesion force of less than about 7.25 × 10 ⁻³ Pa (50 psig), preferably less than about 5.08 × 10 ⁻³ Pa (35 psig), more preferably A range of about 0.145 × 10 ⁻³ Pa (1 psig) to about 4.35 × 10 ⁻³ Pa (30 psig) is desirable. The adhesion shown here is determined according to ASTM D4541 / D7234. Examples of suitable polymeric materials exhibiting the above properties include several cyclic olefin polymers and copolymers, such as APEL® from Mitsui Chemicals, TOPAS® from Ticona, ZEONOR (Zeon brand) Registered trademark) is included. Further included are solvent soluble fluorinated polymers, CYTOP (R) sold by Asahi Glass and TEFLON (R) amorphous fluoro (AF) polymers sold by DuPont. The adhesive strength of these materials varies depending on the coating and firing conditions used to apply them.

  In addition to the above, a solvent known as a good solvent for the material forming the adhesive layer 19 and a solvent that dissolves the adhesive layer 19 itself is also included. Examples of such solvents include those selected from the group consisting of aliphatic solvents (eg, hexane, decane, dodecane, and dodecene), carbon fluoride solvents, and mixtures thereof.

The material of the high adhesion region must be able to form a strong adhesive bond between the substrate support member 11 and the device wafer 13 together. Adhesion is greater than about 7.25 × 10 ⁻³ Pa (50 psig), preferably about 11.6 × 10 ⁻³ Pa (80 psig) to about 36.25 × 10 ⁻³ Pa (250 psig), and more preferably Is preferably about 14.5 × 10 ⁻³ Pa (100 psig) to about 21.75 × 10 ⁻³ Pa (150 psig) as a material for a high adhesion region.

Further, the adhesive strength of the high adhesion region is at least about 0.0725 × 10 ⁻³ Pa (0.5 psig), preferably at least about 29 × 10 ⁻³ Pa (20 psig), than the low adhesion region adhesive. More preferably, it is larger from about 7.25 × 10 ⁻³ Pa (50 psig) to about 36.25 × 10 ⁻³ Pa (250 psig). Furthermore, the material in which the high adhesion region is formed must satisfy the thermal and chemical stability required in the backside treatment process.

  The high adhesion region material should remain stable at temperatures from about 150 ° C. to about 350 ° C., preferably from about 200 ° C. to about 300 ° C. In addition, the material must be stable under the chemical exposure conditions experienced in the backside process to which the bonded device wafer is exposed. The material in the high adhesion area should not degrade (ie, less than about 1% weight loss) or its mechanical integrity will be lost at the backside process temperature described above. Also, high adhesion area materials should not release volatile compounds that cause blistering on thin device wafers, especially when subjected to high vacuum processes such as CVD dielectric deposition. It is.

  A suitable high adhesion area material may be a commercially available temporary wafer bonding composition such as WaferBOND® material (sold by Brewer Science, Inc., Roller, Missouri). In addition, the material may contain both resins and polymers showing high adhesion to semiconductor materials, glass, and metals.

Especially preferred is
(1) High solid content, reactive epoxy and UV-curing resin such as acrylic (2) Two-part epoxy and homogenous thermosetting resin such as silicone adhesive (3) Thermoplastic acrylic Polyamides, polyimides, polysulfones, polyethersulfones, and polyurethanes with styrene, vinyl halide (fluorine-free), and vinyl ester polymers and copolymers, in molten or solution coatings (4) Cyclic olefins, polyolefin rubbers (for example, polyisobutylene), and hydrocarbon-based tackifying resins.

  The bonding strength of these materials is the same as that of the materials used for the low-adhesion regions, and the adhesive strength of the materials used for the high-adhesion regions is also the unique chemical structure and the coating used to apply them. Of course, it depends on the firing conditions.

  Further, the above-described device wafer 13 may be provided with a protective layer for protecting the device chip on the device surface on which the device chip is provided, and temporarily bonded to the substrate support member via the protective layer. The film thickness of the protective layer is, for example, in the range of 1 to 1000 μm. Although a well-known thing can be used for a protective layer without a restriction | limiting, What can protect a device chip reliably is preferable.

  Examples of the material constituting the protective layer include terpene resin, terpene phenol resin, modified terpene resin, hydrogenated terpene resin, hydrogenated terpene phenol resin, rosin, rosin ester, hydrogenated rosin, hydrogenated rosin ester, polymerized rosin, Polymerized rosin ester, modified rosin, rosin modified phenolic resin, alkylphenol resin, aliphatic petroleum resin, aromatic petroleum resin, hydrogenated petroleum resin, modified petroleum resin, alicyclic petroleum resin, coumarone petroleum resin, indene petroleum resin, olefin copolymer (For example, methylpentene copolymer), cycloolefin copolymer (for example, norbornene copolymer, dicyclopentadiene copolymer, tetracyclododecene copolymer), novolac resin, phenol resin, epoxy resin, melamine resin, urea Resin, unsaturated polyester Resin, alkyd resin, polyurethane, polyimide, polyethylene, polypropylene, polyvinyl chloride, polystyrene, polyvinyl acetate, Teflon (registered trademark), ABS resin, AS resin, acrylic resin, cellulose resin, polyamide, polyacetal, polycarbonate, polyphenylene ether, Examples thereof include synthetic resins such as polybutylene terephthalate, polyethylene terephthalate, cyclic polyolefin, polyphenylene sulfide, polysulfone, polyethersulfone, polyarylate, polyetheretherketone, and polyamideimide, and natural resins such as natural rubber. Among these, cellulose resin, terpene resin, polyimide, acrylic resin, and polyamide are preferable, polyimide and polyamide are more preferable, and polyimide is most preferable. The protective layer may be configured by combining two or more of the above-described resins.

  The use of the above-mentioned device wafer with a protective layer as a member to be processed reduces the TTV (Total Thickness Variation) of the thin device wafer obtained by thinning the device wafer temporarily bonded to the substrate support member. This is effective when it is desired to further improve the flatness of the wafer.

  As described above, the present invention is not limited to the above-described embodiments, and those skilled in the art can make changes and applications based on combinations of the configurations of the embodiments, descriptions in the specification, and well-known techniques. This is also the scope of the present invention, and is included in the scope of seeking protection.

  For example, the silicon substrate is exemplified as the substrate to be processed supported by the substrate support member 11, but the present invention is not limited to this, and any substrate to be processed that can be subjected to mechanical or chemical processing. good. For example, the substrate to be processed can include a compound semiconductor substrate. Specific examples of the compound semiconductor substrate include a SiC substrate, a SiGe substrate, a ZnS substrate, a ZnSe substrate, a GaAs substrate, an InP substrate, and a GaN substrate.

  Further, as the mechanical or chemical process for the substrate to be processed supported by the substrate support member 11, the thinning process of the device wafer and the formation process of the through electrode are mentioned, but the process is not limited thereto. . Any processing performed in the semiconductor device manufacturing method may be used.

  The substrate support member 11 can also be used as a structure that supports the substrate when performing mechanical processing or chemical processing of other industrial products, in addition to being used for manufacturing semiconductor devices. .

<Formation of Adhesive Layer of Carrier Member, Adhesion and Separation with Device Wafer>
An epoxy-based photoresist (SU-8 2002, Microchem, Newton, Mass.) Is used to form an area (reference numeral 43 in FIG. 5) that is to become a highly adhesive area on the surface of an 8-inch silicon wafer (carrier member: wafer 1). The half-dot area portion of the wafer was coated in a concentric arc shape on the wafer surface with a width of about 3 to 5 mm.
Next, fluorinated silane ((heptadecafluoro-1,1,2,2-tetrahydradecyl) trichlorosilane) is an FC-40 solvent (mainly a perfluoro compound with C12, and Fluorinert (commercially available product). The product was diluted to a 1% concentration solution using a commercially available fluorine-based inert liquid). The diluted solution was spin coated on the surface of the wafer 1. The wafer 1 coated with this solution was baked on a hot plate at 100 ° C. for 1 minute. This was rinsed with FC-40 solvent in a spin coater and calcined at 100 ° C. for an additional minute. The epoxy-based photoresist was removed with acetone in a spin coater, leaving the areas that would become high adhesion areas untreated by the fluorinated silane solution.

  Another 8 inch silicon wafer (device wafer: wafer 2) was coated with the adhesive composition by spin coating. The wafer 2 was baked at 110 ° C. for 2 minutes and subsequently at 160 ° C. for 2 minutes. The surface of the wafer 2 coated with the adhesive composition and the coated surface of the wafer 1 were overlapped and held in a heated vacuum heating chamber at 220 ° C. for 3 minutes under vacuum. Two wafers 1 and 2 bonded to each other were prepared. One was mechanically peeled by inserting a razor blade into the bonding interface, and the other was chemically peeled by a stripping solution. When chemically exfoliating, it was immersed in a solvent of NMP: N-methylpyrrolidone at 25 ° C. for 60 minutes.

<Evaluation of device wafer after peeling>
The amount of warpage was observed for the wafer 2 after peeling. Using a back polishing apparatus, the surface opposite to the bonding surface was polished until the initial thickness was changed from 725 μm to 60 μm. The amount of warpage of the bonded 8-inch wafer before and after back polishing was measured with FLX-2320-S (manufactured by Toago Technology Co., Ltd.).

  Four types of samples with different structures of the adhesive layer were prepared from the bonded bodies of the wafers 1 and 2 described above. The configuration example A1 is the configuration of the adhesive layer 19 shown in FIG. 5, the configuration example A2 is the configuration of the adhesive layer 19C shown in FIG. 18, the configuration example A3 is the configuration of the adhesive layer 19E shown in FIG. The ends of the 18 high adhesive regions 43C1 and 43C2 (53a and 55a, 53b and 55b) are connected to form one annular high adhesive region.

  The wafer 2 is replaced with a TEG chip for mounting evaluation (JCHIP158-150-SE (CS) -D manufactured by Well Co., Ltd .: chip size: 5.02 mm, TSV number: 256, Cu pillar height: 45 μm), and the above polishing. And peeling. The peeled TEG chip bumps were confirmed by SEM observation. For the chemically peeled wafer 2, the time until the peeling after the solvent immersion was measured.

  The evaluation criteria for the warpage amount of each configuration example were level A when the measured value of the warpage amount was 30 μm or less, and level B when the measured value was 30 μm or more. The evaluation criteria for the bump defect was level A when there was no bump defect, and level B when even one defect was confirmed. The evaluation standard of the peeling time was set to level A when it was 100 minutes or less, and was set to level B when it exceeded 100 minutes.

  The evaluation results are shown in Table 1.

  In the configuration examples A1, A2, and A3, the warpage amount was Level A in both cases of mechanical peeling and chemical peeling, and the bump loss and peeling time were also Level A. On the other hand, in the configuration example B1, in the case of mechanical peeling, both the warpage amount and the bump defect were level B, and in the case of chemical peeling, the warpage amount was level A, but the peeling time was level B.

  Next, Table 2 shows the result of comparing the magnitude of the peeling force according to the shape and film thickness of the high adhesion dot. Configuration examples C1 to C3 and D1 are circular high adhesion dots, and configuration examples C4 to C7, D2 and D3 are rectangular high adhesion dots, each having a different film thickness and size. The size indicates the diameter in the case of a circle, and the length of the short side and the long side in the case of a rectangle. The overall arrangement of the high adhesion dots was an arrangement in which the high adhesion dots were uniformly distributed over the entire surface of the wafer as shown in FIG. When the highly adhesive dots are rectangular, the overall distribution is the same as in FIG. 20, but the arrangement direction of each dot is set so that the long side is parallel to the radial direction as shown in FIG.

S: Area of highly adhesive dots (mm ² )
L: Perimeter of highly adhesive dots (mm)
t: film thickness of the adhesive layer (mm)

  The evaluation criteria for the peeling force in each configuration example is that when the high adhesive dot is an adhesive layer having no influence of the outer edge and the entire surface of the dot is a high adhesive layer (in practice, the high adhesive dot is very large with 10 mm or more. Since a significant reduction effect is recognized when the peel force can be reduced by 10% or more as compared with the case of large), it was set to level A, and if it could not be reduced, it was set to level B.

As described above, the following items are disclosed in this specification.
(1) A substrate support member that removably supports a substrate to be processed on a flat support surface on which an adhesive layer is formed,
The adhesive layer has at least a first adhesive region and a plurality of second adhesive regions having a higher adhesive force than the first adhesive region,
The plurality of second adhesive regions are discretely disposed on the flat support surface, surrounded by the first adhesive regions,
The first support region is a substrate support member that is continuously arranged from at least a part of an outer peripheral side edge of the adhesive layer toward a center position of the adhesive layer.
(2) The substrate support member according to (1),
The substrate support member, wherein the second adhesive region is arranged along an outer periphery of the flat support surface, and at least a part of the outer periphery of the flat support surface is divided by the first adhesive region.
(3) The substrate support member according to (1) or (2),
The substrate support member having an index S / L where the area of one second adhesive region is S and the circumference is L is 10 times or less the film thickness of the adhesive layer.
(4) The substrate support member according to any one of (1) to (3),
A substrate support member in which a ratio of an occupied area of the plurality of second adhesive regions to a total area of the first adhesive region and the plurality of second adhesive regions is 30% or less.
(5) The substrate support member according to any one of (1) to (4),
The board | substrate support member with which the space | interval of adjacent said 2nd adhesive regions is so wide that the said 2nd adhesive region is near the outer peripheral side edge part of the said adhesive layer.
(6) The substrate support member according to any one of (1) to (5),
One said 2nd adhesive region is a board | substrate support member whose maximum size of the direction in alignment with the outer peripheral side edge part of the said adhesive layer is 0.005 mm or more and 15 mm or less.
(7) The substrate support member according to any one of (1) to (6),
The first adhesive region and the second adhesive region form a halftone dot pattern on the adhesive layer, and the first adhesive region corresponds to a peripheral region surrounding the halftone dot region of the halftone dot pattern. The substrate support member in which the second adhesive region corresponds to the halftone dot region.
(8) The substrate support member according to any one of (1) to (7),
The flat support surface is a substrate support member having a circular shape.
(9) The substrate support member according to (8),
Each of the plurality of second adhesive regions is a substrate support member disposed at a point-symmetrical position with respect to a center position of the flat support surface.
(10) The substrate support member according to any one of (1) to (9),
The substrate to be processed is a substrate support member that is a semiconductor substrate.
(11) The substrate support member according to any one of (1) to (10),
The flat support surface is a substrate support member having at least a surface made of the same material as the substrate to be processed.
(12) The substrate support member according to any one of (1) to (11),
A substrate processing unit that performs at least one of mechanical processing and chemical processing on the target substrate supported by the substrate support member;
A desorption processing unit for detaching the substrate to be processed, which has been subjected to the processing, from the substrate support member;
A substrate processing apparatus comprising:
(13) A method for manufacturing a substrate support member for removably supporting a substrate to be processed on a flat support surface on which an adhesive layer is formed,
In defining each of the first adhesive region and the plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface,
The plurality of second adhesive regions are discretely arranged on the flat support surface so as to surround the first adhesive region,
The manufacturing method of the board | substrate support member which arrange | positions the said 1st adhesive region continuously toward the center position of the adhesive layer from the outer peripheral side edge part of the said adhesive layer.
(14) A method of manufacturing a substrate support member according to (13),
A surface coat layer having a specific pattern is formed on the adhesive layer, and the first adhesive region and the second adhesive region are specified according to a region where the surface coat layer is formed and a region where the surface coat layer is not formed. A method for manufacturing a substrate support member defined in a pattern.
(15) A substrate processing method for processing a substrate to be processed using a substrate support member that detachably supports the substrate to be processed on a flat support surface on which an adhesive layer is formed,
In defining the first adhesive region and the plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface, the plurality of second adhesive regions are defined. The first adhesive region is discretely arranged on the flat support surface so as to surround the first adhesive region, and the first adhesive region is continuously extended from the outer peripheral side edge of the adhesive layer toward the center position of the adhesive layer. And an adhesive layer forming step to be arranged,
A temporary bonding step of temporarily bonding the substrate to be processed to the flat support surface on which the adhesive layer is formed;
A substrate processing step of performing at least one of mechanical processing and chemical processing on the target substrate temporarily bonded to the substrate support member;
A substrate detachment step of detaching the substrate to be processed from the substrate support member;
A substrate processing method.
(16) The substrate processing method according to (15),
The substrate processing step includes a substrate processing method including a thinning process of the substrate to be processed.
(17) The substrate processing method according to (15) or (16),
The substrate removal method includes a process of mechanically peeling the substrate to be processed supported on the flat support surface from the flat support surface.
(18) The substrate processing method according to (15) or (16),
The substrate detachment step includes a process of dissolving and removing the adhesive layer by bringing a release liquid into contact with the substrate to be processed supported on the flat support surface.

11 Substrate support member 13 Device wafer (substrate to be processed)
DESCRIPTION OF SYMBOLS 15 Carrier member 17 Flat support surface 19, 19B, 19C, 19D, 19E Adhesive layer 19a Peripheral edge 21 Device chip 23 Device surface 31 Substrate processing part 33 Thin device wafer 35 Tape 41, 41a Low adhesion area 43, 43A , 43C1, 43C2, 43D, 43E High adhesion region 43a Outer edge portion 43B1 Outer peripheral side high adhesive region 43B2 Inner peripheral side high adhesive region 47 Drive unit 49 Desorption processing unit 100 Substrate processing apparatus

Claims (18)

A substrate support member that removably supports a substrate to be processed on a flat support surface on which an adhesive layer is formed,
The adhesive layer has at least a first adhesive region and a plurality of second adhesive regions having a higher adhesive force than the first adhesive region;
The plurality of second adhesive regions are discretely disposed on the flat support surface, surrounded by the first adhesive regions,
The first adhesive region is a substrate support member that is continuously arranged from at least a part of an outer peripheral side edge of the adhesive layer toward a center position of the adhesive layer. The substrate support member according to claim 1,
The substrate support member, wherein the second adhesive region is disposed along an outer periphery of the flat support surface, and at least a part of the outer periphery of the flat support surface is divided by the first adhesive region. The substrate support member according to claim 1 or 2,
A substrate support member having an index S / L where the area of one second adhesive region is S and the circumference is L is 10 times or less the film thickness of the adhesive layer. A substrate support member according to any one of claims 1 to 3,
A substrate support member, wherein a ratio of an occupied area of the plurality of second adhesive regions to a total area of the first adhesive region and the plurality of second adhesive regions is 30% or less. A substrate support member according to any one of claims 1 to 4,
The board | substrate support member with which the space | interval of adjacent said 2nd adhesive region is so wide that the said 2nd adhesive region is near the outer peripheral side edge part of the said adhesive layer. A substrate support member according to any one of claims 1 to 5,
One said 2nd adhesive region is a board | substrate support member whose maximum size of the direction in alignment with the outer peripheral side edge part of the said adhesive layer is 0.005 mm or more and 15 mm or less. A substrate support member according to any one of claims 1 to 6,
The first adhesive region and the second adhesive region form a halftone dot pattern on the adhesive layer, and the first adhesive region corresponds to a peripheral region surrounding the halftone dot region of the halftone dot pattern. A substrate support member in which the second adhesive region corresponds to the halftone dot region. A substrate support member according to any one of claims 1 to 7,
The flat support surface is a substrate support member having a circular shape. The substrate support member according to claim 8,
Each of the plurality of second adhesive regions is a substrate support member disposed at a point-symmetrical position with respect to a center position of the flat support surface. A substrate support member according to any one of claims 1 to 9,
The substrate to be processed is a substrate support member that is a semiconductor substrate. A substrate support member according to any one of claims 1 to 10,
The flat support surface is a substrate support member having at least a surface made of the same material as the substrate to be processed. A substrate support member according to any one of claims 1 to 11,
A substrate processing unit that performs at least one of mechanical processing and chemical processing on the target substrate supported by the substrate support member;
A desorption processing unit for detaching the substrate to be processed, which has been subjected to the processing, from the substrate support member;
A substrate processing apparatus comprising: A substrate support member manufacturing method for detachably supporting a substrate to be processed on a flat support surface on which an adhesive layer is formed,
When defining a first adhesive region and a plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface,
The plurality of second adhesive regions are discretely arranged on the flat support surface so as to surround the first adhesive region,
The manufacturing method of the board | substrate support member which arrange | positions the said 1st adhesive region continuously toward the center position of this adhesive layer from the outer peripheral side edge part of the said adhesive layer. It is a manufacturing method of the substrate support member according to claim 13,
A surface coat layer having a specific pattern is formed on the adhesive layer, and the first adhesive region and the second adhesive region are specified according to a region where the surface coat layer is formed and a region where the surface coat layer is not formed. A method for manufacturing a substrate support member defined in a pattern. A substrate processing method for processing the substrate to be processed using a substrate support member that removably supports the substrate to be processed on a flat support surface on which an adhesive layer is formed,
In defining each of the first adhesive region and the plurality of second adhesive regions having higher adhesive force than the first adhesive region on the flat support surface, the plurality of second adhesive regions are defined. The first adhesive regions are discretely disposed on the flat support surface so as to surround the first adhesive regions, and the first adhesive regions are continuous from the outer peripheral side edge of the adhesive layer toward the center position of the adhesive layer. And an adhesive layer forming step to be arranged,
A temporary bonding step of temporarily bonding the substrate to be processed to the flat support surface on which the adhesive layer is formed;
A substrate processing step of performing at least one of mechanical processing and chemical processing on the target substrate temporarily bonded to the substrate support member;
A substrate detachment step of detaching the substrate to be processed from the substrate support member;
A substrate processing method. The substrate processing method according to claim 15, comprising:
The substrate processing step is a substrate processing method including a thinning process of the substrate to be processed. The substrate processing method according to claim 15 or 16,
The substrate removal method includes a process of mechanically peeling the substrate to be processed supported on the flat support surface from the flat support surface. The substrate processing method according to claim 15 or 16,
The substrate demounting step includes a process of dissolving and removing the adhesive layer by bringing a stripping solution into contact with the substrate to be processed supported on the flat support surface.