JP2014089957A - Tcct match circuit for plasma etch chambers - Google Patents

Abstract

An improved method of a TCCT matching circuit for a plasma etching chamber is provided.
A matching circuit includes a power input circuit coupled to an RF source and an inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit comprising an inductor. And a capacitor coupled in series with the inductor, the inductor is connected to the power input circuit, the capacitor is connected to the input terminal of the inner coil, and the first node is the power input circuit and the inner coil input circuit. An inner coil output circuit that is coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground, and a first node And an outer coil input circuit coupled between the input terminal of the outer coil and an outer coil output circuit coupled between the output terminal of the outer coil and the ground point.
[Selection] Figure 1

Description

[Priority claim]
This application claims priority from US Provisional Patent Application No. 61 / 747,919, entitled “TCCT Match Circuit for Plasma Etch Chambers”, filed December 31, 2012. This application claims priority as a continuation-in-part of US patent application Ser. No. 13 / 658,652, entitled “Faraday Shield Having Plasma Density Decoupling Structure Between TCP Coiling Zones” filed on Oct. 23, 2012. . The above US patent application is a part of US patent application Ser. No. 13 / 198,683, filed Aug. 4, 2011, entitled “Internal Faraday Shield Having Distributed Chevron Patterns and Correlated Positioning Relative to External Inner and Outer TCP Coil”. Claim priority as a continuation application. The above US patent application is filed on US Provisional Patent Application No. 61 / 480,314, filed April 28, 2011, entitled "Internal Faraday Shield Having Distributed Chevron Patterns and Correlated Positioning Relative to External Inner and outer TCP Coil". Claim priority. The entire disclosures of these applications are incorporated herein by reference for all purposes.

  The present invention relates generally to semiconductor manufacturing, and more particularly to a TCCT matching circuit for a plasma etch chamber.

  In semiconductor manufacturing, the etching process is generally repeated. As is well known to those skilled in the art, there are two types of etching processes: wet etching and dry etching. One type of dry etching is plasma etching performed using an inductively coupled plasma etching apparatus.

  The plasma contains various types of radicals, as well as positive and negative ions. Various radical, positive ion, and negative ion chemistries are used to etch wafer features, surfaces, and materials. During the etching process, the chamber coil performs a function similar to the function of the primary coil in the transducer, and the plasma performs a function similar to the function of the secondary coil in the transducer.

  Existing transducer coupled capacitive tuning (TCCT) matching designs have several problems, especially when used to perform manufacturing processes for magnetoresistive random access memories (MRAM). Such problems include limited TCCT range, limited transducer coupled plasma (TCP) power, high coil voltage, and coil arcing. As a result, the process window of the reactor chamber can be quite limited, which means that various recipes cannot be addressed. If a recipe outside the process window is forced to run, the recipe may be aborted due to overvoltage and / or overcurrent interlocks, or worse, TPC coil arcing and ceramic window and ceramic cloth destruction May occur. Furthermore, when the terminal voltage is not well balanced, the influence of sputtering of the ceramic window due to capacitive coupling by the TCP coil may occur with time. As a result, sputtering of particles subsequently deposited on the wafer occurs from the ceramic window, which can result in yield loss. This effect may, for example, limit the operating life of the reactor to 500 hours of RF operation.

  In view of the foregoing, there is a need for an improved TCCT matching circuit for a plasma etching chamber.

  An apparatus for use in etching a semiconductor substrate and a layer formed on the semiconductor substrate in the manufacture of a semiconductor device is disclosed. This apparatus is defined by a TCCT matching circuit that controls the operation of the TCP coil of the plasma processing chamber in which the etching takes place.

  In one embodiment, a matching circuit coupled between the RF source and the plasma chamber, the power input circuit coupled to the RF source, and the inner coupled between the power input circuit and the input terminal of the inner coil. A coil input circuit, the inner coil input circuit includes an inductor and a capacitor coupled in series with the inductor, the inductor connects to the power input circuit, and the capacitor connects to the input terminal of the inner coil; A first node is an inner coil output circuit defined between the power input circuit and the inner coil input circuit and coupled between the output terminal of the inner coil and a ground point, wherein the first node is a direct passthrough to ground. Between the inner coil output circuit defining the connection, the outer coil input circuit coupled between the first node and the input terminal of the outer coil, and between the output terminal of the outer coil and the ground point Matching circuit comprising combined and an outer coil output circuit is provided.

  In one embodiment, the capacitor is a variable capacitor having a value between about 150 pF and about 1500 pF, and the inductor has a value between about 0.3 μH and about 0.5 μH.

  In one embodiment, the outer coil input circuit includes a second capacitor.

  In one embodiment, the second capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.

  In one embodiment, the outer coil output circuit includes a second capacitor. In one embodiment, the second capacitor has a value from about 80 pF to about 120 pF. In another embodiment, the second capacitor has a value of about 100 pF ± about 1%.

  In one embodiment, the power input circuit is coupled between a second capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and the second capacitor and the second inductor. A third capacitor configured, a second node defined between the second capacitor and the third capacitor, and a fourth capacitor coupled between the second node and ground. Including. In one embodiment, the second capacitor has a rating of about 5 pF to about 500 pF, the third capacitor has a rating of about 50 pF to about 500 pF, and the second inductor has a rating of about 0.3 μH to The fourth capacitor has a value from about 200 pF to about 300 pF with a value of about 0.5 μH. In one embodiment, the fourth capacitor has a value of about 250 pF ± about 1%.

  In another embodiment, a power input circuit coupled to an RF source and an inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit comprising: an inductor; A first capacitor coupled in series with the inductor, the inductor connected to the power input circuit, the first capacitor connected to the input terminal of the inner coil, and the first node connected to the power input circuit An inner coil output circuit defined between the inner coil input circuit and coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground; An outer coil input circuit coupled between a first node and an input terminal of the outer coil; and an outer coil output circuit coupled between an output terminal of the outer coil and a grounding point, about 100 p Matching circuit including an outer coil output circuit including a second capacitor having a value greater than is provided.

  In one embodiment, the first capacitor is a variable capacitor having a value between about 150 pF and about 1500 pF, and the inductor has a value of about 0.3 μH to about 0.5 μH.

  In one embodiment, the outer coil input circuit includes a third capacitor. In one embodiment, the third capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.

  In one embodiment, the power input circuit is coupled between a third capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and the third capacitor and the second inductor. A fourth capacitor, a second node defined between the third capacitor and the fourth capacitor, and a fifth capacitor coupled between the second node and ground. Including. In one embodiment, the third capacitor has a rating of about 5 pF to about 500 pF, the fourth capacitor has a rating of about 50 pF to about 500 pF, and the second inductor has a rating of about 0.3 μH to The fifth capacitor has a value from about 200 pF to about 300 pF with a value of about 0.5 μH. In one embodiment, the fifth capacitor has a value of about 250 pF ± about 1%.

  In another embodiment, a power input circuit coupled to an RF source and an inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit comprising: an inductor; A first capacitor coupled in series with the inductor, the inductor connected to the power input circuit, the first capacitor connected to the input terminal of the inner coil, and the first node connected to the power input circuit An inner coil output circuit defined between the inner coil input circuit and coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground; An outer coil input circuit coupled between a first node and an input terminal of the outer coil, the outer coil input circuit including a second capacitor, between the output terminal of the outer coil and a ground point An outer coil output circuit coupled matching circuit and an outer coil output circuit including a third capacitor is provided.

  In one embodiment, the first capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF, and the inductor has a value of about 0.3 μH to about 0.5 μH.

  In one embodiment, the second capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.

  In one embodiment, the third capacitor has a value of about 80 pF to about 120 pF. In one embodiment, the third capacitor has a value of about 100 pF ± about 1%.

  In one embodiment, the power input circuit is coupled between a fourth capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and the fourth capacitor and the second inductor. A fifth capacitor coupled, a second node defined between the fourth capacitor and the fifth capacitor, and a sixth capacitor coupled between the second node and ground. Including. In one embodiment, the fourth capacitor has a rating of about 5 pF to about 500 pF, the fifth capacitor has a rating of about 50 pF to about 500 pF, and the second inductor has a rating of about 0.3 μH to The sixth capacitor has a value from about 200 pF to about 300 pF with a value of about 0.5 μH. In one embodiment, the sixth capacitor has a value of about 250 pF ± about 1%.

  The invention, as well as further advantages of the invention, can best be understood by referring to the following description taken in conjunction with the accompanying drawings.

1 illustrates a plasma processing system utilized for an etching operation according to one embodiment of the present invention. FIG.

1 is a cross-sectional view of a plasma processing chamber according to an embodiment of the present invention.

FIG. 3 is a top view schematically illustrating an inner coil and an outer coil according to an embodiment of the present invention.

1 is a schematic diagram illustrating a circuit topology of a TCCT matching circuit according to an embodiment of the present invention.

1 is a simplified schematic diagram illustrating components of a TCCT matching circuit according to one embodiment of the present invention.

6 is a graph showing ion density versus TCP power for various top end configurations according to some embodiments of the present invention.

FIG. 4 shows four graphs each illustrating the relationship between ion density and radial distance according to some embodiments of the present invention.

  A TCCT matching circuit for use in etching a semiconductor substrate and a layer formed on the semiconductor substrate during manufacture of a semiconductor device is disclosed. The TCCT matching circuit controls the operation of the TCP coil provided on the dielectric window of the chamber in which etching is performed.

  In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without some of these specific details. In other instances, well known process operations and implementation details have not been described in detail in order to avoid unnecessarily obscuring the present invention.

  FIG. 1 illustrates a plasma processing system utilized for an etching operation according to one embodiment of the present invention. The system includes a chamber 102 that includes a chuck 104 and a dielectric window 106. The chuck 104 may be an electrostatic chuck for supporting the substrate when present.

  Further, a bias RF generator 160 is illustrated, and the bias RF generator 160 can be defined from one or more generators. If multiple generators are provided, different frequencies can be used to achieve different tuning characteristics. A bias matching 162 is coupled between the RF generator 160 and the conductive plate of the assembly that defines the chuck 104. The chuck 104 also includes electrostatic electrodes to allow wafer chucking and dechucking. Broadly, filters and DC clamp power supplies can be provided. Other control systems for lifting the wafer from the chuck 104 can also be provided. Although not shown, a pump is connected to the chamber 102 to allow vacuum control and removal of gaseous byproducts from the chamber during plasma processing during operation.

  The dielectric window 106 can be defined from a ceramic type material. Other dielectric materials are possible as long as they can withstand the conditions of the semiconductor etch chamber. Typically, the chamber operates at an elevated temperature within the range between about 50 ° C and about 120 ° C. The temperature depends on the etching process operation and the specific recipe. The chamber 102 also operates at vacuum conditions in a range between about 1 mTorr (mT) and about 100 mTorr (mT). Although not shown, chamber 102 is typically coupled to several facilities when installed in a clean room or manufacturing facility. The equipment includes piping for processing gas, vacuum, temperature control, and environmental particle control.

  These facilities are coupled to the chamber 102 when installed in the target manufacturing facility. Furthermore, the chamber 102 can be coupled to a transfer chamber, which allows the robotics mechanism to transfer semiconductor wafers into and out of the chamber 102 using typical automation.

  FIG. 2 is a cross-sectional view of a plasma processing chamber according to an embodiment of the present invention. The TCP coil is illustrated as including an inner coil (IC) 122 and an outer coil (OC) 120. The TCP coil is disposed and configured on the dielectric window 106.

  The TCCT matching circuit 124 allows dynamic tuning of the power provided to the inner and outer coils. The TCP coil is coupled to a TCCT matching circuit 124 that includes connection terminals to the inner coil 120 and the outer coil 122. In one embodiment, the TCCT matching circuit 124 is configured to tune the TCP coil to provide greater power to the inner coil 122 than to the outer coil 120. In another embodiment, the TCCT matching circuit 124 is configured to tune the TCP coil to provide less power to the inner coil 122 than the outer coil 120. In another embodiment, the power provided to the inner and outer coils provides an even distribution of power and / or controls the ion density in a radial distribution across the substrate (ie, wafer when present). Is to do. In yet another embodiment, the power tuning of the outer and inner coils is adjusted based on processing parameters defined for etching performed on a semiconductor wafer provided on the chuck 104.

  In one implementation, a TCCT matching circuit with a variable capacitor (discussed in more detail below) can be configured to be automatically adjusted to achieve a predetermined current ratio in the two coils. It should be understood that the circuits described herein allow tuning and adjustment of the desired current ratio. In one embodiment, the current ratio may be in the range of 0.1 to 1.5. In general, this ratio is referred to as the transducer coupled capacitive tuning (TCCT) ratio. However, setting the TCCT ratio is based on the desired process for a particular wafer.

  By providing a tunable TCP coil, it should be understood that the chamber 102 can provide the flexibility to control the ion density relative to the TCP power and the radial ion density profile, depending on the processing operation being performed. It is.

  Furthermore, although reference is made to TCCT matching circuits throughout this disclosure, it should be noted that the use of this term does not limit the scope of circuits defined to achieve the desired matching function and to allow tuning. is there. In another embodiment, the matching circuit according to the principles and embodiments described herein is applied to achieve a desirable matching function for a plasma processing system that does not have a TCCT function or that has a constant TCCT ratio. It is contemplated that it can be.

  FIG. 3 is a top view schematically illustrating the inner coil 122 and the outer coil 120 according to an embodiment of the present invention. The top view shown represents a connection to a coil as described above and includes an outer coil 120 and an inner coil 122 as an example. The inner coil 122 includes an inner coil 1 (IC1) and an inner coil 2 (IC2). The outer coil 120 includes an outer coil 1 (OC1) and an outer coil 2 (OC2). Connections between the ends of the coils are illustrated with respect to circuitry provided in the TCCT matching circuit 124. The illustration in FIG. 3 is intended to illustrate the annular windings associated with each of the inner and outer coils of the TCP coil utilized in chamber 102, in accordance with one embodiment of the present invention. As shown, the inner coils IC1 and IC2 are arranged as parallel spirals arranged alternately. As shown, IC1 and IC2 are substantially the same shape, but resemble a pair of algebraic or Archimedean spirals, one rotated about 180 degrees around the axis with respect to the other. The input terminal 300 of IC1 is opposed to the input terminal 302 of IC2 across the diameter. Further, the output terminal 304 of IC1 is opposed to the output terminal 306 of IC2 across the diameter. The configuration of the outer coils OC1 and OC2 is similar to the configuration of the inner coils IC1 and IC2, and defines a substantially similar parallel helix that is alternately arranged and rotated about 180 degrees from each other. The OC1 input terminal 308 is opposed to the OC2 input terminal 310 across the diameter, and the OC1 output terminal 312 is opposed to the OC2 output terminal 314 across the diameter. In one embodiment, the input and output terminals of the inner and outer coils are arranged on a substantially straight line. It should be understood that other types of coil configurations are possible. For example, it is possible to have a three-dimensional coil forming a dome-shaped structure and other coil type structures other than a flat coil distribution.

  As described above, the TCP coil is coupled to the TCCT matching circuit 124, which includes connection terminals to the inner coil 120 and the outer coil 122. As shown, the input terminals 308 and 310 of the outer coil 120 are coupled to a node 146 that further connects to a TCCT input circuit 320. The output terminal of the outer coil 120 is connected to the node 142, and the node 142 is connected to the TCCT output circuit 324. Inner coil 122 has its input terminals 300 and 302 connected to node 140, which is further connected to TCCT input circuit 320. The output terminals 304 and 306 of the inner coil 122 are connected to the node 148, and the node 148 is connected to the TCCT output circuit 324. The TCCT input circuit receives power from the RF power source 322. The TCCT output circuit is grounded.

  FIG. 4A is a schematic diagram illustrating a circuit topology of a TCCT matching circuit according to an embodiment of the present invention. An RF source 322 provides power to the power input circuit 400. A variable capacitor C 1 is coupled between the RF source 322 and the node 410. Node 410 connects to capacitor C2, which is further grounded. The node 410 is connected to the variable capacitor C3, and the variable capacitor C3 is further connected to the inductor L5. Inductor L5 is coupled to node 412. In one embodiment, power input circuit 400 is defined by a variable capacitor C1, a node 410, a grounded capacitor C2, a variable capacitor C3, and an inductor L5 arranged as described.

  Node 412 is coupled to each of inner coil input circuit 402 and outer coil input circuit 404. In one embodiment, the inner coil input circuit 402 is defined by an inductor L3 and a variable capacitor C5 that are coupled together. Inductor L3 is coupled between node 412 and variable capacitor C5. Variable capacitor C5 is connected to node 140 (shown in FIG. 3), which is further connected to the input terminal of the inner coil.

  With continued reference to FIG. 4A, node 412 also connects to outer coil input circuit 404. In one embodiment, outer coil input circuit 404 is defined by a variable capacitor C4 that couples to node 412. The variable capacitor C4 is also connected to a node 146 (shown in FIG. 3), and the node 146 is further connected to the input terminal of the outer coil.

  4A shows a TCCT output circuit 324, which is defined by an inner coil output circuit 406 and an outer coil output circuit 408. FIG. Inner coil output circuit 406 is connected to node 148 (shown in FIG. 3), which in turn connects to the output terminal of the inner coil. In one embodiment, the inner coil output circuit 406 is defined by a ground pass-through. Outer coil output circuit 408 connects to node 142 (shown in FIG. 3), which in turn connects to the output terminal of the outer coil. In one embodiment, the outer coil output circuit is defined by a capacitor C7 coupled between node 142 and ground.

  In one embodiment, the variable capacitor C1 is rated at about 5-500 pF. In one embodiment, capacitor C2 is rated at about 250 pF. In one embodiment, the variable capacitor C3 is rated at about 5 to 500 pF. In one embodiment, inductor L5 is rated at about 0.3 μH. In one embodiment, the variable capacitor C4 is rated at about 150-1500 pF. In one embodiment, inductor L3 is rated at about 0.55 μH. In one embodiment, the variable capacitor C5 is rated at about 150-1500 pF. In one embodiment, capacitor C7 is rated to about 100 pF.

  The TCCT matching circuit 124 allows dynamic tuning of the variable capacitors C1, C3, C4, and C5 to tune the power provided to the inner and outer coils. In one embodiment, variable capacitors C 1, C 3, C 4, and C 5 are controlled by a process controller connected to the electronics panel of chamber 102. The electronics panel can be coupled to a networking system, which operates a specific processing routine depending on the processing operation desired during a specific cycle. Thus, the electronics panel can control the etching operations performed in the chamber 102 and can control specific settings of the variable capacitors C1, C3, C4, and C5.

  FIG. 4B is a simplified schematic diagram illustrating components of a TCCT matching circuit according to one embodiment of the present invention. As shown, power input circuit 400 receives power from RF power supply 322. The power input circuit 400 is connected to the node 412. Inner coil input circuit 402 is coupled between node 412 and inner coil 122. Outer coil input circuit 404 is coupled between node 412 and outer coil 120. The inner coil 122 is connected to the inner coil output circuit 406, and the inner coil output circuit 406 is grounded. The outer coil 120 is connected to the outer coil output circuit 408, and the outer coil output circuit 408 is grounded.

  Broadly speaking, the TCCT matching circuit design described herein improves power efficiency. This is thought to be due to design optimization to minimize the effect of stray capacitance in the coil on the plasma. The effect of stray capacitance on RF power efficiency is discussed in Maolin Long's “Power Efficiency Oriented Optimal Design of High Density CCP and ICP Sources for Semiconductor RF Plasma Processing Equipment” IEEE Transactions on Plasma Science, Vol. 34, No. 2, April 2006 Have been studied and described and are incorporated herein by reference.

  With respect to the inner coil, the conventional TCCT matching circuit design includes an output inductor. The output-side inductor increases stray capacitance and thus reduces power efficiency. However, in the embodiment presented in this application, the inner coil output circuit is configured as a ground pass-through, while the inner coil input circuit is configured to include an inductor L3. This reduces stray capacitance, thus improving power efficiency and making it easier to lower the voltage at the inner coil.

  With respect to the outer coil, the conventional TCCT matching circuit design has a relatively low output side capacitance. However, in the embodiment presented in this application, the outer coil output circuit is configured to provide a higher capacitance, which reduces the impedance and lowers the voltage drop for a given frequency.

Table 1 below provides RF characterization data that compares the original top RF design with a modified top RF design according to embodiments of the present invention.

  As demonstrated by the data in Table 1, the Q value of the unloaded (no plasma) inner coil for the modified upper end is improved over the original upper end. Therefore, RF power efficiency is also improved. Thus, at no load, the overall Q value of the TCP coil is improved with a higher TCCT. This is because the outer coil dominates at a lower TCCT. Furthermore, the data demonstrate that the overall increase in RF power efficiency when loaded (with plasma) is significant.

Broadly speaking, the TCCT matching circuit disclosed in this application achieves high power efficiency, which means that a higher density plasma is achieved for a given amount of power. Further, by realizing high power efficiency, the disclosed TCCT matching circuit allows the voltage level at the coil terminals to be relatively low. The ability to operate at a lower voltage at the coil terminals reduces the acceleration of ions that may hit the surface of the dielectric window. As a result, particle generation caused by the sputtering of particles from the dielectric window is reduced. Table 2 below shows a terminal voltage comparison between an existing TCCT matching circuit design and a TCCT matching circuit design according to some embodiments of the present invention.

  The data in Table 2 shows a comparison of measured RF voltage between a TCCT matching circuit according to some embodiments of the present invention and an existing TCCT matching circuit. Voltage V3 (shown in FIG. 4A) is measured between variable capacitor C5 and node 140, and indicates the voltage at the input terminal of the inner coil. The voltage V4 (also shown in FIG. 4A) is measured between the output terminal of the outer coil and the capacitor C7 and indicates the voltage at the output terminal of the outer coil.

  As the data shown in Table 2 demonstrates, the coil terminal voltage is significantly reduced in the TCCT matching circuit design according to embodiments of the present invention. Because the coil terminal voltage is reduced, embodiments of the present invention can be utilized in a variety of conductor etch chambers, minimizing dielectric window sputtering, and also coil arcing caused by terminal / ground overvoltage. lose.

  FIG. 5 is a graph illustrating ion density versus TCP power for various top end configurations according to some embodiments of the present invention. In this graph, plots for various top end configurations are represented in various shapes. The circles correspond to the original top plot with a 0.1 inch coil window gap. The experimental conditions are as follows. TCCT = 1, SF6 = 50 sccm, Ar = 200 sccm, Ch. P = 9 mT, tip = 160 mm. The diamonds correspond to a modified top plot with a TCCT matching circuit according to embodiments described herein and also having a 0.1 inch coil window gap. The square marks correspond to the original top plot with a 0.4 inch coil window gap. The triangle mark corresponds to the original top plot, which has no Faraday shielding and still has a 0.4 inch coil window gap.

  A plot for the original top with a 0.1 inch coil window gap (represented by a circle) and a plot for a modified top with a 0.1 inch coil window gap (represented by a diamond) , It can be seen that the modified top RF design achieves significantly higher power efficiency than the original top RF design. That is, for a given TCP power, the modified top end achieves a fairly high ion density. By realizing higher power efficiency, the plasma density equivalent to the conventional upper end TCCT matching design can be realized with lower power. This function improves the lifetime of the TCCT matching circuit since the component receives less power and reduces particle generation due to the sputtering of the dielectric window as described above.

  FIG. 6 shows four graphs showing the relationship between ion density and radial distance, respectively. In the graph shown in the upper right of FIG. 6, the plot shows plots for various TCCT values when applied to the original top end with a 0.1 inch coil window gap. For each plot, TCP power = 1000 W. The plot indicated by diamonds corresponds to TCCT = 1. The plot indicated by the square mark corresponds to TCCT = 0.5. The plot indicated by the triangles corresponds to TCCT = 1.3.

  In the graph shown in the upper left of FIG. 6, plots for various TCCT values when applied to a modified top end with a TCCT matching circuit according to an embodiment of the present invention and having a 0.1 inch coil window gap are shown. It is shown. For each plot, TCP power = 1000 W. The plot indicated by diamonds corresponds to TCCT = 1. The plot indicated by the square mark corresponds to TCCT = 0.5. The plot indicated by the triangles corresponds to TCCT = 1.3.

  The graph shown in the lower right of FIG. 6 shows plots for various TCCT values when applied to the original top end with a coil window gap of 0.4 inches. The plot indicated by diamonds corresponds to TCCT = 1. The plot indicated by the square mark corresponds to TCCT = 0.5. The plot indicated by the triangles corresponds to TCCT = 1.3.

  The graph shown in the lower left of FIG. 6 shows plots for various TCCT values when applied to the upper end of the baseline with no Faraday shielding and a 0.4 inch coil window gap. The plot indicated by diamonds corresponds to TCCT = 1. The plot indicated by the square mark corresponds to TCCT = 0.5. The plot indicated by the triangles corresponds to TCCT = 1.3.

  The plot shown in FIG. 6 demonstrates that the increased plasma density obtained by incorporating a TCCT matching circuit according to an embodiment of the present invention is more evenly distributed across the wafer.

  Although the present invention has been described with respect to several embodiments, various modifications, additions, rearrangements, and equivalents thereof will be recognized by those skilled in the art upon reading the above specification and reviewing the drawings. I want you to understand. Accordingly, the present invention is intended to embrace all such alterations, additions, permutations and equivalents that are within the true spirit and scope of the present invention.

Claims (20)

A matching circuit coupled between the RF source and the plasma chamber,
A power input circuit coupled to an RF source;
An inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit including an inductor and a capacitor coupled in series with the inductor, the inductor Is connected to the power input circuit, the capacitor is connected to the input terminal of the inner coil, and a first node is defined between the power input circuit and the inner coil input circuit;
An inner coil output circuit coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground;
An outer coil input circuit coupled between the first node and an input terminal of the outer coil;
A matching circuit comprising: an outer coil output circuit coupled between an output terminal of the outer coil and a ground point. The capacitor is a variable capacitor having a rating between about 150 pF and about 1500 pF;
The matching circuit of claim 1, wherein the inductor has a value of about 0.3 μH to about 0.5 μH.   The matching circuit according to claim 1, wherein the outer coil input circuit includes a second capacitor.   4. The matching circuit of claim 3, wherein the second capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.   The matching circuit according to claim 1, wherein the outer coil output circuit includes a second capacitor.   The matching circuit of claim 5, wherein the second capacitor has a value of about 80 pF to about 120 pF.   The power input circuit is coupled between a second capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and between the second capacitor and the second inductor. Connected third capacitor, a second node defined between the second capacitor and the third capacitor, and a fourth node coupled between the second node and ground. The matching circuit according to claim 1, further comprising a capacitor. The second capacitor has a rating of about 5 pF to about 500 pF;
The third capacitor has a rating of about 50 pF to about 500 pF;
The second inductor has a value of about 0.3 μH to about 0.5 μH;
The matching circuit according to claim 7, wherein the fourth capacitor has a value of about 200 pF to about 300 pF. A power input circuit coupled to an RF source;
An inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit including an inductor and a first capacitor coupled in series with the inductor. The inductor is connected to the power input circuit, the first capacitor is connected to the input terminal of the inner coil, and a first node is between the power input circuit and the inner coil input circuit. Defined by
An inner coil output circuit coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground;
An outer coil input circuit coupled between the first node and an input terminal of the outer coil;
A matching circuit comprising: an outer coil output circuit coupled between an output terminal of the outer coil and a ground point, the outer coil output circuit including a second capacitor having a value greater than 85 pF. The first capacitor has a rating between about 150 pF and about 1500 pF;
The matching circuit of claim 9, wherein the inductor has a value of about 0.3 μH to about 0.5 μH.   The matching circuit according to claim 9, wherein the outer coil input circuit includes a third capacitor.   The matching circuit of claim 11, wherein the third capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.   The power input circuit is coupled between a third capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and between the third capacitor and the second inductor. Connected fourth capacitor, a second node defined between the third capacitor and the fourth capacitor, and a fifth node coupled between the second node and ground. The matching circuit according to claim 9, comprising a capacitor. The third capacitor has a rating of about 5 pF to about 500 pF;
The fourth capacitor has a rating of about 50 pF to about 500 pF;
The second inductor has a value of about 0.3 μH to about 0.5 μH;
The matching circuit of claim 13, wherein the fifth capacitor has a value of about 200 pF to about 300 pF. A power input circuit coupled to an RF source;
An inner coil input circuit coupled between the power input circuit and an input terminal of the inner coil, the inner coil input circuit including an inductor and a first capacitor coupled in series with the inductor. The inductor is connected to the power input circuit, the first capacitor is connected to the input terminal of the inner coil, and a first node is between the power input circuit and the inner coil input circuit. Defined by
An inner coil output circuit coupled between the output terminal of the inner coil and a ground point, the inner coil output circuit defining a direct pass-through connection to ground;
An outer coil input circuit coupled between the first node and an input terminal of the outer coil, the outer coil input circuit including a second capacitor;
A matching circuit comprising: an outer coil output circuit coupled between an output terminal of the outer coil and a ground point, the outer coil output circuit including a third capacitor. The first capacitor has a rating between about 150 pF and about 1500 pF;
The matching circuit of claim 15, wherein the inductor has a value of about 0.3 μH to about 0.5 μH.   The matching circuit of claim 15, wherein the second capacitor is a variable capacitor having a rating of about 150 pF to about 1500 pF.   The matching circuit of claim 15, wherein the third capacitor has a value between about 80 pF and about 120 pF.   The power input circuit is coupled between a fourth capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and between the fourth capacitor and the second inductor. And a sixth node coupled between the second node and a ground point, a second node defined between the fourth capacitor and the fifth capacitor, and a second node defined between the fourth capacitor and the fifth capacitor. The matching circuit according to claim 15, comprising a capacitor. The fourth capacitor has a rating of about 5 pF to about 500 pF;
The fifth capacitor has a rating of about 50 pF to about 500 pF;
The second inductor has a value of about 0.3 μH to about 0.5 μH;
The matching circuit of claim 19, wherein the sixth capacitor has a value between about 200 pF and about 300 pF.