JP2013236118A - Audio signal processing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an audio signal processing device that prevents the generation of a noise sound when a voltage supplied from a power supply drops.SOLUTION: An audio signal processing device 1 comprises: a reduced voltage detection section 3; an amplifier 5; a time constant switching circuit 6; and capacitors 7, 8. The reduced voltage detection section 3 outputs a low level reset signal to a reset signal line 21 when detecting a drop in voltage. The time constant switching circuit 6 connects the capacitor 8 to a time constant setting line 25 when a voltage of a switching control line 26 becomes a low level. The switching control line 26 is connected to the reset signal line 21. When the reduced voltage detection section 3 detects a drop in voltage, the low level reset signal brings the voltage of the switching control line 26 to a low level to instruct the time constant switching circuit 6 to connect the capacitor 8 to the time constant setting line 25. This switches a soft muting time for the amplifier 5 to complete soft muting to a time shorter than a normal soft muting time.

Description

  The present invention relates to an audio signal processing apparatus for use in, for example, a television receiver and the like to output audio through a speaker.

  Conventionally, an audio signal processing apparatus includes an amplifier that amplifies an audio signal, and the audio signal is amplified by the amplifier and output to a speaker. Some of these audio signal processing apparatuses perform a process called soft mute. Soft mute is a process of gradually reducing the output level of an audio signal to a predetermined level (the predetermined level is a level at which sound output from a speaker cannot be heard, for example, 0). Soft mute is performed, for example, when switching between a state in which sound based on an audio signal output from a tuner is output to a speaker and a state in which sound based on an audio signal output from a DVD loader is output from a speaker. Soft mute is performed by gradually reducing the amplification factor of the audio signal in the amplifier to zero. As such an audio signal processing apparatus, one having the configuration shown in FIG. 3 is known.

  In the audio signal processing device 60 shown in FIG. 3, the power supply circuit 61 is supplied with an AC voltage from the commercial AC power supply 90 via the AC outlet 61 a when the AC outlet 61 a is connected to the commercial AC power supply 90. A drive voltage for operating the audio signal processing device 60 is generated from the AC voltage thus generated. The drive voltage generated by the power supply circuit 61 is supplied to each unit of the audio signal processing device 60. When the power reduction detection unit 62 detects a decrease in the voltage supplied from the commercial AC power supply 90, it indicates that the reset signal line 71 has detected a low level reset signal (a decrease in the voltage supplied from the commercial AC power supply 90). Signal).

  The SoC 63 is obtained by integrating various circuits on one chip, and includes an audio signal processing circuit that processes an audio signal and a control circuit that controls the operation of the audio signal processing device 60. The SoC 63 receives an audio signal from a tuner (not shown) or a DVD loader (not shown), processes the audio signal input from the tuner or the DVD loader, and supplies the audio signal to the audio signal. Output from the terminals 72L and 72R to the audio signal supply lines 73L and 73R. At this time, the SoC 63 uses a predetermined voltage (eg, 1.65v) as a reference level of the audio signal as an audio signal output from the audio signal supply terminals 72L and 72R, and outputs an audio signal having the reference level as the amplitude center. . The audio signals output from the audio signal supply terminals 72L and 72R are input to the audio signal input terminals 76L and 76R of the amplifier 64 through the filters 74L and 74R and the capacitors 75L and 75R.

  The amplifier 64 amplifies the audio signal input to the audio signal input terminals 76L and 76R (adjusts the output level of the audio signal), and the amplified audio signal is output from the audio signal output terminals 77L and 77R to the audio signal output line 78L. , 78R. The audio signals output from the audio signal output terminals 77L and 77R are supplied to the speakers 79L and 79R, and the audio is output from the speakers 79L and 79R.

  The SoC 63 outputs a high level mute signal from the mute signal output terminal 81 to the mute signal line 82 when the amplifier 64 performs soft mute. The mute signal output from the mute signal output terminal 81 to the mute signal line 82 is inverted in voltage level by the inversion circuit 83. Therefore, the high level mute signal output from the mute signal output terminal 81 to the mute signal line 82 passes through the inverting circuit 83 to become a low level mute signal and is input to the mute signal input terminal 84 of the amplifier 64. The

  When a low level mute signal is input to the mute signal input terminal 84, the amplifier 64 performs soft mute on the audio signal input to the audio signal input terminals 76L and 76R, and from the audio signal output terminals 77L and 77R. The output level of the output audio signal is gradually reduced to a predetermined level. At this time, the amplifier gradually reduces the output level of the audio signal to a predetermined level over a soft mute time. The soft mute time is the time from when the output level of the audio signal is gradually reduced when soft mute is performed until the predetermined level is reached, and is the time from the start to the completion of soft mute. The soft mute time is determined based on the voltage input to the time constant setting terminal 85, that is, the capacitance of the capacitor 86 connected to the time constant setting terminal 85.

  On the other hand, when a drop in power supply voltage is detected, a power interruption detection circuit unit that outputs a power off detection signal to the CPU, and when a power off detection signal is input from the power interruption detection circuit unit, the audio signal processing circuit unit And a CPU that outputs a mute processing control signal. When the instantaneous interruption detection circuit unit detects a drop in power supply voltage, the CPU outputs a mute process control signal to the audio signal processing circuit unit, thereby outputting a sound. There is known an audio signal processing apparatus that can perform the mute process (see, for example, Patent Document 1).

JP-A-4-220093

  By the way, in the above-described conventional power supply circuit 60, when the voltage supplied from the commercial AC power supply 90 decreases, for example, when the AC outlet 61a is disconnected from the commercial AC power supply 90, the reset signal input terminal 87 of the SoC 63 has a low level. RESET signal is input, and the SoC 63 stops operating. When the SoC 63 stops operating as described above, the voltage output from the audio signal supply terminals 72L and 72R becomes 0v, and the voltage output from the mute signal output terminal 81 also becomes 0v (low level).

  At this time, the input voltage to the audio signal input terminals 76L and 76R of the amplifier 64 sharply decreases, and as a result, a pop sound (noise sound) is output from the speakers 79L and 79R. When the voltage supplied from the commercial AC power supply 90 decreases, the drive voltage supplied from the power supply circuit 61 to the inverting circuit 83 also decreases, and the inverting circuit 83 does not operate. As a result, the voltage input to the mute signal input terminal 84 of the amplifier 64 becomes 0v (low level) (a low level mute signal is input to the mute signal input terminal 84), and the amplifier 64 performs soft mute. It will be. However, since it takes time until the soft mute is completed (until the output level of the audio signal is set to a predetermined level), the pop sound is output from the speakers 79L and 79R without being muted by the soft mute. End up. In addition, even if the content of an indication is applied to patent document 1 mentioned above, said problem cannot be solved.

  The present invention has been made to solve the above-described problem, and an object of the present invention is to provide an audio signal processing device capable of preventing noise noise from being generated when the voltage supplied from a power supply is reduced. And

  To achieve the above object, the invention of claim 1 includes a soft mute means for gradually attenuating the audio output of an audio signal based on a time constant selected from at least two time constants, and a power source. A power reduction detection unit that detects a decrease in supplied power, and the time constant is selected so that when the power reduction detection unit detects a decrease in supply power, the time constant is smaller than before the detection. And a soft mute time constant selecting means.

  According to a second aspect of the present invention, in the audio signal processing device according to the first aspect, the soft mute means and the soft mute are output using a signal output when the power reduction detection means detects a decrease in the supplied power. Time constant selection means is executed.

  According to a third aspect of the present invention, in the audio signal processing device according to the first aspect, the audio signal input terminal of the amplifier to which the audio signal is input when the power reduction detection unit detects a decrease in the supplied power. It further includes intermediate potential means for setting the intermediate potential.

  According to a fourth aspect of the present invention, there is provided an audio signal processing device, wherein a power supply circuit unit that receives power supply and generates a predetermined drive voltage, and a power reduction unit that detects a decrease in the drive voltage output from the power supply circuit unit. A detection unit, a control unit that outputs an audio signal, an amplification unit that inputs the audio signal output from the control unit and amplifies the audio signal, and an amplified audio signal that is connected to the amplification unit An audio output unit for outputting a signal, and a time constant selecting unit connected to the amplifying unit for selecting a predetermined time constant from at least two or more time constants, wherein the amplifying unit includes the time Soft mute means for gradually attenuating the audio output of the audio signal based on the time constant selected by a constant selection unit, wherein the time constant selection unit includes the power reduction detection unit When a drop in drive voltage is detected Selecting the time constant such that the smaller time constant than the previous said detection, an audio signal processing apparatus.

  According to the first to fourth aspects of the present invention, when the voltage supplied from the power source decreases, the soft mute time is switched to a time shorter than the normal soft mute time. Thereby, even if the signal supplied from the power source is reduced and a signal causing noise is input to the audio signal input terminal of the amplifier, it is possible to prevent the generation of noise.

1 is an electric circuit diagram showing a schematic configuration of an audio signal processing device according to a first embodiment of the present invention. The electric circuit diagram which shows schematic structure of the audio | voice signal processing apparatus which concerns on the 2nd Embodiment of this invention. The electric circuit diagram which shows the structure of the conventional audio | voice signal processing apparatus.

Hereinafter, an audio signal processing device according to an embodiment of the present invention will be described with reference to the drawings.
<First Embodiment>
First, the audio signal processing apparatus according to the first embodiment will be described. FIG. 1 shows the configuration of an audio signal processing apparatus according to the first embodiment. The audio signal processing apparatus 1 is an apparatus for outputting audio through speakers 10L and 10R, for example, used in a television receiver. The audio signal processing device 1 includes a power supply circuit 2, a power reduction detection unit 3, an SoC 4, an amplifier 5, a time constant switching circuit 6, capacitors 7, 8 and a transistor 9.

  The power supply circuit 2 is a circuit that receives power supply and generates a predetermined drive voltage, and is a circuit that generates a drive voltage for operating the audio signal processing device 1. When the AC outlet 2a is connected to the commercial AC power supply 90, the power supply circuit 2 is supplied with an AC voltage from the commercial AC power supply 90 via the AC outlet 2a, and generates a drive voltage from the supplied AC voltage. The drive voltage generated by the power supply circuit 2 is supplied to each part of the audio signal processing device 1.

  The power reduction detection unit 3 detects a decrease in voltage supplied from the commercial AC power supply 90 (drive voltage output from the power supply circuit 2). The power reduction detection unit 3 detects whether or not the voltage supplied from the commercial AC power supply 90 has decreased, and a reset signal indicating the detection result (whether or not the voltage supplied from the commercial AC power supply 90 has decreased). Is output to the reset signal line 21. That is, when the voltage reduction circuit unit 5 has not detected a drop in the voltage supplied from the commercial AC power supply 90, it outputs a high level reset signal to the reset signal line 21 (the voltage output to the reset signal line 21). When a drop in voltage supplied from the commercial AC power supply 90 is detected, a low level reset signal (a signal indicating that a drop in voltage supplied from the commercial AC power supply 90 has been detected) is detected on the reset signal line 21. (The voltage output to the reset signal line 21 is set to low level).

  The SoC 4 is obtained by integrating various circuits on one chip, and includes an audio signal processing circuit that processes an audio signal and a control circuit that controls the operation of the audio signal processing apparatus 1. The SoC 4 has audio signal supply terminals 41L and 41R, a mute signal output terminal 42, and a reset signal input terminal 43. The audio signal supply terminals 41L and 41R are connected to the audio signal supply lines 22L and 22R. The mute signal output terminal 42 is connected to the mute signal line 23. The reset signal input terminal 43 is connected to the reset signal line 21. A control unit is configured by SoC4.

  The SoC 4 receives an audio signal from a tuner (not shown) or a DVD loader (not shown), processes an audio signal input from the tuner or the DVD loader, and supplies the audio signal to the audio signal. Output from the terminals 41L and 41R to the audio signal supply lines 22L and 22R. The SoC 4 outputs a digital audio signal as an audio signal output from the audio signal supply terminals 41L and 41R. In addition, the SoC 4 uses a predetermined voltage (eg, 1.65v) as a reference level of the audio signal as an audio signal output from the audio signal supply terminals 41L and 41R, and outputs an audio signal having the reference level as the amplitude center. That is, the voltage output from the audio signal supply terminals 41L and 41R is maintained at a predetermined voltage (the reference level of the audio signal) when the level of the audio signal is 0, and is predetermined when the level of the audio signal is not 0. The voltage has an amplitude (fluctuates up and down) according to the level of the audio signal around the voltage (reference level of the audio signal).

  Filters 11L and 11R and capacitors 12L and 12R are connected to the audio signal supply lines 22L and 22R. The filter 11L is connected on the audio signal supply line 22L between the audio signal supply terminal 41L and the capacitor 12L. The filter 11R is connected on the audio signal supply line 22R between the audio signal supply terminal 41R and the capacitor 12R. The digital audio signals output from the audio signal supply terminals 41L and 41R become analog audio signals by the filters 11L and 11R, and the DC fluctuation component is cut by the capacitors 12L and 12R.

  The SoC 4 outputs a mute signal for controlling soft mute by the amplifier 5 from the mute signal output terminal 42 to the mute signal line 23. Soft mute is a process of gradually reducing the output level of an audio signal to a predetermined level (the predetermined level is a level at which sound output from the speakers 10L and 10R cannot be heard, for example, 0). is there. Soft mute is, for example, when switching between a state in which sound based on the sound signal output from the tuner is output to the speakers 10L and 10R and a state in which sound based on the sound signal output from the DVD loader is output from the speakers 10L and 10R. Done.

  The SoC 4 outputs a low level mute signal from the mute signal output terminal 42 (the voltage output from the mute signal output terminal 42 is set to a low level) when the amplifier 5 does not perform soft mute, and the amplifier 5 performs soft mute. When performing the above, the mute signal output terminal 42 outputs a high level mute signal (the voltage output from the mute signal output terminal 42 is set to the high level).

  An inversion circuit 13 is connected on the mute signal line 23. The voltage level of the mute signal output from the mute signal output terminal 42 to the mute signal line 23 is inverted by the inversion circuit 13. Therefore, the low level mute signal output from the mute signal output terminal 42 to the mute signal line 23 passes through the inverting circuit 13 to become a high level mute signal, and is output from the mute signal output terminal 42 to the mute signal line 23. The high level mute signal thus passed through the inversion circuit 13 becomes a low level mute signal.

  The SoC 4 operates when a high level reset signal is input to the reset signal input terminal 43 (when the voltage input to the reset signal input terminal 43 is high level), and performs processing of an audio signal, An audio signal is output from the signal supply terminals 41L and 41R, a mute signal is output from the mute signal output terminal 42, and the like. The SoC 4 stops the operation when a low level reset signal is input to the reset signal input terminal 43 (when the voltage input to the reset signal input terminal 43 becomes low level), The audio signal output from the audio signal supply terminals 41L and 41R, the mute signal output from the mute signal output terminal 42, and the like are stopped. When the SoC 4 stops operating, the voltage output from the audio signal supply terminals 41L and 41R becomes 0v, and the voltage output from the mute signal output terminal 42 also becomes 0v (low level).

  The amplifier 5 is an amplifying unit that receives the audio signal output from the SoC 4 and amplifies the audio signal, and adjusts the output level of the audio signal output to the speakers 10L and 10R. The amplifier 5 has audio signal input terminals 51L and 51R, audio signal output terminals 52L and 52R, a mute signal input terminal (control signal input terminal) 53, and a time constant setting terminal 54. The mute signal input terminal 53 is a control signal input terminal for executing soft mute means. The audio signal input terminals 51L and 51R are connected to the audio signal supply lines 22L and 22R. The audio signal output terminals 52L and 52R are connected to the audio signal output lines 24L and 24R. The mute signal input terminal 53 is connected to the mute signal line 23. The time constant setting terminal 54 is connected to the time constant setting line 25.

  The amplifier 5 amplifies (adjusts the output level of the audio signal) the audio signals input to the audio signal input terminals 51L and 51R from the audio signal supply lines 22L and 22R, and the amplified audio signals are output to the audio signal output terminal 52L. , 52R to the audio signal output lines 24L, 24R. The audio signal output lines 24L and 24R are connected to the speakers 10L and 10R. The speakers 10L and 10R are audio output units that are connected to the amplifier 5 via audio signal output lines 24L and 24R and output an amplified audio signal. The audio signal output from the audio signal output terminals 52L and 52R is supplied to the speakers 10L and 10R, and the audio based on the audio signal output from the audio signal output terminals 52L and 52R is output from the speakers 10L and 10R.

  The amplifier 5 is input to the audio signal input terminals 51L and 51R when a high level mute signal is input to the mute signal input terminal 53 (when the voltage input to the mute signal input terminal 53 is high level). Soft mute is not performed on the recorded audio signal. That is, when a high level mute signal is input to the mute signal input terminal 53, the amplifier 5 amplifies the audio signal input to the audio signal input terminals 51L and 51R with a predetermined amplification factor and amplifies the amplified signal. The audio signal is output from the audio signal output terminals 52L and 52R.

  The amplifier 5 receives a low level mute signal (a signal for instructing to perform soft mute) from the mute signal line 23 to the mute signal input terminal 53 (a voltage inputted to the mute signal input terminal 53 is applied). When the level is low), the audio signal input to the audio signal input terminals 51L and 51R is soft-muted. That is, when a low level mute signal is input to the mute signal input terminal 53, the amplifier 5 gradually reduces the output level of the audio signal output from the audio signal output terminals 52L and 52R to a predetermined level.

  The amplifier 5 performs soft mute by gradually reducing the amplification factor of the audio signal to zero. That is, when a low level mute signal is input to the mute signal input terminal 53, the amplifier 5 gradually decreases the amplification factor of the audio signal to 0, and the audio input to the audio signal input terminals 51L and 51R. The signal is amplified at the amplification factor (amplification factor gradually decreasing to 0), and the amplified audio signal is output from the audio signal output terminals 52L and 52R. At this time, the amplifier 5 gradually reduces the output level of the audio signal to a predetermined level based on the voltage input from the time constant setting line 25 to the time constant setting terminal 54 (the amplification factor of the audio signal is increased). Gradually reduce it to 0). The amplifier 5 has soft mute means for gradually attenuating the audio output of the audio signal based on the time constant selected by the time constant selection unit. The soft mute means gradually attenuates the audio output of the audio signal based on a time constant selected from at least two time constants.

  The time constant switching circuit 6 is a circuit for selectively connecting one of the capacitor 7 and the capacitor 8 to the time constant setting line 25, and sets a soft mute time when the amplifier 5 performs soft mute. It is a circuit for doing. The soft mute time is the time from when the output level of the audio signal is gradually reduced to the predetermined level when soft mute is performed (from when the amplification factor of the audio signal is reduced to 0). .

  The time constant switching circuit 6 is connected between the time constant setting line 25 and the capacitors 7 and 8. The time constant switching circuit 6 has a switching control terminal 59. The switching control terminal 59 is a control signal input terminal for executing the soft mute time constant selection means. In the time constant switching circuit 6, the switching control line 26 is connected to the switching control terminal 59, and the capacitor 7 and the capacitor are connected to the time constant setting line 25 according to the voltage input from the switching control line 26 to the switching control terminal 59. Connect one of the eight. That is, the time constant switching circuit 6 connects the capacitor 7 to the time constant setting line 25 when the voltage input from the switching control line 26 is at a high level. The time constant switching circuit 6 connects the capacitor 8 to the time constant setting line 25 when the voltage input from the switching control line 26 is at a low level.

  The amplifier 5 is a circuit that connects the time constant setting terminal 54 to the ground via a resistor (resistance in the amplifier 5) (that is, the capacitor 7 or the capacitor 8 connected to the time constant setting line 25 is connected to the time constant setting line. 25, a time constant setting terminal 54, and a circuit that discharges through a resistor).

  The amplifier 5 connects the time constant setting terminal 54 to the ground via a resistor when soft mute is started (when a low level mute signal is input to the mute signal input terminal 53). As a result, the capacitor 7 or the capacitor 8 connected to the time constant setting line 25 is discharged through the time constant setting line 25, the time constant setting terminal 54, and the resistor, and the time constant setting line 25 to the time constant setting terminal 54 are discharged. The voltage input to the voltage gradually decreases with time. The capacitors 7 and 8 are charged at a predetermined timing when soft mute is not performed, and are kept charged when soft mute is not performed.

  In the soft mute, the amplifier 5 reduces the output level of the audio signal at the same rate as that of the voltage input to the time constant setting terminal 54 based on the voltage input to the time constant setting terminal 54. (Reduce the amplification factor of the audio signal). As a result, the output level of the audio signal gradually decreases to a predetermined level over a period of time from when the capacitor 7 or the capacitor 8 connected to the time constant setting line 25 starts discharging until the discharging is completed. (The amplification factor of the audio signal gradually decreases to 0).

  That is, the soft mute time when the amplifier 5 performs the soft mute (the time from when the output level of the audio signal starts to gradually decrease until it reaches the predetermined level) is the capacitor 7 connected to the time constant setting line 25. Or it corresponds to the time from the start of the discharge of the capacitor 8 to the completion of the discharge. Here, the time from the start of the discharge of the capacitor 7 or the capacitor 8 connected to the time constant setting line 25 to the completion of the discharge is the time of the capacitor 7 or the capacitor 8 connected to the time constant setting line 25. It is determined by the time constant determined from the capacitance and the resistance value of the resistor. The time constant varies depending on the capacitance of the capacitor 7 or the capacitor 8 connected to the time constant setting line 25. Therefore, the soft mute time when the amplifier 5 performs soft mute differs depending on whether the capacitor 7 or the capacitor 8 is connected to the time constant setting line 25.

  That is, the soft mute time when the amplifier 5 performs soft mute is set to a different time depending on which of the capacitor 7 and the capacitor 8 is connected to the time constant setting line 25. Then, the amplifier 5 performs soft mute by the set soft mute time (over the set soft mute time, the output level of the audio signal is gradually reduced to a predetermined level).

  The capacitance of the capacitor 8 is smaller than the capacitance of the capacitor 7, and the time constant when the capacitor 8 is connected to the time constant setting line 25 is connected to the time constant setting line 25. It is smaller than the time constant. Therefore, the soft mute time set by connecting the capacitor 8 to the time constant setting line 25 is shorter than the soft mute time set by connecting the capacitor 7 to the time constant setting line 25. The switching control line 26 is connected to the reset signal line 21.

  The transistor 9 inputs a high level voltage to the inverting circuit 13 connected to the mute signal line 23 (regardless of the control from the SoC 4) when the voltage supplied from the commercial AC power supply 90 decreases. belongs to. The transistor 9 is a PNP-type junction transistor, the emitter is connected to the voltage input line 27, the collector is connected to the signal line 28 at the time of power reduction, and the base is connected to the transistor control line 29. . The voltage input line 27 is connected to the power supply line 20a (a line to which the drive voltage generated by the power supply circuit 2 is supplied). The power reduction signal line 28 is connected to the mute signal line 23 between the mute signal output terminal 42 of the SoC 4 and the inverting circuit 13. The transistor control line 29 is connected to the reset signal line 21.

  In such a configuration, during normal times (when the power reduction detection unit 3 has not detected a drop in the voltage supplied from the commercial AC power supply 90), a high-level reset signal (the power reduction detection unit 3 is connected to the commercial AC power source 90). A signal output when a drop in voltage supplied from the power supply 90 is not detected is input from the reset signal line 21 to the time constant switching circuit 6 via the switching control line 26. That is, the voltage input from the switching control line 26 to the time constant switching circuit 6 is at a high level. As a result, the time constant switching circuit 6 connects the capacitor 7 to the time constant setting line 25, and the soft mute time is set as the soft mute time by connecting the capacitor 7 to the time constant setting line 25. Yes. The soft mute time set by connecting the capacitor 7 to the time constant setting line 25 is the normal soft mute time. That is, at the normal time, the soft mute time is set to the normal soft mute time by using a high level reset signal.

  At the time of power reduction (when the power reduction detection unit 3 detects a decrease in the voltage supplied from the commercial AC power supply 90), a low level reset signal (the power reduction detection unit 3 is supplied from the commercial AC power supply 90). Is output from the reset signal line 21 via the switching control line 26 to the time constant switching circuit 6. That is, the voltage input from the switching control line 26 to the time constant switching circuit 6 becomes a low level. Thereby, the time constant switching circuit 6 connects the capacitor 8 to the time constant setting line 25 (from the state where the capacitor 7 is connected to the time constant setting line 25 to the state where the capacitor 8 is connected to the time constant setting line 25. As a soft mute time, the soft mute time due to the connection of the capacitor 8 to the time constant setting line 25 is set. The soft mute time set by connecting the capacitor 8 to the time constant setting line 25 is the soft mute time when the power is reduced. As described above, the soft mute time set by connecting the capacitor 8 to the time constant setting line 25 is greater than the soft mute time set by connecting the capacitor 7 to the time constant setting line 25. Also short. Therefore, the soft mute time during power reduction is shorter than the normal soft mute time. That is, at the time of power reduction, the soft mute time is switched to a time shorter than the normal soft mute time by using a low level reset signal. The time constant switching circuit 6, the capacitors 7 and 8, and the switching control line 26 constitute a soft mute time constant selection means. The soft mute time constant selection means selects the time constant so that the time constant becomes smaller than before detection when the power reduction detection unit 3 detects a decrease in the supplied power. The time constant switching circuit 6, the capacitors 7 and 8, and the switching control line 26 constitute a time constant selection unit. The time constant selection unit is connected to the amplifier 5 and selects a predetermined time constant from at least two time constants. The time constant selection unit selects the time constant so that the time constant becomes smaller than before detection when the power reduction detection unit 3 detects a decrease in the drive voltage.

  In a normal state, a high level reset signal is input from the reset signal line 21 to the base of the transistor 9 via the transistor control line 29. That is, the voltage input from the transistor control line 29 to the base of the transistor 9 is at a high level. Thereby, the transistor 9 is turned off (non-conducting state), and the signal line 28 at the time of power reduction is disconnected from the voltage input line 27 (from the power supply line 20a). Therefore, when a low level mute signal is output from the mute signal output terminal 42 of the SoC 4, a high level mute signal is input to the mute signal input terminal 53 of the amplifier 5 through the inverting circuit 13 and the mute signal of the SoC 4. When a high level mute signal is output from the output terminal 42, a low level mute signal (a signal to command soft mute) is input to the mute signal input terminal 53 of the amplifier 5 through the inverting circuit 13. The In other words, normally, soft mute control by SoC 4 is enabled using a high-level reset signal.

  When the power is reduced, a low level reset signal is input from the reset signal line 21 to the base of the transistor 9 via the transistor control line 29. That is, the voltage input from the transistor control line 29 to the base of the transistor 9 becomes low level. As a result, the transistor 9 is turned on (conductive state), and the signal line 28 at the time of power reduction is connected from the voltage input line 27 (from the power supply line 20a). Accordingly, the voltage from the power supply line 20a is input to the inverting circuit 13 via the voltage input line 27, the power-down signal line 28, and the mute signal line 23, and is output from the mute signal output terminal 42 of the SoC 4 ( Regardless of the voltage, the mute signal input terminal 53 of the amplifier 5 is supplied with a low level mute signal (a signal to command soft mute). That is, when power is reduced, a low level mute signal (a signal to command soft mute) is applied to the mute signal input terminal 53 of the amplifier 5 using a low level reset signal (regardless of control from the SoC 4). Is input and soft mute is performed by the amplifier 5. The transistor 9, the voltage input line 27, the power-down signal line 28, and the transistor control line 29 constitute a power-down soft mute execution means.

  A signal using a signal output when the power reduction detection unit 3 detects a decrease in the supplied power is input to the time constant setting terminal 54 (of the soft mute unit). A signal output when the power reduction detection unit 3 detects a decrease in the supplied power is input to the switching control terminal 59 (of the soft mute time constant selecting means) of the time constant switching circuit 6. The soft mute and the soft mute time constant are selected using a signal output when the power reduction detection unit 3 detects a decrease in supply power.

  According to the audio signal processing apparatus 1 of the present embodiment, when the voltage supplied from the commercial AC power supply 90 decreases, the soft mute time is switched to a time shorter than the normal soft mute time. As a result, the voltage supplied from the commercial AC power supply 90 decreases, and even if a signal that causes noise noise is input to the audio signal input terminals 51L and 51R of the amplifier 5, noise noise is prevented from being generated. be able to.

  Moreover, according to the audio signal processing apparatus 1 of the present embodiment, when the voltage supplied from the commercial AC power supply 90 decreases, the mute signal input terminal 53 of the amplifier 5 receives a low level mute signal (soft mute is applied) by the reset signal. A signal for instructing to perform) is input, and the amplifier 5 performs soft mute. As a result, even if the voltage supplied from the commercial AC power supply 90 decreases and the soft mute control by the SoC 4 becomes impossible, the soft mute is performed by the amplifier 5 to prevent the noise from being generated. it can.

<Second Embodiment>
Next, an audio signal processing device according to the second embodiment will be described. FIG. 2 shows a configuration of an audio signal processing device according to the second embodiment. The audio signal processing apparatus 1 according to the present embodiment does not include the transistor 9 in the first embodiment. The audio signal processing apparatus 1 according to the present embodiment further includes switches 14L and 14R and a voltage dividing circuit 15 in addition to the configuration of the first embodiment. Other configurations and other operations in the present embodiment are the same as those in the first embodiment.

  The switches 14L and 14R are for disconnecting the audio signal supply lines 22L and 22R when the voltage supplied from the commercial AC power supply 90 decreases. The switch 14L is connected on the audio signal supply line 22L between the filter 11L and the capacitor 12L. The switch 14R is connected on the audio signal supply line 22R between the filter 11R and the capacitor 12R. The switches 14L and 14R are connected to the switch control line 31, and open and close (switch between a non-conduction state and a conduction state) according to a voltage input from the switch control line 31. That is, the switches 14L and 14R are closed (become conductive) when the voltage input from the switch control line 31 is high level, and are opened when the voltage input from the switch control line 31 is low level ( Non-conducting state).

  The voltage dividing circuit 15 is for setting the audio signal input terminals 51L and 51R of the amplifier 5 to an intermediate potential when the audio signal supply lines 22L and 22R are disconnected. The intermediate potential is a voltage at the amplitude center level of the audio signal input to the audio signal input terminals 51L and 51R in a normal state (a voltage at the reference level of the audio signal, and is input when the level of the audio signal is 0). Voltage (eg, 1.65 V).

  The voltage dividing circuit 15 has resistors 16, 17, 18, and 19. One end of the resistor 16 is connected to the power supply line 20b (the line to which the drive voltage generated by the power supply circuit 2 is supplied), and the other end is connected to the audio between the capacitor 12L and the audio signal input terminal 51L of the amplifier 5. It is connected to the signal supply line 22L. One end of the resistor 17 is connected to the audio signal supply line 22L between the capacitor 12L and the audio signal input terminal 51L of the amplifier 5, and the other end is connected to the ground. One end of the resistor 18 is connected to the power supply line 20b, and the other end is connected to the audio signal supply line 22R between the capacitor 12R and the audio signal input terminal 51R of the amplifier 5. The resistor 19 has one end connected to the audio signal supply line 22R between the capacitor 12R and the audio signal input terminal 51R of the amplifier 5, and the other end connected to the ground.

  The resistance value of the resistor 16 and the resistance value of the resistor 17 are the same. The resistance value of the resistor 18 and the resistance value of the resistor 19 are the same. The power supply line 20b is supplied with a voltage (for example, 3.3v) having a voltage value that is twice the intermediate potential (the amplitude center level of the audio signal) as the drive voltage.

  In such a configuration, during normal times (when the power reduction detection unit 3 has not detected a drop in the voltage supplied from the commercial AC power supply 90), a high-level reset signal (the power reduction detection unit 3 is connected to the commercial AC power source 90). A signal output when a drop in voltage supplied from the power supply 90 is not detected is input from the reset signal line 21 to the switches 14L and 14R via the switch control line 31. That is, the voltage input from the switch control line 31 to the switches 14L and 14R is at a high level. As a result, the switches 14L and 14R are closed and the audio signal supply lines 22L and 22R are connected. The audio signal output from the audio signal supply terminals 41L and 41R of the SoC 4 is the audio signal input terminal 51L of the amplifier 5. , 51R. That is, in a normal state, a high-level reset signal is used to enable input of audio signals to the audio signal input terminals 51L and 51R of the amplifier 5.

  At the time of power reduction (when the power reduction detection unit 3 detects a decrease in the voltage supplied from the commercial AC power supply 90), a low level reset signal (the power reduction detection unit 3 is supplied from the commercial AC power supply 90). The signal output when the voltage drop is detected is input from the reset signal line 21 to the switches 14L and 14R via the switch control line 31. That is, the voltage input from the switch control line 31 to the switches 14L and 14R becomes a low level. As a result, the switches 14L and 14R are opened, the audio signal supply lines 22L and 22R are disconnected, and the audio signals output from the audio signal supply terminals 41L and 41R of the SoC 4 are input to the audio signal input terminals 51L and 51R of the amplifier 5. Is cut off. That is, at the time of power reduction, the input of the audio signal to the audio signal input terminals 51L and 51R of the amplifier 5 is blocked using the low level reset signal.

  At the time of power reduction, the switches 14L and 14R are opened by the low level reset signal, and the audio signal supply lines 22L and 22R are disconnected, so that the voltage input to the audio signal input terminal 51L of the amplifier 5 is The voltage supplied to the power line 20b is divided by the resistors 16 and 17, and the voltage input to the audio signal input terminal 51R of the amplifier 5 is the voltage supplied to the power line 20b. The voltage divided by 19 is obtained. As a result, the audio signal input terminals 51L and 51R of the amplifier 5 are set to the intermediate potential (the amplitude center level of the audio signal input at the normal time). That is, at the time of power reduction, the audio signal input terminals 51L and 51R of the amplifier 5 are set to an intermediate potential using a low level reset signal. The switches 14L and 14R, the switch control line 31, and the voltage dividing circuit 15 constitute intermediate potential input means. The intermediate potential input means sets the audio signal input terminals 51L and 51R of the amplifier (amplifier 5) to which the audio signal is input to an intermediate potential when the power reduction detection unit 3 detects a decrease in supply power.

  According to the audio signal processing apparatus 1 of the present embodiment, as in the first embodiment, when the voltage supplied from the commercial AC power supply 90 decreases, the soft mute time is shorter than the normal soft mute time. Is switched to. As a result, the voltage supplied from the commercial AC power supply 90 decreases, and even if a signal that causes noise noise is input to the audio signal input terminals 51L and 51R of the amplifier 5, noise noise is prevented from being generated. be able to.

  In addition, according to the audio signal processing device 1 of the present embodiment, the input of the audio signal to the audio signal input terminals 51 </ b> L and 51 </ b> R of the amplifier 5 is blocked, so that the signal that causes the noise sound is the audio of the amplifier 5. Input to the signal input terminals 51L and 51R can be prevented, and generation of noise can be prevented. Further, since the audio signal input terminals 51L and 51R of the amplifier 5 are set to an intermediate potential, it is possible to prevent a signal that causes noise noise from being input to the audio signal input terminals 51L and 51R of the amplifier 5, Generation of noise noise can be prevented.

  In addition, this invention is not restricted to the structure of said each embodiment, A various deformation | transformation is possible. For example, in the first and second embodiments described above, the soft mute time may be switched to a time shorter than the normal soft mute time when power is reduced by other configurations. In the second embodiment, similarly to the first embodiment, a low level mute signal is input to the mute signal input terminal of the amplifier using a low level reset signal at the time of power reduction. It may be. In the second embodiment, the voltage dividing resistor may be disconnected from the power supply line at normal times. In addition, the present invention is not limited to a television receiver, and can be applied to electric devices such as a DVD recorder and a personal computer.

DESCRIPTION OF SYMBOLS 1 Audio | voice signal processing apparatus 2 Power supply circuit 2a AC outlet 3 Reduced voltage detection part 4 SoC
5 Amplifier 6 Time constant switching circuit 7 Capacitor 8 Capacitor 9 Transistor 10L, 10R Speaker 11L, 11R Filter 12L, 12R Capacitor 13 Inverting circuit 14L, 14R Switch 15 Voltage dividing circuit 16, 17, 18, 19 Resistance 20a, 20b Power supply line 21 Reset signal line 22L, 22R Audio signal supply line 23 Mute signal line 24L, 24R Audio signal output line 25 Time constant setting line 26 Switching control line 27 Voltage input line 28 Power-down signal line 29 Transistor control line 31 Switch control line 41L, 41R Audio signal supply terminal 42 Mute signal output terminal 43 Reset signal input terminal 51L, 51R Audio signal input terminal 52L, 52R Audio signal output terminal 53 Mute signal input terminal (control signal) Input terminal)
54 Time constant setting terminal 59 Switching control terminal

Claims (4)

Soft mute means for gradually attenuating the audio output of the audio signal based on a time constant selected from at least two time constants;
A power reduction detection means for detecting a decrease in power supplied from a power source;
An audio signal processing apparatus comprising: a soft mute time constant selection unit that selects the time constant so that the time constant becomes smaller than that before the detection when the power reduction detection unit detects a decrease in the supplied power.   2. The soft mute means and the soft mute time constant selection means are executed using a signal output when the power reduction detection means detects a decrease in the supplied power. Audio signal processing device.   And further comprising an intermediate potential input means for setting the audio signal input terminal of the amplifier to which the audio signal is input to an intermediate potential when the power reduction detection means detects a decrease in the supplied power. The audio signal processing device according to claim 1. An audio signal processing device,
A power supply circuit unit that receives power supply and generates a predetermined drive voltage;
A power reduction detection unit for detecting a decrease in the drive voltage output from the power supply circuit unit;
A control unit for outputting an audio signal;
An input unit that inputs the audio signal output from the control unit and amplifies the audio signal;
An audio output unit connected to the amplifying unit for outputting the amplified audio signal;
A time constant selecting unit connected to the amplifying unit for selecting a predetermined time constant from at least two time constants;
The amplifying unit further includes soft mute means for gradually attenuating the audio output of the audio signal based on the time constant selected by the time constant selecting unit,
The said time constant selection part is an audio | voice signal processing apparatus which selects the said time constant so that it may become a time constant smaller than before the said detection, when the said power reduction detection part detects the fall of the said drive voltage.

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