JP2013229544A - Composite substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a composite substrate having a high-performance semiconductor layer.
A support substrate 10 made of an insulating single crystal, a semiconductor layer 20 made of a single crystal overlaid on an upper surface 10a of the support substrate 10, and a space between the support substrate 10 and the semiconductor layer 20 are provided. The composite substrate 1 includes an intermediate layer 30 which is mainly composed of an oxide containing an element constituting the semiconductor layer 20 and has lower crystallinity than the semiconductor layer 20.
[Selection] Figure 1

Description

  The present invention relates to a composite substrate having a semiconductor layer.

In recent years, in order to improve the performance of semiconductor devices, development of techniques for reducing parasitic capacitance has been promoted. As a technique for reducing this parasitic capacitance, there is an SOS (Silicon On Sapphire) structure. As a method of forming this SOS structure, for example, there is a technique described in Patent Document 1. Moreover, as a method for bonding substrates made of different materials, there is a technique described in Patent Document 2, for example.

JP 2003-31781 A JP 2004-343369 A

  However, in the technique described in Patent Document 1, a trace amount of metal contained in sapphire diffuses to the silicon side which is a functional layer of the semiconductor element, and there is a risk of adversely affecting the operation of the semiconductor element. Further, in the technique described in Patent Document 2, when an ion beam or a neutron beam is irradiated to activate the bonding surface, there is a possibility that a metal floating in the chamber of the bonding apparatus is mixed into the bonding interface. For this reason, even when the technique described in Patent Document 2 is applied when forming the SOS structure, the metal may diffuse to the silicon side that is the functional layer of the semiconductor element, and may adversely affect the operation of the semiconductor element. It was.

  The present invention has been conceived under the above circumstances, and an object of the present invention is to provide a composite substrate in which mixing of metals into a semiconductor layer is suppressed.

  In an embodiment of the composite substrate of the present invention, a support substrate made of an insulating single crystal, a semiconductor layer made of a single crystal overlaid on the upper surface of the support substrate, and between the support substrate and the semiconductor layer The main component is a positioned oxide containing an element constituting the semiconductor layer, and an intermediate layer having lower crystallinity than the semiconductor layer.

  ADVANTAGE OF THE INVENTION According to this invention, the composite substrate which has a semiconductor layer which suppressed metal diffusion can be provided.

(A) is a top view which shows schematic structure of the composite substrate which concerns on one Embodiment of this invention, (b) is the fragmentary sectional view which looked at the composite substrate. (A)-(c) is sectional drawing which shows an example of the manufacturing process of the manufacturing method of the composite substrate shown in FIG. (A)-(c) is sectional drawing which shows the manufacturing process after FIG. (A), (b) is sectional drawing which shows the modification of a manufacturing process. It is principal part sectional drawing which shows the modification of the composite substrate shown in FIG. (A), (b) is sectional drawing which shows the manufacturing process of an electronic component following FIG. 3, respectively.

  An example of an embodiment of a composite substrate of the present invention will be described with reference to the drawings. FIG. 1A is a schematic plan view showing an example of a composite substrate 1 according to one embodiment of the present invention, and FIG. 1B is a partial sectional view of the composite substrate 1 in perspective.

  The composite substrate 1 includes a support substrate 10, a semiconductor layer 20, and an intermediate layer 30.

  The support substrate 10 supports the semiconductor layer 20 positioned on the support substrate 10 and can be freely selected as long as it is a single crystal having strength and flatness. As a material constituting the support substrate 10, an aluminum oxide single crystal (sapphire), a silicon carbide substrate, or the like can be used. In the present embodiment, sapphire is employed as the support substrate 10.

  Examples of the thickness of the support substrate 10 include a range of 400 to 800 [μm]. Moreover, it is preferable that arithmetic mean roughness Ra of the main surface 10a located in the semiconductor layer 20 side of the support substrate 10 shall be 1 nm or less.

  The semiconductor layer 20 has one main surface 20 b superimposed on one main surface 10 a of the support substrate 10. The material of the semiconductor layer 20 may be a single crystal semiconductor material. For example, Si or Ge can be used. In the present embodiment, Si single crystal is used as the semiconductor layer 20.

As thickness of the semiconductor layer 20, the range of 30 nm-200 nm is mentioned, for example. Further, the dopant concentration of the semiconductor layer 20 is, for example, one of a relatively low concentration of p ⁻ and n ⁻ dopant, and non-doped. Examples of the p ⁻ dopant concentration include a range of 1 × 10 ¹⁶ [atoms / cm ³ ] or less. Examples of the n ⁻ dopant concentration include a range of 5 × 10 ¹⁵ [atoms / cm ³ ] or less. What is referred to as “non-doped silicon” herein is silicon that is simply not doped with the intention of impurities, and is not limited to intrinsic silicon that does not contain impurities. The oxygen concentration in the semiconductor layer 20 is not particularly limited, but will be described later in detail, but is preferably less than 1 × 10 ¹⁸ [atoms / cm ³ ].

The intermediate layer 30 is located between the support substrate 10 and the semiconductor layer 20. One main surface of the intermediate layer 30 is directly bonded to the support substrate 10, and the other main surface is directly bonded to the semiconductor layer 20. The intermediate layer 30 is mainly composed of an oxide containing an element constituting the semiconductor layer 20. In this example, silicon oxide (SiO ₂ ) is the main component. The intermediate layer 30 is lower than the crystallinity of the semiconductor layer 20.

  The intermediate layer 30 is polycrystalline or amorphous. The thickness of the intermediate layer 30 is not particularly limited, but the maximum value is set so that the amount of metal that may be mixed due to the bonding between the support substrate 10 and the semiconductor layer 20 described later can be dissolved. . However, the melting point of silicon oxide is about 1700 degrees, and even if a metal described later is present at the interface between the intermediate layer 30 and the support substrate 10, the elements constituting the intermediate layer 30 react with the metal and promote diffusion. I will not let you. For this reason, the maximum thickness is not necessarily required. Further, when the thickness of the intermediate layer 30 is 200 nm or more, there is a fear that the heat dissipation characteristics are deteriorated due to the presence of the intermediate layer 30. For this reason, the thickness of the intermediate layer 30 may be about 10 nm, for example. More preferably, it is 5 nm or less.

Further, it is preferable that the amount of oxygen per unit volume of the intermediate layer 30 is smaller than the amount of oxygen of the support substrate 10.

  By setting the composite substrate 1 to such a configuration, it is possible to prevent impurities from diffusing or precipitating in the semiconductor layer 20. The reason will be described in detail below.

  In the composite substrate 1, when the support substrate 10 and the semiconductor layer 20 are bonded, impurities such as metal are mixed in the bonding interface, or impurities such as metal added in a small amount on the support substrate 10 side are present on the semiconductor layer 20 side. There is a risk of diffusion and precipitation. The presence of such a metal may cause a malfunction when an element function portion that functions as a semiconductor element is formed in the semiconductor layer 20. Therefore, it is important that the semiconductor layer 20 is not diffused / deposited even if impurities such as metals are present.

  In the composite substrate 1, an intermediate layer 30 is provided. The intermediate layer 30 is made of the same material system as the elements constituting the semiconductor layer 20. That is, it is a silicon oxide layer. Silicon oxide has a high melting point, and even if a metal is present, it does not bind to the metal and promote diffusion of the metal. For this reason, even if a metal exists at the interface between the support substrate 10 and the intermediate layer 30, the metal can be held between the support substrate 10 and the intermediate layer 30, and as a result, the metal to the semiconductor layer 20 can be retained. Diffusion can be suppressed.

  The crystallinity of the intermediate layer 30 is lower than that of the single crystal semiconductor layer 20 and the support substrate 10. For this reason, even if a metal exists, it is not diffused to the semiconductor layer 20 side, but is diffused and dissolved in the intermediate layer 30 through the grain boundary or the like.

  Here, the crystallinity evaluation of the intermediate layer 30 is confirmed by, for example, observing or performing electron beam diffraction using a transmission electron microscope (TEM) after cross-sectional processing by focused ion beam (FIB) processing. do it. Moreover, you may measure by Rutherford backscattering (RBS).

Furthermore, the oxygen concentration of the semiconductor layer 20 is less than 1 × 10 ¹⁸ [atoms / cm ³ ]. With such a configuration, the diffusion, solid solution, and precipitation of metal in the semiconductor layer 20 is suppressed. In particular, when the metal is Fe, generation of OSF defects can be suppressed.

  Further, since the amount of oxygen per unit volume of the intermediate layer 30 is smaller than that of the support substrate 10, it is possible to suppress the bonding between the metal and oxygen and to suppress the movement accompanying the diffusion of the metal.

  As described above, according to the composite substrate 1, it is possible to provide a substrate having the high-quality semiconductor layer 20 in which impurities such as metals are prevented from diffusing into the semiconductor layer 20.

(Modified example of composite substrate: intermediate layer)
Instead of the intermediate layer 30 described above, an intermediate layer 30A having an oxygen concentration distribution in the thickness direction may be used.

The intermediate layer 30A has an oxygen concentration that decreases in the thickness direction from the support substrate 10 toward the semiconductor layer 20 side. Metals have a lower binding energy for binding to oxygen than that for the elements constituting the semiconductor layer 20. For example, when Si and Fe constituting the semiconductor layer 20 are taken as an example, the eutectic temperature of Si—Fe is 660 ° C., and these bonds require heating, whereas the bond of Fe—O. Proceeds even at room temperature. Here, in the intermediate layer 30A, the metal is bonded to oxygen in the intermediate layer 30A without diffusing to the semiconductor layer 20 side, and is held inside the intermediate layer 30A. Further, since the intermediate layer 30A also decreases as the oxygen concentration approaches the semiconductor layer 20 side, no metal remains at the interface between the semiconductor layer 20 and the intermediate layer 30A, and the intermediate layer 30A is supported in the thickness direction of the intermediate layer 30. Metal can be held on the substrate 10 side.

(Modified example of composite substrate: intermediate layer)
Instead of the intermediate layer 30 described above, an intermediate layer 30B further containing a metal element may be used.

Examples of metal elements include Fe, Cr, Ni, Cu, and Zn. Here, as the metal element, the main component elements constituting the support substrate 10 and the semiconductor layer 20 are excluded. The content may be, for example, less than 1 × 10 ¹⁵ [atoms / cm ² ].

  In the intermediate layer 30B, the concentration of the metal element decreases in the thickness direction from the support substrate 10 side toward the semiconductor layer 20 side. With such a configuration, diffusion of the metal element toward the semiconductor layer 20 can be reliably prevented.

(Production method of composite substrate)
Next, a method for manufacturing the composite substrate 1 shown in FIG. 1 will be described with reference to the drawings.

First, as shown in FIG. 2A, a first substrate 20X made of silicon (Si) is prepared. The first substrate 20X is formed by forming a Si film 20Xb obtained by epitaxially growing Si on the upper surface (in the direction D2 in the figure) of the single crystal silicon substrate 20Xa. A part of the Si film 20Xb becomes a later semiconductor layer 20. As this epitaxial growth method, while the single crystal silicon substrate 20Xa is heated, a gaseous silicon compound is passed through the surface of the single crystal silicon substrate 20Xa to thermally decompose and grow (thermal CVD). Various methods such as (method) can be adopted. Since this Si film 20Xb is epitaxially grown on the silicon substrate, lattice defects can be reduced as compared with the case where it is epitaxially grown on the sapphire substrate. In addition, since the epitaxial growth is performed in a vacuum, the oxygen content in the film can be kept extremely low as compared with a silicon substrate formed by the Cz method. Specifically, the oxygen concentration can be less than 10 ¹⁸ [atoms / cm ³ ]. This oxygen concentration is 1/10 or less compared to a silicon substrate formed by the CZ method. Actually, it has been confirmed that the oxygen concentration is less than 3 × 10 ¹⁷ [atoms / cm ³ ].

Here, the dopant concentration of the Si film 20Xb is not particularly limited. For example, the Si film 20Xb is formed to have any one of a relatively low concentration of p ⁻ and n ⁻ dopant and non-doped. Examples of the p ⁻ dopant concentration include a range of 1 × 10 ¹⁶ [atoms / cm ³ ] or less. Examples of the n ⁻ dopant concentration include a range of 5 × 10 ¹⁵ [atoms / cm ³ ] or less. The dopant concentration of the Si film 20Xb decreases as the distance from the single crystal silicon substrate 20Xa decreases, and the dopant concentration is such that the surface opposite to the side in contact with the single crystal silicon substrate 20Xa becomes a fully depleted layer.

  The thickness of the Si film 20Xb is not particularly limited, but may be about 2 μm, for example.

Next, as shown in FIG. 2B, an intermediate layer 30 made of silicon oxide is formed on the upper surface of the Si film 20Xb in the D2 direction. As the intermediate layer 30, for example, an atomic layer deposition (ALD) method, a sputtering method, or the like that does not require heating the substrate at a high temperature during film formation is used. A specific upper limit of the film formation temperature is preferably a temperature that does not change the dopant concentration distribution in the Si film 20Xb, and is set to 500 ° C. or lower. When the film is formed by the ALD method or the sputtering method, since the substrate temperature is about 200 ° C. to 400 ° C., the dopant concentration distribution in the Si film 20Xb is not changed. In particular, when B is used as the dopant, it is difficult to diffuse as compared with the case where other elements are used as the dopant. Therefore, the change in the dopant concentration distribution due to film formation can be suppressed more reliably.

  In this example, the film is formed by the ALD method. Specifically, tetraethyl oscillosilicate containing silicon as a raw material, silicon tetrachloride, silicon hexachloride, TEOS, alkylsilane, alkoxysilane, aminosilane, fluorinated alkoxysilane, halogen silane and other metal raw material gases, and oxygen as a raw material The intermediate layer 30 is formed by alternately flowing an oxygen supply gas such as water vapor and ozone gas to the surface of the substrate and purging with an inert gas such as Ar between the gases.

  Note that the crystallinity of the intermediate layer 30 is not particularly limited, and may be a polycrystal or an amorphous material that has lower crystallinity than the Si film 20Xb that will be the semiconductor layer 20 later.

  The thickness of the intermediate layer 30 is not particularly limited, and a range of 100 nm or less can be exemplified, but for example, it may be 30 nm. More preferably, it is 5 nm or less.

  Next, as shown in FIG. 2C, an insulating support substrate 10 made of an aluminum oxide single crystal (sapphire) is prepared.

  Next, the support substrate 10 and the main surface in the D2 direction of the first substrate 20X (main surface located on the side opposite to the single crystal silicon substrate 20Xa) are bonded together. That is, the support substrate 10 and the main surface of the intermediate layer 30 are bonded together. As shown in FIG. 3A, the bonding method includes a method of activating and bonding the surfaces of the surfaces to be bonded, and a method of bonding using electrostatic force. Examples of the method of activating the surface include a method of activating by irradiating an ion beam or a neutron beam in a vacuum and etching the surface, and a method of activating by etching the surface with a chemical solution.

  And as shown in FIG.3 (b), both are bonded together in this activated state. You may perform this joining under normal temperature. This joining is based on a method that does not use an adhesive such as a resin.

  When joining by this joining method, it is preferable that the intermediate layer 30 and the support substrate 10 have a small surface roughness to be joined. This surface roughness is represented by arithmetic mean roughness Ra, for example. Examples of the range of the arithmetic average roughness Ra include less than 10 nm. More preferably, it is 1 nm or less. By reducing the arithmetic average roughness, the pressure applied when joining each other can be reduced.

  In this way, when the bonding surfaces are activated and then brought into contact with each other and bonded at room temperature in particular, even if metal is present on the bonding surface, diffusion and solid solution of the metal is prevented. There is no promotion. Further, since the surfaces are joined by activating them, the support substrate 10 and the intermediate layer 30 are not joined by a dehydration reaction as in a so-called SOI substrate. For this reason, the void of the joining interface resulting from a dehydration reaction does not occur. Moreover, the structure which absorbs the water which arises by a dehydration reaction is not required. As described above, metal diffusion into the semiconductor layer 20 can be prevented, and the reliability of bonding between the semiconductor layer 20 and the support substrate 10 can be increased.

  Through the steps so far, an intermediate product having the intermediate layer 30 and the Si film 20Xb between the support substrate 10 and the single crystal silicon substrate 20Xa can be obtained.

  Next, the intermediate product is processed from the arrow D1 direction side (single crystal silicon substrate 20Xa side), and as shown in FIG. 3C, the single crystal silicon substrate 20Xa is removed to expose the Si film 20Xb. As a processing method for removing the single crystal silicon substrate 20Xa, for example, various methods such as abrasive polishing, chemical etching, and ion beam etching can be adopted, and a plurality of methods may be combined. At this time, together with the single crystal silicon substrate 20Xa, a part of the Si film 20Xb may be removed in the thickness direction.

  Here, as the silicon single crystal substrate 20Xa, one having a high dopant concentration is used, and an etchant in which the etching rate at the dopant concentration of the silicon single crystal substrate 20Xa is significantly different from the etching rate at the dopant concentration of the Si film 20Xb is used. It is preferable to remove the silicon single crystal substrate 20Xa. In this case, the productivity is increased, and even if the waviness of the support substrate 10 is large, a uniform thickness can be left in the main surface 10a of the support substrate 10.

After removing the silicon single crystal substrate 20Xa, the upper surface in the D1 direction of the Si film 20Xb can be precisely polished to improve the thickness uniformity. Examples of the etching means used for this precise etching include dry etching. This dry etching includes a chemical reaction and a physical collision. Examples of utilizing chemical reactions include reactive gases (gas), ions and ion beams, and those utilizing radicals. Examples of the etching gas used for the reactive ions include sulfur hexafluoride (SF ₆ ) and carbon tetrafluoride (CF ₄ ). Moreover, what uses an ion beam is mentioned as a thing by physical collision. One using this ion beam includes a method using a gas cluster ion beam (GCIB). By scanning the substrate with a movable stage while etching a narrow region using these etching means, precise etching can be performed satisfactorily even for a large-area material substrate.

  The portion of the Si film 20Xb remaining after such a process is used as the semiconductor layer 20. Through the above-described steps, the composite substrate 1 in which the intermediate layer 30 and the semiconductor layer 20 are sequentially stacked on the support substrate 10 can be obtained.

  Through these steps, the surface of the semiconductor layer 20 formed by epitaxial growth on the support substrate 10 side is a non-doped depletion layer and has a low oxygen concentration. That is, the strain on the surface of the semiconductor layer 20 on the support substrate 10 side is extremely small. Such a configuration is preferable because stress or the like due to unintentional strain is not added to the surface on the bonding side with the support substrate 10.

  Further, the composite substrate 1 formed through the above-described steps is a part of the semiconductor layer 20 between the support substrate 10 and the semiconductor layer 20, particularly on the semiconductor layer 20 side, like a conventional SOI substrate. There is no SiOx layer (oxide layer) formed by thermally oxidizing the part. Also from this, the semiconductor layer 20 can suppress the generation of unintentional stress necessary for forming the SiOx layer, the generation of interstitial Si, and the like, thereby improving the quality of the semiconductor layer 20. it can.

In the above-described steps, the step of cleaning the substrate or the like is not specified, but the substrate may be cleaned as necessary. Examples of the substrate cleaning method include various methods such as cleaning using ultrasonic waves, cleaning using an organic solvent, cleaning using chemicals, and cleaning using O ₂ ashing. These cleaning methods may be employed in combination.

By setting it as such a process, the area | region with a possibility that a metal may mix can be limited to the interface of the support substrate 10 and the intermediate | middle layer 30. FIG. That is, it can be limited to a metal that may be mixed into the bonding interface with the bonding surface activated when the support substrate 10 and the intermediate layer 30 are bonded. For this reason, the presence of the intermediate layer 30 can suppress metal diffusion into the semiconductor layer 20.

(Modification: Intermediate layer 30B)
In the intermediate layer 30B, the metal atom density per unit surface area of the metal element in the region near the surface on the support substrate 10 side is preferably 10 ¹² atoms / cm ² or less. More specifically, the metal atom density is preferably 10 ¹² atoms / cm ² or less on the surface of the intermediate layer 30 on the side of the support substrate 10 having the lowest metal atom concentration. With such a density, the metal element does not cover one main surface of the support substrate 10 and one main surface of the semiconductor layer 20, and constitutes one main surface of the support substrate 10 and one main surface of the semiconductor layer 20. The atomic arrangement of the elements to be exposed is exposed.

  Here, the density of the metal element refers to the number of atoms per unit surface area. Actually, a part of the intermediate layer 30B and the semiconductor layer 20 on the support substrate 10 is dissolved in a constant volume etching solution by ICP-MS (Inductively Coupled Plasma Mass Spectrometry), and the metal atoms of The amount is measured, and the density in the plane direction is obtained assuming that the total amount is within 5 nm from the interface. Such an assumption is that, as a result of observing and measuring the distribution state of the metal element in the thickness direction for a plurality of composite substrates obtained according to the present embodiment, even when the amount of metal is the largest, it is between the support substrate 10 and the intermediate layer 30B. This is because it has been confirmed that it is present in the region of 5 nm or less and is hardly diffused to the semiconductor layer 20 side.

  As described above, the region near the intermediate layer 30B indicates a region within 5 nm in the thickness direction from the surface on the support substrate 10 side. In the following description, the density of metal atoms constituting the metal element may be simply referred to as the density of the metal element or the density of the metal atoms.

Then, by setting the abundance density of the metal element to 10 ¹² atoms / cm ² or less, it is possible to suppress the occurrence of a metal element precipitate at the interface while maintaining the bonding for the first time. This mechanism will be described in detail. In order to control the density of metal elements to be low, a neutron beam (FAB gun) is used in the activation process, the atmosphere at the time of bonding is set to a high vacuum, or the components disposed in the vacuum are insulated. It can be adjusted by covering with.

When metal elements are aggregated between the support substrate 10 and the semiconductor layer 20, when the semiconductor element is formed in the semiconductor layer 20, the operation of the semiconductor element may be adversely affected. Such agglomeration of the metal element is naturally performed when the metal element is provided in the form of a layer or an island at the interface (for example, the density of the metal element at the interface is about 3.0 × 10 ¹⁶ atoms / cm ² or more). is a problem that is assumed when more than about 3.0 × be less than ^{10 16 atoms / cm 2 10 12 atoms} / cm 2 , the confirm its existence be dispersed in the bonding surface during joining Even if it is not possible, metal atoms aggregate in the process of applying a heat treatment for forming a semiconductor element. However, by setting it to 10 ¹² atoms / cm ² or less, it is possible to prevent the metal atoms from aggregating even if the composite substrate 1 is subjected to heat treatment.

Although the mechanism is not clear, it is considered that the solid solubility of the metal atoms with respect to the elements constituting the semiconductor layer 20 is related. That is, by setting the density of the metal atoms to 10 ¹⁰ atoms / cm ² or more and 10 ¹² atoms / cm ² or less, the density is not such that they contact each other to form an aggregate, and the mobility is low at room temperature. Aggregates are not formed during bonding. In addition, even if heat treatment is applied to increase the mobility, the metal atoms are present only about 10 times the solid solubility in such a density, and even in this state, aggregates are formed. It is thought that there is no.

  Furthermore, the majority of the metal atoms constituting the metal element are dissolved in the element constituting the intermediate layer 30 </ b> B, and the remaining metal atoms do not exist in an amount that promotes diffusion in the semiconductor layer 20.

Further, in the case where the semiconductor layer 20 is made of Si and contains Fe as a metal element, OSF defects rapidly increase with this value as a boundary when the density exceeds 10 ¹² atoms / cm ² . There is a lattice defect as a cause of the OSF defect, and using this defect as a foothold, a compound of Fe and O may move and precipitate on the surface to become an OSF defect. The threshold value of the amount of Fe that causes the OSF defect coincides with the upper limit value of the density of the metal element in the present embodiment.

  Although there is no direct relationship between OSF defects and metal agglomeration, there is a common term between them when focusing on the phenomenon that metal atoms move, agglomerate and precipitate in the semiconductor layer. Therefore, when the factors of the presence of defects and the bonding between metal (Fe) and oxygen, which are the causes of OSF defects, are examined, the composite substrate 1 of the present embodiment is configured such that the intermediate layer 30B and the support substrate 10 are separated from each other. Since the bonding surface is activated and a dangling bond is formed to perform direct bonding, the dangling bond may remain as a defect at the bonding interface. Further, due to heat treatment for forming a semiconductor element after bonding, the metal element and the element constituting the semiconductor layer 20 or the support substrate 10 may form an intermetallic compound at the bonding interface. These two assumptions, that is, the presence of a defect at the interface and a metal element forming an intermetallic compound at the same time, have both the causes of OSF defects. From this, in the composite substrate 1 of the present embodiment, the metal element may move and precipitate based on the interface defect as in the case of the OSF defect generated when Fe moves and precipitate based on the defect. It suggests. From the above, it is presumed that the diffusion / aggregation of the metal element can be suppressed by setting the density of the metal element to be equal to or lower than the threshold value at which the OSF defect occurs.

  Since the existence density of such a metal element is realized on the surface on the side of the support substrate 10 having the highest concentration, the diffusion of the metal element can be surely prevented and the semiconductor layer 20 can be prevented from being affected. .

In particular, it is preferable that the oxygen concentration in the intermediate layer 30B decreases as it approaches the semiconductor layer 20 as in the intermediate layer 30A and decreases to less than 10 ¹⁸ atoms / cm ^3, which is the oxygen concentration of the semiconductor layer 20. In the case of such a configuration, it becomes difficult to combine with oxygen in order to promote diffusion and movement, and diffusion of metal to the semiconductor layer 20 side can be suppressed more reliably. Thus, when a semiconductor element is formed on the composite substrate 1, it is possible to provide a composite substrate having an OSF defect and a highly reliable semiconductor layer.

The lower limit value of the density of the metal element is not particularly limited, but is an amount necessary for bonding the support substrate 10 and the semiconductor layer 20 at room temperature. Specifically, when the density of the metal element at the time of bonding is 10 ¹⁰ atoms / cm ² or more, it is confirmed that the bonding strength equivalent to that in the case of bonding with a large amount of metal according to Japanese Patent No. 4162094 can be secured. doing.

  As described above, according to the present modification, it is possible to provide the composite substrate 1 having the semiconductor layer 20 in which metal diffusion is suppressed and having sufficient bonding strength between the support substrate 10 and the semiconductor layer 20.

(Modification: Support substrate)
It is preferable to use the R surface of the sapphire substrate as the support substrate 10. By using the R plane, a large amount of Al, which is a metal atom, can be exposed on the intermediate layer 30, 30A, 30B side. As a result, unintentional supply of oxygen to the intermediate layers 30, 30 </ b> A, and 30 </ b> B can be suppressed, and the bonding ratio between Al and Si, which are metal atoms, can be increased by a subsequent heating process or the like. Bonding can be realized.

(Modification: Metal element of intermediate layer 30B)
In the intermediate layer 30B, the metal element preferably forms metal silicide or metal oxide. For example, SiFeOx, AlFeOx, etc. can be illustrated.

  In order for the metal atoms constituting the metal element to exist as intermetallic compounds such as metal silicide and metal oxide, the semiconductor layer 20 is formed by performing a heat treatment at 500 ° C. or higher for 0.5 hours or longer after the bonding step. Or an element constituting the support substrate 10.

Here, since the composite substrate 1 has a metal amount (metal amount in a region in the vicinity of the intermediate layer 30B) existing at the bonding interface between the intermediate layer 30B and the support substrate 10 of 10 ¹² atoms / cm ² or less, a metal atom Can be suppressed. For this reason, even if the metal element exists as an intermetallic compound, it remains at the bonding interface between the intermediate layer 30 </ b> B and the support substrate 10. Then, when the metal element forms an intermetallic compound, there are vacancies due to the element constituting the semiconductor layer 20 being supplied to the bond with the metal element, and the element constituting the support substrate 10 is the metal element. As a result of being supplied to the coupling, voids are generated. When this hole becomes a defect and a new impurity is present at the interface, the impurity can be gettered and diffusion into the semiconductor layer 20 can be suppressed.

(Modification: oxide film)
As shown in FIG. 5, in the above embodiment, an oxide film 40 may be formed on the upper surface of the semiconductor layer 20. In other words, the oxide film 40 may be formed on the main surface of the semiconductor layer 20 on the surface opposite to the surface in contact with the intermediate layers 30, 30 </ b> A, 30 </ b> B.

  Such an oxide film 40 may be formed by thermally oxidizing the semiconductor layer 20. As described above, when a part of the semiconductor layer 20 is oxidized to become the oxide film 40, Si is pushed out from the oxide film 40 side to the portion remaining as the semiconductor layer 20 with the volume change, and the oxide film 40 of the semiconductor layer 20. In the region near the side surface, interstitial Si increases, and the density of Si atoms per unit volume increases.

  On the other hand, since the intermediate layers 30, 30 </ b> A, 30 </ b> B between the semiconductor layer 20 and the support substrate 10 are newly formed on the main surface of the semiconductor layer 20, There is no increase in Si atoms in the vicinity of the intermediate layers 30, 30A, 30B. Here, it is known that the presence of interstitial Si becomes a factor for promoting the generation of OSF defects. In the composite substrate 1, the portion in which the metal element causing the OSF defect is mixed is between the support substrate 10 and the semiconductor layer 20, centered between the support substrate 10 and the intermediate layers 30, 30 </ b> A, 30 </ b> B. The generation of OSF defects can be suppressed by reducing the Si atom density per unit volume indicating the interstitial Si concentration in this vicinity as compared with the surface on the oxide film 40 side.

  Further, since the interstitial Si in other parts of the semiconductor layer 20 is less than the vicinity of the surface of the semiconductor layer 20 on the oxide layer 40 side, the semiconductor layer 20 is prevented from being subjected to tensile strain in the crystal structure, and the semiconductor The influence on the carrier mobility of the element can be suppressed.

  Such strain due to interstitial Si or the like can be estimated by forming a semiconductor element in the semiconductor layer 20 and measuring carrier mobility or the like.

The region near the surface in contact with the oxide film 40 of the semiconductor layer 20 refers to a region having a thickness of about 5 nm continuing from the oxide film 40 side to the lower side, and the surface of the semiconductor layer 20 on the side in contact with the intermediate layer 30. The neighboring region refers to a region having a thickness of about 5 nm continuing from the intermediate layer 30 to the upper side.

(Electronic parts)
Note that a plurality of element portions may be formed on the composite substrate 1 of the above-described embodiment and its modification, and the composite substrate 1 may be divided so as to include at least one element portion to form an electronic component.

  Specifically, as shown in FIG. 6A, the element portion 23 is formed from the upper surface side of the semiconductor layer 20 of the obtained composite substrate 1. Examples of the element portion 23 include various semiconductor element structures.

  Next, as illustrated in FIG. 6B, the electronic component 2 is manufactured by separating the composite substrate 1 on which the element portion 23 is formed. When the composite substrate 1 is divided into electronic components 2, at least one element portion 23 is included in one electronic component 2. In other words, one electronic component 2 may include a plurality of element units 23.

  As described above, the electronic component 2 having the element portion 23 can be manufactured.

(Modification of manufacturing method)
In the above manufacturing method, the composite substrate 1 may be manufactured by the following steps. In addition, only the process to change is demonstrated and description is abbreviate | omitted about the process without a change.

  In the above-described steps, the example in which the intermediate layer 30 is formed so as to have lower crystallinity than the semiconductor layer 20 (Si film 20Xb) in FIG. 2B has been described. As described above, the single crystal silicon oxide film 30X is formed on the Si film 20Xb by using the MBE method or the like.

  Then, as shown in FIG. 4B, after activating the surfaces of the support substrate 10 and the silicon oxide film 30X, the surfaces of the activated support substrate 10 and the silicon oxide film 30X are brought into contact with each other at room temperature. By adding, the crystal structure of the single crystal silicon oxide film 30X may be destroyed, and the intermediate layer 30 having low crystallinity may be used.

  By manufacturing in this way, even if a metal is mixed, it can be prevented from diffusing into the silicon oxide film 30X, and the metal can be fixed and confined at the interface between the support substrate 10 and the silicon oxide film 30X.

10 ... support substrate 20 ... semiconductor layer 30 ... intermediate layer

Claims (8)

A support substrate made of an insulating single crystal;
A semiconductor layer made of a single crystal superimposed on the upper surface of the support substrate;
A composite substrate comprising an intermediate layer, which is located between the supporting substrate and the semiconductor layer and contains as a main component an oxide containing an element constituting the semiconductor layer and has lower crystallinity than the semiconductor layer.   The intermediate layer includes a metal element other than the elements constituting the support substrate and the semiconductor layer, and the concentration of the metal element decreases in the thickness direction from the support substrate side toward the semiconductor layer side. The composite substrate according to claim 1.   The composite substrate according to claim 1, wherein the support substrate is made of sapphire, and the semiconductor layer is made of silicon.   The composite substrate according to claim 3, wherein the intermediate layer has an oxygen concentration that decreases in the thickness direction from the support substrate side toward the semiconductor layer side.   The composite substrate according to claim 3, wherein the intermediate layer has an oxygen concentration in the vicinity of the surface on the support substrate side that is higher than that of the support substrate. 3. The composite substrate according to claim 2, wherein in the intermediate layer, the metal element is distributed so that an existing density in a region near the surface on the support substrate side is 1 × 10 ¹² / cm ² or less.   The composite substrate according to claim 6, wherein in the intermediate layer, the metal element is bonded to an element constituting the semiconductor layer or an element constituting the support substrate to form an intermetallic compound. An oxide film mainly comprising an oxide containing an element constituting the semiconductor layer on the upper surface of the semiconductor layer;
4. The semiconductor layer according to claim 3, wherein a density of an element constituting the semiconductor layer is smaller in a region near the surface in contact with the intermediate layer than in a region near the surface in contact with the oxide film. Composite board.

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