JP2013219204A - Core board for wiring board manufacturing and wiring board - Google Patents

Abstract

To provide a core substrate for manufacturing a wiring board excellent in both electrical characteristics and mechanical characteristics.
A core substrate 11 of the present invention includes a substrate body 21, first signal wiring layers 23 and 25, second signal wiring layers 24 and 26, and a through-hole conductor 34. The substrate body 21 includes a central core material 12 and outer core materials 13 and 14 disposed on both sides thereof. The first signal wiring layers 23 and 25 are formed on the core first main surface 15 side, and the second signal wiring layers 24 and 26 are formed on the core second main surface 16 side. The through-hole conductor 34 penetrates the substrate body 21 and electrically connects the first signal wiring layers 23 and 25 and the second signal wiring layers 24 and 26. The central core material 12 is made of an insulating material having better mechanical characteristics than the outer core materials 13 and 14. The outer core materials 13 and 14 are made of an insulating material that has better electrical characteristics than the central core material 12.
[Selection] Figure 1

Description

  The present invention relates to a core substrate for manufacturing a wiring board called a so-called multi-core board composed of a central core material and an outer core material, and a wiring board manufactured using the same.

  In recent years, semiconductor integrated circuit elements (IC chips) used as computer microprocessors and the like have become increasingly faster and more functional, with an accompanying increase in the number of terminals and a tendency to narrow the pitch between terminals. . In general, a large number of terminals are densely arranged on the bottom surface of an IC chip, and such a terminal group is connected to a terminal group on the motherboard side in the form of a flip chip. However, it is difficult to connect the IC chip directly on the mother board because there is a large difference in the pitch between the terminals on the IC chip side terminal group and the mother board side terminal group. For this reason, a method is generally employed in which a semiconductor package is prepared by mounting an IC chip on an IC chip mounting wiring board, and the semiconductor package is mounted on a motherboard.

  As an IC chip mounting wiring board constituting this type of package, a multilayer wiring board in which build-up layers are formed on the front surface and back surface of a core substrate has been put into practical use (for example, see Patent Documents 1 and 2). In this multilayer wiring substrate, for example, a resin substrate (such as a glass epoxy substrate) in which a reinforcing fiber is impregnated with a resin is used as a core substrate. Then, by utilizing the rigidity of the core substrate, a buildup layer is formed by alternately laminating a resin insulating layer and a conductor layer on the front surface and the back surface of the core substrate. That is, in this multilayer wiring board, the core substrate plays a role as a reinforcing material and is formed to be considerably thicker than the build-up layer. In addition, a conductor (specifically, a through-hole conductor or the like) is formed through the core substrate for conduction between buildup layers formed on the front surface and the back surface.

  Also, as a core substrate for manufacturing such a build-up multilayer wiring board, what is called a so-called multi-core substrate configured using a plurality of core materials is conventionally known (see, for example, Patent Document 3). ). This type of core substrate is generally composed of a central core material arranged at the center of the substrate and outer core materials arranged on both sides of the central core material.

JP 2002-151847 A JP 2003-298231 A JP 2007-180211 A

  By the way, in recent years, with the increase in the speed of semiconductor integrated circuit elements, the signal frequency used has become a high frequency band, and it is necessary to reduce the transmission loss of a high frequency signal in order to realize the high speed reliably. However, a conventional general core substrate is configured by using a core material made of an insulating material having rather excellent mechanical characteristics in order to play a role as a reinforcing material. Therefore, such a core substrate does not necessarily have excellent electrical characteristics. Therefore, when a structure in which the signal wiring layer is on the surface layer or the inner layer of the core substrate is adopted, there is a disadvantage that transmission loss of a high-frequency signal flowing through the signal wiring layer becomes large.

  Here, if the core substrate is configured using a core material made of an insulating material having excellent electrical characteristics, the transmission loss of high-frequency signals is reduced, but the mechanical characteristics are also lowered. Therefore, the multilayer wiring board using such a core substrate has a drawback that the entire wiring board is likely to be warped or bent when the IC chip is mounted or mounted on the mother board. That is, since the conventional core substrate was not excellent in both electrical characteristics and mechanical characteristics, a substrate having excellent both characteristics was desired.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a core substrate for manufacturing a wiring board that is excellent in both electrical characteristics and mechanical characteristics. Another object of the present invention is to provide a wiring board that can surely achieve high speed and is less likely to warp or bend.

  And as means (means 1) for solving the above-mentioned problem, the outer core has a core first main surface and a core second main surface, and is arranged on both sides of the center core material and the center core material. A substrate body composed of a material, a first signal wiring layer formed on the core first main surface side, a second signal wiring layer formed on the core second main surface side, and the substrate body In the core substrate having a through-hole conductor that penetrates and electrically connects the first signal wiring layer and the second signal wiring layer, the central core material has more mechanical characteristics than the outer core material. There is a core substrate for manufacturing a wiring board, wherein the core material is made of an excellent insulating material, and the outer core material is made of an insulating material having an electrical property superior to that of the central core material.

  Therefore, according to the invention described in the means 1, the outer core material located in the surface layer portion of the substrate is made of an insulating material having relatively excellent electrical characteristics, so that the first signal wiring layer and the second signal wiring By contacting the layers, transmission loss of high-frequency signals flowing through these signal wiring layers can be reduced. Moreover, since the central core material located in the inner layer portion of the substrate is made of an insulating material having relatively excellent mechanical characteristics, it is possible to impart suitable rigidity to the entire core substrate. Therefore, it is possible to realize a core substrate for manufacturing a wiring board that is excellent in both electrical characteristics and mechanical characteristics.

  The substrate body which is the main body of the core substrate of the present invention has a core first main surface and a core second main surface, and includes a central core material and outer core materials arranged on both sides of the central core material. Composed. The outer core material on one side of the central core material may be a single layer or a plurality of layers. In addition, the number of layers of the outer core material on the core first main surface side and the number of layers of the outer core material on the core second main surface side may be the same or different.

  The core substrate of the present invention is formed on at least the core second main surface on the core first main surface side and at least the first signal wiring layer formed on the core first main surface side on the core second main surface side. The second signal wiring layer is provided. That is, the first signal wiring layer is formed at least on the surface of the outermost core material of the outermost layer on the core first main surface side. The second signal wiring layer is formed at least on the surface of the outermost core material of the outermost layer on the core second main surface side. The first signal wiring layer and the second signal wiring layer may be formed not only on the surface of the outermost core material of the outermost layer but also in the inner layer. Specifically, for example, the first signal wiring layer and the second signal wiring layer may be formed at the interface between the central core material and the outer core material, or formed at the interface between the outer core materials having a plurality of layers. May be. In this case, it is preferable that the first signal wiring layer and the second signal wiring layer in the inner layer are completely surrounded by the outer core material.

  The first signal wiring layer and the second signal wiring layer can be formed using a conductive metal material such as copper, nickel, gold, silver, aluminum, tin, cobalt, titanium, or tungsten. Considering conductivity, cost, processability, etc., the first signal wiring layer and the second signal wiring layer are preferably formed using copper.

  The core substrate of the present invention is different in the characteristics of the insulating materials constituting the central core material and the outer core material.

  The central core material is made of an insulating material having better mechanical properties than the outer core material, for example, an insulating material having a lower coefficient of thermal expansion than the outer core material. This is because if the value of the thermal expansion coefficient is low, thermal expansion and thermal shrinkage that cause warping and bending are less likely to occur. The value of the coefficient of thermal expansion of the central core material is preferably 12 ppm / ° C. or less, and the value of the coefficient of thermal expansion of the entire core substrate is preferably 15 ppm / ° C. or less. In this case, suitable mechanical characteristics required for the core substrate can be surely imparted. In addition, the selection range of the insulating material of the outer core material having excellent electrical characteristics can be widened. The central core material may be made of an insulating material having a higher elastic modulus than the outer core material. The value of the coefficient of thermal expansion of the entire core substrate is more preferably 13 ppm / ° C. or less, and particularly preferably 11 ppm / ° C. or less.

  The outer core material is made of an insulating material having better electrical characteristics than the central core material, for example, an insulating material having a smaller dielectric loss tangent (tan δ) value than the central core material. This is because if the value of the dielectric loss tangent is small, transmission loss of a high-frequency signal flowing through the signal wiring layer is reduced. The value of the dielectric loss tangent of the outer core material (the value of dielectric loss tangent at a frequency of about 1 GHz, the same shall apply hereinafter) is preferably 0.006 or less. In this case, suitable electrical characteristics required for the core substrate can be reliably imparted. Moreover, the range of selection can be widened about the insulating material of the central core material excellent in mechanical characteristics. The outer core material may be made of an insulating material having a smaller dielectric constant than that of the central core material. The value of the dielectric loss tangent of the outer core material is more preferably 0.004 or less, and particularly preferably 0.002 or less.

  Although it does not specifically limit as an insulating material which comprises a center core material and an outer core material, The thing containing a polymeric material and an inorganic material as a component is preferable. Specific examples of the polymer material include those containing EP resin (epoxy resin), PI resin (polyimide resin), BT resin (bismaleimide / triazine resin), PPE resin (polyphenylene ether resin), and the like. . Specific examples of the inorganic material include inorganic fibers such as glass fibers (glass woven fabric and glass nonwoven fabric) and inorganic particles such as fillers made of inorganic oxides (silica filler, titania filler, alumina filler). be able to. That is, an insulating material made of only a polymer material cannot sufficiently reduce the value of the thermal expansion coefficient. Moreover, it is because the insulating material which consists only of an inorganic material may deteriorate insulation, workability, and cost property.

  The thickness of the central core material and the thickness of the outer core material are not particularly limited and can be arbitrarily set. However, at least the thickness of the central core material is larger than the thickness of one layer of the outer core material. Set thick. For example, the thickness of the central core material is preferably set to a thickness equal to or greater than the sum of the thicknesses of the outer core materials. According to this configuration, the value of the coefficient of thermal expansion of the entire core substrate can be easily reduced to a suitable value, and the mechanical characteristics can be reliably improved. It is particularly preferable that the thickness of the central core material is thicker than the total thickness of the outer core materials. In this case, the thickness of the plurality of outer core materials may be equal or different.

  The core substrate of the present invention includes a through-hole conductor that penetrates the substrate body and electrically connects the first signal wiring layer and the second signal wiring layer. When there are a plurality of first signal wiring layers, the through-hole conductors may be electrically connected to each other. Similarly, when there are a plurality of second signal wiring layers, the through-hole conductors may be electrically connected to each other.

  The through-hole conductor is formed in a through-hole forming hole that penetrates the substrate body. When the through hole forming hole is divided into a first region belonging to the central core material and a second region belonging to the outer core material, the surface roughness of the inner peripheral surface of the first region is larger than the surface roughness of the second region. It should be bigger. According to this configuration, the anchor effect in the deep portion of the through hole forming hole is increased, and the adhesion with the conductive material can be improved.

  Further, as another means (means 2) for solving the above-mentioned problem, an insulating layer and a conductor layer are alternately laminated on the main surface on one side or both sides of the core substrate for manufacturing a wiring board described in the above means 1. There is a wiring board characterized in that a laminated wiring portion is formed.

  According to the invention described in the means 2, since the laminated wiring portion is formed by using the core substrate for manufacturing the wiring substrate excellent in both the electrical characteristics and the mechanical characteristics as described above, the high speed can be surely realized. In addition, it is possible to realize a wiring board that is less likely to warp or bend.

  The laminated wiring portion in the wiring board of the present invention refers to a laminate formed by alternately laminating insulating layers and conductor layers. As a preferred example, a resin interlayer insulating layer and a conductor layer are alternately laminated. Examples include build-up layers. The resin interlayer insulating layer constituting the buildup layer is formed using a so-called buildup material. The buildup material is preferably made of an insulating material having an electrical property superior to that of at least the central core material, and particularly made of an insulating material having an electrical property superior to those of the central core material and the outer core material. More preferred. Specifically, it is preferable that the dielectric tangent value be as small as possible. The reason is that even when the signal wiring layer is formed on the core first main surface or the core second main surface, the signal wiring layer is formed by the build-up layer and the outer core material having a low dielectric loss tangent value. This is because it can be surrounded. As a result, transmission loss of high-frequency signals flowing through the signal wiring layer can be reliably reduced.

  Moreover, it is preferable that a resin interlayer insulation layer is formed using the buildup material which has the characteristic that surface roughness is small after roughening. Thereby, the surface roughness of the resin interlayer insulation layer can be suppressed, and the conductor layers can be formed on the resin interlayer insulation layer at a fine pitch. In addition, the buildup material for forming the resin interlayer insulating layer may contain inorganic fibers in the insulating resin material, or may contain both inorganic fillers and inorganic fibers.

1 is a partial schematic cross-sectional view showing a build-up multilayer wiring board according to an embodiment embodying the present invention. The fragmentary schematic sectional drawing for demonstrating the manufacturing method of the core board | substrate which comprises the said buildup multilayer wiring board. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing for demonstrating the manufacturing method of the said core board | substrate. The partial schematic sectional drawing which shows the core board for wiring board manufacture of another embodiment which actualized this invention.

  Hereinafter, an embodiment in which the present invention is embodied in a build-up multilayer wiring board will be described in detail with reference to FIGS.

  As shown in FIG. 1, the build-up multilayer wiring board 1 of the present embodiment includes a core board 11 for manufacturing a wiring board and a first build-up layer formed on the core first main surface 15 of the core board 11. B1 (laminated wiring portion) and a second buildup layer B2 (laminated wiring portion) formed on the core second main surface 16 of the core substrate 11.

  The core substrate 11 of the present embodiment is a member having a substantially rectangular plate shape in plan view, which serves as a support for the first buildup layer B1 and the second buildup layer B2. The core substrate 11 includes a substrate body 21 having a core first main surface 15 and a core second main surface 16. The substrate body 21 is composed of a plurality of types of core materials. More specifically, the substrate body 21 of the present embodiment is composed of a central core member 12 and outer core members 13 and 14 fixedly disposed on both upper and lower sides of the central core member 12.

  A first signal wiring layer 25 made of copper is formed on the surface of the outermost core material 13 of the outermost layer on the core first main surface 15 side of the substrate body 21. A first signal wiring layer 23 made of copper is also formed at the interface between the central core material 12 and the outer core material 13. On the core second main surface 16 side of the substrate body 21, a second signal wiring layer 26 made of copper is formed on the surface of the outermost outer core material 14. A second signal wiring layer 24 made of copper is also formed at the interface between the central core material 12 and the outer core material 14.

  A through hole forming hole 33 is formed in the core substrate 11 so as to penetrate the substrate body 21 in the thickness direction, and a through hole conductor 34 made of copper is formed in the through hole forming hole 33. On the core first main surface 15, the first signal wiring layer 25 is connected to one end of the through-hole conductor 34. On the core second main surface 16, the second signal wiring layer 26 is connected to the other end of the through-hole conductor 34. In the inner layer of the substrate body 21, the first signal wiring layer 23 and the second signal wiring layer 24 are connected to the through-hole conductors 34, respectively. Accordingly, the first signal wiring layers 23 and 25 and the second signal wiring layers 24 and 26 are electrically connected by the through-hole conductor 34. The hollow portion of the through-hole conductor 34 is filled with a resin filler 35, and lid plating portions 36 that close the openings are provided on both end surfaces of the through-hole conductor 34.

  As shown in FIG. 1, the through-hole forming hole 33 is divided into a first region 31 belonging to the central core material 12 and a second region 32 belonging to the outer core materials 13 and 14 for convenience. In the present embodiment, the inner peripheral surfaces of the first region 31 and the second region 32 are both roughened by desmear processing. The surface roughness Ra of the inner peripheral surface of the first region 31 is about 0.8 μm to 1.5 μm, and the surface roughness Ra of the second region 32 is about 0.5 μm to 0.8 μm. Therefore, the former surface roughness Ra is larger than the latter.

  The first buildup layer B1 formed on the core first main surface 15 of the core substrate 11 includes two resin interlayer insulating layers 41 and 43 made of a thermosetting resin (an epoxy-containing resin material), and copper. It has a structure in which the conductive layers 51 are alternately laminated. Terminal pads 59 for mounting IC chips are formed in an array at a plurality of locations on the surface of the second resin interlayer insulation layer 43. Further, the surface of the resin interlayer insulating layer 43 is almost entirely covered with the solder resist 45. Openings for exposing the terminal pads 59 are formed at predetermined positions of the solder resist 45, and solder bumps 57 are provided on the terminal pads 59. When an IC chip (not shown) is arranged on the main surface 2 of the multilayer wiring board 1, IC chip-side terminals are bonded to the solder bumps 57. In addition, via holes are formed at a plurality of locations in the resin interlayer insulating layers 41 and 43, and filled via conductors 53 and 55 made of copper are formed in the via holes. The filled via conductor 53 electrically connects the first signal wiring layer 25 on the core first main surface 15 and the conductor layer 51. The filled via conductor 55 electrically connects the conductor layer 51 and the terminal pad 59.

  The second buildup layer B2 formed on the core second main surface 15 of the core substrate 11 includes two resin interlayer insulating layers 42 and 44 made of a thermosetting resin (an epoxy-containing resin material), and copper. The conductor layers 52 are alternately stacked. BGA terminal pads 60 are formed in an array at a plurality of locations on the surface of the second resin interlayer insulation layer 44. Further, the surface of the resin interlayer insulating layer 44 is almost entirely covered with the solder resist 46. An opening for exposing the terminal pad 60 is formed at a predetermined location of the solder resist 46. A mother board (not shown) is disposed on the back surface 3 side of the multilayer wiring board 1, and in this case, a mother board side terminal is connected to each terminal pad 60. In addition, via holes are formed at a plurality of locations in the resin interlayer insulating layers 42 and 44, and filled via conductors 54 and 56 made of copper are formed in the via holes. The filled via conductor 54 electrically connects the first signal wiring layer 26 on the core second main surface 15 and the conductor layer 52. The filled via conductor 56 electrically connects the conductor layer 52 and the terminal pad 60.

  In the case of the core substrate 11 of the present embodiment, the central core material 12 is formed using a sheet-like resin insulating material obtained by impregnating a glass cloth as a reinforcing material with a resin material containing epoxy. The outer core members 13 and 14 are formed by using a sheet-like resin insulating material (prepreg) obtained by impregnating a glass cloth as a reinforcing material with a PPE resin.

  The central core material 12 used here is a so-called low CTE material having a relatively low coefficient of thermal expansion (CTE). Specifically, in this embodiment, the thermal expansion coefficient of the central core material 12 is about 11 ppm / ° C. to 12 ppm / ° C. Incidentally, the thermal expansion coefficient of the outer core members 13 and 14 is about 15 ppm / ° C., and the thermal expansion coefficient of the core substrate 11 as a whole is about 12 ppm / ° C. to 13 ppm / ° C. That is, the central core material 12 of this embodiment is made of an insulating material having a lower coefficient of thermal expansion than the outer core materials 13 and 14, and has relatively excellent mechanical characteristics. The central core material 12 has a higher elastic modulus than the outer core materials 13 and 14.

  The outer core materials 13 and 14 used here are so-called low-loss materials that have a small transmission loss of electrical signals because the value of the dielectric loss tangent (tan δ) is relatively small. Specifically, in this embodiment, the tan δ of the outer core members 13 and 14 is about 0.001 to 0.003. Incidentally, the value of tan δ of the central core material 12 is about 0.010 to 0.015. That is, the outer core members 13 and 14 of the present embodiment are made of an insulating material having a tan δ value smaller than that of the central core member 12, and are relatively excellent in electrical characteristics. In addition, the outer core materials 13 and 14 of the present embodiment that prioritize the electrical characteristics over the mechanical characteristics are superior to the center core material 12 in workability. More specifically, it is easy to perform hole processing when forming a hole for forming a via hole.

  In this core substrate 11, the thickness of the central core material 12 is about 0.2 mm, and the thicknesses of the outer core materials 13 and 14 are each about 0.1 mm. It is 0.4 mm. The thickness of the central core material 12 is set to a thickness equivalent to the total thickness of the outer core materials 13 and 14.

  The resin interlayer insulating layers 41 to 44 constituting the buildup layers B1 and B2 are inorganic fillers (specifically, 60% by weight in a thermosetting insulating resin material (specifically, epoxy resin)). Is formed using a build-up material containing a silica filler). This build-up material has an tan δ value of about 0.001 to 0.003, is superior in electrical characteristics to the central core material 12, and has an electrical property equivalent to that of the outer core materials 13 and 14. Consists of. That is, the build-up material used in this embodiment is also a low-loss material. In addition, the thickness of this buildup material is about 30 μm to 100 μm.

  As shown in FIG. 1, the first signal wiring layer 25 on the core first main surface 15 is located at the interface between the outer core material 13 and the resin interlayer insulating layer 41, and has four surfaces in the cut surface. All are in contact with low loss materials. In other words, the first signal wiring layer 25 is completely surrounded by the low loss material. The second signal wiring layer 26 on the core second main surface 16 is also located at the interface between the outer core material 14 and the resin interlayer insulating layer 42 and is completely surrounded by the low loss material. The first signal wiring layer 23 located in the inner layer is located at the interface between the outer core material 13 and the central core material 12, and three sides of the cut surface are in contact with the low loss material. The second signal wiring layer 24 located in the inner layer is also located at the interface between the outer core material 14 and the central core material 12, and three surfaces of the cut surface are in contact with the low loss material. That is, the first signal wiring layer 23 and the second signal wiring layer 24 are surrounded by the low loss material although it is incomplete.

  Next, a procedure for manufacturing the core substrate 11 for manufacturing a wiring board according to the present embodiment will be described.

  First, a copper-clad sheet in which a copper foil 61 having a thickness of about 70 μm is pasted on both sides of a sheet-like resin insulating material having a thickness of 0.2 mm (that is, the central core material 12) obtained by impregnating a glass cloth with a resin material containing epoxy. A laminated board is prepared (refer FIG. 2). Next, the copper foil 61 on both sides of the copper clad laminate is patterned by a conventionally known method (here, subtractive method) to form the first signal wiring layer 23 and the second signal wiring layer 24 (see FIG. 3). Although not particularly illustrated, a power source conductor layer and a ground conductor layer may be formed at the same time. Here, two outer core materials 13 and 14 having a thickness of 0.1 mm, which are sheet-like resin insulation materials (prepregs) formed by impregnating a glass cloth with PPE resin, are prepared, and a copper foil 63 having a thickness of 70 μm is prepared. Prepare two. Then, the outer core material 13 and the copper foil 63 are stacked on the front surface side of the central core material 12 after patterning, and the outer core material 14 and the copper foil 63 are stacked on the back surface side. And heat pressurization is performed and the center core material 12, the outer core materials 13, 14 and the copper foil 63 are integrated (refer FIG. 4).

  Next, the substrate body 21 with the copper foil 63 is drilled to form a through-hole forming hole 33 having an inner diameter of about 200 μm that penetrates the front and back of the substrate body 21 (see FIG. 5). At this time, a via hole forming hole (not shown) for exposing the first signal wiring layers 23 and 24 may be formed by performing laser processing on a predetermined position in the outer core members 13 and 14 as necessary.

Next, the desmear process (roughening process) which removes the smear in each through-hole formation hole 33 using etching liquid, such as a potassium permanganate solution, is performed. As the desmear process, in addition to treatment with an etchant, for example it may perform processing of plasma ashing using O ₂ plasma. After this desmear process, as schematically shown in FIG. 6, the inner peripheral surfaces of the first region 31 and the second region 32 of the through-hole forming hole 33 are roughened. At this time, since there is a difference in the etching rate between the insulating material of the central core material 12 and the insulating material of the outer core materials 13 and 14, the surface roughness Ra of the inner peripheral surface of the first region 31 is the second region. It becomes larger than 32 surface roughness Ra.

  Next, through-hole conductors 34 are formed in the through-hole forming holes 33 by performing electroless copper plating and electrolytic copper plating (see FIG. 7). Further, after filling the hollow portion of the through-hole conductor 34 with a resin filler 35 made of epoxy resin or the like, electrolytic copper plating is performed to form a lid plating portion 36 that closes the opening of the through-hole conductor 34 (see FIG. 8). . At this time, a copper plating layer also adheres to the surface of the copper foil 63.

  Next, the copper foil 63 to which the copper plating layer is adhered is patterned by, for example, a subtractive method to form the first signal wiring layer 25 on the core first main surface 15 and the first signal wiring layer 25 on the core second main surface 16. A two-signal wiring layer 26 is formed (see FIG. 9). As a result, the wiring board manufacturing core substrate 11 is completed.

  Subsequently, using the core substrate 11 as a support, the first buildup layer B1 is formed on the core first main surface 15, and the second buildup layer B2 is formed on the core second main surface 16. . Specifically, first, a sheet-like build-up material containing a silica filler in a thermosetting epoxy resin is pasted on the core first main surface 15 and the core second main surface 16, and these are precured. Thus, the first resin interlayer insulating layers 41 and 42 are formed. Next, laser processing is performed to form via holes at predetermined positions of the resin interlayer insulating layers 41 and 42. Then, after the desmear process, electroless copper plating and electrolytic copper plating are performed according to a conventionally known method to form via conductors 53 and 54 in each via hole. Further, etching is performed by a conventionally known method such as a semi-additive method to form conductor layers 51 and 52 on the resin interlayer insulating layers 41 and 42.

  Further, after the second resin interlayer insulating layers 43 and 44 and the respective terminal pads 59 and 60 are formed by the above-described method, a photosensitive epoxy resin is applied onto the resin interlayer insulating layers 43 and 44 and cured. Thus, solder resists 45 and 46 are formed. Thereafter, exposure and development are performed in a state where a predetermined mask is disposed, and openings are patterned in the solder resists 45 and 46. Finally, solder bumps 57 are provided on the main surface 2 side. The build-up multilayer wiring board 1 shown in FIG. 1 is manufactured through the above steps.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) The core substrate 11 in the multilayer wiring board 1 of the present embodiment includes a substrate body 21 configured by a central core material 12 and outer core materials 13 and 14 disposed on both sides of the central core material 12. . First signal wiring layers 23 and 25 are formed on the core first main surface 15 side of the substrate body 21, and second signal wiring layers 24 and 26 are formed on the core second main surface 16 side. The center core material 12 is made of an insulating material having better mechanical characteristics than the outer core materials 13 and 14, and the outer core materials 13 and 14 are insulating materials having better electrical characteristics than the center core material 12. It consists of Moreover, the resin interlayer insulation layers 41-44 which comprise 1st buildup layer B1 and 2nd buildup layer B2 are similarly comprised with the insulating material excellent in the electrical property. In the present embodiment, since the outer core members 13 and 14 located on the substrate surface layer portion are made of an insulating material having relatively excellent electrical characteristics, the first signal wiring layers 23 and 25 and the second signal wirings are formed. By contacting the layers 24 and 26, it is possible to reduce transmission loss of high-frequency signals flowing through the signal wiring layers 23 to 26. Further, since the central core material 12 located in the inner layer portion of the substrate is made of an insulating material having relatively excellent mechanical characteristics, it is possible to impart suitable rigidity to the entire core substrate 11. Therefore, it is possible to realize the wiring board manufacturing core substrate 11 having both excellent electrical characteristics and mechanical characteristics.

  (2) In the core substrate 11 of the present embodiment, the thickness of the central core material 12 is equal to the total thickness of the outer core materials 13 and 14. According to this configuration, the value of the coefficient of thermal expansion of the core substrate 11 as a whole can be easily lowered to a suitable value, and the mechanical characteristics can be reliably improved. Moreover, in this embodiment, since the insulating material of the center core material 12 is an epoxy resin, and the insulating material of the outer core materials 13 and 14 is a PPE resin, the adhesiveness of the interface of both is comparatively good. For this reason, it can be set as the core substrate 11 with high reliability.

  (3) In the core substrate 11 of the present embodiment, the through-hole forming hole 33 in which the surface roughness of the inner peripheral surface of the first region 31 is larger than the surface roughness of the inner peripheral surface of the second region 32 is formed. Yes. A through-hole conductor 34 is formed in the through-hole forming hole 33 by copper plating. According to this structure, the anchor effect in the deep part of the through-hole forming hole 33 is enhanced, and the adhesion with the copper plating layer which is a conductive material can be improved. Therefore, there is an advantage that it is easy to form the highly reliable through-hole conductor 34.

  (4) In the present embodiment, as described above, the core substrate 11 for manufacturing a wiring board having both excellent electrical characteristics and mechanical characteristics is used as a support, and build-up layers B1 and B2 are formed on both sides thereof. Yes. For this reason, it is possible to realize the multilayer wiring board 1 that can surely achieve high speed and is less likely to warp or bend.

  In addition, you may change embodiment of this invention as follows.

  In the above embodiment, only one layer of the outer core material 13 is arranged on the core first main surface 15 side of the central core material 12, and only one layer of the outer core material 14 is arranged on the core second main surface 16 side. However, the present invention is not limited to this. For example, like the core substrate 11A of another embodiment shown in FIG. 10, the outer core members 13 and 71 are arranged on the core first main surface 15 side of the central core member 12, and the outer side on the core second main surface 16 side. You may employ | adopt the structure which has arrange | positioned the core materials 14 and 72. FIG. In the core substrate 11A, the first signal wiring layer 73 is disposed at the interface between the outer core members 13 and 71, and the second signal wiring layer 74 is disposed at the interface between the outer core members 14 and 72. Since both the first signal wiring layer 73 and the second signal wiring layer 74 are completely surrounded by the low loss material, it is possible to reduce the transmission loss of the high-frequency signal flowing through them.

  In the above embodiment, the multilayer wiring board 1 in which no components are built in the core substrates 11 and 11A is illustrated, but a component housing portion is provided in the core substrates 11 and 11A, and chip components such as capacitors are provided there. It may be accommodated.

  The core substrates 11 and 11A of the present invention may include a power source conductor layer and a ground conductor layer in addition to the first signal wiring layers 23 and 25 and the second signal wiring layers 24 and 26. The through-hole conductor 34 may be connected to a different through-hole conductor.

  Next, the technical ideas grasped by the embodiment described above are listed below.

(1) The said means WHEREIN: The said insulating layer which comprises the said laminated wiring part is comprised with the insulating material excellent in the electrical property rather than the said center core material.
(2) In the above means, the insulating layer constituting the laminated wiring portion is made of an insulating material having a dielectric loss tangent smaller than that of the central core material.

DESCRIPTION OF SYMBOLS 1 ... Build-up multilayer wiring board as a wiring board 2, 3 ... Main surface 11, 11A ... Core board for wiring board manufacture 12 ... Central core material 13, 14, 71, 72 ... Outer core material 15 ... Core 1st main surface DESCRIPTION OF SYMBOLS 16 ... Core 2nd main surface 21 ... Board | substrate main body 23, 25 ... 1st signal wiring layer 24, 26 ... 2nd signal wiring layer 31 ... 1st area | region (through-hole formation hole) 32 ... (through-hole formation hole) ) Second region 33... Through hole forming hole 34... Through hole conductor 41, 42, 43, 44... Resin interlayer insulating layer 51, 52... Conductor layer B 1. Layer B2 ... Second buildup layer as laminated wiring section

Claims (7)

A substrate body having a core first main surface and a core second main surface, and comprising a central core material and outer core materials disposed on both sides of the central core material, and the core first main surface A first signal wiring layer formed on the side, a second signal wiring layer formed on the core second main surface side, and the first signal wiring layer and the second signal wiring layer penetrating through the substrate body In a core substrate with a through-hole conductor that electrically connects the
The central core material is made of an insulating material having better mechanical properties than the outer core material, and the outer core material is made of an insulating material having better electrical properties than the central core material. A core board for manufacturing a wiring board.   The central core material is made of an insulating material having a lower coefficient of thermal expansion than the outer core material, and the outer core material is made of an insulating material having a smaller dielectric loss tangent value than the central core material. The core substrate for manufacturing a wiring board according to claim 1.   3. The wiring board manufacturing method according to claim 2, wherein a value of a coefficient of thermal expansion of the central core material is 12 ppm / ° C. or less, and a value of the coefficient of thermal expansion of the entire core substrate is 15 ppm / ° C. or less. Core substrate for use.   4. The core substrate for manufacturing a wiring board according to claim 2, wherein a value of a dielectric loss tangent of the outer core material is 0.006 or less.   The core substrate for manufacturing a wiring board according to any one of claims 1 to 4, wherein the thickness of the central core material is equal to or greater than the sum of the thicknesses of the outer core materials.   The through-hole conductor is formed in a through-hole forming hole penetrating the substrate body, and the through-hole forming hole includes a first region belonging to the central core material and a second region belonging to the outer core material. 6. The wiring board according to claim 1, wherein a surface roughness of an inner peripheral surface of the first region is larger than a surface roughness of the second region. Core substrate for manufacturing.   The laminated wiring part formed by laminating | stacking an insulating layer and a conductor layer alternately on the main surface of the one side or both sides of the core board for wiring board manufacture of any one of Claim 1 thru | or 6 was formed. A characteristic wiring board.

Images