JP2013211600A - Termination resistor adjustment circuit, and termination resistance adjusting method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a termination resistor adjustment circuit for optimally setting a termination resistance value of a transmission path to which plural receiving elements are connected.SOLUTION: In a termination resistor adjustment circuit of a transmission path to which plural elements are connected, each of the plural elements comprises: comparison means 10 for receiving reference signals supplied to the transmission path and comparing a waveform of the received signals with a predetermined reference level; and determination means 17 for determining whether the waveform of the received signals is good or not in light of a preset determination reference according to comparison results of the comparison means. The values of termination resistors are sequentially and variably controlled, and the resistance value when all of the determination results are good is set as a termination resistance value.

Description

  The present invention relates to a termination resistance adjustment circuit and a termination resistance adjustment method, and more particularly to a termination resistance adjustment circuit and a termination resistance adjustment method for adjusting a termination resistance of a bus.

  As the speed of semiconductor integrated circuits increases, so does the speed of buses, which are signal transmission paths, and the effect of signal reflection due to variations in the impedance of transmission paths due to the improvement in signal frequency associated with such higher speeds. Can no longer be ignored. The variation in the impedance of the transmission line is caused by the variation in the manufacturing of the circuit board and the variation in the impedance of the transmission line due to the variation in the input capacitance of various elements connected to the transmission line.

  Termination resistors are used to suppress the influence of reflection, but due to the increase in the number of elements connected to the transmission path and the complexity of the bus structure, when trying to set the termination resistor value in consideration of all variations, There has been a case where a sufficient eye pattern opening cannot be secured and the termination resistance value cannot be set.

  Even if it is set, the set value is not the optimum value for the actual transmission path, so that the signal quality is deteriorated. On the other hand, when the value of the termination resistor is a fixed resistance value, the signal quality is excessively improved, resulting in an increase in steady current flowing through the termination resistor, resulting in difficulty in reducing current consumption. There is.

  Therefore, there is a method to determine the termination resistance value by performing simulation in consideration of variations in the impedance of each element and circuit board connected to the transmission line, but comprehensive simulation is performed for all combinations. The problem is that it is difficult, and since all cases are handled with a single termination resistance value, it is not an optimal value.

  In this case, it is becoming very difficult to cover the whole with one termination resistance value due to the increase in the number of components due to the complexity of the bus structure and the reduction in the eye pattern opening due to the increase in speed. In order to improve the reliability of signal transmission, a measure that can select a termination resistance value suitable for each actual transmission path is required.

  Here, referring to Patent Document 1, in order to set the terminating resistance of the transmission line to an optimum value, one impedance adjustment circuit is provided for the transmission line, and the transmission line is propagated by this one impedance adjustment circuit. A technique for monitoring a signal waveform to be adjusted and adjusting a resistance value of a termination resistor provided at the termination of a transmission line based on the monitoring result is disclosed.

  Further, referring to Patent Document 2, an eye pattern opening is detected in a receiving element connected to a transmission path, a margin for a mask included in the eye pattern opening is calculated, and fluctuations in the calculated margin are calculated. Has been disclosed that evaluates a set value of a circuit element that affects a received waveform based on the evaluation result, and changes and controls a value of a built-in termination resistor provided in each receiving element based on the evaluation result. .

JP 2011-004216 A JP 2009-159256 A

  In the technique of Patent Document 1, a single impedance adjustment circuit is provided for the transmission line, and the termination resistance value is adjusted by this single adjustment circuit. In general, many receiving elements are connected. Therefore, there is a problem that it is not sufficient to set an optimum termination resistance value for these many receiving elements.

  The technique of Patent Document 2 is a technique for adjusting the value of a built-in termination resistor provided in one receiving element connected to the transmission line. In addition, many receiving elements are commonly connected to the transmission line. In this case, the technique is not a technique for adjusting the termination resistance of the transmission line. Therefore, there is a problem that it is not sufficient to set an optimum termination resistance value for many receiving elements.

  An object of the present invention is to provide a termination resistance adjustment circuit and a termination resistance adjustment method capable of optimally setting the value of the termination resistance of a transmission line to which a plurality of receiving elements are connected.

The termination resistance adjusting circuit according to the present invention includes:
A termination resistance adjusting circuit for a transmission line to which a plurality of elements are connected,
For each of the plurality of elements,
Comparison means for receiving a reference signal supplied to the transmission path and comparing the received signal waveform with a predetermined reference level;
Determination means for determining the quality of the received signal waveform based on a predetermined determination criterion based on the comparison result of the comparison means;
The termination resistance value is sequentially variably controlled, and the determination result of each of the plurality of elements is set as an input, and the resistance value when all the determination results indicate good is set as the termination resistance value. Control means,
It is characterized by including.

The termination resistance adjusting method according to the present invention includes:
A method for adjusting a termination resistance of a transmission line in which a plurality of elements are connected,
In each of the plurality of elements,
A comparison step of receiving a reference signal supplied to the transmission line and comparing the received signal waveform with a predetermined reference level;
A determination step of determining the quality of the received signal waveform based on a predetermined determination criterion based on a comparison result of the comparison step; and
The terminal resistance value is sequentially variably controlled, and the determination result of each of the plurality of elements is set as an input, and the resistance value when all the determination results indicate good is set as the termination resistance value. Control process,
It is characterized by including.

  According to the present invention, the optimum termination resistance value satisfied by all the receiving elements is set while confirming the transmission waveforms respectively input to the plurality of receiving elements having the bus structure. The optimum value that can be sufficiently adapted to the variation is set, so that the signal quality of the transmission path is improved.

It is a figure which shows the bus structure to which embodiment of this invention is applied. 1 is an overall block diagram of an embodiment of the present invention. It is a functional block diagram of the receiving element of embodiment of this invention. It is a signal waveform diagram which shows operation | movement of embodiment of this invention. It is a flowchart which shows operation | movement of embodiment of this invention.

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a bus structure to which an embodiment of the present invention is applied. In FIG. 1, signals from a transmission output buffer circuit (transmission element) 1 are input to a plurality of various reception elements 2 connected in parallel to a common bus 7. Termination resistors 3 and 4 are connected to the bus 7 and terminated, and the present invention adjusts the value of this termination resistor.

  FIG. 2 is a block diagram when the present invention is applied to the bus structure shown in FIG. In FIG. 2, the output buffer 1 serving as a transmission element derives a reference logic level pulse to the bus 7 at the control timing from the control circuit 8, and has an LSI configuration. A variable termination resistor circuit 9 is connected to the bus 7, and the resistance value can be controlled in accordance with a control signal output from the control circuit 8.

  The signal output to the bus 7 is input to a plurality of receiving elements (denoted as Chip) 2 connected to the bus 7 and received by these elements. Each of the plurality of receiving elements 2 is assumed to incorporate a waveform determination circuit as shown in FIG. The control circuit 8 outputs a control signal for the variable termination resistor circuit 9 in accordance with the determination signal which is each determination result from the waveform determination circuit.

  The control circuit 8 and the LSI-structured output buffer 1 synchronize the timing of the termination resistor adjustment operation.

  Referring to FIG. 3, the waveform determination circuit built in each receiving element 2 includes a Vref1 generation circuit 11 for generating a reference level Vref1 for checking a high level (High) side of the signal, and a low level (Low) of the signal. Vref2 generation circuit 12 for generating a reference level Vref2 for side confirmation, a Vref generation circuit 13 for generating a reference voltage Vref for normal operation, a Vref selection circuit 14 for selecting these reference voltages, and a selected reference A differential buffer 10 that compares the level of the voltage with the received input signal, and a determination circuit 17 that determines the quality of the waveform of the input signal received based on the output of the differential buffer in accordance with a preset reference. Is included.

  Further, the waveform determination circuit with a built-in element includes an element internal control circuit 15 and a timing setting circuit 16. The element internal control circuit 15 is for controlling the operation timing of each part, and the timing setting circuit 16 has a function of setting a timing signal for the determination operation of the determination circuit 17. All the determination outputs of the determination circuit 17 are output to the control circuit 8 (see FIG. 2).

  The adjustment of the termination resistance is executed as part of the initial adjustment at the time of starting up the apparatus and is controlled by the control circuit 8. The control of the element internal control circuit 15 is also performed by the control circuit 8.

  FIG. 4 shows the criteria for determining the input signal waveform received from the bus 7. The voltage direction of the input signal waveform is confirmed in the differential buffer 10 by the reference voltages Vref1 and Vref2 shown in FIG. Further, the time direction confirmation by the high level period (time) tHigh and the low level period (time) tLow is similarly performed by the reference voltages Vref1 and Vref2. The reference voltages Vref1 and Vref2 are set by the element internal control circuit 15.

  The uppermost waveform in FIG. 4 is a determination reference waveform transmitted from the transmitting element 1 which is an output buffer circuit to the bus 7. The waveform shown in Example 2 at the bottom of FIG. 4 is an example of a waveform when a positive pulse of the determination reference waveform is input to a certain receiving element 2 via the bus 7. As shown in the waveform of this example 2, if the actually observed time (in the example, t3) is shorter than the time tHigh set by the timing setting circuit 16, the decision circuit 17 makes a negative (NG: No Good). ) Is made.

  The waveform shown in Example 1 in the middle part of FIG. 4 is another example of the waveform when the positive pulse of the determination reference waveform is input to a certain receiving element 2 via the bus 7. As shown in the waveform of Example 1, when the number of edges (number of level transitions) is more than two within the time tHigh set by the timing setting circuit 16, NG is determined.

  In Examples 1 and 2 above, the pulse of the determination reference waveform may be a positive pulse, but it is obvious that the same applies to a negative pulse.

  Then, the control circuit 8 outputs the control signal of the variable termination resistor circuit 9 until all the determination signals that are the determination results reported from the determination circuit 17 of each receiving element 2 indicate good (OK). The above measurement is repeated by sequentially changing the resistance value of the termination resistor. Then, when all the determination signals that are the determination results reported from the determination circuit 17 of each receiving element 2 indicate good (OK), the value of the termination resistance at that time is set as the set value for the first time.

  FIG. 5 is a flowchart showing the operation of the above-described embodiment of the present invention. That is, first, the termination resistance value is set to an initial value (step S1). For example, first, a positive pulse for determination reference is transmitted to the bus 7 (step S2). Each of the receiving elements 2 receives this pulse from the bus 7 (step S3) and makes a determination (step S4). The determination process in this case is as described in FIG.

  Next, a negative pulse for determination criteria is transmitted to the bus 7 (step S5). Each of the receiving elements 2 receives this pulse from the bus 7 (step S6) and makes a determination (step S7). The determination process in this case is also as described in FIG.

  Each of the receiving elements 2 outputs the determination result to the control circuit 8 (step S8), and the control circuit 8 determines whether all the determination results are OK (step S9). If all the determination results are OK, the termination resistance value at this time is set as a set value (step S10). Otherwise, the termination resistance value is increased (or decreased) by one step (step S11). The process from step S2 is repeated again until all the determination results are OK.

  In this case, the smaller the termination resistance value, the larger the steady-state current. Therefore, if the termination resistance value is set to the highest value among all termination resistance values, both power consumption and reliability are achieved. Can be more optimal.

  The control of the resistance value of the variable termination resistor circuit 9 is performed by using the control signal from the control circuit 8 as a digital signal, and stepping up from a preset minimum value (maximum value) in a stepwise manner by changing the digital signal. It is assumed that the configuration can be changed toward the value (minimum value). Since such a configuration is well known, a description thereof will be omitted.

  Of course, analog variable control may be used instead of digital variable control. That is, the digital control signal from the control circuit 8 can be converted to analog and the variable resistance value can be controlled in accordance with the analog control signal.

  In this way, it is possible to set the optimum termination resistance value that satisfies all the receiving elements while confirming the transmission path waveform input to each receiving element having a bus structure. It is set to an optimum value including various variations of the road, and improvement in signal quality can be expected.

  In the above embodiment, as shown in FIG. 3, the Vref1 generation circuit 11, the Vref2 generation circuit 12, the Vref generation circuit 13, and the Vref selection circuit 14 are provided separately. Of course, the element internal control circuit 15 may be used as one Vref generating circuit.

  In the above example, Vref1 and Vref2 are constant and tHigh and tLow are set. However, Vref1 and Vref2 are variable, the determination results from all the passive elements are OK, and tHigh and tLow are the largest. By the way, the termination resistance value may be set as a set value, whereby an optimum termination resistance value is obtained.

DESCRIPTION OF SYMBOLS 1 Transmission element 2 Reception element 3, 4 Termination resistance 7 Transmission path 8 Control circuit 9 Variable termination resistance circuit 11 Vref1 generation circuit 12 Vref2 generation circuit 13 Vref (normal time) generation circuit 14 Vref selection circuit 15 Element internal control circuit 16 Timing setting Circuit 17 judgment circuit

Claims (6)

A termination resistance adjusting circuit for a transmission line to which a plurality of elements are connected,
For each of the plurality of elements,
Comparison means for receiving a reference signal supplied to the transmission path and comparing the received signal waveform with a predetermined reference level;
Determination means for determining the quality of the received signal waveform based on a predetermined determination criterion based on the comparison result of the comparison means;
The termination resistance value is sequentially variably controlled, and the determination result of each of the plurality of elements is set as an input, and the resistance value when all the determination results indicate good is set as the termination resistance value. Control means,
A termination resistance adjusting circuit comprising: The determination means in each of the plurality of elements is:
The received signal waveform is compared with the reference level, and the level direction and time direction of the received signal waveform with respect to the reference signal level are confirmed, and the quality is judged based on the confirmation result. The termination resistance adjusting circuit according to claim 1, wherein: The control means includes
3. The termination resistance adjusting circuit according to claim 1, wherein a maximum value is set among resistance values in a case where all determination results by the determination unit of the plurality of elements indicate good. A method for adjusting a termination resistance of a transmission line in which a plurality of elements are connected,
In each of the plurality of elements,
A comparison step of receiving a reference signal supplied to the transmission line and comparing the received signal waveform with a predetermined reference level;
A determination step of determining the quality of the received signal waveform based on a predetermined determination criterion based on a comparison result of the comparison step; and
The terminal resistance value is sequentially variably controlled, and the determination result of each of the plurality of elements is set as an input, and the resistance value when all the determination results indicate good is set as the termination resistance value. Control process,
A terminal resistance adjusting method comprising: The determination step in each of the plurality of elements includes:
The received signal waveform is compared with the reference level, and the level direction and time direction of the received signal waveform with respect to the reference signal level are confirmed, and the quality is judged based on the confirmation result. The termination resistance adjusting method according to claim 4, wherein: The control step includes
The termination resistance adjusting method according to claim 4, wherein a maximum value is set among resistance values when all the determination results of the determination steps of the plurality of elements indicate good.

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