JP2013207015A - Semiconductor device, display device and electronic apparatus - Google Patents

Abstract

Provided are a semiconductor device, a display device, and an electronic device in which moisture intrusion into an oxide semiconductor film is prevented and TFT characteristics are improved.
A transistor having an oxide semiconductor film, a first insulating film that covers the oxide semiconductor film and includes a first resin material, and a polarity of the first resin material laminated on the first insulating film. A semiconductor device comprising: a second insulating film including a second resin material having different polarities.
[Selection] Figure 1

Description

  The present technology relates to a semiconductor device including a transistor including an oxide semiconductor, a display device, and an electronic device.

  In recent years, with the increase in size and definition of displays, thin film transistors (TFTs) as driving elements are also required to have high mobility, such as zinc (Zn), indium (In), gallium (Ga), A TFT using an oxide semiconductor such as an oxide of tin (Sn), aluminum (Al), titanium (Ti), or a mixture thereof has been developed (for example, Patent Document 1). In particular, a TFT using a complex oxide of Zn, In, and Ga has an electron mobility compared to a TFT using amorphous silicon (a-Si: H) generally used for a liquid crystal display or the like. Is known to exhibit large electrical properties.

  By the way, in the active drive type liquid crystal display device or organic EL (Electroluminescence) display device as described above, the TFT is used as a drive element, and the charge corresponding to the signal voltage for writing video is held in the holding capacitor. Yes. However, when the parasitic capacitance generated in the intersection region between the gate electrode and the source / drain electrode of the TFT is increased, the signal voltage may fluctuate, which may cause deterioration in image quality.

  In particular, in an organic EL display device, there is a possibility that the manufacturing yield may be reduced in association with the problem of the parasitic capacitance. Therefore, some attempts have been made to reduce the parasitic capacitance (for example, Patent Document 2 and Non-Patent Document). 1, 2). Patent Document 2 and Non-Patent Documents 1 and 2 disclose a method of forming a source / drain region by reducing the resistance of a part of an oxide semiconductor film in a self-aligned manner, that is, a TFT having a so-called self-aligned structure. .

JP 2009-99847 A JP 2007-220817 A

R. Hayashi, 6 others, "Improved Amorphous In-Ga-Zn-O TFTs", SID 08 DIGEST, 2008, 42.1, p. 621-624 J. Park, 11 others, “Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors”, Applied Physics Letters, American Institute of Physics, 2008, Vol. 93, 053501

  However, TFTs using an oxide semiconductor, including those having the self-aligned structure as described above, are deteriorated by diffusion of moisture into the oxide semiconductor film, resulting in a problem that TFT characteristics are deteriorated.

  The present technology has been made in view of such problems, and an object of the present technology is to provide a semiconductor device, a display device, and an electronic device in which moisture intrusion into an oxide semiconductor film is prevented and TFT characteristics are improved. .

  A semiconductor device according to the present technology includes a transistor having an oxide semiconductor film, a first insulating film that covers the oxide semiconductor film and includes a first resin material, and a second resin material having a polarity different from that of the first resin material And a second insulating film stacked on the first insulating film.

  A display device according to the present technology includes a display element, a transistor that drives the display element and includes an oxide semiconductor film, a first insulating film that covers the oxide semiconductor film and includes a first resin material, and a first resin material A second insulating film that includes a second resin material having a polarity different from the polarity and is stacked on the first insulating film is provided.

  An electronic apparatus according to the present technology includes the display device.

  In the semiconductor device, display device, or electronic device of the present technology, the oxide semiconductor film is covered with a first insulating film and a second insulating film having different physical properties. Of the first resin material and the second resin material, those with lower polarity have low water absorption, and those with higher polarity have low water permeability. Moisture present in the atmosphere and in the upper layer of the oxide semiconductor film is repelled by one insulating film and is prevented from penetrating and diffusing by the other insulating film.

  According to the semiconductor device, the display device, and the electronic device of the present technology, the insulating film that covers the oxide semiconductor film is configured by a plurality of layers having different polarities (first insulating film, second insulating film). Intrusion of moisture into the oxide semiconductor film can be reduced. Therefore, the TFT characteristics of the transistor can be improved.

It is a sectional view showing the composition of the display concerning a 1st embodiment of this art. It is a figure showing the whole structure containing the peripheral circuit of the display apparatus shown in FIG. FIG. 3 is a diagram illustrating a circuit configuration of a pixel illustrated in FIG. 2. FIG. 3 is a cross-sectional view illustrating a method of manufacturing the display device illustrated in FIG. 1 in order of steps. FIG. 5 is a cross-sectional view illustrating a process following FIG. 4. FIG. 6 is a cross-sectional view illustrating a process following FIG. 5. It is sectional drawing showing the structure of the display apparatus which concerns on a comparative example. 10 is a cross-sectional view illustrating a configuration of a main part of a display device according to Modification 1. FIG. 11 is a cross-sectional view illustrating a configuration of a display device according to Modification 2. FIG. 10 is a cross-sectional view illustrating a configuration of a display device according to Modification 3. FIG. 10 is a cross-sectional view illustrating a configuration of a display device according to modification example 4. FIG. FIG. 12 is a cross-sectional view illustrating a method of manufacturing the transistor illustrated in FIG. 11 in order of steps. FIG. 13 is a cross-sectional diagram illustrating a process following the process in FIG. 12. It is sectional drawing showing the structure of the display apparatus which concerns on the 2nd Embodiment of this technique. It is sectional drawing showing the structure of the display apparatus which concerns on the 3rd Embodiment of this technique. It is a top view showing schematic structure of the module containing display apparatuses, such as the said embodiment. It is a perspective view showing the external appearance of the application example 1 of display apparatuses, such as the said embodiment. 12 is a perspective view illustrating an appearance of application example 2. FIG. 12 is a perspective view illustrating an appearance of application example 3. FIG. (A) is a perspective view showing the external appearance seen from the front side of the application example 4, (B) is a perspective view showing the external appearance seen from the back side. 14 is a perspective view illustrating an appearance of application example 5. FIG. 16 is a perspective view illustrating an appearance of application example 6. FIG. (A) is a front view of the application example 7 in an open state, (B) is a side view thereof, (C) is a front view in a closed state, (D) is a left side view, and (E) is a right side view, (F) is a top view and (G) is a bottom view.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. The description will be given in the following order.
1. First embodiment (example of top-gate transistor having a two-layer interlayer insulating film: organic EL display device)
2. Modification 1 (example having an interlayer insulating film having a three-layer structure)
3. Modification 2 (Example having a single-layer interlayer insulating film, in which the constituent material of the interlayer insulating film and the constituent material of the planarizing film are different in polarity)
4). Modification 3 (example having a two-layer interlayer insulating film and a two-layer planarization film)
5. Modification 4 (example of bottom gate transistor)
6). Second Embodiment (Liquid Crystal Display Device)
7). Third embodiment (electronic paper)
8). Application examples

<First Embodiment>
FIG. 1 illustrates a cross-sectional configuration of a display device 1 (semiconductor device) according to a first embodiment of the present technology. The display device 1 is an active matrix type organic EL (Electroluminescence) display device, and includes a plurality of sets of transistors 10 and organic EL elements 20 driven by the transistors 10 on a substrate 11. FIG. 1 shows a region (subpixel) corresponding to a set of the transistor 10 and the organic EL element 20.

  The transistor 10 is a staggered (top gate type) TFT having an oxide semiconductor film 12, a gate insulating film 13, and a gate electrode 14 in this order on a substrate 11. The oxide semiconductor film 12 and the gate electrode 14 are covered with the high resistance film 15. That is, the oxide semiconductor film 12, the gate insulating film 13, the gate electrode 14, and the high resistance film 15 are provided in this order. An interlayer insulating film 16 is provided on the high resistance film 15. Source / drain electrodes 17 A and 17 B are connected to the oxide semiconductor film 12 through connection holes H 1 provided in the interlayer insulating film 16 and the high resistance film 15. The planarization film 18 covers the source / drain electrodes 17A and 17B, and an organic EL element 20 is provided on the planarization film 18.

(Transistor 10)
The substrate 11 is made of, for example, a plate material such as quartz, glass, silicon, or a resin (plastic) film. In the sputtering method described later, since the oxide semiconductor film 12 is formed without heating the substrate 11, an inexpensive resin film can be used. Examples of the resin material include PET (polyethylene terephthalate) or PEN (polyethylene naphthalate). In addition, a metal substrate such as stainless steel (SUS) may be used depending on the purpose.

  The oxide semiconductor film 12 is provided in a selective region over the substrate 11 and has a function as an active layer of the transistor 10. The oxide semiconductor film 12 includes, for example, an oxide of at least one element selected from indium (In), gallium (Ga), zinc (Zn), and tin (Sn) as a main component. Specifically, indium tin zinc oxide (ITZO) or indium gallium zinc oxide (IGZO: InGaZnO) such as an amorphous material such as zinc oxide (ZnO) or indium zinc oxide (IZO (registered trademark)). )), Indium gallium oxide (IGO), indium tin oxide (ITO), indium oxide (InO), or the like. Since the surface of the oxide semiconductor film 12 (the contact surface with the high resistance film 15) is in a crystallized state, the gap between the oxide semiconductor film 12 and the insulating film (the insulating film 13A described later) is formed. The etching selectivity and the etching selectivity with the high resistance film 15 when forming the connection hole H1 can be improved. In order to bring the surface of the oxide semiconductor film 12 into a crystallized state, the oxide semiconductor film 12 may be made of a crystalline oxide semiconductor material, or crystallized in an amorphous oxide semiconductor material. Alternatively, a conductive oxide semiconductor material may be stacked. In order to prevent diffusion of moisture in the oxide semiconductor film 12, an amorphous oxide semiconductor material is preferably used. The thickness of the oxide semiconductor film 12 (thickness in the stacking direction, hereinafter simply referred to as thickness) is, for example, about 50 nm.

  The oxide semiconductor film 12 has a channel region 12C facing the upper gate electrode 14, and is adjacent to both sides of the channel region 12C and has a pair of regions (source / drain regions) having a lower electrical resistivity than the channel region 12C. Regions 12A, 12B). The source / drain regions 12A and 12B are provided partly in the thickness direction from the surface (upper surface) of the oxide semiconductor film 12. For example, the oxide semiconductor material is reacted with a metal such as aluminum (Al). It is formed by diffusing a metal (dopant). In the transistor 10, a self-aligned structure is realized by the source / drain regions 12A and 12B, and a high-quality image is displayed. The self-aligned transistor 10 can cope with an increase in the screen size, resolution, and frame rate of the display. Further, a layout having a small storage capacitor can be applied to the display device 1 including the transistor 10. Accordingly, the display device 1 can be manufactured with a high yield with few defects, and the reliability thereof can be improved. The source / drain regions 12A and 12B have a role of stabilizing the characteristics of the transistor 10 in addition to realizing the self-aligned structure as described above.

  An insulating film (not shown) such as a silicon oxide film, a silicon nitride film, or an aluminum oxide film may be provided between the substrate 11 and the oxide semiconductor film 12. This insulating film can prevent intrusion of moisture and other impurities from the substrate 11 to the oxide semiconductor film 12.

  The gate electrode 14 is provided on the channel region 12C with the gate insulating film 13 therebetween. The gate electrode 14 and the gate insulating film 13 have the same shape in plan view. The gate insulating film 13 has a thickness of about 300 nm, for example, and is formed of a single type of silicon oxide film (SiO), silicon nitride film (SiN), silicon nitride oxide film (SiON), aluminum oxide film (AlO), or the like. It is comprised by the laminated film which consists of a layer film or 2 or more types of them. For the gate insulating film 13, it is preferable to use a material that is difficult to reduce the oxide semiconductor film 12, for example, a silicon oxide film or an aluminum oxide film.

  The gate electrode 14 controls the carrier density in the oxide semiconductor film 12 (channel region 12C) by the gate voltage (Vg) applied to the transistor 10, and has a function as a wiring for supplying a potential. . The gate electrode 14 is made of, for example, a single element made of molybdenum (Mo), titanium (Ti), aluminum, silver (Ag), neodymium (Nd), or copper (Cu), or an alloy thereof. . A laminated structure using a plurality of simple substances or alloys may be used. The gate electrode 14 is preferably made of a low-resistance metal such as aluminum or copper. For example, a layer made of titanium or molybdenum (barrier layer) may be laminated on a layer made of a low resistance metal (low resistance layer), or an alloy containing a low resistance metal, such as an alloy of aluminum and neodymium ( Al-Nd) may be used. The gate electrode 14 may be made of a transparent conductive film such as ITO. The thickness of the gate electrode 14 is, for example, 10 nm to 500 nm.

  The high resistance film 15 on the gate electrode 14 is in contact with the source / drain regions 12 A and 12 B of the oxide semiconductor film 12. The high resistance film 15 is a film (oxide film) that remains after oxidation of a metal film serving as a source of metal diffused into the source / drain regions 12A and 12B in a manufacturing process described later. For example, the high resistance film 15 has a thickness of about 20 nm or less and is made of titanium oxide, aluminum oxide, indium oxide, tin oxide, or the like. A plurality of these films may be stacked on the high resistance film 15. Such a high-resistance film 15 has a function of reducing the influence of oxygen and moisture that change the characteristics of the oxide semiconductor film 12, that is, a barrier function, in addition to the above-described process role. Therefore, by providing the high resistance film 15, the electrical characteristics of the transistor 10 can be stabilized, and the effect of an interlayer insulating film 16 described later can be further enhanced.

  In order to enhance the barrier function, for example, a protective film (not shown) made of aluminum oxide or titanium oxide having a thickness of about 10 nm to 50 nm may be stacked on the high resistance film 15. Accordingly, the electrical characteristics of the oxide semiconductor film 12 in the transistor 10 are more stable and reliability is improved.

  The interlayer insulating film 16 covers the oxide semiconductor film 12 with the high resistance film 15 interposed therebetween. In the present embodiment, the interlayer insulating film 16 has a laminated structure of a plurality of layers (interlayer insulating films 16A and 16B) made of resin materials having different polarities. Thus, moisture can be prevented from entering the oxide semiconductor film 12 in the atmosphere and from the upper layer of the interlayer insulating film 16.

The interlayer insulating film 16 includes an interlayer insulating film 16A (first insulating film) and an interlayer insulating film 16B (second insulating film) in this order from the high resistance film 15 side. The interlayer insulating film 16A is made of a low polarity resin or a nonpolar resin. Examples of the low polarity resin or nonpolar resin include polysiloxane (silicone resin), polyolefin resin, polyethylene resin, and polystyrene resin. You may make it add another organic substance or an inorganic substance to the resin material with low polarity as mentioned above, or a nonpolar resin material. Further, an organic / inorganic hybrid resin having low polarity can be used for the interlayer insulating film 16A, and a resin material into which a large number of functional groups having low polarity, nonpolar functional groups or hydrophobic groups are introduced is used. It may be. The functional group with low polarity is, for example, a siloxane group (—Si—O—Si—), an ether group or an ester group, and the nonpolar functional group is, for example, an alkyl group (—C _n H _{2n + 1} ). , An aryl group (—C ₆ H ₅ ), an acetyloxy group (—OCOCH ₃ ), etc., and the hydrophobic group is, for example, a halogen group (—C—X X: F, Cl, Br, I) or a disulfide group (-SS-) and the like.

Such a low polarity resin or a nonpolar resin exhibits low water absorption. For example, polysiloxane is a hydrophobic resin in which functional groups with low polarity repel water with high polarity on the outermost surface of the film. For example, a resin having a water absorption rate of 0.5% or less, preferably 0.3% or less is desirably used for the interlayer insulating film 16A. On the other hand, in a resin material with low polarity, moisture that has entered the inside easily diffuses (high water permeability), and the water vapor permeability is, for example, greater than 100 g / m ² · day. It is preferable to use a resin having a water vapor transmission rate of 500 g / m ² · day or less for the interlayer insulating film 16A.

The interlayer insulating film 16B is laminated on the interlayer insulating film 16A and includes a resin material having a higher polarity than the resin material of the interlayer insulating film 16A. The interlayer insulating film 16B is made of, for example, polyimide, acrylic resin, novolac resin, phenol resin, polyester resin, epoxy resin, vinyl chloride resin, or polybenzimidazole resin. You may make it add another organic substance or an inorganic substance to the above highly polar resin materials. Further, an organic / inorganic hybrid resin having a high polarity can be used for the interlayer insulating film 16B, and a resin material into which a large number of functional groups or hydrophilic groups having a high polarity are introduced may be used. Examples of highly polar functional groups include aldehyde groups, ketone groups, carboxyl groups (—COOH), amide groups (—CONH ₂ ), imide groups, and phosphodiethyl groups (—O—P (═O) OH—O—). Or a peptide group (—CONH—) or the like, and a hydrophilic group is, for example, a hydroxy group (—OH), an amino group (—NH ₂ ), a thiol group (—SH), a carboxyl group, an amide group, a carbonyl group ( —C═O), alkanoyl group (R—CO—), acryloyl group (H ₂ C═CH—C (═O) —) and the like.

Such a more polar resin exhibits low water permeability. For example, polyimide and acrylic resins are hydrophilic resins that absorb highly polar water at the outermost surface of the membrane (high water absorption), but moisture is adsorbed on the membrane surface. This moisture is difficult to diffuse and penetrate inside. The water vapor permeability of the resin material contained in the interlayer insulating film 16B is, for example, 100 g / m ² · day or less. Highly polar resin materials often have high water absorption (for example, water absorption greater than 0.5%), but the interlayer insulation film 16B has a water absorption of 10% or less, more preferably 2.0% or less. It is desirable to use a resin material.

  As described above, the interlayer insulating film 16A made of a low water-absorbing resin material and the interlayer insulating film 16B made of a low water-permeable resin material are stacked on the oxide semiconductor film 12 to thereby provide moisture to the oxide semiconductor film 12. Can be prevented from entering. As the stacking order, it is preferable to provide a low water-absorbing interlayer insulating film 16A and a low water-permeable interlayer insulating film 16B in this order from the oxide semiconductor film 12 (high resistance film 15) side. In the interlayer insulating film 16 stacked in this order, moisture present in the atmosphere and moisture remaining on the upper layer of the interlayer insulating film 16 during the manufacturing process are first absorbed by the highly water-absorbing interlayer insulating film 16B. . The moisture once absorbed on the surface of the interlayer insulating film 16B is difficult to diffuse into the interlayer insulating film 16B, and even when it is released from the resin of the interlayer insulating film 16B by, for example, baking, the interlayer having low water absorption. It is repelled on the surface of the insulating film 16A and released into the atmosphere. Accordingly, moisture intrusion into the oxide semiconductor film 12 can be effectively prevented by such a stacking order.

  Further, the interlayer insulating film 16 containing the resin material can be easily thickened to about 2 μm, for example. The thickened interlayer insulating film 16 sufficiently covers, for example, a step such as between the gate insulating film 13 and the gate electrode 14 to ensure insulation between the electrodes. Accordingly, it is possible to prevent a short circuit or the like due to a step. Furthermore, the interlayer insulating film 16 containing a resin material can reduce the wiring capacitance formed by the metal wiring, and can increase the size and the high frame rate of the display device 1.

  The pair of source / drain electrodes 17A and 17B are provided on the interlayer insulating film 16 in a patterned manner, and the source / drain regions of the oxide semiconductor film 12 are connected through a connection hole H1 penetrating the interlayer insulating film 16 and the high resistance film 15. 12A and 12B. It is desirable that the source / drain electrodes 17A and 17B are provided so as to avoid a position directly above the gate electrode. This is to prevent parasitic capacitance from being formed in the intersection region between the gate electrode 14 and the source / drain electrodes 17A and 17B. The source / drain electrodes 17A and 17B have a thickness of about 200 nm, for example, and are made of the same material as the metal or the transparent conductive film mentioned for the gate electrode 14. The source / drain electrodes 17A and 17B are also preferably laminated films of a low resistance layer and a barrier layer. This is because by configuring the source / drain electrodes 17A and 17B with such a laminated film, driving with less wiring delay becomes possible.

(Organic EL element 20)
The organic EL element 20 is provided on the planarizing film 18. The organic EL element 20 includes a first electrode 21, a pixel separation film 22, an organic layer 23, and a second electrode 24 in this order from the planarization film 18 side, and is sealed with a protective layer 25. A sealing substrate 27 is bonded on the protective layer 25 with an adhesive layer 26 made of a thermosetting resin or an ultraviolet curable resin interposed therebetween. The display device 1 may be a bottom emission method (lower surface emission method) in which light generated in the organic layer 23 is extracted from the substrate 11 side, or a top emission method (upper surface emission method) in which light is generated from the sealing substrate 27 side. May be.

  The planarizing film 18 is provided on the source / drain electrodes 17A and 17B and the interlayer insulating film 16 over the entire display area of the substrate 11 (display area 50 shown in FIG. 2 described later), and has a connection hole H2. . The connection hole H2 is for connecting the source / drain electrodes 17A, 17B of the transistor 10 and the first electrode 21 of the organic EL element 20. A resin material similar to that for the interlayer insulating film 16 can be used for the planarizing film 18.

  The first electrode 21 is provided on the planarizing film 18 so as to fill the connection hole H2. The first electrode 21 functions as an anode, for example, and is provided for each element. When the display device 1 is a bottom emission system, the first electrode 21 is made of a transparent conductive film such as indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (InZnO), or the like. It is composed of a single layer film or a laminated film composed of two or more of these. On the other hand, when the display device 1 is a top emission system, the first electrode 21 is made of at least one of reflective metals, for example, aluminum, magnesium (Mg), calcium (Ca), and sodium (Na). Or a single layer film made of an alloy containing at least one of them, or a multilayer film in which single metals or alloys are laminated.

  The pixel separation film 22 is for ensuring insulation between the first electrode 21 and the second electrode 24 and for partitioning and separating the light emitting regions of each element. Have. The pixel separation film 22 is made of, for example, a photosensitive resin such as polyimide, acrylic resin, or novolac resin.

  The organic layer 23 is provided so as to cover the opening of the pixel isolation film 22. The organic layer 23 includes an organic electroluminescent layer (organic EL layer), and emits light when a driving current is applied. The organic layer 23 has, for example, a hole injection layer, a hole transport layer, an organic EL layer, and an electron transport layer in this order from the substrate 11 (first electrode 21) side, and recombination of electrons and holes. Is generated in the organic EL layer to generate light. The constituent material of the organic EL layer may be a general low molecular or high molecular organic material, and is not particularly limited. For example, an organic EL layer that emits red, green, and blue may be applied separately for each element, or an organic EL layer that emits white (for example, a stack of red, green, and blue organic EL layers). May be provided over the entire surface of the substrate 11. The hole injection layer is for increasing hole injection efficiency and preventing leakage, and the hole transport layer is for increasing hole transport efficiency to the organic EL layer. A layer other than the organic EL layer such as a hole injection layer, a hole transport layer, or an electron transport layer may be provided as necessary.

  The second electrode 24 functions as, for example, a cathode and is made of a metal conductive film. When the display device 1 is a bottom emission method, the second electrode 24 is made of a reflective metal, for example, at least one of aluminum, magnesium (Mg), calcium (Ca), and sodium (Na). A single layer film made of a single metal or an alloy containing at least one of them, or a multilayer film in which single metals or alloys are laminated. On the other hand, when the display device 1 is a top emission system, a transparent conductive film such as ITO or IZO is used for the second electrode 24. The second electrode 24 is provided in common with each element, for example, while being insulated from the first electrode 21.

The protective layer 25 may be made of either an insulating material or a conductive material. Examples of the insulating material include amorphous silicon (a-Si), amorphous silicon carbide (a-SiC), amorphous silicon nitride (a-Si _(1-X) N _x ), and amorphous carbon (a-C). Can be mentioned.

  The sealing substrate 27 is disposed so as to face the substrate 11 with the transistor 10 and the organic EL element 20 interposed therebetween. A material similar to that of the substrate 11 can be used for the sealing substrate 27. When the display device 1 is a top emission method, a transparent material may be used for the sealing substrate 27 and a color filter or a light shielding film may be provided on the sealing substrate 27 side. When the display device 1 is a bottom emission system, the substrate 11 is made of a transparent material, and for example, a color filter or a light shielding film is provided on the substrate 11 side.

(Configuration of peripheral circuit and pixel circuit)
As shown in FIG. 2, the display device 1 has a plurality of pixels PXLC including such organic EL elements 20, and the pixels PXLC are arranged in a display area 50 on the substrate 11 in a matrix, for example. Around the display area 50, a horizontal selector (HSEL) 51 as a signal line driving circuit, a write scanner (WSCN) 52 as a scanning line driving circuit, and a power scanner 53 as a power line driving circuit are provided.

  In the display region 50, a plurality (n integers) of signal lines DTL1 to DTLn are arranged in the column direction, and a plurality (integer m) of scanning lines WSL1 to WSLm are arranged in the row direction. A pixel PXLC (any one of pixels corresponding to R, G, and B) is provided at each intersection of the signal line DTL and the scanning line DSL. Each signal line DTL is electrically connected to the horizontal selector 51, and a video signal is supplied from the horizontal selector 51 to each pixel PXLC via the signal line DTL. On the other hand, each scanning line WSL is electrically connected to the write scanner 52, and a scanning signal (selection pulse) is supplied from the light scanner 52 to each pixel PXLC via the scanning line WSL. Each power supply line DSL is connected to a power supply scanner 53, and a power supply signal (control pulse) is supplied from the power supply scanner 53 to each pixel PXLC via the power supply line DSL.

  FIG. 3 illustrates a specific circuit configuration example in the pixel PXLC. Each pixel PXLC has a pixel circuit 50 </ b> A including the organic EL element 20. The pixel circuit 50A is an active driving circuit having a sampling transistor Tr1 and a driving transistor Tr2, a storage capacitor element (storage capacitor element 10C), and an organic EL element 20. Note that at least one of the sampling transistor Tr1 and the driving transistor Tr2 corresponds to the transistor 10.

  The sampling transistor Tr1 has its gate connected to the corresponding scanning line WSL, one of its source and drain connected to the corresponding signal line DTL, and the other connected to the gate of the driving transistor Tr2. The drain of the driving transistor Tr2 is connected to the corresponding power supply line DSL, and the source is connected to the anode of the organic EL element 20. The cathode of the organic EL element 20 is connected to the ground wiring 5H. The ground wiring 5H is wired in common to all the pixels PXLC. The storage capacitor element 10C is disposed between the source and gate of the driving transistor Tr2.

  The sampling transistor Tr1 conducts according to the scanning signal (selection pulse) supplied from the scanning line WSL, thereby sampling the signal potential of the video signal supplied from the signal line DTL and holding it in the holding capacitor element 10C. Is. The driving transistor Tr2 is supplied with a current from a power supply line DSL set to a predetermined first potential (not shown), and drives the driving current according to the signal potential held in the holding capacitor element 10C as an organic EL element. 20 is supplied. The organic EL element 20 emits light with a luminance corresponding to the signal potential of the video signal by the driving current supplied from the driving transistor Tr2.

  In such a circuit configuration, the sampling transistor Tr1 is turned on according to the scanning signal (selection pulse) supplied from the scanning line WSL, whereby the signal potential of the video signal supplied from the signal line DTL is sampled and held. It is held by the capacitive element 10C. In addition, a current is supplied from the power supply line DSL set to the first potential to the driving transistor Tr2, and the driving current is changed to the organic EL element 20 (red, green and red) according to the signal potential held in the holding capacitor element 10C. To each blue organic EL element). Each organic EL element 20 emits light with a luminance corresponding to the signal potential of the video signal by the supplied drive current. Thereby, the display device 1 performs video display based on the video signal.

  The display device 1 can be manufactured as follows, for example.

(Process of forming the transistor 10)
First, as illustrated in FIG. 4A, the oxide semiconductor film 12 made of the above-described material is formed over the substrate 11. Specifically, an oxide semiconductor material film (not shown) is first formed to a thickness of, for example, about 50 nm over the entire surface of the substrate 11 by, eg, sputtering. At this time, a ceramic having the same composition as the oxide semiconductor to be formed is used as a target. In addition, since the carrier concentration in the oxide semiconductor greatly depends on the oxygen partial pressure during sputtering, the oxygen partial pressure is controlled so as to obtain desired transistor characteristics. At this time, by using the crystalline oxide semiconductor material as described above, the etching selectivity when the insulating film 13A (FIG. 4B described later) and the high resistance film 15 are etched can be improved. Next, the formed oxide semiconductor material film is patterned into a predetermined shape by, for example, photolithography and etching. In that case, it is preferable to process by wet etching using a mixed solution of phosphoric acid, nitric acid and acetic acid. The mixed solution of phosphoric acid, nitric acid and acetic acid can have a sufficiently high selectivity with the base and can be processed relatively easily.

  Subsequently, as shown in FIG. 4B, an insulating film 13A made of, for example, a silicon oxide film having a thickness of 300 nm and a conductive film 14A made of molybdenum having a thickness of 200 nm are formed on the oxide semiconductor film 12 over the entire surface of the substrate 11. Are formed in this order. The insulating film 13A can be formed by, for example, a plasma CVD (Chemical Vapor Deposition) method. The insulating film 13A made of a silicon oxide film can be formed by a reactive sputtering method in addition to the plasma CVD method. Further, when an aluminum oxide film is used for the insulating film 13A, an atomic layer deposition method can be used in addition to the reactive sputtering method and the CVD method. The conductive film 14A can be formed by, for example, a sputtering method.

  After forming the conductive film 14A, the conductive film 14A is patterned by, for example, photolithography and etching to form the gate electrode 14 in a selective region on the oxide semiconductor film 12. Next, the insulating film 13A is etched using the gate electrode 14 as a mask. Thereby, the gate insulating film 13 is patterned into substantially the same shape as the gate electrode 14 in plan view (FIG. 4C). When the surface of the oxide semiconductor film 12 is in a crystalline state, a chemical solution such as hydrofluoric acid can be used in this etching step to easily process the oxide semiconductor film 12 while maintaining a very large etching selectivity.

  Subsequently, as shown in FIG. 5A, a metal film 15A made of, for example, titanium, aluminum, tin, or indium is formed over the entire surface of the substrate 11 by, for example, sputtering or atomic layer deposition. The film is formed with a thickness of 5 nm to 10 nm. The metal film 15A is made of a metal that reacts with oxygen at a relatively low temperature, and is in contact with a region adjacent to the channel region 12C of the oxide semiconductor film 12. After forming the metal film 15A, a protective film (not shown) made of a titanium oxide or aluminum oxide film having a thickness of about 50 nm may be formed by, for example, sputtering or atomic layer deposition.

  Next, as shown in FIG. 5B, the metal film 15A is oxidized by annealing at a temperature of about 300 ° C., for example, whereby the high resistance film 15 is formed. At this time, source / drain regions 12A and 12B are formed in a portion of the oxide semiconductor film 12 in contact with the high resistance film 15, that is, a position adjacent to the channel region 12C, on the high resistance film 15 side in the thickness direction. Is done. Since a part of oxygen contained in the oxide semiconductor film 12 is used for the oxidation reaction of the metal film 15A, the metal film 15A is used in the oxide semiconductor film 12 as the oxidation of the metal film 15A progresses. The oxygen concentration decreases from the surface (upper surface) side in contact with the surface. On the other hand, a metal such as aluminum diffuses into the oxide semiconductor film 12 from the metal film 15A. This metal element functions as a dopant, and the resistance of the region on the upper surface side of the oxide semiconductor film 12 in contact with the metal film 15A is reduced. As a result, source / drain regions 12A and 12B having lower electrical resistance than the channel region 12C are formed.

  When the metal film 15A is annealed, the annealing is preferably performed in an oxidizing gas atmosphere containing oxygen or the like. This is because the oxygen concentration in the source / drain regions 12A and 12B is prevented from becoming too low, and sufficient oxygen can be supplied to the oxide semiconductor film 12. As a result, the subsequent annealing process can be reduced and the process can be simplified.

  The high resistance film 15 may be formed by, for example, setting the temperature of the substrate 11 when the metal film 15A is formed on the substrate 11 to be relatively high instead of the annealing step. For example, in the step of FIG. 5A, when the metal film 15A is formed while keeping the temperature of the substrate 11 at about 200 ° C., the resistance of a predetermined region of the oxide semiconductor film 12 is reduced without performing annealing. Can do. Thus, the carrier concentration of the oxide semiconductor film 12 can be reduced to a level necessary for a transistor.

  The metal film 15A is preferably formed with a thickness of 10 nm or less as described above. This is because if the thickness of the metal film 15A is 10 nm or less, the metal film 15A can be completely oxidized (the high resistance film 15 is formed) by annealing in an oxidizing atmosphere. Further, when a protective film is provided on the metal film 15A, the oxidation proceeds by oxygen plasma. When the metal film 15A is not completely oxidized, a process of removing the unoxidized metal film 15A by dry etching using, for example, a gas containing chlorine or the like is required. This is because leakage current may occur if the metal film 15A that is not sufficiently oxidized remains on the gate electrode. When the metal film 15A is completely oxidized and the high resistance film 15 is formed, such a removal process becomes unnecessary, and the manufacturing process can be simplified. That is, the generation of leakage current can be prevented without performing the removal step by etching. When the metal film 15A is formed with a thickness of 10 nm or less, the thickness of the high resistance film 15 after the heat treatment is about 20 nm or less.

  As a method for oxidizing the metal film 15A, in addition to the heat treatment as described above, a method such as oxidation in a water vapor atmosphere or plasma oxidation may be used. For example, plasma oxidation is preferably performed by setting the temperature of the substrate 11 to about 200 ° C. to 400 ° C. and generating plasma in a gas atmosphere containing oxygen such as a mixed gas of oxygen and oxygen dinitride. The high resistance film 15 formed in this manner has good barrier characteristics as described above, reduces the influence of oxygen and moisture on the oxide semiconductor film 12, and improves the electrical characteristics of the transistor 10 together with the interlayer insulating film 16. Stabilize.

  Further, as a method for reducing the resistance of a predetermined region of the oxide semiconductor film 12, in addition to the technique based on the reaction between the metal film 15A and the oxide semiconductor film 12 as described above, hydrogen in a plasma CVD apparatus is used. Alternatively, a method of reducing resistance by plasma treatment with argon, ammonia gas or the like may be used. In addition, for example, a silicon nitride film, a silicon oxide film, or a silicon oxynitride film containing hydrogen is formed by plasma CVD, and a predetermined region of the oxide semiconductor film 12 is formed by hydrogen diffusion from the silicon nitride film or the like. You may make it reduce resistance.

  After the high resistance film 15 is formed, as shown in FIG. 6A, for example, an interlayer insulating film 16A made of polysiloxane having a thickness of 1 to 2 μm and a thickness of 1 to 2 μm is formed on the entire surface of the high resistance film 15. An interlayer insulating film 16B made of polyimide is formed in this order. The interlayer insulating films 16A and 16B are coated with a resin material on the high-resistance film 15 by, for example, a spin coater method or a slit coater method, and then exposed and developed to connect holes H1 (FIG. 6A) to desired positions. ) Is provided, and this is annealed at a temperature of about 150 to 300 ° C. The exposure and development may be performed separately for the interlayer insulating film 16A and the interlayer insulating film 16B, and may be performed simultaneously if the exposure sensitivities of the resins constituting them are substantially the same. In this manner, the interlayer insulating film 16 made of a resin material does not require a vacuum process required by a CVD method or the like, and thus can suppress desorption of oxygen in the oxide semiconductor film 12 or a reduction reaction due to hydrogen or the like. . Therefore, the transistor 10 with high electrical stability and reliability can be formed. As will be described later, it is possible to form the interlayer insulating film 16 having three or more layers (FIG. 8). However, in order to reduce the number of processes and reduce the cost, the two layers of interlayer insulating films 16 (interlayer insulating films 16A, 16A, 16B) is preferably provided.

  After the interlayer insulating film 16 is formed, an opening is formed in the high resistance film 15 by, for example, photolithography and dry etching, and the connection hole H1 reaching the source / drain regions 12A and 12B of the oxide semiconductor film 12 is formed. As described above, if the surface of the oxide semiconductor film 12 is in a crystallized state, wet etching such as dilute hydrofluoric acid is performed while maintaining sufficient etching selectivity between the oxide semiconductor film 12 and the high resistance film 15. It can be carried out. That is, the connection hole H1 can be easily formed even for the high resistance film 15 made of, for example, an aluminum oxide film and difficult to dry etch.

  Next, a conductive film (not shown) made of the constituent material of the source / drain electrodes 17A and 17B is formed on the interlayer insulating film 16 by sputtering, for example, and the connection hole H1 is filled with the conductive film. After that, this conductive film is patterned into a predetermined shape by, for example, photolithography and etching. Thus, a pair of source / drain electrodes 17A, 17B are formed on the interlayer insulating film 16, and the source / drain electrodes 17A, 17B are connected to the source / drain regions 12A, 12A of the oxide semiconductor film 12 through the connection holes H1. It is electrically connected to 12B (FIG. 6B). Through the above steps, the transistor 10 is formed over the substrate 11.

(Step of forming the planarizing film 18)
Subsequently, a planarization film 18 made of the above-described material is formed by a coating method such as a spin coating method or a slit coating method so as to cover the interlayer insulating film 16 and the source / drain electrodes 17A and 17B. A connection hole H2 is formed in a part of the region facing the drain electrodes 17A and 17B.

(Step of forming organic EL element 20)
Next, the organic EL element 20 is formed on the planarizing film 18. Specifically, the first electrode 21 made of the above-described material is formed on the planarizing film 18 by, for example, sputtering so as to fill the connection hole H2, and then patterned by photolithography and etching. Thereafter, after forming a pixel separation film 22 having an opening on the first electrode 21, an organic layer 23 is formed by, for example, a vacuum evaporation method. Subsequently, the second electrode 24 made of the above-described material is formed on the organic layer 23 by, for example, a sputtering method. Next, after forming a protective layer 25 on the second electrode 24 by, for example, a CVD method, a sealing substrate 27 is bonded onto the protective layer 25 using an adhesive layer 26. Thus, the display device 1 shown in FIG. 1 is completed.

  In the display device 1, for example, when a driving current corresponding to a video signal of each color is applied to each pixel PXLC corresponding to any of R, G, and B, the organic material is transmitted through the first electrode 21 and the second electrode 24. Electrons and holes are injected into the layer 23. These electrons and holes are recombined in the organic EL layer included in the organic layer 23 to emit light. In this way, the display device 1 displays, for example, R, G, B full color video.

  Here, since the interlayer insulating film 16A and the interlayer insulating film 16B having different physical properties are laminated on the oxide semiconductor film 12, the penetration of moisture into the oxide semiconductor film 12 is suppressed and the TFT characteristics of the transistor 10 are improved. Can be made. This will be described in detail below.

  FIG. 7 illustrates a cross-sectional configuration of a display device (display device 100) according to a comparative example. The transistor 100T of the display device 100 has a single-layer interlayer insulating film 160 made of one kind of resin material. Further, the planarization film 180 over the transistor 100T is made of the same resin material as the interlayer insulating film 160.

  In the transistor 100T having a self-aligned structure, it is preferable to use a resin material for the interlayer insulating film 160 as described above. Specifically, a resin having high heat resistance, such as polyimide, is used. However, since polyimide has a high water absorption rate, moisture easily enters the oxide semiconductor film 12 from the atmosphere and from the upper layer through the interlayer insulating film 160 and the planarization film 180. In particular, moisture may diffuse into the oxide semiconductor film 12 through the source / drain regions 12A and 12B closer to the interlayer insulating film 160 than the channel region 12C. Under the influence of such moisture, the TFT characteristics of the transistor 100T deteriorate. In addition, the interlayer insulating film 160 and the planarization film 180 can be formed of, for example, polysiloxane having a low water absorption rate. However, in the case of polysiloxane having a high water permeability, moisture once absorbed into the oxide semiconductor film 12. There is a risk of easily transmitting and deteriorating. That is, since water absorption and water permeability are in a trade-off relationship, it is difficult to sufficiently protect the oxide semiconductor film 12 from moisture with only one type of resin material.

  On the other hand, in the display device 1, the interlayer insulating film 16 </ b> B made of a resin material having a high polarity prevents moisture permeation, and the interlayer insulating film 16 </ b> A made of a resin material having a low polarity repels water on the surface. With the interlayer insulating film 16 having both low permeability and low water absorption, the transistor 10 can prevent moisture from entering the oxide semiconductor film 12 and improve TFT characteristics, particularly reliability.

  As described above, in this embodiment, the interlayer insulating film 16 is configured by a plurality of layers (interlayer insulating films 16A and 16B) made of resin materials having different polarities. Water intrusion can be reduced and the TFT characteristics of the transistor 10 can be improved.

  Further, since the self-aligned transistor 10 is provided, generation of parasitic capacitance between the gate electrode 13 and the source / drain electrodes 17A and 17B can be suppressed, and a high-quality image can be displayed. Furthermore, it is possible to cope with an increase in screen size, resolution, and frame rate of the display device 1.

  Hereinafter, modifications of the present embodiment and other embodiments will be described. In the following description, the same components as those of the above-described embodiment will be denoted by the same reference numerals, and description thereof will be omitted as appropriate.

<Modification 1>
FIG. 8 illustrates a cross-sectional configuration of a main part of a display device (display device 1A) according to Modification 1 of the first embodiment. The display device 1A further includes an interlayer insulating film 16C (third insulating film) on the interlayer insulating film 16B of the above-described embodiment, and the connection hole H1 has the interlayer insulating film 16C together with the interlayer insulating films 16A and 16B. It penetrates. The interlayer insulating film 16C includes a resin material having a polarity different from that of the interlayer insulating film 16B. Except for this point, the display device 1A has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The polarity of the resin material constituting the interlayer insulating film 16C may be higher than that of the interlayer insulating film 16B or lower than that of the interlayer insulating film 16A. Alternatively, it may be equal to or higher than the polarity of the resin material constituting the interlayer insulating film 16A and lower than the interlayer insulating film 16B, and the same resin material as the interlayer insulating film 16A can be used for the interlayer insulating film 16C. It is. When the polarity of the resin material constituting the interlayer insulating film 16C is larger than the polarity of the resin material constituting the interlayer insulating film 16A and lower than that of the interlayer insulating film 16B, that is, the polarity is larger than the interlayer insulating film. When 16B> interlayer insulating film 16C> interlayer insulating film 16A, a particularly high waterproof effect is exhibited. In such an interlayer insulating film 16, the moisture once absorbed in the interlayer insulating film 16B diffuses to the side of the interlayer insulating film 16C having higher water permeability than the interlayer insulating film 16A. Accordingly, moisture can be prevented from entering the interlayer insulating film 16A closest to the oxide semiconductor film 12. Although the single-layer interlayer insulating film 16C is shown in FIG. 8, the interlayer insulating film 16C may be composed of a plurality of films. Each of the plurality of films includes a resin material having a polarity different from that of the film in contact with the top and bottom. Such an interlayer insulating film 16 including three or more layers can more effectively prevent moisture from entering the oxide semiconductor film 12.

<Modification 2>
FIG. 9 illustrates a cross-sectional configuration of a display device (display device 1B) according to the second modification of the first embodiment. This display device 1B has an interlayer insulating film (interlayer insulating film 16D) made of only one type of resin material, and the polarities of the constituent material of the interlayer insulating film 16D and the resin material forming the planarizing film 18 are different. ing. Except for this point, the display device 1B has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The single-layer interlayer insulating film 16D (first insulating film) is made of, for example, polysiloxane, polyolefin resin, polyethylene resin, polystyrene resin, or the like. The source / drain electrodes 17A and 17B are electrically connected to the oxide semiconductor film 12 through a connection hole H1 penetrating the interlayer insulating film 16D. The planarizing film 18 (second insulating film) is provided on the interlayer insulating film 16D and covers the source / drain electrodes 17A and 17B. The planarizing film 18 is made of a resin having a polarity different from that of the interlayer insulating film 16D, for example, a polyimide, acrylic resin, novolac resin, phenol resin, polyester resin, epoxy having a higher polarity than the resin material of the interlayer insulating film 16D. Resin, vinyl chloride resin or polybenzimidazole resin. Organic / inorganic hybrid resins having different polarities may be used for the interlayer insulating film 16D and the planarizing film 18, respectively. It is also possible to stack a planarizing film (for example, a planarizing film 18C described later) formed of a plurality of layers on the interlayer insulating film 16D.

<Modification 3>
FIG. 10 illustrates a cross-sectional configuration of a display device (display device 1 </ b> C) according to the third modification of the first embodiment. This display device 1C has a laminated structure planarizing film (flattened film 18C) on a transistor (transistor 10C) together with a laminated structure interlayer insulating film 16 (interlayer insulating films 16A and 16B). The planarization film 18C covers the source / drain electrodes 17A and 17B of the transistor 10C. Except for this point, the display device 1 </ b> C has the same configuration as the display device 1 of the above embodiment, and the operation and effect thereof are also the same.

  The planarizing film 18C includes a planarizing film 18A (third insulating film) and a planarizing film 18B (fourth insulating film) in this order from the interlayer insulating film 16 (source / drain electrodes 17A and 17B) side. The planarizing film 18A is made of a resin material having a polarity different from that of the resin material of the interlayer insulating film 16B, such as polysiloxane, polyolefin resin, polyethylene resin, or polystyrene resin. The planarizing film 18B is a resin material having a polarity different from that of the constituent material of the planarizing film 18A, such as a polyester resin, an epoxy resin, a vinyl chloride resin, or a polybenzimidazole resin having a higher polarity than the planarizing film 18A. Consists of. In addition to the interlayer insulating film 16, by providing the planarization film 18 </ b> C composed of a plurality of layers, it is possible to more effectively prevent moisture from entering the oxide semiconductor film 12.

<Modification 4>
FIG. 11 illustrates a cross-sectional configuration of a display device (display device 1D) according to Modification 4 of the first embodiment. This display device 1D has a bottom gate type (inverted staggered structure) transistor (transistor 10D). Except for this point, the display device 1D has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The transistor 10D includes a gate electrode 14, a gate insulating film 13, and an oxide semiconductor film 12 in this order from the substrate 11 side. A channel protective film 19 is provided on the channel region 12 </ b> C of the oxide semiconductor film 12, and the high resistance film 15 covers the channel protective film 19 and the oxide semiconductor film 12. That is, the gate electrode 14, the gate insulating film 13, the oxide semiconductor film 12, and the high resistance film 15 are provided in this order. Furthermore, an interlayer insulating film 16 (interlayer insulating films 16A and 16B) is provided on the high resistance film 15, and the source / drain electrodes 17A and 17B are connected to the oxide semiconductor film via the connection hole H1 of the interlayer insulating film 16. The 12 source / drain regions 12A and 12B are electrically connected. As described above, also in the bottom gate type transistor 10D, similarly to the transistor 10, the source / drain regions 12A and 12B are provided in the oxide semiconductor film 12, and between the gate electrode 14 and the source / drain electrodes 17A and 17B. The generation of parasitic capacitance can be suppressed. In addition, the electrical characteristics of the transistor 10 can be stabilized by the high resistance film 15.

  The transistor 10D can be manufactured, for example, as follows. First, after forming the gate electrode 14, the gate insulating film 13, and the oxide semiconductor film 12 in this order on the substrate 11, the protective material film 19 </ b> M made of the constituent material of the channel protective film 19 is formed on the oxide semiconductor film 12. (FIG. 12A). For example, SiN, SiO, AlO, or the like can be used for the protective material film 19M. Next, as shown in FIG. 12B, the protective material film 19M is patterned by backside exposure using the gate electrode 14 as a mask to form a channel protective film 19. Subsequently, after the metal film 15A is formed over the channel protective film 19 and the oxide semiconductor film 12 (FIG. 13A), annealing is performed in the same manner as in the above embodiment, so that the metal film 15A is formed. A high resistance film 15 is formed, and source / drain regions 12A and 12B are formed in the oxide semiconductor film 12 (FIG. 13B). Next, the interlayer insulating film 16 and the source / drain electrodes 17A and 17B are formed on the high resistance film 15 in the same manner as in the above embodiment to complete the transistor 10D.

<Second Embodiment>
FIG. 14 illustrates a cross-sectional configuration of a display device (display device 2) according to the second embodiment of the present technology. The display device 2 has a liquid crystal display element 30 instead of the organic EL element 20 of the first embodiment (display device 1). Except for this point, the display device 2 has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The display device 2 includes the same transistor 10 as the display device 1, and a liquid crystal display element 30 is provided on the upper layer of the transistor 10 with a planarizing film 18 interposed therebetween.

  The liquid crystal display element 30 has, for example, a liquid crystal layer 33 sealed between a pixel electrode 31 and a counter electrode 32. An alignment film is formed on each surface of the pixel electrode 31 and the counter electrode 32 on the liquid crystal layer 33 side. 34A and 34B are provided. The pixel electrode 31 is provided for each pixel and is electrically connected to, for example, the source / drain electrodes 17A and 17B of the transistor 10. The counter electrode 32 is provided on the counter substrate 35 as a common electrode for a plurality of pixels, and is held at, for example, a common potential. The liquid crystal layer 33 is made of, for example, liquid crystal driven in a VA (Vertical Alignment) mode, a TN (Twisted Nematic) mode, an IPS (In Plane Switching) mode, or the like.

  Further, a backlight 36 is provided below the substrate 11, and polarizing plates 37 </ b> A and 37 </ b> B are bonded to the backlight 36 side of the substrate 11 and the counter substrate 35.

  The backlight 36 is a light source that emits light toward the liquid crystal layer 33 and includes, for example, a plurality of LEDs (Light Emitting Diodes), CCFLs (Cold Cathode Fluorescent Lamps), and the like. The backlight 36 is controlled to be turned on and off by a backlight driving unit (not shown).

  The polarizing plates 37A and 37B (polarizers and analyzers) are arranged, for example, in a crossed Nicols state, so that, for example, the illumination light from the backlight 36 is cut off when no voltage is applied (off state). In the applied state (on state), the light is transmitted.

  In the display device 2, similarly to the display device 1 of the above embodiment, moisture can be prevented from entering the oxide semiconductor film 12 by the interlayer insulating films 16 </ b> A and 16 </ b> B. Accordingly, the TFT characteristics of the transistor 10 can be improved also in this embodiment.

<Third Embodiment>
FIG. 15 illustrates a cross-sectional configuration of a display device (display device 3) according to the third embodiment of the present technology. The display device 3 is so-called electronic paper, and includes an electrophoretic display element 40 in place of the organic EL element 20 of the display device 1. Except for this point, the display device 3 has the same configuration as the display device 1 of the above-described embodiment, and the operation and effect thereof are also the same.

  The display device 3 includes the same transistor 10 as the display device 1, and an electrophoretic display element 40 is provided on the upper layer of the transistor 10 with a planarizing film 18 interposed therebetween.

  In the electrophoretic display element 40, for example, a display layer 43 made of an electrophoretic display body is sealed between the pixel electrode 41 and the common electrode 42. The pixel electrode 41 is provided for each pixel and is electrically connected to, for example, the source / drain electrodes 17A and 17B of the transistor 10. The common electrode 42 is provided on the counter substrate 44 as a common electrode for a plurality of pixels.

  In the display device 3, similarly to the display device 1 of the above embodiment, moisture can be prevented from entering the oxide semiconductor film 12 by the interlayer insulating films 16 </ b> A and 16 </ b> B. Accordingly, the TFT characteristics of the transistor 10 can be improved also in this embodiment.

<Application example>
Hereinafter, application examples of the display devices (display devices 1, 1A, 1B, 1C, 1D, 2, 3) as described above to electronic devices will be described. Examples of the electronic device include a television device, a digital camera, a notebook personal computer, a mobile terminal device such as a mobile phone, or a video camera. In other words, the display device can be applied to electronic devices in various fields that display a video signal input from the outside or a video signal generated inside as an image or video.

(module)
The display device is, for example, a module as shown in FIG.
Embedded in various electronic devices. In this module, for example, an area 61 exposed from the sealing substrate 27 or the counter substrates 35 and 44 is provided on one side of the substrate 11, and the horizontal selector 51, the light scanner 52, and the power scanner 53 are provided in the exposed area 61. The wiring is extended to form an external connection terminal (not shown). The external connection terminal may be provided with a flexible printed circuit (FPC) 62 for signal input / output.

(Application example 1)
FIG. 17A and FIG. 17B each illustrate the appearance of an electronic book to which the display device of the above embodiment is applied. The electronic book has, for example, a display unit 210 and a non-display unit 220, and the display unit 210 is configured by the display device of the above embodiment.

(Application example 2)
FIG. 18 illustrates an appearance of a smartphone to which the display device of the above embodiment is applied. This smartphone has, for example, a display unit 230 and a non-display unit 240, and the display unit 230 is configured by the display device of the above embodiment.

(Application example 3)
FIG. 19 illustrates an appearance of a television device to which the display device of the above embodiment is applied. This television apparatus has, for example, a video display screen unit 300 including a front panel 310 and a filter glass 320, and the video display screen unit 300 is configured by the display device of the above embodiment.

(Application example 4)
FIG. 20 illustrates the appearance of a digital camera to which the display device of the above embodiment is applied. The digital camera includes, for example, a flash light emitting unit 410, a display unit 420, a menu switch 430, and a shutter button 440, and the display unit 420 is configured by the display device of the above embodiment.

(Application example 5)
FIG. 21 illustrates an appearance of a notebook personal computer to which the display device of the above embodiment is applied. The notebook personal computer has, for example, a main body 510, a keyboard 520 for inputting characters and the like, and a display unit 530 for displaying an image. The display unit 530 is constituted by the display device of the above embodiment. Has been.

(Application example 6)
FIG. 22 shows the appearance of a video camera to which the display device of the above embodiment is applied. This video camera includes, for example, a main body 610, a subject photographing lens 620 provided on the front side surface of the main body 610, a start / stop switch 630 at the time of photographing, and a display 640. And this display part 640 is comprised by the display apparatus of the said embodiment.

(Application example 7)
FIG. 23 shows an appearance of a mobile phone to which the display device of the above embodiment is applied. For example, the mobile phone is obtained by connecting an upper housing 710 and a lower housing 720 with a connecting portion (hinge portion) 730, and includes a display 740, a sub-display 750, a picture light 760, and a camera 770. Yes. Of these, the display 740 or the sub-display 750 is configured by the display device of the above embodiment.

<Example>
Hereinafter, specific examples of the present technology will be described.

(Experimental Examples 1-1 to 1-4)
A transistor (transistor 100T) in which the interlayer insulating film (interlayer insulating film 160) is made of only one kind of resin material is manufactured, and the thermal decomposition temperature, water absorption rate, water permeability, and transistor reliability of the interlayer insulating film are measured. did. As the interlayer insulating film, polysiloxane (Experimental Example 1-1), low-polarity organic-inorganic hybrid resin (Experimental Example 1-2), polyimide (Experimental Example 1-3), and acrylic resin (Experimental Example 1-4). used.

The water absorption rate is obtained by spin-coating the resin material of each interlayer insulating film on a glass substrate, and then performing pre-baking and post-baking under predetermined conditions. I put it in and measured it. Specifically, 2.0 mg of the resin material after being left in the thermostatic layer for 100 hours was scraped, and this was used as a sample for simultaneous differential thermothermal weight measurement (using TG-DTA6300 manufactured by Seiko Instruments Inc.). The differential thermothermal gravimetric simultaneous measurement was performed by increasing the temperature to 100 ° C. at a rate of temperature increase of 5 ° C./min and maintaining the temperature at 100 ° C. for 30 minutes in a nitrogen (N ₂ ) atmosphere. The water absorption was determined by assuming that all the weight loss at this time was caused by the loss of moisture.

  The water permeability was measured by using IGZO formed on a glass substrate and then spin-coated with a resin material of each interlayer insulating film on the IGZO. Specifically, this IGZO and resin material laminate is pre-baked and post-baked under predetermined conditions, left in a constant temperature layer of 60 ° C. and 90% RH for 100 hours, and then used with a non-contact resistance measuring instrument. The water permeability was determined by measuring the sheet resistance of IGZO. IGZO is known to reduce resistance when it contains moisture. For this reason, the sheet resistance of the IGZO after being left in the thermostatic layer is compared with the sheet resistance of the reference (IGZO simple substance, immediately after film formation), and the difference in the resistance value is higher by one digit or more ( “High”), which is less than an order of magnitude, was defined as low water permeability (“low”) (Table 1 below).

  The reliability of the transistor was determined by performing a + BT (bias / temperature) test under the conditions of Vg = 10 V and Vd = 10 V. After an interlayer insulating film is formed on the upper layer of the oxide semiconductor film by spin coating, pre-baking and post-baking are performed under predetermined conditions, and this is put in a constant temperature layer of 60 ° C. and 90% RH for 100 hours. ΔVth after 10,000 seconds was measured. In this case, ΔVth of 1.0 V or less was considered to have high reliability (“◯”), and one having ΔVth greater than 1.0 V was considered to have low reliability (“×”) (Table 1 described later).

(Experimental examples 2-1 to 2-4)
A transistor (transistor 10) having a laminated interlayer insulating film (interlayer insulating film 16) was manufactured, and the thermal decomposition temperature, water absorption rate, water permeability, and transistor reliability of the interlayer insulating film were measured. Experimental Example 2-1 is an interlayer insulating film having polysiloxane (lower layer) and polyimide (upper layer) in this order from the substrate (substrate 11) side, and Experimental Example 2-2 is the same organic / inorganic as Experimental Example 1-2 from the substrate side. An interlayer insulating film having a hybrid resin and polyimide in this order, as an experimental example 2-3, an inter-layer insulating film having polysiloxane from the substrate side in this order, an acrylic resin in this order, and an experimental example 1-2 from the substrate side as an experimental example 2-4 An interlayer insulating film having the same organic-inorganic hybrid resin and acrylic resin in this order was used. The water absorption rate, water permeability, and transistor reliability were determined by the same methods as in Experimental Examples 1-1 to 1-4.

  The results of Experimental Examples 1-1 to 1-4 and Experimental Examples 2-1 to 2-4 are shown in Table 1. In Experimental Examples 1-1 to 1-4 and Experimental Examples 2-1 to 2-4, an interlayer insulating film having a thickness of 2 μm was used. In Experimental Examples 2-1 to 2-4, the interlayer insulating film having a lower layer and an upper layer each having a thickness of 1 μm was used.

  As can be seen from Table 1, high reliability could be obtained in the transistors (Experimental Examples 2-1 to 2-4) having an interlayer insulating film having a laminated structure. Further, Experimental Example 2-1 using polysiloxane and polyimide as the interlayer insulating film is excellent in heat resistance and cost. In addition, about the water absorption, the big difference was not seen between Experimental example 1-1 to 1-4 and Experimental example 2-1 to 2-4. This is because the water absorption measured this time is that when the resin material has absorbed the maximum amount of water and reached an equilibrium state, that is, the saturated water absorption.

  As described above, the present technology has been described with the embodiment and the modified examples, but the present technology is not limited to the embodiment and the like, and various modifications are possible. For example, in the above-described embodiment and the like, the interlayer insulating film 16A (or the interlayer insulating film 16D and the planarizing film 18A) made of a resin material having a low polarity from the high resistance film 15 side, the interlayer insulating film made of a resin material having a higher polarity Although the case where 16B (or the planarizing films 18 and 18B) is provided in order has been described, the interlayer insulating film 16B may be disposed on the high resistance film 15 side.

  In the above-described embodiment and the like, the case where the source / drain regions 12A and 12B are provided in part in the thickness direction from the surface (upper surface) of the portion adjacent to the channel region 12C has been described. The regions 12A and 12B can also be provided from the surface (upper surface) of the oxide semiconductor film 12 in the entire thickness direction.

  Furthermore, in the above-described embodiment and the like, the structure provided with the high resistance film 15 has been described as an example. However, the high resistance film 15 can be removed after the source / drain regions 12A and 12B are formed. is there. However, it is preferable to leave the transistor 10 in order to stably maintain the electrical characteristics.

  In addition, the material and thickness of each layer described in the above embodiments and the like, or the film formation method and film formation conditions are not limited, and may be other materials and thicknesses, or other film formation methods and Film forming conditions may be used.

  Furthermore, in the above-described embodiment and the like, the configuration of the organic EL element 20, the liquid crystal display element 30, the electrophoretic display element 40, and the transistor 10 has been specifically described, but it is not necessary to include all layers. Further, another layer may be further provided. For example, FIG. 14 and FIG. 15 show the transistor 10 shown in FIG. 1, but FIG. 8 (Modification 1), FIG. 9 (Modification 2), FIG. 9 (Modification 3), or FIG. The liquid crystal display element 30 or the electrophoretic display element 40 may be provided on the transistors 10A, 10B, 10C, and 10D and the planarizing films 18 and 18C shown in FIG.

  In addition, the present technology can also be applied to a display device using other display elements such as an inorganic electroluminescence element in addition to the organic EL element 20, the liquid crystal display element 30, and the electrophoretic display element 40.

  Furthermore, for example, the configuration of the display device has been specifically described in the above embodiment, but it is not necessary to include all the components, and other components may be further included.

In addition, this technique can also take the following structures.
(1) including a transistor having an oxide semiconductor film, a first insulating film covering the oxide semiconductor film and including a first resin material, and a second resin material having a polarity different from that of the first resin material. And a second insulating film stacked on the first insulating film.
(2) The semiconductor device according to (1), wherein a source / drain electrode of the transistor is electrically connected to the oxide semiconductor film through a connection hole of the first insulating film and the second insulating film. .
(3) The oxide semiconductor film includes a channel region and a source / drain region adjacent to the channel region and having a lower resistivity than the channel region, and the transistor includes a gate electrode facing the channel region. The semiconductor device according to (1) or (2).
(4) The semiconductor device according to any one of (1) to (3), wherein the polarity of the second resin material is higher than that of the first resin material.
(5) The first resin material has a water absorption of 0.5% or less, and the second resin material has a water vapor transmission rate of 100 g / m ² · day or less, and any one of (1) to (4) The semiconductor device described in one.
(6) The first resin material is at least one member selected from the group consisting of polysiloxane, polyolefin resin, polyethylene resin and polystyrene resin, and the second resin material is polyimide, acrylic resin, novolac resin. Any one of the above (1) to (5), which is at least one selected from the group consisting of resins, phenolic resins, polyester resins, epoxy resins, vinyl chloride resins and polybenzimidazole resins The semiconductor device described.
(7) The semiconductor device according to any one of (1) to (6), wherein the first resin material is polysiloxane and the second resin material is polyimide.
(8) The semiconductor device according to (3), further including a high resistance film in contact with the source / drain regions.
(9) Any one of (1) to (8), wherein a third insulating film including a third resin material having a polarity different from that of the second resin material is further stacked on the second insulating film. A semiconductor device according to 1.
(10) The source / drain electrodes of the transistor are electrically connected to the oxide semiconductor film through connection holes of the first insulating film, the second insulating film, and the third insulating film. 9) The semiconductor device described in the above.
(11) A source / drain electrode of the transistor is electrically connected to the oxide semiconductor film through a connection hole of the first insulating film and the second insulating film, and further to the third insulating film, The fourth insulating film including a fourth resin material having a polarity different from that of the third resin material is laminated, and the third insulating film and the fourth insulating film cover the source / drain electrodes. Semiconductor device.
(12) The source / drain electrode of the transistor is electrically connected to the oxide semiconductor film through a connection hole of the first insulating film, and the source / drain electrode is covered by the second insulating film. ) The semiconductor device described.
(13) The semiconductor device according to (8), including the oxide semiconductor film, the gate electrode, and the high-resistance film in this order.
(14) The semiconductor device according to (8), including the gate electrode, the oxide semiconductor film, and the high-resistance film in this order.
(15) A display element, a transistor that drives the display element and includes an oxide semiconductor film, a first insulating film that covers the oxide semiconductor film and includes a first resin material, and a polarity of the first resin material And a second insulating film stacked on the first insulating film, and including a second resin material having a different polarity.
(16) The display device according to (15), wherein the display element is an organic EL (Electroluminescence) element.
(17) A display device is provided, the display device driving the display element and having an oxide semiconductor film and a first insulation that covers the oxide semiconductor film and includes a first resin material. An electronic device including a film and a second insulating film stacked on the first insulating film, including a second resin material having a polarity different from that of the first resin material.

  DESCRIPTION OF SYMBOLS 1,1A, 1B, 1C, 1D, 2,3 ... Display apparatus, 10 ... Transistor, 11 ... Substrate, 12 ... Oxide semiconductor film, 12T ... Channel region, 12A, 12B ... Source / drain regions, 13 ... Gate insulating film, 14 ... Gate electrode, 15 ... High resistance film, 16, 16A, 16B, 16C, 16D ... Interlayer insulating film, 17A, 17B ... Source / drain electrodes, 18, 18A, 18B, 18C ... Planarization film, 19 ... Channel protective film, 20 ... Organic EL element, 21 ... First electrode, 22 ... Pixel separation film, 23 ... organic layer, 24 ... second electrode, 25 ... protective layer, 26 ... adhesive layer, 27 ... sealing substrate, H1, H2 ... connection hole , 50... Display area, 51... Horizontal selector, 52. NA, 53 ... Power supply scanner, DSL ... Scanning line, DTL ... Signal line, 50A ... Pixel circuit, 30 ... Liquid crystal display element, 31, 41 ... Pixel electrode, 32 ... -Counter electrode, 33 ... Liquid crystal layer, 34A, 34B ... Alignment film, 35, 44 ... Counter substrate, 36 ... Backlight, 37A, 37B ... Polarizing plate, 40 ... Electricity Electrophoretic display element, 42... Common electrode, 43.

Claims (17)

A transistor having an oxide semiconductor film;
A first insulating film covering the oxide semiconductor film and including a first resin material;
A semiconductor device comprising: a second resin material having a polarity different from that of the first resin material; and a second insulating film stacked on the first insulating film. 2. The semiconductor device according to claim 1, wherein source / drain electrodes of the transistor are electrically connected to the oxide semiconductor film through connection holes of the first insulating film and the second insulating film. The oxide semiconductor film has a channel region and a source / drain region adjacent to the channel region and having a lower resistivity than the channel region,
The semiconductor device according to claim 1, wherein the transistor has a gate electrode facing the channel region. The semiconductor device according to claim 1, wherein the polarity of the second resin material is higher than that of the first resin material. The first resin material has a water absorption of 0.5% or less,
The semiconductor device according to claim 4, wherein the second resin material has a water vapor transmission rate of 100 g / m ² · day or less. The first resin material is at least one selected from the group consisting of polysiloxane, polyolefin resin, polyethylene resin, and polystyrene resin,
The second resin material is at least one selected from the group consisting of polyimide, acrylic resin, novolac resin, phenol resin, polyester resin, epoxy resin, vinyl chloride resin, and polybenzimidazole resin. The semiconductor device according to claim 4. The semiconductor device according to claim 6, wherein the first resin material is polysiloxane and the second resin material is polyimide. The semiconductor device according to claim 3, further comprising a high resistance film in contact with the source / drain regions. The semiconductor device according to claim 1, wherein a third insulating film including a third resin material having a polarity different from that of the second resin material is further stacked on the second insulating film. The source / drain electrode of the transistor is electrically connected to the oxide semiconductor film through a connection hole of the first insulating film, the second insulating film, and the third insulating film. Semiconductor device. Source / drain electrodes of the transistor are electrically connected to the oxide semiconductor film through connection holes of the first insulating film and the second insulating film,
A fourth insulating film including a fourth resin material having a polarity different from the polarity of the third resin material is further laminated on the third insulating film, and the third insulating film and the fourth insulating film are formed in the source The semiconductor device according to claim 9, which covers the drain electrode. Source / drain electrodes of the transistor are electrically connected to the oxide semiconductor film through a connection hole of the first insulating film,
The semiconductor device according to claim 1, wherein the second insulating film covers the source / drain electrodes. The semiconductor device according to claim 8, comprising the oxide semiconductor film, the gate electrode, and the high resistance film in this order. The semiconductor device according to claim 8, comprising the gate electrode, the oxide semiconductor film, and the high-resistance film in this order. A display element;
A transistor for driving the display element and having an oxide semiconductor film;
A first insulating film covering the oxide semiconductor film and including a first resin material;
A display device comprising: a second resin material having a polarity different from that of the first resin material; and a second insulating film stacked on the first insulating film. The display device according to claim 15, wherein the display element is an organic EL (Electroluminescence) element. A display device,
The display device
A display element;
A transistor for driving the display element and having an oxide semiconductor film;
A first insulating film covering the oxide semiconductor film and including a first resin material;
An electronic device comprising: a second resin material having a polarity different from that of the first resin material; and a second insulating film laminated on the first insulating film.

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