JP2013201078A

JP2013201078A - Electric module and manufacturing method of the same

Info

Publication number: JP2013201078A
Application number: JP2012069970A
Authority: JP
Inventors: Naohiro Fujinuma; 尚洋藤沼; Toshihiro Otsuka; 智弘大塚; Setsuo Nakajima; 節男中嶋; Shunsuke Kunugi; 俊介功刀; Satoshi Yoguchi; 聡與口
Original assignee: Sekisui Chemical Co Ltd
Current assignee: Sekisui Chemical Co Ltd
Priority date: 2012-03-26
Filing date: 2012-03-26
Publication date: 2013-10-03

Abstract

【課題】外観的な品質及び光電変換効率の高く製造が容易な電気モジュール及びその製造方法を提供する。
【解決手段】一の基板２に透明導電膜３が成膜され、透明導電膜３の表面に半導体層４が成膜された第１電極板５と、他の基板６に対向導電膜７が成膜された第２電極板８とが、透明導電膜３と対向導電膜７とを対向させて配置されるとともに封止材１０によって貼り合わされ、封止材１０が、一の基板２の板面を正面視した際に少なくとも半導体層４を囲繞するように配され、この囲繞された領域がセルとして構成され、封止材１０と第１電極板５と第２電極板８とにより電解液１１が封止されたセルが形成された電子モジュール１であって、半導体層４は、一の基板２の板面を正面視した際に、封止材１０の内側の全面を覆っていることを特徴とする。
【選択図】図１An electrical module having high appearance quality and high photoelectric conversion efficiency and easy to manufacture and a method for manufacturing the same are provided.
A transparent conductive film is formed on one substrate, a semiconductor layer is formed on the surface of the transparent conductive film, and a counter conductive film is formed on another substrate. The formed second electrode plate 8 is disposed with the transparent conductive film 3 and the counter conductive film 7 facing each other and bonded together by a sealing material 10, and the sealing material 10 is a plate of one substrate 2. The semiconductor layer 4 is arranged so as to surround at least the semiconductor layer 4 when the surface is viewed from the front, and the enclosed region is configured as a cell. The sealing material 10, the first electrode plate 5, and the second electrode plate 8 are used as an electrolyte 11 is an electronic module 1 in which a sealed cell is formed, and the semiconductor layer 4 covers the entire inner surface of the sealing material 10 when the plate surface of one substrate 2 is viewed from the front. It is characterized by.
[Selection] Figure 1

Description

本発明は、電気モジュール及び電気モジュールの製造方法に関する。 The present invention relates to an electric module and a method for manufacturing the electric module.

近年、化石燃料に代わるクリーンエネルギーの発電装置として太陽電池が注目され、シリコン（Ｓｉ）系太陽電池、および色素増感型太陽電池の開発が進められている。とりわけ色素増感型太陽電池は、安価で量産しやすいものとして、その構造及び製造方法が広く研究開発されている（例えば下記特許文献１）。
図８（ｄ）に示すように、特許文献１に記載された色素増感太陽電池５０は、透明基板５１の板面に透明導電膜５２が成膜され、透明導電膜５２の表面に色素を担持させた半導体層５３が形成された第１電極板５４と、対向基板５５に、透明導電膜５２に対向配置される対向導電膜５６が成膜された第２電極板５７と、半導体層５３との間に隙間Ｒを形成してこの半導体層５３を囲繞するとともに、第１電極板５４と第２電極板５７とを貼り合わせて密封されたセルＳを形成する封止材５８と、セルＳ内に注入された電解液５９とを備えた構成となっている。 In recent years, solar cells have attracted attention as clean energy power generation devices that replace fossil fuels, and silicon (Si) solar cells and dye-sensitized solar cells have been developed. In particular, dye-sensitized solar cells have been widely researched and developed for their structures and manufacturing methods as being inexpensive and easy to mass-produce (for example, Patent Document 1 below).
As shown in FIG. 8D, in the dye-sensitized solar cell 50 described in Patent Document 1, a transparent conductive film 52 is formed on the plate surface of the transparent substrate 51, and the dye is applied to the surface of the transparent conductive film 52. A first electrode plate 54 on which the supported semiconductor layer 53 is formed; a second electrode plate 57 in which a counter conductive film 56 disposed opposite to the transparent conductive film 52 is formed on the counter substrate 55; and the semiconductor layer 53 A sealing material 58 that forms a sealed cell S by sealing the first electrode plate 54 and the second electrode plate 57 together with a gap R between the first electrode plate 54 and the second electrode plate 57. The electrolyte solution 59 injected into S is provided.

そして、上記色素増感太陽電池５０の製造は、次のようにして行われる。すなわち、図８（ａ）〜（ｄ）に示すように、透明基板５１に不図示のマスクをして印刷法等によりこの透明基板５１上に透明導電膜５２をパターニングし、透明導電膜５２を成膜した後、更に透明導電膜５２上に、半導体層５３を形成するペーストを透明導電膜５２と同様に塗工し第１電極（いわゆる光電極）５４を作製する。また、第１電極板５４に対向配置させる対向導電膜５６を透明導電膜５２と同様にして対向基板５５に成膜し第２電極板５７を作製する。そして、半導体層５３との間に隙間Ｒを設けて半導体層５３を囲繞するように封止材５８を透明導電膜５２の表面に配し、第１電極板５４と第２電極板５７とを導電膜５２，５６同士を対向させて貼り合わせ、電解液５９を注入し、色素増感太陽電池５０としている。 And manufacture of the said dye-sensitized solar cell 50 is performed as follows. That is, as shown in FIGS. 8A to 8D, a transparent conductive film 52 is patterned on the transparent substrate 51 by using a mask (not shown) on the transparent substrate 51 by a printing method or the like. After the film formation, a paste for forming the semiconductor layer 53 is further applied onto the transparent conductive film 52 in the same manner as the transparent conductive film 52 to form a first electrode (so-called photoelectrode) 54. In addition, a counter conductive film 56 disposed opposite to the first electrode plate 54 is formed on the counter substrate 55 in the same manner as the transparent conductive film 52 to produce the second electrode plate 57. Then, a sealing material 58 is disposed on the surface of the transparent conductive film 52 so as to surround the semiconductor layer 53 by providing a gap R between the first electrode plate 54 and the second electrode plate 57. The conductive films 52 and 56 are bonded to each other and the electrolyte solution 59 is injected to form the dye-sensitized solar cell 50.

特開２０１１−４９１４０号公報JP 2011-49140 A

ところで、色素増感太陽電池５０は、半導体層５３が様々な色素を担持することができ、透明基板５１を通してその色彩を見せることができるため、色素増感太陽電池５０自身及び色素増感太陽電池５０を適用し得る各種製品のデザイン性を向上させるものとしても注目されている。しかしながら、色素増感太陽電池５０によれば、各セルＳの半導体層５３と封止材５８との間に隙間Ｒが形成されているため、透明基板５１又は対向基板５５から外観した場合に半導体層５３の周囲に電解液５９の色彩が写り、色むらが生じているように見えてしまい、色素増感太陽電池５０の外観的な品質を損ねるという問題があった。
また、セルＳ内において半導体層５３の表面積がこの隙間Ｒの面積の分小さくなり、それだけ発電効率が悪いという問題があった。
また、色素増感太陽電池５０を製造するにあたっても、透明導電膜５２の表面及び透明基板５１をマスクした上で半導体層５３を印刷法等によりパターニングしつつ成膜するものであるため、各製造工程が煩雑であるという問題があった。
また、透明導電膜５２の表面にマスクを設ける必要があるため、透明基板５１を搬送しながら第１電極板５４を作製する方法を採用することが困難であるという問題があった。
また、透明導電膜５２等にマスクをしてスパッタやエアロゾルデポジション法により成膜しようとする場合、マスクによる凹凸等によって吹き付けを均一に行うことが難しくなり、電池の性能上の品質を担保することが難しくなるおそれがあった。 By the way, in the dye-sensitized solar cell 50, since the semiconductor layer 53 can carry various dyes and can show the color through the transparent substrate 51, the dye-sensitized solar cell 50 itself and the dye-sensitized solar cell. Attention has also been paid to improving the design of various products to which 50 can be applied. However, according to the dye-sensitized solar cell 50, since the gap R is formed between the semiconductor layer 53 and the sealing material 58 of each cell S, the semiconductor when viewed from the transparent substrate 51 or the counter substrate 55 is used. There is a problem that the color of the electrolytic solution 59 appears in the periphery of the layer 53 and color unevenness appears, and the appearance quality of the dye-sensitized solar cell 50 is impaired.
In addition, the surface area of the semiconductor layer 53 in the cell S is reduced by the area of the gap R, and the power generation efficiency is accordingly reduced.
Further, in manufacturing the dye-sensitized solar cell 50, the surface of the transparent conductive film 52 and the transparent substrate 51 are masked, and the semiconductor layer 53 is formed while being patterned by a printing method or the like. There was a problem that the process was complicated.
Further, since it is necessary to provide a mask on the surface of the transparent conductive film 52, there is a problem that it is difficult to adopt a method of manufacturing the first electrode plate 54 while transporting the transparent substrate 51.
In addition, when a mask is applied to the transparent conductive film 52 or the like to form a film by sputtering or aerosol deposition, it becomes difficult to perform spraying uniformly due to unevenness or the like by the mask, thereby ensuring the quality of the battery performance. It could be difficult.

そこで、本発明は、外観的な品質を向上させることができるとともに、光電変換効率を向上することのできる電子モジュールを提供することを課題とする。また、電気モジュールを簡便かつ効率的に製造することを課題とする。 Then, this invention makes it a subject to provide the electronic module which can improve external appearance quality and can improve photoelectric conversion efficiency. It is another object of the present invention to manufacture an electric module simply and efficiently.

請求項１の発明は、一の基板に透明導電膜が成膜され、この透明導電膜の表面に半導体層が成膜された第１電極板と、他の基板に対向導電膜が成膜された第２電極板とが、前記透明導電膜と前記対向導電膜とを対向させて配置されるとともに封止材によって貼り合わされ、前記封止材が、前記一の基板の板面を正面視した際に少なくとも前記半導体層を囲繞するように配され、この囲繞された領域がセルとして構成され、この封止材と前記第１電極板と第２電極板とにより電解液が封止されたセルが形成された電子モジュールであって、前記半導体層は、前記一の基板の板面を正面視した際に、前記封止材の内側の全面を覆っていることを特徴とする。
本発明では、前記一の基板の板面を正面視した際に、前記封止材の内側の全面を覆っている、すなわちセル内を隙間なく覆っているため、封止材に囲繞されたセル内を半導体層の色彩一色することができる。また、当該セルにおける光電変換効率を向上させることができる。
請求項２の発明は、請求項１に記載の電気モジュールであって、前記透明導電膜及び前記対向導電膜がパターニングされて複数間隔をおいてそれぞれ形成され、パターニングされた複数の透明導電膜同士の間隙及びこれら複数の透明導電膜に対向配置された複数の対向導電膜同士の間隙に前記封止材が配され、前記セルが複数隣接して形成されていることを特徴とする。
本発明では、半導体層が複数のセル内を隙間なく覆っており、電解液が一の基板又は他の基板に接しないように複数の透明導電膜同士の間隙及びこれら複数の透明導電膜に対向配置された複数の対向導電膜同士の間隙に封止材が配されている。したがって、複数のセル全体を半導体層の色彩によって略一色にすることができる。また、当該セルにおける光電変換効率を向上させることができる。
請求項３の発明は、請求項２に記載の電気モジュールであって、前記複数の透明導電膜同士の間隙及び前記複数の対向導電膜同士の間隙に配された前記封止材は、前記半導体層又は前記対向導電膜の表面に及んで、これらの一部を被覆していることを特徴とする。
本発明では、複数の透明導電膜同士の間隙及びこれら複数の透明導電膜に対向配置された複数の対向導電膜同士の間隙の封止材によって、複数の隣り合う透明導電膜間及び複数の対向導電膜間を確実に絶縁することができる。
請求項４の発明は、一の基板に透明導電膜を成膜し、この透明導電膜の表面に半導体層を成膜して第１電極板を形成する第１電極板形成工程と、前記一の基板に対向させる他の基板に対向導電膜を成膜して第２電極板を形成する第２電極板形成工程と、前記第１電極板及び前記第２電極板の少なくともいずれか一方の板面に、この板面を正面視した際に、少なくとも前記半導体層を囲繞するように封止材を配する封止材配置工程と、前記封止材により前記第１電極板と前記第２電極板とを貼り合わせてセルを形成するセル形成工程とを有する電気モジュールの製造方法であって、前記第１電極板形成工程において、前記透明導電膜及び前記半導体層を前記一の基板に成膜した後に前記透明導電膜及び前記半導体層をレーザー加工又は機械的な研磨によりパターニングする工程、及び、前記第２電極板形成工程において、前記対向導電膜を前記他の基板に成膜した後に前記対向導電膜をレーザー加工又は機械的な研磨によりパターニングする工程の、少なくともいずれか一方の工程を有し、更に、前記レーザー加工又は機械的な研磨によりパターニングされた箇所に前記封止材を配することを特徴とする。
本発明では、第１電極板形成工程において、透明導電膜及び半導体層を成膜した後にこれら透明導電膜及び半導体層をレーザー加工し又は機械的に研磨してパターニングするか、及び／又は第２電極板形成工程において、対向導電膜を成膜した後に、この対向導電膜をレーザー加工又は機械的な研磨をしてパターニングする。したがって、これら透明導電膜，半導体層及び／又は対向導電膜のパターニングが容易となる。特に、パターニングする工程を、レーザー加工又は機械的な研磨により描くように行うことができるため、第１電極板及び第２電極板を流れ作業で作製する方法に適している。
また、透明導電膜及び半導体層並びに対向導電膜を容易に多様な形状にパターニングすることができる。
請求項５の発明は、請求項４に記載の電気モジュールの製造方法であって、前記封止材は、一の基板の板面を正面視した際に、前記封止材の内側の全面を覆うように配することを特徴とする。
本発明によれば、半導体層が封止材内、すなわち複数のセル内を隙間なく覆い、電解液が一の基板又は他の基板に接しないため、複数のセル全体を半導体層の色彩によって略一色することができる。また、当該セルにおける光電変換効率を向上させることができる。
請求項６の発明は、請求項４又は５に記載の電気モジュールの製造方法であって、前記封止材は、前記半導体層又は前記対向導電膜の表面に及んで前記半導体層又は前記対向導電膜の一部を被覆するように配することを特徴とする。
本発明では、前記間隙に配した封止材が前記半導体層又は前記対向導電膜の表面に及んで前記半導体層又は前記対向導電膜の一部を被覆するように配すればよいため、第１電極板と第２電極板との貼り合せ時にこれらの位置合わせを厳密に考慮することなく簡便に行うことができる。
請求項７の発明は、請求項４〜６のいずれか１項に記載の電気モジュールの製造方法であって、前記封止材として、熱可塑性樹脂、熱硬化性樹脂、光硬化性樹脂、熱光硬化性樹脂の少なくともいずれかを用いていることを特徴とする。
本発明では、封止材として、熱可塑性樹脂、熱硬化性樹脂、光硬化性樹脂、熱光硬化性樹脂の少なくともいずれかを用いているため、容易に隙間なく封止材を配することができる。 According to the first aspect of the present invention, a transparent conductive film is formed on one substrate, a first electrode plate having a semiconductor layer formed on the surface of the transparent conductive film, and a counter conductive film is formed on another substrate. The second electrode plate is disposed with the transparent conductive film and the counter conductive film facing each other and bonded together by a sealing material, and the sealing material is a front view of the plate surface of the one substrate. In this case, the cell is disposed so as to surround at least the semiconductor layer, the surrounded region is configured as a cell, and the electrolyte is sealed by the sealing material, the first electrode plate, and the second electrode plate. The semiconductor module is characterized in that the semiconductor layer covers the entire inner surface of the sealing material when the plate surface of the one substrate is viewed from the front.
In the present invention, when the plate surface of the one substrate is viewed from the front, the entire inner surface of the sealing material is covered, that is, the inside of the cell is covered without a gap, so that the cell surrounded by the sealing material The color of the semiconductor layer can be made uniform. In addition, the photoelectric conversion efficiency in the cell can be improved.
Invention of Claim 2 is an electric module of Claim 1, Comprising: The said transparent conductive film and the said opposing conductive film are each formed by patterning several intervals, and the several transparent conductive films patterned The sealing material is disposed in the gaps and the gaps between the plurality of opposing conductive films disposed opposite to the plurality of transparent conductive films, and a plurality of the cells are formed adjacent to each other.
In the present invention, the semiconductor layer covers the plurality of cells without gaps, and the gap between the transparent conductive films and the plurality of transparent conductive films are opposed so that the electrolytic solution does not contact one substrate or another substrate. A sealing material is disposed in the gap between the plurality of opposed conductive films arranged. Therefore, the entire plurality of cells can be made substantially one color by the color of the semiconductor layer. In addition, the photoelectric conversion efficiency in the cell can be improved.
Invention of Claim 3 is an electric module of Claim 2, Comprising: The said sealing material distribute | arranged to the clearance gap between these transparent conductive films and the clearance gap between these opposing conductive films is the said semiconductor It extends over the surface of the layer or the counter conductive film, and a part of these is covered.
In the present invention, the gaps between the plurality of transparent conductive films and the gaps between the plurality of transparent conductive films disposed opposite to the plurality of transparent conductive films are sealed between the plurality of adjacent transparent conductive films and the plurality of facings. The conductive films can be reliably insulated.
According to a fourth aspect of the present invention, there is provided a first electrode plate forming step of forming a first electrode plate by forming a transparent conductive film on one substrate and forming a semiconductor layer on the surface of the transparent conductive film. A second electrode plate forming step of forming a second electrode plate by forming a counter conductive film on another substrate facing the other substrate, and at least one of the first electrode plate and the second electrode plate A sealing material arranging step of arranging a sealing material so as to surround at least the semiconductor layer when the plate surface is viewed from the front, and the first electrode plate and the second electrode by the sealing material. A method of manufacturing an electric module comprising a cell forming step of bonding a plate to form a cell, wherein the transparent conductive film and the semiconductor layer are formed on the one substrate in the first electrode plate forming step. After the transparent conductive film and the semiconductor layer are laser processed or mechanically At least a step of patterning by polishing and a step of patterning the counter conductive film by laser processing or mechanical polishing after forming the counter conductive film on the other substrate in the second electrode plate forming step; One of the steps is included, and the sealing material is further disposed at a location patterned by the laser processing or mechanical polishing.
In the present invention, in the first electrode plate forming step, after forming the transparent conductive film and the semiconductor layer, the transparent conductive film and the semiconductor layer are patterned by laser processing or mechanical polishing and / or second. In the electrode plate forming step, after forming a counter conductive film, the counter conductive film is patterned by laser processing or mechanical polishing. Therefore, patterning of these transparent conductive films, semiconductor layers and / or counter conductive films is facilitated. In particular, since the patterning step can be performed by drawing with laser processing or mechanical polishing, it is suitable for a method of manufacturing the first electrode plate and the second electrode plate by a flow operation.
In addition, the transparent conductive film, the semiconductor layer, and the counter conductive film can be easily patterned into various shapes.
Invention of Claim 5 is a manufacturing method of the electric module of Claim 4, Comprising: When the said sealing material sees the plate | board surface of one board | substrate in front, the whole inner surface of the said sealing material is used. It is arranged to cover it.
According to the present invention, the semiconductor layer covers the encapsulant, that is, the plurality of cells without gaps, and the electrolyte does not contact one substrate or another substrate. Can be one color. In addition, the photoelectric conversion efficiency in the cell can be improved.
Invention of Claim 6 is a manufacturing method of the electric module of Claim 4 or 5, Comprising: The said sealing material reaches the surface of the said semiconductor layer or the said counter conductive film, and the said semiconductor layer or the said counter conductive It arrange | positions so that a part of film | membrane may be coat | covered.
In the present invention, the sealing material disposed in the gap may be disposed so as to reach the surface of the semiconductor layer or the counter conductive film so as to cover a part of the semiconductor layer or the counter conductive film. These alignments can be easily performed without strictly considering the bonding between the electrode plate and the second electrode plate.
Invention of Claim 7 is a manufacturing method of the electric module of any one of Claims 4-6, Comprising: As said sealing material, a thermoplastic resin, a thermosetting resin, a photocurable resin, heat | fever It is characterized by using at least one of photocurable resins.
In the present invention, since at least one of a thermoplastic resin, a thermosetting resin, a photocurable resin, and a thermophotosetting resin is used as the sealing material, the sealing material can be easily arranged without a gap. it can.

本発明の電気モジュールによれば、一の基板の板面を正面視した際に、前記封止材の内側の全面を覆っている、すなわちセル内を隙間なく覆っているため、封止材に囲繞されたセル内を半導体層の色彩一色することができ、色素増感太陽電池のデザイン性を向上することができるという効果を奏する。また、色素増感太陽電池の光電変換効率を向上させることができる。
また、本発明の電気モジュールの製造方法によれば、透明導電膜及び半導体層又は対向導電膜のパターニングが容易になるため、色素増感太陽電池の製造効率を高めることができるという効果を奏する。 According to the electric module of the present invention, when the plate surface of one substrate is viewed from the front, the entire inner surface of the sealing material is covered, that is, the inside of the cell is covered without a gap. The color of the semiconductor layer can be made uniform within the enclosed cell, and the design of the dye-sensitized solar cell can be improved. Moreover, the photoelectric conversion efficiency of a dye-sensitized solar cell can be improved.
Moreover, according to the manufacturing method of the electric module of this invention, since the patterning of a transparent conductive film and a semiconductor layer or a counter conductive film becomes easy, there exists an effect that the manufacturing efficiency of a dye-sensitized solar cell can be improved.

は、本発明の一実施形態として示した電気モジュールを模式的に示した厚さ方向の断面図である。These are sectional drawings of the thickness direction which showed typically the electric module shown as one embodiment of the present invention. （ａ）、（ｂ）は、本発明の一実施形態として示した電気モジュールの製造方法の第１電極板形成工程を示した図である。(A), (b) is the figure which showed the 1st electrode plate formation process of the manufacturing method of the electric module shown as one Embodiment of this invention. は、本発明の一実施形態として示した電気モジュールの製造方法の封止材配置工程を示した断面図である。These are sectional drawings which showed the sealing material arrangement | positioning process of the manufacturing method of the electric module shown as one Embodiment of this invention. は、本発明の一実施形態として示した電気モジュールの製造方法のセル形成工程を示した断面図である。These are sectional drawings which showed the cell formation process of the manufacturing method of the electric module shown as one Embodiment of this invention. は、本発明の一実施形態として示した電気モジュールの製造方法のセル形成工程を示した断面図である。These are sectional drawings which showed the cell formation process of the manufacturing method of the electric module shown as one Embodiment of this invention. は、本発明の一実施形態として示した電気モジュールの接続状態を示した断面図である。These are sectional drawings which showed the connection state of the electric module shown as one Embodiment of this invention. は、本発明の一実施形態として示した電気モジュールの変形例を示した厚さ方向の断面図である。These are sectional drawings of the thickness direction which showed the modification of the electric module shown as one Embodiment of this invention. （ａ）〜（ｄ）は、従来の電気モジュールの製造方法を示した断面図である。(A)-(d) is sectional drawing which showed the manufacturing method of the conventional electric module.

以下、図を参照して本発明の電気モジュール及び電気モジュールの製造方法の一実施形態について説明する。図１は、本発明の電気モジュールの一例として示された色素増感太陽電池１を実際の寸法及び比率に関係なく模式的に示したもの（以下全ての図において同様）である。
同図に示すように、色素増感太陽電池１は、一の基板２上に間隔をおいて複数成膜された透明導電膜３及び半導体層４を備えた第１電極板５と、他の基板６上に間隔をおいて複数成膜された対向導電膜７を備えた第２電極板８との間に、セパレータ９を介装し、複数の透明導電膜３及び半導体層４並びに複数の対向導電膜７のそれぞれを囲繞する封止材１０を配するとともに、内部に電解液１１を充填して液密に封止したものである。 Hereinafter, an embodiment of an electric module and a method for manufacturing the electric module according to the present invention will be described with reference to the drawings. FIG. 1 schematically shows a dye-sensitized solar cell 1 shown as an example of the electric module of the present invention regardless of actual dimensions and ratios (the same applies to all the drawings below).
As shown in the figure, the dye-sensitized solar cell 1 includes a first electrode plate 5 having a plurality of transparent conductive films 3 and semiconductor layers 4 formed on one substrate 2 at intervals, and other electrodes. A separator 9 is interposed between the second electrode plate 8 provided with a plurality of opposing conductive films 7 formed on the substrate 6 at intervals, and a plurality of transparent conductive films 3, semiconductor layers 4, and a plurality of A sealing material 10 surrounding each of the opposing conductive films 7 is disposed, and an electrolyte solution 11 is filled therein and liquid-tightly sealed.

一の基板２及び他の基板６は、透明導電膜３及び対向導電膜７の基台となる部材であり、例えば、ポリエチレンナフタレート（ＰＥＮ）、ポリエチレンテレフタレート（ＰＥＴ）等の透明の合成樹脂材料を略矩形に打ち抜いて形成されたものである。 One substrate 2 and another substrate 6 are members that serve as a base for the transparent conductive film 3 and the counter conductive film 7. For example, transparent synthetic resin materials such as polyethylene naphthalate (PEN) and polyethylene terephthalate (PET) are used. Is formed by punching into a substantially rectangular shape.

透明導電膜３は、いわゆる第１電極となるものであり、一の基板２の板面に間隔をおいて複数成膜されている。透明導電膜３の材料としては、酸化スズ（ＩＴＯ）、酸化亜鉛等が用いられている。 The transparent conductive film 3 serves as a so-called first electrode, and a plurality of transparent conductive films 3 are formed on the plate surface of one substrate 2 at intervals. As a material for the transparent conductive film 3, tin oxide (ITO), zinc oxide, or the like is used.

半導体層４は、後述する増感色素から電子を受け取り輸送する機能を有するものであり、金属酸化物からなる半導体により各透明導電膜３の表面の全体を覆うように隈なく設けられている。金属酸化物としては、例えば、酸化チタン（ＴｉＯ₂）、酸化亜鉛（ＺｎＯ）、酸化スズ（ＳｎＯ₂）、等が用いられる。 The semiconductor layer 4 has a function of receiving and transporting electrons from a sensitizing dye to be described later, and is provided so as to cover the entire surface of each transparent conductive film 3 with a semiconductor made of a metal oxide. As the metal oxide, for example, titanium oxide (TiO ₂ ), zinc oxide (ZnO), tin oxide (SnO ₂ ), or the like is used.

半導体層４は、増感色素を担持している。増感色素は、有機色素または金属錯体色素で構成されている。有機色素としては、例えば、クマリン系、ポリエン系、シアニン系、ヘミシアニン系、チオフェン系、等の各種有機色素を用いることができる。金属錯体色素としては、例えば、ルテニウム錯体等が好適に用いられる。
以上の構成の下に、第１電極板５は、一の基板２の一方の板面に間隔をおいて複数の透明導電膜３を成膜し、各透明導電膜３の表面全体を覆う半導体層４を成膜して構成されている。 The semiconductor layer 4 carries a sensitizing dye. The sensitizing dye is composed of an organic dye or a metal complex dye. Examples of organic dyes include various organic dyes such as coumarin, polyene, cyanine, hemicyanine, and thiophene. As the metal complex dye, for example, a ruthenium complex is preferably used.
Under the above configuration, the first electrode plate 5 is a semiconductor in which a plurality of transparent conductive films 3 are formed on one plate surface of one substrate 2 at intervals, and the entire surface of each transparent conductive film 3 is covered. The layer 4 is formed by film formation.

対向導電膜７は、いわゆる第２電極となるものであり、複数の透明導電膜３及び半導体層４に対向するように他の基板６の板面に間隔をおいて複数成膜されている。
この対向導電膜７には、例えば、酸化スズ（ＩＴＯ）、酸化亜鉛等が用いられている。
他の基板６と対向導電膜７とは第２電極板８を構成している。この第２電極板８は、各対向導電膜７を各透明導電膜３に対向させて、第１電極板５と対向配置されている。 The counter conductive film 7 serves as a so-called second electrode, and a plurality of counter conductive films 7 are formed on the plate surface of another substrate 6 at intervals so as to oppose the plurality of transparent conductive films 3 and the semiconductor layer 4.
For example, tin oxide (ITO), zinc oxide or the like is used for the counter conductive film 7.
The other substrate 6 and the counter conductive film 7 constitute a second electrode plate 8. The second electrode plate 8 is disposed to face the first electrode plate 5 with the opposing conductive films 7 facing the transparent conductive films 3.

セパレータ９は、電解液１１及び封止材１０を通過させる多数の孔（不図示）を有した不織布等のシート材により形成されたものであり、第１電極板５と第２電極板８との間に介装され封止材１０により挟持されている。 The separator 9 is formed of a sheet material such as a nonwoven fabric having a large number of holes (not shown) through which the electrolytic solution 11 and the sealing material 10 pass, and the first electrode plate 5, the second electrode plate 8, And is sandwiched between the sealing materials 10.

封止材１０は、透明導電膜３及び半導体層４並びにこれに対向配置された対向導電膜７のそれぞれに接触しつつこれらを囲繞するように第１電極板５と第２電極板８との間に配されている。すなわち、封止材１０は、透明導電膜３及び半導体層４との間、並びに対向導電膜７との間に隙間を形成しないようにこれらを囲繞している。この封止材１０によって、これら第１電極板５と第２電極板８とが接着され、第１電極板５と第２電極板８と封止材とによって形成される領域がセルＳとして構成されている。
封止材１０の材料には、例えば、紫外線硬化性樹脂、シリコンホットメルト等の熱硬化性樹脂、又は熱可塑性樹脂又は熱光硬化性樹脂等が用いられる。 The sealing material 10 is formed between the first electrode plate 5 and the second electrode plate 8 so as to surround the transparent conductive film 3, the semiconductor layer 4, and the opposing conductive film 7 disposed to face the transparent conductive film 3 and the semiconductor layer 4. Arranged in between. That is, the sealing material 10 surrounds these so as not to form a gap between the transparent conductive film 3 and the semiconductor layer 4 and between the opposing conductive film 7. The first electrode plate 5 and the second electrode plate 8 are bonded by the sealing material 10, and a region formed by the first electrode plate 5, the second electrode plate 8 and the sealing material is configured as a cell S. Has been.
As the material of the sealing material 10, for example, an ultraviolet curable resin, a thermosetting resin such as silicon hot melt, a thermoplastic resin, or a thermosetting resin is used.

セルＳ内には、電解液１１が封止されている。
電解液１１としては、例えば、アセトニトリル、プロピオニトリル等の非水系溶剤；ヨウ化ジメチルプロピルイミダゾリウム又はヨウ化ブチルメチルイミダゾリウム等のイオン液体などの液体成分に、ヨウ化リチウム等の支持電解液とヨウ素とが混合された溶液等が用いられている。また、電解液１１は、逆電子移動反応を防止するため、ｔ−ブチルピリジンを含むものでもよい。 In the cell S, the electrolyte solution 11 is sealed.
Examples of the electrolytic solution 11 include non-aqueous solvents such as acetonitrile and propionitrile; liquid components such as ionic liquids such as dimethylpropylimidazolium iodide and butylmethylimidazolium iodide; and a supporting electrolytic solution such as lithium iodide. A solution or the like in which iodine and iodine are mixed is used. Moreover, in order to prevent reverse electron transfer reaction, the electrolyte solution 11 may contain t-butylpyridine.

次に、色素増感太陽電池１の製造方法について図２〜図７を用いて説明する。
本発明の一実施形態の色素増感太陽電池１の製造方法は、例えば、以下の工程を有するものである。すなわち、
（Ｉ）図２（ａ），（ｂ）及び図３に示すように、一の基板２に透明導電膜３を成膜するとともに、透明導電膜３の表面に半導体層４を成膜し、その後レーザー加工又は機械的な研磨によりパターニングして第１電極板５を形成する第１電極板形成工程と、一の基板２に対向させる他の基板６に対向導電膜７を成膜し、その後レーザー加工又は機械的な研磨によりパターニングして第２電極板８を形成する第２電極板形成工程＜電極板形成工程＞
（ＩＩ）図３に示すように、第１電極板５及び第２電極板８のいずれか一方又は双方に封止材１０を配する工程＜封止材配置工程＞
（ＩＩＩ）図４，図５に示すように、前記封止材によって第１電極板５と第２電極板８とを貼り合わせ、各半導体層４を囲繞するセルＳを複数形成する工程＜セル形成工程＞ Next, the manufacturing method of the dye-sensitized solar cell 1 is demonstrated using FIGS.
The manufacturing method of the dye-sensitized solar cell 1 of one Embodiment of this invention has the following processes, for example. That is,
(I) As shown in FIGS. 2A, 2B and 3, a transparent conductive film 3 is formed on one substrate 2, and a semiconductor layer 4 is formed on the surface of the transparent conductive film 3. Thereafter, a first electrode plate forming step of patterning by laser processing or mechanical polishing to form the first electrode plate 5, and a counter conductive film 7 is formed on another substrate 6 facing the one substrate 2, and thereafter Second electrode plate forming step of forming second electrode plate 8 by patterning by laser processing or mechanical polishing <electrode plate forming step>
(II) As shown in FIG. 3, the process of arrange | positioning the sealing material 10 to any one or both of the 1st electrode plate 5 and the 2nd electrode plate 8 <sealing material arrangement | positioning process>
(III) As shown in FIGS. 4 and 5, the first electrode plate 5 and the second electrode plate 8 are bonded together by the sealing material, and a plurality of cells S surrounding each semiconductor layer 4 are formed <cell Formation process>

（Ｉ）＜電極板形成工程＞
電極板形成工程において、第１電極板５及び第２電極板８は、以下のようにして形成される。
＜第１電極板形成工程＞
図２（ａ）に示すように、一の基板２として、ＰＥＴ基板等を用い、該ＰＥＴ基板等の板面の略全体に、透明導電膜３として酸化インジウムスズ（ＩＴＯ）等をスパッタリング、印刷法又はエアロゾルデポジション法（以下「ＡＤ法」という）等により成膜する。
その後、半導体層４の成膜は、透明導電膜３の表面全体、すなわち一の基板２の板面全体に、例えば焼成が可能な酸化チタン含有ペーストを印刷法等により隈なく塗布（いわゆるべた塗り）し、ペーストを多孔質となるよう焼結して行う。
特に、一の基板２として、フィルム状のＰＥＴ等を用いる場合は、半導体層４をＡＤ法によって好適に製膜することができる。また、半導体層４は、低温焼成法によってもＰＥＴフィルム等に好適に製膜することができる。この場合、一の基板２の全体に低温焼成ペーストを印刷法などにより塗布し、比較的低い温度領域で乾燥することで半導体層４を形成する。 (I) <Electrode plate forming step>
In the electrode plate forming step, the first electrode plate 5 and the second electrode plate 8 are formed as follows.
<First electrode plate forming step>
As shown in FIG. 2A, a PET substrate or the like is used as one substrate 2, and indium tin oxide (ITO) or the like is sputtered and printed as a transparent conductive film 3 on almost the entire surface of the PET substrate or the like. The film is formed by a method such as a deposition method or an aerosol deposition method (hereinafter referred to as “AD method”).
Thereafter, the semiconductor layer 4 is formed by applying, for example, a bakable titanium oxide-containing paste on the entire surface of the transparent conductive film 3, that is, the entire plate surface of one substrate 2 by a printing method or the like (so-called solid coating). And the paste is sintered to be porous.
In particular, when film-like PET or the like is used as one substrate 2, the semiconductor layer 4 can be suitably formed by the AD method. Moreover, the semiconductor layer 4 can be suitably formed into a PET film or the like by a low temperature baking method. In this case, the semiconductor layer 4 is formed by applying a low-temperature firing paste to the entire substrate 2 by a printing method or the like and drying in a relatively low temperature region.

多孔質の半導体層４を形成した後は、増感色素を溶剤に溶かした増感色素溶液に半導体層４を浸漬させ、該半導体層４に増感色素を担持させる。なお、半導体層４に増感色素を担持させる方法は、上記に限定されず、増感色素溶液中に半導体層４を移動させながら連続的に投入・浸漬・引き上げを行う方法なども採用される。
その後、図２（ｂ）に示すように、透明導電膜３と半導体層４とを、紫外線レーザーやＣＯ₂レーザー等のレーザー加工、又は、カッター等による機械的研磨により例えば矩形等の所定のセルの形状となるようパターニングし、複数の透明導電膜３及び半導体層４の層を間隔を空けて形成する。
なお、この際、透明導電膜３及び半導体層４の一部には、隣り合う透明導電膜３及び半導体層４に向けて一部が突出した接続部Ｐ，Ｐ・・を形成し、後で隣接するセルＳと直列接続できるようにしておく。 After the porous semiconductor layer 4 is formed, the semiconductor layer 4 is immersed in a sensitizing dye solution in which a sensitizing dye is dissolved in a solvent, and the sensitizing dye is supported on the semiconductor layer 4. The method for supporting the sensitizing dye on the semiconductor layer 4 is not limited to the above, and a method of continuously charging, dipping and pulling up while moving the semiconductor layer 4 in the sensitizing dye solution is also employed. .
Thereafter, as shown in FIG. 2B, the transparent conductive film 3 and the semiconductor layer 4 are processed into a predetermined cell such as a rectangle by laser processing such as ultraviolet laser or CO ₂ laser, or mechanical polishing by a cutter or the like. A plurality of transparent conductive films 3 and semiconductor layers 4 are formed with a space therebetween.
At this time, a part of the transparent conductive film 3 and the semiconductor layer 4 is formed with connection portions P, P,... Protruding partly toward the adjacent transparent conductive film 3 and the semiconductor layer 4. A serial connection with adjacent cells S is made possible.

＜第２電極板形成工程＞
第２電極板８は、第１電極板５における透明導電膜３及び半導体層４のパターニングと同様にして行われる。すなわち、ポリエチレンテレフタレート（ＰＥＴ）等よりなる他の基板６の一方の板面の全体に、対向導電膜７としてＩＴＯ又は酸化亜鉛等をスパッタリングにより隈なく成膜する。対向導電膜７は、ＡＤ法、印刷法やスプレー法等にて形成されたものであってもよい。 <Second electrode plate forming step>
The second electrode plate 8 is performed in the same manner as the patterning of the transparent conductive film 3 and the semiconductor layer 4 in the first electrode plate 5. That is, ITO, zinc oxide, or the like is formed as a counter conductive film 7 on the entire surface of one of the other substrates 6 made of polyethylene terephthalate (PET) or the like by sputtering. The counter conductive film 7 may be formed by an AD method, a printing method, a spray method, or the like.

そして、透明導電膜３及び半導体層４の形成と同様に、紫外線レーザーやＣＯ₂レーザー等のレーザー加工、又は、カッター等による機械的研磨により対向導電膜７を例えば矩形等の所定の形状となるようパターニングし、複数の対向導電膜７を間隔をおいて形成する。
なお、対向導電膜７は、隣り合う対向導電膜７に対向する透明導電膜３及び半導体層４の接続部Ｐと対向させて直列接続構造とするため、透明導電膜３及び半導体層４のように、突出する部分を設けない。 Then, similarly to the formation of the transparent conductive film 3 and the semiconductor layer 4, the opposing conductive film 7 has a predetermined shape such as a rectangle by laser processing such as ultraviolet laser or CO ₂ laser or mechanical polishing by a cutter or the like. The plurality of opposing conductive films 7 are formed at intervals.
In addition, since the opposing conductive film 7 is opposed to the connecting portion P of the transparent conductive film 3 and the semiconductor layer 4 facing the adjacent opposing conductive film 7, the opposing conductive film 7 has a series connection structure. No protruding part is provided.

（ＩＩ）＜封止材配置工程＞
図３に示すように、封止材配置工程においては、パターニングされた第１電極板５の隣り合う半導体層４同士の間隙１５に封止材１０を隙間なく充填して透明導電膜３及び半導体層４に接するようにこれら透明導電膜３及び半導体層４を囲繞する。
これにより、半導体層４は、封止材１０の内側の全面を覆うように配された状態となる。
なお、封止材１０は、第２電極板８においてパターニングにより形成された間隙１５にも配してもよい。
また、この際に、半導体層４の接続部Ｐ上と接続部Ｐに対向する対向導電膜７上にＵＶＡｇペーストＱを塗布しておく。 (II) <Encapsulant placement step>
As shown in FIG. 3, in the sealing material arranging step, the transparent conductive film 3 and the semiconductor are filled by filling the gap 15 between the adjacent semiconductor layers 4 of the patterned first electrode plate 5 without gaps. The transparent conductive film 3 and the semiconductor layer 4 are surrounded so as to be in contact with the layer 4.
As a result, the semiconductor layer 4 is placed so as to cover the entire inner surface of the sealing material 10.
The sealing material 10 may also be disposed in the gap 15 formed by patterning in the second electrode plate 8.
At this time, the UVAg paste Q is applied to the connection portion P of the semiconductor layer 4 and the opposing conductive film 7 facing the connection portion P.

（ＩＩＩ）＜セル形成工程＞
セル形成工程は、図４，図５に示すように、封止材配置工程の後に、各半導体層４と各対向導電膜７とを対向させて第１電極板５と第２電極板８とを貼り合わせ、封止材１０を熱硬化等させて第１電極板５と第２電極板８とを接着し、第１電極板５、第２電極板８及び封止材１０により囲繞されたセルＳを形成する。 (III) <Cell formation process>
As shown in FIG. 4 and FIG. 5, the cell formation step is performed after the encapsulant placement step, with the first electrode plate 5 and the second electrode plate 8 facing each semiconductor layer 4 and each opposing conductive film 7. The first electrode plate 5 and the second electrode plate 8 are bonded together by thermosetting the sealing material 10 and surrounded by the first electrode plate 5, the second electrode plate 8 and the sealing material 10. A cell S is formed.

これにより、透明導電膜３及び半導体層４並びに対向導電膜７は、封止材１０に接しつつ、封止材１０に囲繞され、一の基板２及び他の基板６のそれぞれの全面に隙間無く成膜され、確実に絶縁された状態となる。
そして、図５に示すように、各セルＳに形成された不図示の貫通孔からセルＳ内に電解液１１を充填し、その後、貫通孔を封止材で封止し、図６に示すように、各セルＳの透明導電膜３及び半導体層４の接続部Ｐが隣接するセルＳに突出して直列接続された色素増感太陽電池１を得る。 Thereby, the transparent conductive film 3, the semiconductor layer 4, and the counter conductive film 7 are surrounded by the sealing material 10 while being in contact with the sealing material 10, and there are no gaps on the entire surfaces of the one substrate 2 and the other substrate 6. The film is formed and is surely insulated.
Then, as shown in FIG. 5, the electrolyte solution 11 is filled into the cells S from the through holes (not shown) formed in each cell S, and then the through holes are sealed with a sealing material, as shown in FIG. Thus, the dye-sensitized solar cell 1 in which the transparent conductive film 3 of each cell S and the connection portion P of the semiconductor layer 4 protrude from the adjacent cell S and are connected in series is obtained.

以上のように、色素増感太陽電池１の製造方法によれば、透明導電膜３及び半導体層４を一の基板２の全体に成膜した後、これら透明導電膜３及び半導体層４をレーザー加工又は機械的な研磨によりパターニングすることにより、透明導電膜３及び半導体層４を容易かつ効率的に一の基板２にパターニングすることができるという効果が得られる。 As described above, according to the method for manufacturing the dye-sensitized solar cell 1, the transparent conductive film 3 and the semiconductor layer 4 are formed on the entire substrate 2, and then the transparent conductive film 3 and the semiconductor layer 4 are formed by laser. By patterning by processing or mechanical polishing, there is an effect that the transparent conductive film 3 and the semiconductor layer 4 can be easily and efficiently patterned on one substrate 2.

また、対向導電膜７のパターニングも上記と同様に、他の基板６の全体に対向導電膜を成膜した後、対向導電膜７をレーザー加工又は機械的な研磨により容易にパターニングすることができるという効果が得られる。
したがって、複数のセルＳを有する色素増感太陽電池１を効率的に製造することができるという効果を奏する。
また、レーザー加工又は機械的な研磨によりパターニングするため、多様な形状のセルＳを容易に形成することができるという効果が得られる。 Similarly to the above, the opposing conductive film 7 can be patterned by laser processing or mechanical polishing after forming the opposing conductive film on the entire other substrate 6 as described above. The effect is obtained.
Therefore, there is an effect that the dye-sensitized solar cell 1 having the plurality of cells S can be efficiently manufactured.
In addition, since patterning is performed by laser processing or mechanical polishing, it is possible to easily form cells S having various shapes.

また、半導体層４は、封止材１０が囲繞するセルＳ内において、一の基板２の板面を正面視した場合に、一の基板２の全面を覆うように形成されているため、電解液１１の色彩が半導体層４の色彩に混在することに起因する外観のムラを生ずることを防止でき、色素増感太陽電池１の外観的な品質及び色素増感太陽電池１を用いる各種製品のデザイン性を高めて、色素増感太陽電池１自身及び色素増感太陽電池１を用いた製品の付加価値を向上させることができるという効果が得られる。 Further, the semiconductor layer 4 is formed so as to cover the entire surface of the one substrate 2 when the plate surface of the one substrate 2 is viewed from the front in the cell S surrounded by the sealing material 10. It is possible to prevent uneven appearance due to the color of the liquid 11 being mixed in the color of the semiconductor layer 4, and the appearance quality of the dye-sensitized solar cell 1 and various products using the dye-sensitized solar cell 1. The effect that a design property is improved and the added value of the product using the dye-sensitized solar cell 1 itself and the dye-sensitized solar cell 1 can be improved is acquired.

更に、各セルＳにおいて、半導体層４が封止材１０に囲繞された透明導電膜３の表面全体に配されているため、各セルＳにおける光電変換効率を向上させることができるという効果が得られる。
また更に、封止材として、シリコンホットメルト等の熱可塑性樹脂、熱硬化性樹脂、光硬化性樹脂、熱光硬化性樹脂の少なくともいずれかを用いているため、隣り合う透明導電膜３及び半導体層４同士の間隙１５又は隣り合う対向導電膜７同士の間隙１５に容易に隙間なく封止材１０を配することができるという効果が得られる。 Furthermore, in each cell S, since the semiconductor layer 4 is disposed on the entire surface of the transparent conductive film 3 surrounded by the sealing material 10, an effect that the photoelectric conversion efficiency in each cell S can be improved is obtained. It is done.
Furthermore, since at least one of thermoplastic resin such as silicon hot melt, thermosetting resin, photocurable resin, and thermosetting resin is used as the sealing material, the adjacent transparent conductive film 3 and the semiconductor There is an effect that the sealing material 10 can be easily disposed without a gap in the gap 15 between the layers 4 or the gap 15 between the adjacent opposing conductive films 7.

また、ＡＤ法や低温焼成法を用い、比較的ガラス転移温度が低いＰＥＮフィルム状の一の基板２に透明導電膜３や半導体層４を成膜し、ＲｏｌｌｔｏＲｏｌｌで（すなわち、ロール単位で）又は帯状に搬送しながら第１電極板５及び第２電極板８を作成する場合にも、容易に透明導電膜３及び半導体層４をパターニングすることができるという効果が得られる。 Further, a transparent conductive film 3 or a semiconductor layer 4 is formed on a single substrate 2 in the form of a PEN film having a relatively low glass transition temperature by using an AD method or a low temperature baking method, and roll to roll (that is, in roll units). ) Or when the first electrode plate 5 and the second electrode plate 8 are formed while being conveyed in a belt shape, the effect that the transparent conductive film 3 and the semiconductor layer 4 can be easily patterned is obtained.

なお、上記の実施形態においては、透明導電膜３及び半導体層４並びに対向導電膜７のそれぞれをレーザー加工し又は機械的に研磨したが、いずれか一方をレーザー加工又は機械的研磨によりパターニングし、他方は他の方法によりパターニングしてもよい。
また、上記の実施形態においては、各セルＳの形状、すなわち透明導電膜３及び半導体層４並びに対向導電膜７の形状、更にこれらを囲繞する封止材１０の形状を矩形形状としたが、これに限定されるものではなく、円形、多角形その他所望の形状とすることができる。 In the above embodiment, each of the transparent conductive film 3, the semiconductor layer 4, and the counter conductive film 7 is laser-processed or mechanically polished, but either one is patterned by laser processing or mechanical polishing, The other may be patterned by other methods.
In the above embodiment, the shape of each cell S, that is, the shape of the transparent conductive film 3, the semiconductor layer 4, and the counter conductive film 7, and the shape of the sealing material 10 surrounding them are rectangular. However, the present invention is not limited to this, and a circular shape, a polygonal shape, or other desired shapes can be used.

また、本実施形態においては、封止材１０は、半導体層４及び透明導電膜３並びに対向導電膜７のいずれの表面も被覆しないで、間隙１５に配された様子を例示したが、封止材１０は、図７に示すように、半導体層４及び透明導電膜３及び／又は対向導電膜７の表面に及んでこれらの表面を一部被覆するように配されていてもよい。
封止材１０の配置を上記のように構成することにより、セルＳ間での絶縁をより確実にすることができるとともに、第１電極板５と第２電極板８との位置合わせを厳密にする必要がなくなり、これら第１電極板５と第２電極板８との貼り合せ工程がより簡便となるという効果が得られる。 Further, in the present embodiment, the sealing material 10 is illustrated as being disposed in the gap 15 without covering any surfaces of the semiconductor layer 4, the transparent conductive film 3, and the counter conductive film 7. As shown in FIG. 7, the material 10 may be disposed so as to reach the surfaces of the semiconductor layer 4, the transparent conductive film 3 and / or the counter conductive film 7 and partially cover these surfaces.
By arranging the sealing material 10 as described above, the insulation between the cells S can be further ensured, and the first electrode plate 5 and the second electrode plate 8 are strictly aligned. There is no need to do this, and the effect that the bonding process of the first electrode plate 5 and the second electrode plate 8 becomes simpler is obtained.

なお、対向導電膜７の表面には、透明導電膜３と対向導電膜７との間の電子の授受を促進させる触媒層が設けられていてもよい。触媒層は、半導体層４に対向するように各対向導電膜７の表面全体に成膜されることが望ましい。
この触媒層の材料としては、プラチナ、ポリアニリン、ＰＥＤＯＴ、カーボン等が用いられる。 A catalyst layer that facilitates the transfer of electrons between the transparent conductive film 3 and the counter conductive film 7 may be provided on the surface of the counter conductive film 7. The catalyst layer is desirably formed on the entire surface of each opposing conductive film 7 so as to face the semiconductor layer 4.
Platinum, polyaniline, PEDOT, carbon, or the like is used as the material for the catalyst layer.

以下、実施例を用いて本発明を具体的に説明する。 Hereinafter, the present invention will be specifically described with reference to examples.

［実施例１］
１．色素増感太陽電池１の作製
＜第１電極板５＞
透明導電膜が成膜された一の基板として、予めＩＴＯがＰＥＮ基板に成膜されたペクセル社のＩＴＯ−ＰＥＮ基板（シート抵抗１５Ω／ｃｍ²）を用いた。そして、ＩＴＯ層の表面全体に、低温焼成ＴｉＯ₂ペースト（ペクセル社）をスクリーン印刷にて１０μｍ塗布し、１５０℃で乾燥を行った。このようにして形成された基板をＭＫ２色素のトルエン溶液０．３ｍＭに１０分間浸漬した。
その後、ＣＯ₂レーザーを用い、ＰＥＮ基板上のＩＴＯ層及びＴｉＯ₂層を同時にレーザー加工して０．１ｍｍ幅の間隙を形成し、ＩＴＯ層及びＴｉＯ₂層がセル間で分断されるようにパターニングを行い、第１電極板を得た。 [Example 1]
1. Preparation of dye-sensitized solar cell 1 <first electrode plate 5>
As one substrate on which a transparent conductive film was formed, an ITO-PEN substrate (sheet resistance 15 Ω / cm ² ) manufactured by Pexel in which ITO was previously formed on a PEN substrate was used. Then, the entire surface of the ITO layer, low temperature sintering TiO ₂ paste (Peccell Ltd.) was 10μm coated by screen printing, it was dried at 0.99 ° C.. The substrate thus formed was immersed in a 0.3 mM MK2 dye toluene solution for 10 minutes.
Then, using a CO ₂ laser, the ITO layer and the TiO ₂ layer on the PEN substrate are simultaneously laser processed to form a 0.1 mm wide gap, and patterned so that the ITO layer and the TiO ₂ layer are divided between cells. To obtain a first electrode plate.

＜第２電極板８＞
対向導電膜が成膜された他の基板として、予めＩＴＯがＰＥＮ基板に成膜されたペクセル社のＩＴＯ−ＰＥＮ基板（シート抵抗１５Ω／ｃｍ²）を用いた。そして、ＩＴＯ層の表面全体に触媒層としてカーボンをスクリーン印刷にて成膜した。
その後、ＣＯ₂レーザーを用い、ＰＥＮ基板上のＩＴＯ層及びカーボン層を同時にレーザー加工して幅０．１ｍｍの間隙を形成し、ＩＴＯ層及びカーボン層がセル間で分断されるようにパターニングを行い、第２電極板を得た。 <Second electrode plate 8>
As another substrate on which the counter conductive film was formed, an ITO-PEN substrate (sheet resistance 15 Ω / cm ² ) manufactured by Pexel Co., on which ITO was previously formed on a PEN substrate was used. Then, carbon was formed as a catalyst layer on the entire surface of the ITO layer by screen printing.
Then, using a CO ₂ laser, the ITO layer and the carbon layer on the PEN substrate are simultaneously laser processed to form a gap with a width of 0.1 mm, and patterning is performed so that the ITO layer and the carbon layer are divided between the cells. A second electrode plate was obtained.

＜封止材配置工程＞
第１電極板の間隙に封止材（ハイミラン）を配し、第１電極板のＩＴＯ層と第２電極板のＩＴＯ層と対向させて貼り合わせ、熱プレスにより接着しセルを３つ連結した。
この際、封止材は、５０μｍの不織布をセパレータとして介して、第１電極板のＩＴＯ層、ＴｉＯ₂層と第２電極板のＩＴＯ層及び触媒層との外周縁に接するように配置した。 <Encapsulant placement process>
Sealing material (High Milan) was placed in the gap between the first electrode plates, the ITO layer of the first electrode plate and the ITO layer of the second electrode plate were bonded to each other, bonded by hot pressing, and three cells were connected. .
At this time, the sealing material via a 50μm nonwoven as separator, ITO layer of the first electrode plate, and arranged so as to be in contact with the outer peripheral edge of the ITO layer and the catalyst layer of the TiO ₂ layer and the second electrode plate.

その後、第２電極板に設けておいた貫通孔から電解液（１．０Ｍの１−メチル−３−プロピルイミダゾリウムヨージド，０．００５Ｍのヨウ素，０．１Ｍのチオシアン酸グアニジンメトキシプロピオニトリル電解液）を注入し、最後に貫通孔を光硬化製樹脂によって封止し各セルを直列接続した色素増感太陽電池を得た。 Thereafter, an electrolytic solution (1.0 M 1-methyl-3-propylimidazolium iodide, 0.005 M iodine, 0.1 M guanidine thiocyanate, methoxypropionitrile was passed through a through hole provided in the second electrode plate. Electrolyte solution) was injected, and finally a through-hole was sealed with a photo-curing resin to obtain a dye-sensitized solar cell in which the cells were connected in series.

［実施例２］
透明導電膜が成膜された一の基板として、予めＩＴＯがＰＥＮ基板に成膜されたペクセル社のＩＴＯ−ＰＥＮ基板（シート抵抗１５Ω／ｃｍ²）を用い、ＣＯ₂レーザーを用いて、ＰＥＮ基板上のＩＴＯ層に０．１ｍｍ幅の間隙を形成し、ＩＴＯ層をセル間で分断されるようにパターニングを行った。
ＩＴＯ層がパターニングされたＰＥＮ基板の板面全体に、ＡＤ成膜にてマスクを用いることなくＴｉＯ₂膜を６μｍ製膜した。その後、このようにして形成された基板を０．３ｍＭＭＫ２色素のトルエン溶液に１０分間浸漬して増感色素を担持させ、第１電極板を得た以外は、実施例１と同様に作製した。 [Example 2]
As a substrate on which a transparent conductive film is formed, a Pexel ITO-PEN substrate (sheet resistance 15 Ω / cm ² ) in which ITO is formed on a PEN substrate in advance is used, and a PEN substrate is used using a CO ₂ laser. A 0.1 mm wide gap was formed in the upper ITO layer, and patterning was performed so that the ITO layer was divided between cells.
A 6 μm TiO ₂ film was formed on the entire plate surface of the PEN substrate on which the ITO layer was patterned without using a mask in AD film formation. Thereafter, the substrate thus formed was immersed in a toluene solution of 0.3 mM MK2 dye for 10 minutes to carry the sensitizing dye, and was produced in the same manner as in Example 1 except that the first electrode plate was obtained. .

[比較例]
＜第１電極板形成＞
ＴｉＯ₂層を、マスクを用いてＩＴＯ層（透明導電膜）の表面にパターニングし、セル間で完全に分離するように、封止材と離間させて形成した以外は、実施例と同様の方法で色素増感太陽電池を作製した。 [Comparative example]
<First electrode plate formation>
The same method as in Example, except that the TiO ₂ layer was patterned on the surface of the ITO layer (transparent conductive film) using a mask and was separated from the encapsulant so as to be completely separated between cells. A dye-sensitized solar cell was prepared.

（２）評価
光源として蛍光灯を用い、約５００ｌｘの光量下で、上記各実施例及び比較例の色素増感太陽電池の光電変換効率を測定し比較した。
その結果、実施例１においては、短絡電流密は４．５μＡ／ｃｍ²、開放電圧は１．５Ｖ、曲率因子は０．３４、最大出力は２．３μＷ／ｃｍ²となった。
また、実施例２においては、短絡電流密度は３．２μＡ／ｃｍ², 開放電圧は１．５Ｖ、曲率因子は０．４９、最大出力は２．４μＷ／ｃｍ²となった。
一方、比較例においては、短絡電流密は２．７ μＡ／ｃｍ²、開放電圧は１．４Ｖ、曲率因子は０．５５、最大出力が２．１μＷ／ｃｍ²となった。
以上より、実施例１，２に係る色素増感太陽電池を用いた場合、生産性が向上するのみならず、比較例に係る色素増感太陽電池よりも高い電圧及び最大出力を得ることができた。 (2) Evaluation Using a fluorescent lamp as a light source, the photoelectric conversion efficiencies of the dye-sensitized solar cells of the above Examples and Comparative Examples were measured and compared under a light amount of about 500 lx.
As a result, in Example 1, the short-circuit current density was 4.5 μA / cm ² , the open circuit voltage was 1.5 V, the curvature factor was 0.34, and the maximum output was 2.3 μW / cm ² .
In Example 2, the short-circuit current density was 3.2 μA / cm ² , the open-circuit voltage was 1.5 V, the curvature factor was 0.49, and the maximum output was 2.4 μW / cm ² .
On the other hand, in the comparative example, the short-circuit current density was 2.7 μA / cm ² , the open circuit voltage was 1.4 V, the curvature factor was 0.55, and the maximum output was 2.1 μW / cm ² .
From the above, when the dye-sensitized solar cells according to Examples 1 and 2 are used, not only the productivity is improved, but also higher voltage and maximum output can be obtained than the dye-sensitized solar cell according to the comparative example. It was.

１色素増感太陽電池（電気モジュール）
２一の基板
３透明導電膜
４半導体層
５第１電極板
６他の基板
７対向導電膜
８第２電極板
１０封止材
１１電解液
Ｓセル 1 Dye-sensitized solar cell (electric module)
2 one substrate 3 transparent conductive film 4 semiconductor layer 5 first electrode plate 6 other substrate 7 counter conductive film 8 second electrode plate 10 sealing material 11 electrolyte S cell

Claims

A first electrode plate in which a transparent conductive film is formed on one substrate and a semiconductor layer is formed on the surface of the transparent conductive film, and a second electrode plate in which a counter conductive film is formed on another substrate The transparent conductive film and the counter conductive film are arranged to face each other and bonded together by a sealing material, and the sealing material has at least the semiconductor layer when the plate surface of the one substrate is viewed from the front. An electronic module in which the enclosed region is configured as a cell, and a cell in which an electrolytic solution is sealed by the sealing material, the first electrode plate, and the second electrode plate is formed. There,
The electrical module, wherein the semiconductor layer covers the entire inner surface of the sealing material when the plate surface of the one substrate is viewed from the front.

The electrical module according to claim 1,
The transparent conductive film and the counter conductive film are patterned and formed at a plurality of intervals, respectively, and the gaps between the plurality of patterned transparent conductive films and the plurality of counter conductive films disposed opposite to the plurality of transparent conductive films An electrical module, wherein the sealing material is disposed in a gap between each other, and a plurality of the cells are formed adjacent to each other.

The electrical module according to claim 2,
The sealing material disposed in the gap between the plurality of transparent conductive films and the gap between the plurality of counter conductive films reaches the surface of the semiconductor layer or the counter conductive film and covers a part of these. An electrical module characterized by that.

A first electrode plate forming step of forming a first electrode plate by forming a transparent conductive film on one substrate and forming a semiconductor layer on the surface of the transparent conductive film; A second electrode plate forming step of forming a second electrode plate by forming a counter conductive film on the substrate; and at least one of the first electrode plate and the second electrode plate, A sealing material arranging step of arranging a sealing material so as to surround at least the semiconductor layer when viewed from the front, and the first electrode plate and the second electrode plate are bonded to each other by the sealing material. A method of manufacturing an electric module having a cell forming step of forming
In the first electrode plate forming step, after forming the transparent conductive film and the semiconductor layer on the one substrate, patterning the transparent conductive film and the semiconductor layer by laser processing or mechanical polishing, and
The second electrode plate forming step includes at least one step of patterning the counter conductive film by laser processing or mechanical polishing after forming the counter conductive film on the other substrate. ,
Furthermore, the said sealing material is distribute | arranged to the location patterned by the said laser processing or mechanical grinding | polishing, The manufacturing method of the electrical module characterized by the above-mentioned.

It is a manufacturing method of the electric module of Claim 4, Comprising:
The said sealing material is a manufacturing method of the electric module of Claim 4, Comprising: The said sealing material covers the whole inner surface of the said sealing material, when the plate | board surface of one board | substrate is viewed from the front. An electrical module manufacturing method characterized by being arranged as described above.

It is a manufacturing method of the electric module according to claim 4 or 5,
The method for manufacturing an electric module, wherein the sealing material is disposed so as to cover a part of the semiconductor layer or the counter conductive film over the surface of the semiconductor layer or the counter conductive film.

It is a manufacturing method of an electric module given in any 1 paragraph of Claims 4-6,
A method of manufacturing an electric module, wherein at least one of a thermoplastic resin, a thermosetting resin, a photocurable resin, or a thermophotosetting resin is used as the sealing material.