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JP2013183004A - Method for manufacturing solar cell - Google Patents

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JP2013183004A
JP2013183004A JP2012045607A JP2012045607A JP2013183004A JP 2013183004 A JP2013183004 A JP 2013183004A JP 2012045607 A JP2012045607 A JP 2012045607A JP 2012045607 A JP2012045607 A JP 2012045607A JP 2013183004 A JP2013183004 A JP 2013183004A
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impurity diffusion
diffusion layer
type impurity
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solar cell
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JP5851284B2 (en
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Hayato Kohata
隼人 幸畑
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Mitsubishi Electric Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a solar cell, capable of manufacturing a rear-surface junction solar cell having excellent photoelectric conversion efficiency.SOLUTION: A method for manufacturing a solar cell includes the steps of; forming an impurity diffusion layer of a second conductivity type on the entire rear surface of a semiconductor substrate; forming an insulating layer on the impurity diffusion layer of the second conductivity type; forming a plurality of first island-shaped recesses reaching the semiconductor substrate from a surface of the insulating layer on the insulating layer in a dispersed manner in a surface direction of the semiconductor substrate; forming an impurity diffusion layer of a first conductivity type on a surface layer of the semiconductor substrate on a bottom surface of the first recess and on a surface layer of the impurity diffusion layer of the second conductivity type on a side surface of the first recess by diffusing an impurity of the first conductivity type on a rear surface of the semiconductor substrate via the first recess using the insulating layer as a mask; forming a first electrode electrically connected to the impurity diffusion layer of the first conductivity type through the insulating layer on one surface side of the semiconductor substrate; and forming a second electrode electrically connected to the impurity diffusion layer of the second conductivity type through the insulating layer on the one surface side of the semiconductor substrate.

Description

本発明は、太陽電池の製造方法に関する。   The present invention relates to a method for manufacturing a solar cell.

一般的な結晶系シリコン太陽電池は、受光面側の拡散層(エミッタ)に電極が接続する。このため、電極に照射された太陽光は該電極で反射され、光電変換に利用されずに損失(反射ロス)となり発電効率が制限される。これに対して、受光面側の電極を細く、高く形成することにより、結晶系シリコン太陽電池の高光電変換効率化が可能である。しかしながら、電極の細線化には限界がある。   In a general crystalline silicon solar cell, an electrode is connected to a diffusion layer (emitter) on the light receiving surface side. For this reason, the sunlight irradiated to the electrode is reflected by the electrode, becomes a loss (reflection loss) without being used for photoelectric conversion, and power generation efficiency is limited. On the other hand, the photoelectric conversion efficiency of the crystalline silicon solar cell can be improved by forming the electrode on the light receiving surface side to be thin and high. However, there is a limit to thinning the electrodes.

そこで、通常は受光面側にpn接合を形成するのに対して、結晶系シリコン太陽電池の高光電変換効率化を目的として結晶系シリコン太陽電池セルの裏面において基板の面方向にpn接合を配列する構造(裏面接合太陽電池)が提案されている。結晶系シリコン太陽電池における拡散長は数百μm程度である。このため、裏面接合太陽電池の場合には、太陽電池セルの裏面において基板の面方向に複数のpn接合を配置する必要があるが、受光面側に電極が無いため上記の反射ロスが無い理想的な構造であり、さまざまな手法が検討されている。   Therefore, while a pn junction is usually formed on the light receiving surface side, a pn junction is arranged in the surface direction of the substrate on the back surface of the crystalline silicon solar cell for the purpose of increasing the photoelectric conversion efficiency of the crystalline silicon solar cell. A structure (back junction solar cell) has been proposed. The diffusion length in the crystalline silicon solar cell is about several hundred μm. For this reason, in the case of a back junction solar cell, it is necessary to arrange a plurality of pn junctions in the surface direction of the substrate on the back surface of the solar cell, but since there is no electrode on the light receiving surface side, there is no ideal reflection loss described above. Various structures are being studied.

通常、裏面接合太陽電池の裏面における不純物拡散層のパターンとしては、n型不純物拡散層およびp型不純物拡散層のそれぞれが、連続したライン状に交互に配列されている(たとえば、非特許文献1参照)。ここで、たとえば非特許文献1に示されるように裏面接合太陽電池の基板にn型のウエハを用いた場合は、n型不純物拡散層の量子効率が低くなることがわかっている。このため、n型のウエハの裏面において、n型不純物拡散層領域の幅は、p型不純物拡散層領域の幅と比較して狭くする必要がある。これは、p型不純物拡散層領域(np+)に対して、n型不純物拡散層領域(nn+)は障壁が低く、表面再結合の影響が大きいことが原因のひとつと考えられる。したがって、裏面接合太陽電池においては、p型不純物拡散層領域の幅に対してn型不純物拡散層領域の幅を短くすることにより高光電変換効率化が可能である。   Usually, as a pattern of the impurity diffusion layer on the back surface of the back junction solar cell, each of the n-type impurity diffusion layer and the p-type impurity diffusion layer is alternately arranged in a continuous line (for example, Non-Patent Document 1). reference). Here, for example, as shown in Non-Patent Document 1, it is known that when an n-type wafer is used as the substrate of the back junction solar cell, the quantum efficiency of the n-type impurity diffusion layer is lowered. For this reason, on the back surface of the n-type wafer, the width of the n-type impurity diffusion layer region needs to be narrower than the width of the p-type impurity diffusion layer region. This is considered to be one of the reasons that the n-type impurity diffusion layer region (nn +) has a lower barrier and has a larger influence of surface recombination than the p-type impurity diffusion layer region (np +). Therefore, in the back junction solar cell, high photoelectric conversion efficiency can be achieved by shortening the width of the n-type impurity diffusion layer region relative to the width of the p-type impurity diffusion layer region.

特開2004−71828号公報JP 2004-71828 A

F.Granek, et al, “HIGH-EFFICIENCY BACK-CONTACT BACK-JUNCTION SILICON SOLAR CELL” 23rd European Photovoltaic Solar Energy Conference, 1-5 September 2008, Valencia, Spain, pp.991-995F.Granek, et al, “HIGH-EFFICIENCY BACK-CONTACT BACK-JUNCTION SILICON SOLAR CELL” 23rd European Photovoltaic Solar Energy Conference, 1-5 September 2008, Valencia, Spain, pp.991-995

しかしながら、n型不純物拡散層領域の幅を狭くしすぎた場合には、電極形成時におけるn型不純物拡散層領域と電極との位置合わせが難しくなる、という問題がある。太陽電池の量産工程においては、フォトリソグラフィーのような高精度の位置合わせは、量産性とコストとの問題から適用が難しい。このため、電極形成ではスクリーン印刷などを用いた方法で位置合わせする必要があり、n型不純物拡散層領域と電極との位置合わせ精度に限界がある。このため、ライン状のn型不純物拡散層領域パターンでは、位置合わせ精度に制限された寸法でn型不純物拡散層領域のパターンを設計しなければならず、十分な高光電変換効率化が図れない。   However, if the width of the n-type impurity diffusion layer region is too narrow, there is a problem that it is difficult to align the n-type impurity diffusion layer region and the electrode when forming the electrode. In the mass production process of solar cells, high-precision alignment such as photolithography is difficult to apply due to problems of mass productivity and cost. For this reason, in electrode formation, it is necessary to align by a method using screen printing or the like, and there is a limit to the alignment accuracy between the n-type impurity diffusion layer region and the electrode. For this reason, in the line-shaped n-type impurity diffusion layer region pattern, the pattern of the n-type impurity diffusion layer region must be designed with a dimension limited to the alignment accuracy, and sufficient high photoelectric conversion efficiency cannot be achieved. .

また、たとえば特許文献1には、ドット形状の裏面不純物拡散層を有する裏面接合太陽電池が示されている。このような裏面接合太陽電池によれば、たとえば半導体基板にn型のウエハを用いた場合にこのようなドット形状の裏面不純物拡散層を採用することで、量子効率が低くなるn型不純物拡散層の領域を低減することができ、高光電変換効率化が可能である。   For example, Patent Document 1 discloses a back junction solar cell having a dot-shaped back surface impurity diffusion layer. According to such a back-junction solar cell, for example, when an n-type wafer is used as a semiconductor substrate, such a dot-shaped back-surface impurity diffusion layer is used, thereby reducing the quantum efficiency of the n-type impurity diffusion layer. Can be reduced, and high photoelectric conversion efficiency can be achieved.

しかしながら、特許文献1においては、ドット形状の裏面不純物拡散層は示されているが、該ドット形状の裏面不純物拡散層の形成方法については言及されていない。   However, Patent Document 1 shows a dot-shaped backside impurity diffusion layer, but does not mention a method for forming the dot-shaped backside impurity diffusion layer.

本発明は、上記に鑑みてなされたものであって、光電変換効率に優れた裏面接合太陽電池を製造可能な太陽電池の製造方法を得ることを目的とする。   This invention is made | formed in view of the above, Comprising: It aims at obtaining the manufacturing method of the solar cell which can manufacture the back junction solar cell excellent in the photoelectric conversion efficiency.

上述した課題を解決し、目的を達成するために、本発明にかかる太陽電池の製造方法は、第1導電型の半導体基板の受光面と反対側の裏面に第1導電型の不純物拡散層と第2導電型の不純物拡散層とが形成された太陽電池の製造方法であって、前記半導体基板の裏面の全面に前記第2導電型の不純物拡散層を形成する第1工程と、前記第2導電型の不純物拡散層上に絶縁層を形成する第2工程と、前記絶縁層の表面から前記半導体基板に達する島状の複数の第1凹部を前記絶縁層に前記半導体基板の面方向において分散して形成する第3工程と、前記半導体基板の裏面に前記絶縁層をマスクとして前記第1凹部を介して第1導電型の不純物を拡散させることにより、第1導電型の不純物濃度が前記半導体基板よりも高い前記第1導電型の不純物拡散層を前記第1凹部の底面の前記半導体基板の表層および前記第1凹部の側面の前記第2導電型の不純物拡散層の表層に形成する第4工程と、前記絶縁層を貫通して前記第1導電型の不純物拡散層に電気的に接続する第1電極を前記半導体基板の一面側に形成する第5工程と、前記絶縁層を貫通して前記第2導電型の不純物拡散層に電気的に接続する第2電極を前記半導体基板の一面側に形成する第6工程と、を含むことを特徴とする。   In order to solve the above-described problems and achieve the object, a method for manufacturing a solar cell according to the present invention includes a first conductivity type impurity diffusion layer on a back surface opposite to a light receiving surface of a first conductivity type semiconductor substrate. A method of manufacturing a solar cell having a second conductivity type impurity diffusion layer formed thereon, the first step of forming the second conductivity type impurity diffusion layer on the entire back surface of the semiconductor substrate, and the second step. A second step of forming an insulating layer on the impurity diffusion layer of the conductive type, and a plurality of island-shaped first recesses reaching the semiconductor substrate from the surface of the insulating layer are dispersed in the insulating layer in the plane direction of the semiconductor substrate And forming the first conductivity type impurity concentration on the back surface of the semiconductor substrate by diffusing the first conductivity type impurity through the first recess using the insulating layer as a mask. Impurities of the first conductivity type higher than the substrate A fourth step of forming a diffusion layer on the surface layer of the semiconductor substrate on the bottom surface of the first recess and on the surface layer of the second conductivity type impurity diffusion layer on the side surface of the first recess; A fifth step of forming a first electrode electrically connected to the first conductivity type impurity diffusion layer on one surface side of the semiconductor substrate; and an electrical connection to the second conductivity type impurity diffusion layer through the insulating layer. And a sixth step of forming a second electrode to be connected on one side of the semiconductor substrate.

本発明によれば、半導体基板と同じ第1導電型の不純物拡散層を島状に形成できるため、該第1導電型の不純物拡散層の領域を低減して、太陽電池の高光電変換効率化が可能であり、光電変換効率に優れた裏面接合太陽電池を製造可能である、という効果を奏する。   According to the present invention, an impurity diffusion layer of the same first conductivity type as that of a semiconductor substrate can be formed in an island shape, so that the area of the impurity diffusion layer of the first conductivity type can be reduced and the photoelectric conversion efficiency of the solar cell can be increased. It is possible to produce a back junction solar cell excellent in photoelectric conversion efficiency.

図1−1は、本発明の実施の形態にかかる太陽電池の製造方法により作製された太陽電池の概略構成を模式的に示す要部断面図である。1-1 is principal part sectional drawing which shows typically schematic structure of the solar cell produced by the manufacturing method of the solar cell concerning embodiment of this invention. 図1−2は、本発明の実施の形態にかかる太陽電池の製造方法により作製された太陽電池の概略構成を模式的に示す要部下面図である。FIGS. 1-2 is principal part bottom view which shows typically schematic structure of the solar cell produced by the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. 図2−1は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。FIGS. 2-1 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. 図2−2は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。FIGS. 2-2 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. 図2−3は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。FIGS. 2-3 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. 図2−4は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-4 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図2−5は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-5 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図2−6は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-6 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図2−7は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-7 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図2−8は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。FIGS. 2-8 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. 図2−9は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-9 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図2−10は、本発明の実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。2-10 is principal part sectional drawing which shows typically an example of the process sequence of the manufacturing method of the solar cell concerning embodiment of this invention. 図3は、n型シリコン基板の裏面における凹部の形成パターンを示す図である。FIG. 3 is a diagram showing a formation pattern of the recesses on the back surface of the n-type silicon substrate. 図4は、n型シリコン基板の裏面における凹部の形成パターンを示す図である。FIG. 4 is a diagram showing a formation pattern of the recesses on the back surface of the n-type silicon substrate.

以下に、本発明にかかる太陽電池の製造方法の実施の形態を図面に基づいて詳細に説明する。なお、本発明は以下の記述に限定されるものではなく、本発明の要旨を逸脱しない範囲において適宜変更可能である。また、以下に示す図面においては、理解の容易のため、各部材の縮尺が実際とは異なる場合がある。各図面間においても同様である。また、平面図であっても、図面を見易くするためにハッチングを付す場合がある。   Embodiments of a method for manufacturing a solar cell according to the present invention will be described below in detail with reference to the drawings. In addition, this invention is not limited to the following description, In the range which does not deviate from the summary of this invention, it can change suitably. In the drawings shown below, the scale of each member may be different from the actual scale for easy understanding. The same applies between the drawings. Further, even a plan view may be hatched to make the drawing easy to see.

実施の形態
図1−1は、本発明の実施の形態にかかる太陽電池の製造方法により作製された太陽電池の概略構成を模式的に示す要部断面図である。図1−2は、本発明の実施の形態にかかる太陽電池の製造方法により作製された太陽電池の概略構成を模式的に示す要部下面図である。図1−1は、図1−2の線分A−Aにおける要部断面図である。なお、図1−1においては、p型不純物拡散層102と裏面側n型不純物拡散層106との配置に注目して示しており、他部材については記載を省略している。
Embodiment FIG. 1-1 is a main part sectional view schematically showing a schematic configuration of a solar cell manufactured by a method for manufacturing a solar cell according to an embodiment of the present invention. FIGS. 1-2 is principal part bottom view which shows typically schematic structure of the solar cell produced by the manufacturing method of the solar cell concerning embodiment of this invention. FIGS. FIG. 1-1 is a main part sectional view taken along line AA in FIG. In FIG. 1-1, attention is paid to the arrangement of the p-type impurity diffusion layer 102 and the back-side n-type impurity diffusion layer 106, and the description of other members is omitted.

この太陽電池においては、結晶系半導体基板としてのn型シリコン基板101の受光面側には、凹凸を有するテクスチャ構造108が表面での光反射を低減する目的で形成されている。n型シリコン基板101は、例えばn型のドーパント(例えばP(リン))がドープされることでn型の導電型を呈する結晶系シリコン基板である。結晶系シリコン基板には、単結晶シリコン基板および多結晶シリコン基板を含む。なお、ここではn型シリコン基板を用いる場合について示しているが、結晶系シリコン基板としてはp型の結晶系シリコン基板を用いることもできる。   In this solar cell, an uneven texture structure 108 is formed on the light receiving surface side of an n-type silicon substrate 101 as a crystalline semiconductor substrate for the purpose of reducing light reflection on the surface. The n-type silicon substrate 101 is a crystalline silicon substrate that exhibits an n-type conductivity type by being doped with, for example, an n-type dopant (for example, P (phosphorus)). Crystalline silicon substrates include single crystal silicon substrates and polycrystalline silicon substrates. Note that although an n-type silicon substrate is used here, a p-type crystalline silicon substrate can also be used as the crystalline silicon substrate.

n型シリコン基板101の受光面側には、n型シリコン基板101よりもn型不純物濃度が高い領域である受光面側n型不純物拡散層109が形成されて、表面側で生じた少数キャリア(この場合には正孔)を表面側へと向かわせるFSF(Front Surface Field)と呼ばれる表面電界層が形成される。また、受光面側n型不純物拡散層109の上面には、受光面側のシリコン表面でのキャリアの再結合を防ぐ目的で酸化シリコン(SiO)膜110が形成されており、これがパッシベーション膜として機能している。また、この酸化シリコン膜110上には、n型シリコン基板101の受光面への入射光の反射を防止する反射防止膜111が形成されている。 On the light receiving surface side of the n-type silicon substrate 101, a light-receiving surface side n-type impurity diffusion layer 109, which is a region having a higher n-type impurity concentration than the n-type silicon substrate 101, is formed, and minority carriers generated on the surface side ( In this case, a surface electric field layer called FSF (Front Surface Field) that directs holes) to the surface side is formed. Further, a silicon oxide (SiO 2 ) film 110 is formed on the upper surface of the light-receiving surface side n-type impurity diffusion layer 109 for the purpose of preventing carrier recombination on the silicon surface on the light-receiving surface side, and this serves as a passivation film. It is functioning. On the silicon oxide film 110, an antireflection film 111 that prevents reflection of incident light to the light receiving surface of the n-type silicon substrate 101 is formed.

一方、n型シリコン基板101の裏面の表層には、所定の方向に延伸するライン状に配置された島状の複数の凹部105が分散して設けられ、この凹部105の底面と側面に裏面側n型不純物拡散層106が形成される。すなわち、裏面側n型不純物拡散層106は、n型シリコン基板101の裏面において所定の方向に延伸するライン状に分散配置されている。裏面側n型不純物拡散層106は、n型シリコン基板101よりもn型不純物濃度が高い領域であり、裏面側に流れてきた少数キャリア(この場合には正孔)の基板界面での再結合を防ぐ電界層を形成する裏面電界層(BSF:Back Surface Field)として機能する。   On the other hand, the surface layer on the back surface of the n-type silicon substrate 101 is provided with a plurality of island-shaped recesses 105 arranged in a line extending in a predetermined direction in a dispersed manner. An n-type impurity diffusion layer 106 is formed. That is, the back surface side n-type impurity diffusion layers 106 are distributed and arranged in a line extending in a predetermined direction on the back surface of the n-type silicon substrate 101. The back-side n-type impurity diffusion layer 106 is a region having an n-type impurity concentration higher than that of the n-type silicon substrate 101, and recombination at the substrate interface of minority carriers (in this case, holes) flowing to the back side. It functions as a back surface field layer (BSF: Back Surface Field) for forming an electric field layer for preventing the above.

そして、n型シリコン基板101の裏面において裏面側n型不純物拡散層106の領域を除いたほぼ全面の表層にはp型不純物拡散層102が形成されており、n型シリコン基板101とpn接合を形成する。   A p-type impurity diffusion layer 102 is formed on the almost entire surface of the back surface of the n-type silicon substrate 101 except for the region of the back-side n-type impurity diffusion layer 106, and a pn junction is formed between the n-type silicon substrate 101 and the n-type silicon substrate 101. Form.

n型シリコン基板101の裏面において裏面側n型不純物拡散層106上およびp型不純物拡散層102上には、絶縁層である酸化シリコン(SiO)膜103および窒化シリコン(SiN)膜104がこの順で積層形成されている。そして、裏面側n型不純物拡散層106には、窒化シリコン(SiN)膜104の表面から裏面側n型不純物拡散層106に達して設けられた島状の凹部105を介してn層取り出し電極113が接続される。また、p型不純物拡散層102には、窒化シリコン(SiN)膜104の表面からp型不純物拡散層102に達して設けられた島状の凹部112を介してp層取り出し電極114が接続される。 A silicon oxide (SiO 2 ) film 103 and a silicon nitride (SiN) film 104 which are insulating layers are formed on the back-side n-type impurity diffusion layer 106 and the p-type impurity diffusion layer 102 on the back surface of the n-type silicon substrate 101. They are stacked in order. The back surface n-type impurity diffusion layer 106 has an n-layer extraction electrode 113 via an island-shaped recess 105 provided from the surface of the silicon nitride (SiN) film 104 to the back surface n-type impurity diffusion layer 106. Is connected. A p-layer extraction electrode 114 is connected to the p-type impurity diffusion layer 102 via an island-shaped recess 112 provided from the surface of the silicon nitride (SiN) film 104 to the p-type impurity diffusion layer 102. .

すなわち、この太陽電池は、n層取り出し電極113およびp層取り出し電極114が、太陽電池の裏面側にのみ配された裏面電極型太陽電池である。これにより、この太陽電池では、受光面側における電極による光の反射に起因した光損失が防止され、光電変換効率の向上が図られている。   That is, this solar cell is a back electrode type solar cell in which the n layer extraction electrode 113 and the p layer extraction electrode 114 are arranged only on the back surface side of the solar cell. Thereby, in this solar cell, the optical loss resulting from the reflection of the light by the electrode in the light-receiving surface side is prevented, and the photoelectric conversion efficiency is improved.

このように構成された太陽電池では、太陽光Lが太陽電池の受光面側(n型シリコン基板101における反射防止膜111側)から照射されると、n型シリコン基板101内に正孔と電子とが生成する。光吸収によって生成した電子は裏面側n型不純物拡散層106に向かって移動し、正孔はp型不純物拡散層102に向かって移動する。これにより、裏面側n型不純物拡散層106に電子が過剰となり、p型不純物拡散層102に正孔が過剰となり、光起電力が発生する。この結果、裏面側n型不純物拡散層106に接続して形成されたn層取り出し電極113がマイナス極となり、裏面のpn接合を形成するp型不純物拡散層102に接続して形成されたp層取り出し電極114がプラス極となり、図示しない外部回路に電流が流れる。   In the solar cell thus configured, when sunlight L is irradiated from the light receiving surface side of the solar cell (the antireflection film 111 side of the n-type silicon substrate 101), holes and electrons are formed in the n-type silicon substrate 101. And generate. Electrons generated by light absorption move toward the back-side n-type impurity diffusion layer 106, and holes move toward the p-type impurity diffusion layer 102. As a result, electrons are excessive in the back side n-type impurity diffusion layer 106, holes are excessive in the p-type impurity diffusion layer 102, and photovoltaic power is generated. As a result, the n-layer extraction electrode 113 formed connected to the back surface side n-type impurity diffusion layer 106 becomes a negative pole, and the p layer formed connected to the p-type impurity diffusion layer 102 forming the pn junction on the back surface. The extraction electrode 114 becomes a positive electrode, and a current flows through an external circuit (not shown).

つぎに、このような構造を有する太陽電池の製造方法について図2−1〜図2−10を参照して説明する。図2−1〜図2−10は、本実施の形態にかかる太陽電池の製造方法の処理手順の一例を模式的に示す要部断面図である。   Next, a method for manufacturing a solar cell having such a structure will be described with reference to FIGS. 2-1 to 2-10. FIGS. 2-1 to 2-10 are principal part cross-sectional views schematically showing an example of the processing procedure of the method for manufacturing the solar cell according to the present embodiment.

まず、半導体基板として、n型不純物原子としてたとえばリン(P)を所定の濃度で含有するn型シリコン基板101を用意する(図2−1)。n型シリコン基板101は、溶融したシリコンを冷却固化してできたインゴットをワイヤーソーでスライスして製造するため、表面にスライス時のダメージが残っている。そこで、まずはn型シリコン基板101を酸または加熱したアルカリ溶液中、例えば水酸化ナトリウム水溶液に浸漬して表面をエッチングすることにより、シリコン基板の切り出し時に発生してn型シリコン基板101の表面近くに存在するダメージ領域を取り除く。   First, an n-type silicon substrate 101 containing, for example, phosphorus (P) as an n-type impurity atom at a predetermined concentration is prepared as a semiconductor substrate (FIG. 2-1). Since the n-type silicon substrate 101 is manufactured by slicing an ingot formed by cooling and solidifying molten silicon with a wire saw, damage on the surface remains on the surface. Therefore, first, the n-type silicon substrate 101 is immersed in an acid or a heated alkaline solution, for example, an aqueous solution of sodium hydroxide and etched to etch the surface. Remove existing damage areas.

つぎに、たとえばボロン(B)などのアクセプタを含む雰囲気中でn型シリコン基板101を加熱して、ボロン(B)をn型シリコン基板101の表面に拡散させてエミッタとなるp型不純物拡散層102をn型シリコン基板101の表面の全面に形成する(図2−2)。なお、半導体基板としてp型の半導体基板を用いた場合は、たとえばリン(P)などのドナーを半導体基板の表面に拡散させればよい。   Next, the n-type silicon substrate 101 is heated in an atmosphere containing an acceptor such as boron (B), for example, and boron (B) is diffused on the surface of the n-type silicon substrate 101 to serve as an emitter. 102 is formed on the entire surface of the n-type silicon substrate 101 (FIG. 2-2). When a p-type semiconductor substrate is used as the semiconductor substrate, a donor such as phosphorus (P) may be diffused on the surface of the semiconductor substrate.

つぎに、基板裏面側のシリコン表面でのキャリアの再結合を防ぐ目的で、n型シリコン基板101に対して熱酸化処理を実施することによりパッシベーション膜として熱酸化膜である酸化シリコン膜103を形成する(図2−2)。n型シリコン基板101の熱酸化方法は、ウェット酸化およびドライ酸化のいずれの方法でもよい。   Next, for the purpose of preventing carrier recombination on the silicon surface on the back side of the substrate, a thermal oxidation process is performed on the n-type silicon substrate 101 to form a silicon oxide film 103 that is a thermal oxide film as a passivation film. (FIG. 2-2). The thermal oxidation method for the n-type silicon substrate 101 may be either wet oxidation or dry oxidation.

つぎに、n型シリコン基板101の裏面側の酸化シリコン膜103上に、後工程において拡散マスクとなる窒化シリコン膜104をプラズマCVD(Chemical Vapor Deposition)法により形成する(図2−3)。ここで、窒化シリコン膜104の厚さは、後工程の拡散マスクとして機能する膜厚以上であればよい。   Next, on the silicon oxide film 103 on the back surface side of the n-type silicon substrate 101, a silicon nitride film 104 that serves as a diffusion mask in a later step is formed by a plasma CVD (Chemical Vapor Deposition) method (FIG. 2-3). Here, the thickness of the silicon nitride film 104 only needs to be greater than or equal to a thickness that functions as a diffusion mask in a later process.

つぎに、たとえばレーザ照射により窒化シリコン膜104および酸化シリコン膜103の一部を除去してパターニングし、窒化シリコン膜104の表面からp型不純物拡散層102に達する凹部105aを形成する(図2−4)。さらに、アルカリなどの溶液を用いたウェットエッチングを行うことにより、凹部105aの下部のp型不純物拡散層102を除去して、窒化シリコン膜104の表面からn型シリコン基板101に達する凹部105を形成する(図2−5)。凹部105は、後の工程で不純物の拡散を行う拡散窓および電極コンタクトホールとなる。   Next, part of the silicon nitride film 104 and the silicon oxide film 103 is removed and patterned by laser irradiation, for example, to form a recess 105a that reaches the p-type impurity diffusion layer 102 from the surface of the silicon nitride film 104 (FIG. 2-). 4). Further, by performing wet etching using a solution such as alkali, the p-type impurity diffusion layer 102 below the recess 105a is removed, and the recess 105 reaching the n-type silicon substrate 101 from the surface of the silicon nitride film 104 is formed. (Fig. 2-5). The recess 105 becomes a diffusion window and an electrode contact hole for diffusing impurities in a later step.

ここで、凹部105は島状に形成され、所定の方向に延伸するライン状に所定の間隔で分散配置される。図3は、n型シリコン基板101の裏面における凹部105の形成パターンを示す図である。n型シリコン基板101の面方向における凹部105の形状は、たとえば長手方向が30μm、短手方向が20μm程度の寸法の矩形状とされる。ただし、凹部105の形状はこれに限定されない。また、凹部105aの形成方法はレーザ照射に限定されないが、レーザ照射により凹部105aを形成することにより、精度良く所望の位置に凹部105aを形成でき、精度良く所望の位置に凹部105を形成できる。   Here, the concave portions 105 are formed in an island shape, and are distributed and arranged at predetermined intervals in a line shape extending in a predetermined direction. FIG. 3 is a diagram showing a formation pattern of the recesses 105 on the back surface of the n-type silicon substrate 101. The shape of the recess 105 in the surface direction of the n-type silicon substrate 101 is, for example, a rectangular shape with dimensions of about 30 μm in the longitudinal direction and about 20 μm in the lateral direction. However, the shape of the recess 105 is not limited to this. The method for forming the recess 105a is not limited to laser irradiation, but by forming the recess 105a by laser irradiation, the recess 105a can be accurately formed at a desired position, and the recess 105 can be accurately formed at a desired position.

つぎに、凹部105を介して凹部105の底面とp型不純物拡散層102の側面にたとえばリン(P)などのドナーを拡散する。これにより、凹部105の底面とp型不純物拡散層102の側面に裏面側n型不純物拡散層106が形成されて、基板裏面にp型不純物拡散層とn型不純物拡散層とが形成される(図2−6)。リン(P)の拡散は、たとえばリン(P)を含む雰囲気中でn型シリコン基板101を加熱し、窒化シリコン(SiN)膜104を拡散マスクとして、凹部105を介して凹部105の底面とp型不純物拡散層102の側面にリン(P)を拡散させることにより行われる。なお、半導体基板としてp型の半導体基板を用いた場合は、たとえばボロン(B)などのアクセプタを拡散する。   Next, a donor such as phosphorus (P) is diffused into the bottom surface of the recess 105 and the side surface of the p-type impurity diffusion layer 102 through the recess 105. As a result, the back-side n-type impurity diffusion layer 106 is formed on the bottom surface of the recess 105 and the side surface of the p-type impurity diffusion layer 102, and the p-type impurity diffusion layer and the n-type impurity diffusion layer are formed on the back surface of the substrate ( Fig. 2-6). For example, phosphorus (P) is diffused by heating the n-type silicon substrate 101 in an atmosphere containing phosphorus (P), and using the silicon nitride (SiN) film 104 as a diffusion mask and the bottom surface of the recess 105 and the p This is performed by diffusing phosphorus (P) on the side surface of the type impurity diffusion layer 102. When a p-type semiconductor substrate is used as the semiconductor substrate, for example, an acceptor such as boron (B) is diffused.

つぎに、裏面側n型不純物拡散層106の表面を熱酸化することにより、凹部105の底部の該裏面側n型不純物拡散層106の表面に、酸化膜である酸化シリコン(SiO)膜107を形成する。これにより、凹部105の底部が酸化シリコン膜107により埋められて、窒化シリコン膜104の表面からp型不純物拡散層102に達する凹部105aが再度形成される。裏面側n型不純物拡散層106の表面に酸化シリコン膜107が形成されることにより、裏面側n型不純物拡散層106内のリン(P)が酸化シリコン膜107内に拡散し、裏面側n型不純物拡散層106内のリン(P)濃度が低濃度化される。酸化シリコン膜107は、次工程の受光面側テクスチャ形成時のマスクとして用いられる。この場合、マスクとしての必要な厚さを得るためには、酸化シリコン膜107をウェット酸化により形成することが好ましい。 Next, by thermally oxidizing the surface of the back surface side n-type impurity diffusion layer 106, a silicon oxide (SiO 2 ) film 107, which is an oxide film, is formed on the surface of the back surface side n type impurity diffusion layer 106 at the bottom of the recess 105. Form. As a result, the bottom of the recess 105 is filled with the silicon oxide film 107, and the recess 105a reaching the p-type impurity diffusion layer 102 from the surface of the silicon nitride film 104 is formed again. By forming the silicon oxide film 107 on the surface of the back-side n-type impurity diffusion layer 106, phosphorus (P) in the back-side n-type impurity diffusion layer 106 diffuses into the silicon oxide film 107, and the back-side n-type The phosphorus (P) concentration in the impurity diffusion layer 106 is lowered. The silicon oxide film 107 is used as a mask when forming the light receiving surface side texture in the next process. In this case, in order to obtain a necessary thickness as a mask, the silicon oxide film 107 is preferably formed by wet oxidation.

ここで、上述したようにn型シリコン基板101の裏面における島状の凹部105の形成パターンを、所定の間隔で分散配置されて所定の方向に延伸するライン状とすることで、太陽電池の高光電変換効率化が可能である。非特許文献1に示されるように、裏面接合太陽電池の基板にn型のウエハを用いた場合において、n型不純物拡散領域はp型不純物拡散領域と比較して量子効率が低い。これは、p型不純物拡散領域(np+)に対して、n型不純物拡散領域(nn+)は障壁が低く、表面再結合の影響が大きいことが原因のひとつと考えられる。このため、裏面接合太陽電池の基板にn型のウエハを用いた場合において、基板裏面におけるn型不純物拡散領域の占有面積の低減により、太陽電池の高光電変換効率化が可能である。同様の原因で、半導体基板としてp型の半導体基板を用いた場合は、p型不純物拡散層102の量子効率が低下すると考えられる。   Here, as described above, the formation pattern of the island-shaped recesses 105 on the back surface of the n-type silicon substrate 101 is formed in a line shape that is dispersedly arranged at a predetermined interval and extends in a predetermined direction. Photoelectric conversion efficiency can be improved. As shown in Non-Patent Document 1, when an n-type wafer is used for the substrate of the back junction solar cell, the n-type impurity diffusion region has a lower quantum efficiency than the p-type impurity diffusion region. This is considered to be one of the reasons that the n-type impurity diffusion region (nn +) has a lower barrier than the p-type impurity diffusion region (np +) and has a large influence of surface recombination. For this reason, when an n-type wafer is used for the substrate of the back junction solar cell, it is possible to increase the photoelectric conversion efficiency of the solar cell by reducing the area occupied by the n-type impurity diffusion region on the back surface of the substrate. For the same reason, it is considered that the quantum efficiency of the p-type impurity diffusion layer 102 is lowered when a p-type semiconductor substrate is used as the semiconductor substrate.

しかしながら、非特許文献1に示されるように裏面n型不純物拡散層のパターンに一般的な連続したライン状のパターンを用いた場合は、裏面n型不純物拡散層の位置精度や電極形成時における裏面n型不純物拡散層と電極との位置合わせ精度の問題から裏面n型不純物拡散層の幅の狭幅化には制限がある。   However, as shown in Non-Patent Document 1, when a general continuous line pattern is used for the pattern of the back surface n-type impurity diffusion layer, the positional accuracy of the back surface n-type impurity diffusion layer and the back surface during electrode formation Due to the problem of alignment accuracy between the n-type impurity diffusion layer and the electrode, there is a limit to narrowing the width of the back surface n-type impurity diffusion layer.

そこで、本実施の形態では、上記のようにして精度良く所望の位置に形成された島状の凹部105を介してリン(P)の拡散を行って裏面側n型不純物拡散層106を形成する。これにより、裏面側n型不純物拡散層106を精度良く所望の位置に形成でき、さらにリン(P)の拡散条件を調整することにより、裏面側n型不純物拡散層106の面積を精度良く制御可能であり、基板裏面における裏面側n型不純物拡散層106の占有面積の低減が可能である。   Therefore, in the present embodiment, phosphorus (P) is diffused through the island-shaped recess 105 formed at a desired position with high accuracy as described above to form the back-side n-type impurity diffusion layer 106. . As a result, the back-side n-type impurity diffusion layer 106 can be accurately formed at a desired position, and the area of the back-side n-type impurity diffusion layer 106 can be accurately controlled by adjusting the phosphorus (P) diffusion conditions. Thus, the area occupied by the back surface side n-type impurity diffusion layer 106 on the back surface of the substrate can be reduced.

つぎに、n型シリコン基板101の受光面側にテクスチャ構造108を形成する(図2−7)。まず、n型シリコン基板101の受光面側のみをフッ化水素(HF)溶液に浸漬して、受光面側の酸化シリコン膜103を除去する。つぎに、水酸化カリウム(KOH)溶液や水酸化ナトリウム(NaOH)溶液などのアルカリ溶液を用いてn型シリコン基板101の受光面側のみをエッチングして、n型シリコン基板101の受光面側のみにテクスチャ構造108を形成する。この際、受光面側のp型不純物拡散層102は除去される。n型シリコン基板101の裏面は、窒化シリコン膜104、酸化シリコン膜103および酸化シリコン膜107がマスクとなるため、エッチングは進行しない。n型シリコン基板101の裏面が平坦であることは、再結合速度の高い表面積を極力低減するためにも重要である。   Next, the texture structure 108 is formed on the light receiving surface side of the n-type silicon substrate 101 (FIGS. 2-7). First, only the light-receiving surface side of the n-type silicon substrate 101 is immersed in a hydrogen fluoride (HF) solution to remove the silicon oxide film 103 on the light-receiving surface side. Next, only the light-receiving surface side of the n-type silicon substrate 101 is etched using an alkaline solution such as a potassium hydroxide (KOH) solution or a sodium hydroxide (NaOH) solution, so that only the light-receiving surface side of the n-type silicon substrate 101 is etched. The texture structure 108 is formed. At this time, the p-type impurity diffusion layer 102 on the light receiving surface side is removed. Etching does not proceed on the back surface of the n-type silicon substrate 101 because the silicon nitride film 104, the silicon oxide film 103, and the silicon oxide film 107 serve as a mask. The flat back surface of the n-type silicon substrate 101 is important for reducing the surface area with a high recombination speed as much as possible.

つぎに、n型シリコン基板101の受光面側にリン(P)などのドナーを拡散してFSFとして機能する受光面側n型不純物拡散層109を形成する(図2−8)。なお、半導体基板としてp型の半導体基板を用いた場合は、ボロン(B)などのアクセプタを拡散する。   Next, a light-receiving surface side n-type impurity diffusion layer 109 functioning as an FSF is formed by diffusing a donor such as phosphorus (P) on the light-receiving surface side of the n-type silicon substrate 101 (FIG. 2-8). When a p-type semiconductor substrate is used as the semiconductor substrate, an acceptor such as boron (B) is diffused.

つぎに、表面パッシベーションを目的として、たとえば熱酸化処理などによりパッシベーション膜として酸化膜である酸化シリコン(SiO)膜110を受光面側n型不純物拡散層109上に形成する(図2−8)。パッシベーション膜として用いる酸化シリコン膜110が厚い場合は、入射光の反射率低減の妨げになるため、表面パッシベーション効果と入射光の反射率とのバランスをとる必要がある。 Next, for the purpose of surface passivation, a silicon oxide (SiO 2 ) film 110 that is an oxide film is formed on the light-receiving surface side n-type impurity diffusion layer 109 as a passivation film by, for example, thermal oxidation treatment (FIG. 2-8). . When the silicon oxide film 110 used as the passivation film is thick, it hinders the reduction of the reflectance of the incident light. Therefore, it is necessary to balance the surface passivation effect and the reflectance of the incident light.

つぎに、反射防止膜111として窒化シリコン(SiN)膜や酸化チタン(TiO)膜などを酸化シリコン膜110上に形成する(図2−8)。反射防止膜111の形成方法としては、たとえばCVD法、スパッタリング法、蒸着法などが挙げられる。 Next, a silicon nitride (SiN) film, a titanium oxide (TiO 2 ) film, or the like is formed on the silicon oxide film 110 as the antireflection film 111 (FIG. 2-8). Examples of the method for forming the antireflection film 111 include a CVD method, a sputtering method, and a vapor deposition method.

つぎに、裏面側のp型不純物拡散層102に接続するコンタクトホール形成のために、たとえばレーザ照射により窒化シリコン膜104および酸化シリコン膜103の一部を除去し、窒化シリコン膜104および酸化シリコン膜103を貫通してp型不純物拡散層102に達する凹部112を形成する(図2−9)。ここで、p型不純物拡散層102と電極との接合部は表面再結合速度が高いため、フィルファクタ(F.F.)が低下しない程度にコンタクトホールの底面領域を低減することが好ましい。   Next, in order to form a contact hole connected to the p-type impurity diffusion layer 102 on the back surface side, the silicon nitride film 104 and the silicon oxide film 103 are partially removed by laser irradiation, for example, and the silicon nitride film 104 and the silicon oxide film are removed. A recess 112 that penetrates 103 and reaches the p-type impurity diffusion layer 102 is formed (FIG. 2-9). Here, since the junction between the p-type impurity diffusion layer 102 and the electrode has a high surface recombination rate, it is preferable to reduce the bottom region of the contact hole to such an extent that the fill factor (FF) does not decrease.

また、凹部112は、隣接する凹部105間に、n型シリコン基板101の裏面において凹部105と同様に所定の方向に延伸するライン状に所定の間隔で分散配置して形成される。これにより、凹部105が分散配置されたラインと凹部112が分散配置されたラインとが交互に配列される。図4は、n型シリコン基板101の裏面における凹部112の形成パターンを示す図である。n型シリコン基板101の面方向における凹部112の形状は、たとえば長手方向が30μm、短手方向が20μm程度の寸法の矩形状とされる。ただし、凹部112の形状はこれに限定されない。また、凹部112の形成方法はレーザ照射に限定されないが、レーザ照射により凹部112を形成することにより、精度良く所望の位置に凹部112を形成できる。   The recesses 112 are formed between the adjacent recesses 105 in a distributed manner in a line extending in a predetermined direction on the back surface of the n-type silicon substrate 101 in the same direction as the recesses 105. Thereby, the line in which the recessed part 105 is distributed and the line in which the recessed part 112 is distributed are alternately arranged. FIG. 4 is a diagram showing a formation pattern of the recess 112 on the back surface of the n-type silicon substrate 101. The shape of the recess 112 in the surface direction of the n-type silicon substrate 101 is, for example, a rectangular shape with dimensions of about 30 μm in the longitudinal direction and about 20 μm in the short direction. However, the shape of the recess 112 is not limited to this. Moreover, although the formation method of the recessed part 112 is not limited to laser irradiation, the recessed part 112 can be accurately formed in a desired position by forming the recessed part 112 by laser irradiation.

つぎに、フッ化水素(HF)溶液により裏面側n型不純物拡散層106上の酸化シリコン膜107を除去する(図2−9)。酸化シリコン膜107の除去においては、たとえばリソグラフィおよびエッチングを用いることにより、酸化シリコン膜107を選択的に除去できる。これにより、窒化シリコン膜104の表面からn型シリコン基板101に達する凹部105が再度構成され、裏面側n型不純物拡散層106に接続するコンタクトホールが形成される。   Next, the silicon oxide film 107 on the back side n-type impurity diffusion layer 106 is removed with a hydrogen fluoride (HF) solution (FIG. 2-9). In the removal of the silicon oxide film 107, the silicon oxide film 107 can be selectively removed by using, for example, lithography and etching. Thereby, the recess 105 reaching the n-type silicon substrate 101 from the surface of the silicon nitride film 104 is formed again, and a contact hole connected to the back-side n-type impurity diffusion layer 106 is formed.

つぎに、n型シリコン基板101の裏面側において、裏面側n型不純物拡散層106に電気的に接続するn層取り出し電極113、およびp型不純物拡散層102に電気的に接続するp層取り出し電極114を形成する(図2−10)。n層取り出し電極113およびp層取り出し電極114の電極材料としては、たとえば銀(Ag)やアルミニウム(Al)などの高反射率材料が好ましい。n層取り出し電極113およびp層取り出し電極114を高反射率材料で構成することにより、n型シリコン基板101で吸収されずに透過してきた太陽光Lを反射して再度n型シリコン基板101に戻すことができ、光電変換効率の向上が図れる。   Next, on the back side of the n-type silicon substrate 101, an n-layer extraction electrode 113 electrically connected to the back-side n-type impurity diffusion layer 106 and a p-layer extraction electrode electrically connected to the p-type impurity diffusion layer 102 114 is formed (FIG. 2-10). As the electrode material of the n-layer extraction electrode 113 and the p-layer extraction electrode 114, for example, a high reflectivity material such as silver (Ag) or aluminum (Al) is preferable. By configuring the n-layer extraction electrode 113 and the p-layer extraction electrode 114 with a high reflectivity material, sunlight L that has been transmitted without being absorbed by the n-type silicon substrate 101 is reflected and returned to the n-type silicon substrate 101 again. Thus, the photoelectric conversion efficiency can be improved.

n層取り出し電極113およびp層取り出し電極114の形成は、例えばスクリーン印刷法により電極材料ペーストを印刷、乾燥し、その後焼成することにより行う。n層取り出し電極113は、凹部105内および凹部105に隣接する窒化シリコン(SiN)膜104を覆って電極材料ペーストを印刷して形成される。p層取り出し電極114は、電極材料ペーストを凹部112内および凹部112に隣接する窒化シリコン(SiN)膜104を覆って、n層取り出し電極113と接続しないように電極材料ペーストを印刷して形成される。また、n層取り出し電極113およびp層取り出し電極114の形成は、スクリーン印刷以外にもスパッタリング法や蒸着法などが使用できる。   The n-layer extraction electrode 113 and the p-layer extraction electrode 114 are formed by, for example, printing and drying an electrode material paste by a screen printing method, and then baking it. The n-layer extraction electrode 113 is formed by printing an electrode material paste so as to cover the silicon nitride (SiN) film 104 in the recess 105 and adjacent to the recess 105. The p-layer extraction electrode 114 is formed by printing an electrode material paste over the silicon nitride (SiN) film 104 in the recess 112 and adjacent to the recess 112 so as not to be connected to the n-layer extraction electrode 113. The Further, the n-layer extraction electrode 113 and the p-layer extraction electrode 114 can be formed by sputtering or vapor deposition in addition to screen printing.

n層取り出し電極113の形成においては、凹部105を埋め込んで形成できれば良く、精密な位置合わせは必要ないため、スクリーン印刷法などの、位置合わせ精度は低いが量産性に適した方法を用いた場合でも、n型領域を低減可能であり、高光電変換効率化が可能である。   In the formation of the n-layer extraction electrode 113, it is only necessary to embed the recess 105 and precise alignment is not required. Therefore, when a method suitable for mass production is used, such as a screen printing method, although the alignment accuracy is low. However, the n-type region can be reduced and high photoelectric conversion efficiency can be achieved.

また、裏面側n型不純物拡散層106の形成時に用いた絶縁性マスク(窒化シリコン膜104、酸化シリコン膜103)をそのまま残存させて絶縁膜として用いることにより、電極形成時にp型不純物拡散層102と裏面側n型不純物拡散層106とのpn接合部が電極に覆われることがない。また、裏面側n型不純物拡散層106の形成時に絶縁性マスク(窒化シリコン膜104、酸化シリコン膜103)に形成した凹部105をそのままn層取り出し電極113形成のコンタクトホールとして利用するため、工程が簡便であり、また電極の位置合わせが容易である。   Further, the insulating mask (silicon nitride film 104, silicon oxide film 103) used when forming the back-side n-type impurity diffusion layer 106 is left as it is and used as an insulating film, so that the p-type impurity diffusion layer 102 is formed at the time of electrode formation. And the back surface n-type impurity diffusion layer 106 are not covered with electrodes. Further, since the recess 105 formed in the insulating mask (silicon nitride film 104, silicon oxide film 103) when forming the back side n-type impurity diffusion layer 106 is used as it is as a contact hole for forming the n-layer extraction electrode 113, the process is performed. It is simple and the positioning of the electrodes is easy.

また、p層取り出し電極114の電極材料としてアルミニウム(Al)を含む電極材料ペーストを印刷し、電極形成後の熱処理(焼成)によりp層取り出し電極114のアルミニウム(Al)をp型不純物拡散層102に拡散させることができる。これにより、p型不純物拡散層102のうち、凹部112内のコンタクト部の下部に位置するp型不純物拡散層102のみの不純物濃度を高濃度にしてBSFを形成することができ、p型不純物拡散層102とp層取り出し電極114との接触抵抗低減が可能である。この場合は、p型不純物拡散層102形成時の不純物濃度を、p層取り出し電極114との接触抵抗低減のための条件よりも低く設計することが可能になる。   Also, an electrode material paste containing aluminum (Al) is printed as an electrode material for the p-layer extraction electrode 114, and the aluminum (Al) of the p-layer extraction electrode 114 is converted into the p-type impurity diffusion layer 102 by heat treatment (firing) after the electrode formation. Can diffuse. As a result, the BSF can be formed by increasing the impurity concentration of only the p-type impurity diffusion layer 102 located below the contact portion in the recess 112 in the p-type impurity diffusion layer 102, and the p-type impurity diffusion The contact resistance between the layer 102 and the p-layer extraction electrode 114 can be reduced. In this case, it is possible to design the impurity concentration when forming the p-type impurity diffusion layer 102 to be lower than the condition for reducing the contact resistance with the p-layer extraction electrode 114.

上述したように、本実施の形態にかかる太陽電池の製造方法においては、n型シリコン基板101の裏面側にp型不純物拡散層102を形成し、その上に絶縁層である酸化シリコン(SiO)膜103および窒化シリコン(SiN)膜104を形成する。そして、絶縁層の表面からp型不純物拡散層102に達する凹部105を島状に分散させて形成し、該凹部105を介してリン(P)などのドナーを拡散して裏面側n型不純物拡散層106を形成する。これにより、n型シリコン基板101の裏面における裏面側n型不純物拡散層106の面積を低減して高光電変換効率化が可能である。 As described above, in the method for manufacturing a solar cell according to the present embodiment, the p-type impurity diffusion layer 102 is formed on the back surface side of the n-type silicon substrate 101, and silicon oxide (SiO 2) as an insulating layer is formed thereon. ) A film 103 and a silicon nitride (SiN) film 104 are formed. Then, recesses 105 reaching the p-type impurity diffusion layer 102 from the surface of the insulating layer are formed in an island shape, and a donor such as phosphorus (P) is diffused through the recesses 105 to diffuse n-type impurity diffusion on the back surface side. Layer 106 is formed. Thereby, the area of the back surface side n-type impurity diffusion layer 106 on the back surface of the n-type silicon substrate 101 can be reduced, and high photoelectric conversion efficiency can be achieved.

また、n層取り出し電極113の形成においては、凹部105を埋め込んで形成できれば良く、精密な位置合わせは必要ないため、スクリーン印刷法などの、位置合わせ精度は低いが量産性に適した方法を用いた場合でも、n型領域を低減可能であり、高光電変換効率化が可能である。   Further, in forming the n-layer extraction electrode 113, it is only necessary to embed the concave portion 105, and precise alignment is not required. Therefore, a method suitable for mass production, such as a screen printing method, with low alignment accuracy is used. Even in the case where n is present, the n-type region can be reduced and high photoelectric conversion efficiency can be achieved.

したがって、本実施の形態によれば、光電変換効率に優れた裏面接合太陽電池が得られる、という効果を奏する。   Therefore, according to this Embodiment, there exists an effect that the back junction solar cell excellent in the photoelectric conversion efficiency is obtained.

以上のように、本発明にかかる太陽電池の製造方法は、光電変換効率に優れた裏面接合太陽電池の製造に有用であり、特に、量産に適している。   As described above, the method for manufacturing a solar cell according to the present invention is useful for manufacturing a back junction solar cell excellent in photoelectric conversion efficiency, and is particularly suitable for mass production.

101 n型シリコン基板
102 p型不純物拡散層
103 酸化シリコン(SiO)膜
104 窒化シリコン(SiN)膜
105 凹部
105a 凹部
106 裏面側n型不純物拡散層
107 酸化シリコン(SiO)膜
108 テクスチャ構造
109 受光面側n型不純物拡散層
110 酸化シリコン(SiO)膜
111 反射防止膜
112 凹部
113 n層取り出し電極
114 p層取り出し電極
L 太陽光
101 n-type silicon substrate 102 p-type impurity diffusion layer 103 silicon oxide (SiO 2 ) film 104 silicon nitride (SiN) film 105 recess 105 a recess 106 back side n-type impurity diffusion layer 107 silicon oxide (SiO 2 ) film 108 texture structure 109 Light-receiving-side n-type impurity diffusion layer 110 Silicon oxide (SiO 2 ) film 111 Antireflection film 112 Recess 113 N layer extraction electrode 114 p layer extraction electrode L Sunlight

Claims (4)

第1導電型の半導体基板の受光面と反対側の裏面に第1導電型の不純物拡散層と第2導電型の不純物拡散層とが形成された太陽電池の製造方法であって、
前記半導体基板の裏面の全面に前記第2導電型の不純物拡散層を形成する第1工程と、
前記第2導電型の不純物拡散層上に絶縁層を形成する第2工程と、
前記絶縁層の表面から前記半導体基板に達する島状の複数の第1凹部を前記絶縁層に前記半導体基板の面方向において分散して形成する第3工程と、
前記半導体基板の裏面に前記絶縁層をマスクとして前記第1凹部を介して第1導電型の不純物を拡散させることにより、第1導電型の不純物濃度が前記半導体基板よりも高い前記第1導電型の不純物拡散層を前記第1凹部の底面の前記半導体基板の表層および前記第1凹部の側面の前記第2導電型の不純物拡散層の表層に形成する第4工程と、
前記絶縁層を貫通して前記第1導電型の不純物拡散層に電気的に接続する第1電極を前記半導体基板の一面側に形成する第5工程と、
前記絶縁層を貫通して前記第2導電型の不純物拡散層に電気的に接続する第2電極を前記半導体基板の一面側に形成する第6工程と、
を含むことを特徴とする太陽電池の製造方法。
A method of manufacturing a solar cell, wherein a first conductivity type impurity diffusion layer and a second conductivity type impurity diffusion layer are formed on a back surface opposite to a light receiving surface of a first conductivity type semiconductor substrate,
Forming a second conductivity type impurity diffusion layer on the entire back surface of the semiconductor substrate;
A second step of forming an insulating layer on the second conductivity type impurity diffusion layer;
A third step of dispersing and forming a plurality of island-shaped first recesses reaching the semiconductor substrate from the surface of the insulating layer in the surface direction of the semiconductor substrate;
The first conductivity type impurity concentration is higher than that of the semiconductor substrate by diffusing impurities of the first conductivity type through the first recess using the insulating layer as a mask on the back surface of the semiconductor substrate. Forming a first impurity diffusion layer on a surface layer of the semiconductor substrate on a bottom surface of the first recess and on a surface layer of the second conductivity type impurity diffusion layer on a side surface of the first recess;
A fifth step of forming a first electrode penetrating the insulating layer and electrically connected to the impurity diffusion layer of the first conductivity type on the one surface side of the semiconductor substrate;
A sixth step of forming a second electrode penetrating the insulating layer and electrically connected to the second conductivity type impurity diffusion layer on one surface side of the semiconductor substrate;
The manufacturing method of the solar cell characterized by including.
前記第3工程では、前記絶縁層に対する前記第1凹部の形成にレーザ照射を用いること、
を特徴とする請求項1に記載の太陽電池の製造方法。
In the third step, laser irradiation is used to form the first recess for the insulating layer;
The manufacturing method of the solar cell of Claim 1 characterized by these.
前記第5工程では、前記第1凹部を介して前記第1導電型の不純物拡散層に電気的に接続する前記第1電極を形成すること、
を特徴とする請求項1または2に記載の太陽電池の製造方法。
Forming the first electrode electrically connected to the impurity diffusion layer of the first conductivity type through the first recess in the fifth step;
The method for producing a solar cell according to claim 1 or 2.
前記第6工程では、前記絶縁層を貫通して前記第2導電型の不純物拡散層に達する第2凹部を形成し、前記アルミニウムを含有する電極材料ペーストを前記第2凹部を埋めて印刷した後に熱処理を行うことにより前記第2電極を形成するとともに前記第2電極に接触する前記第2導電型の不純物拡散層にアルミニウムを拡散させること、
を特徴とする請求項1〜3のいずれか1つに記載の太陽電池の製造方法。
In the sixth step, after forming a second recess that penetrates the insulating layer and reaches the impurity diffusion layer of the second conductivity type, the electrode material paste containing aluminum is printed by filling the second recess. Forming the second electrode by performing a heat treatment and diffusing aluminum in the impurity diffusion layer of the second conductivity type in contact with the second electrode;
The manufacturing method of the solar cell as described in any one of Claims 1-3 characterized by these.
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