JP2013150000A - Igbt - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique capable of reducing the on-resistance of an IGBT by a configuration different from the technique for reducing the mesa width.
An IGBT is formed with a trench extending in a bent shape on an upper surface of a semiconductor substrate. The inner surface of the trench is covered with an insulating film. The gate electrode is disposed inside the trench. The emitter electrode is formed on the upper surface of the semiconductor substrate. The collector electrode is formed on the lower surface of the semiconductor substrate. The semiconductor substrate is made of an n-type semiconductor, is in contact with the insulating film, is ohmically connected to the emitter electrode, and is made of a p-type semiconductor. A body region, a drift region, and a collector region that are in contact with the insulating film on the side and in contact with the insulating film at the inner corner portion of the trench and are ohmically connected to the emitter electrode are formed.
[Selection] Figure 1

Description

  The present invention relates to an IGBT.

  Patent Document 1 discloses an IGBT having a gate electrode formed in a trench. In this IGBT, each gate electrode extends in a stripe shape. That is, each gate electrode extends linearly in parallel with each other.

JP 2010-114136 A

  In order to reduce the loss generated in the IGBT, it is desired to reduce the on-resistance of the IGBT. In an IGBT having gate electrodes extending in a stripe shape as in Patent Document 1, the on-resistance can be reduced by reducing the mesa width (interval between adjacent gate electrodes). However, in order to reduce the mesa width, a manufacturing process capable of fine processing is required, which increases the manufacturing cost of the IGBT.

  Therefore, the present specification provides a technique capable of reducing the on-resistance of the IGBT with a configuration different from the technique for reducing the mesa width described above.

  The IGBT disclosed in this specification includes a semiconductor substrate, an emitter electrode, a collector electrode, and a gate electrode. A trench extending in a bent shape when the upper surface is viewed in plan is formed on the upper surface of the semiconductor substrate. The inner surface of the trench is covered with an insulating film. The gate electrode is disposed inside the trench. The emitter electrode is formed on the upper surface of the semiconductor substrate. The collector electrode is formed on the lower surface of the semiconductor substrate. Inside the semiconductor substrate, an emitter region, a body region, a drift region, and a collector region are formed. The emitter region is made of an n-type semiconductor, is in contact with the insulating film, and is ohmically connected to the emitter electrode. The body region is made of a p-type semiconductor, is in contact with the insulating film at a position adjacent to the emitter region, is in contact with the insulating film at the inner corner of the trench, and is ohmically connected to the emitter electrode. ing. The drift region is made of an n-type semiconductor, is formed below the body region, is separated from the emitter region by the body region, and is in contact with the insulating film at the lower end of the trench. The collector region is made of a p-type semiconductor, is formed below the drift region, is separated from the body region by the drift region, and is ohmically connected to the collector electrode.

  Note that the emitter region may be in contact with the insulating film at any position. For example, the emitter region may be in contact with the insulating film at the inner corner of the trench, or may be in contact with the insulating film at other positions. In addition, the body region may be in contact with the insulating film at a position adjacent to the emitter region and may be in contact with the insulating film at other positions as long as it is in contact with the insulating film at the inner corner of the trench. It does not have to be. In addition, the above “inner corner portion of the trench” means a portion inside a portion where the trench is bent (that is, a corner). In addition, “a trench extending in a bent shape when the upper surface is viewed in plan” includes a trench that intersects a three-way path or a four-way path. The intersecting trenches can be regarded as a combination of trenches extending in a bent shape.

  When the IGBT is turned on, a channel is formed in the body region in contact with the insulating film, and electrons flow from the emitter region to the drift region through the channel. Electrons flow through the drift region to the collector region. At the same time, holes flow from the collector region to the drift region, and the electrical resistance of the drift region decreases. The holes in the drift region flow toward the body region. At this time, holes existing in the drift region below the gate electrode flow so as to bypass the gate electrode, so that the hole concentration is high in the drift region near the side surface of the lower end portion of the gate electrode. In particular, holes that bypass the gate electrode concentrate in the drift region near the inner corner of the trench. For this reason, in the drift region in the vicinity of the inner corner portion, the hole concentration becomes extremely high and the electric resistance becomes extremely low. In this IGBT, a body region is formed so as to be in contact with the insulating film at the inner corner of the trench. That is, a channel is formed at a position in contact with the insulating film at the inner corner portion. Electrons flow into the drift region in the vicinity of the inner corner portion (that is, the above-described region having an extremely low electric resistance) through the channel of the inner corner portion. For this reason, electrons can pass through the drift region with low loss. Therefore, this IGBT has a low on-resistance.

  The IGBT described above preferably further includes a barrier region that separates the body region into an upper body region and a lower body region. The upper body region is preferably in contact with the emitter region. The barrier region is made of an n-type semiconductor and is preferably formed below the upper body region. The lower body region is preferably formed below the barrier region.

  According to such a configuration, the barrier region suppresses holes from flowing from the drift region to the upper body region. Therefore, the hole concentration in the drift region can be further increased, and the on-resistance of the IGBT can be further reduced.

  Alternatively, in the IGBT described above, a high concentration n-type region may be formed between the body region and the drift region. The high-concentration n-type region is composed of an n-type semiconductor, is in contact with the body region, is separated from the emitter region by the body region, is in contact with the drift region, and is separated from the drift region. The n-type impurity concentration is preferably higher than that of the drift region.

  According to such a configuration, the high concentration n-type region suppresses holes from flowing from the drift region to the body region. Therefore, the hole concentration in the drift region can be further increased, and the on-resistance of the IGBT can be further reduced.

  In any of the IGBTs described above, the body region has a first region that is ohmically connected to the emitter electrode and a second region that is electrically connected to the emitter electrode through the first region. preferable. The first region is preferably not in contact with the insulating film. The second region is preferably in contact with the insulating film. The emitter region is preferably not in contact with the insulating film at the inner corner of the trench.

  If the emitter region is in contact with the insulating film at the inner corner of the trench, the distance from the emitter region near the inner corner to the first region becomes longer, and the potential of the second region near the emitter region is higher. Easy to be. For this reason, holes may flow from the second region into the emitter region, and the IGBT may be latched up. If the emitter region is formed so as not to contact the insulating film at the inner corner of the trench as in the configuration described above, the potential of the second region in the vicinity of the emitter region is unlikely to rise, and latch-up is unlikely to occur.

  Any of the IGBTs described above has a rectangular region partitioned by a trench when the top surface of the semiconductor substrate is viewed in plan, and an emitter region and a body region are formed in the rectangular region. When the planar view is taken, the total distance of the boundary line where the emitter region is in contact with the insulating film is preferably shorter than the total distance of the boundary line where the body region is in contact with the insulating film in the rectangular region .

  Thus, the current density flowing through the channel can be increased by shortening the total distance of the boundary line where the emitter region is in contact with the insulating film. For this reason, the saturation current of the IGBT is lowered, and it is possible to suppress a high current from flowing through the IGBT when an overvoltage is applied to the IGBT.

  In addition, any of the IGBTs described above has a rectangular region partitioned by a trench when the top surface of the semiconductor substrate is viewed in plan, and an emitter region and a body region are formed in the rectangular region. It is preferable that the aspect ratio of the rectangular region is in the range of 0.4 to 2.5.

  If the aspect ratio is within the above range, the on-resistance of the IGBT can be effectively reduced.

The top view of IGBT10. The longitudinal cross-sectional view of IGBT10 in the II-II line | wire of FIG. The longitudinal cross-sectional view of IGBT10 in the III-III line of FIG. The top view which expanded one of the cells shown in FIG. The top view which expanded one of the cells shown in FIG. The graph which compares on-resistance of IGBT10,100,200. The top view corresponding to FIG. 4 of IGBT of a 1st modification. The top view corresponding to FIG. 4 of IGBT of a 2nd modification. Sectional drawing of IGBT in the IX-IX line of FIG. The graph which shows the relationship between an aspect ratio and on-resistance. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 3rd modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 4th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 5th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 6th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 7th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of the 8th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 9th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 10th modification. The top view which shows arrangement | positioning of the trench 70 of IGBT of a 11th modification. Sectional drawing corresponding to FIG. 2 of IGBT of a 12th modification.

  As shown in FIGS. 1 to 3, the IGBT 10 includes a semiconductor substrate 20, an emitter electrode 50, and a collector electrode 60. As shown in FIGS. 2 and 3, the emitter electrode 50 is formed on substantially the entire upper surface 20 a of the semiconductor substrate 20, and the collector electrode 60 is formed on substantially the entire lower surface 20 b of the semiconductor substrate 20. In FIG. 1, the illustration of the structure above the upper surface 20 a of the semiconductor substrate 20 such as the emitter electrode 50 is omitted in order to illustrate the arrangement of the respective regions inside the semiconductor substrate 20.

  On the upper surface 20a of the semiconductor substrate 20, trenches 70a and 70b (hereinafter, these may be collectively referred to as a trench 70) are formed. As shown in FIGS. 2 and 3, the trench 70 extends substantially perpendicularly to the upper surface 20 a of the semiconductor substrate 20 in the depth direction (that is, in the Z direction in each drawing). As shown in FIG. 1, the trench 70a extends linearly in the X direction when the upper surface 20a of the semiconductor substrate 20 is viewed in plan. The trench 70b extends linearly in the Y direction when the upper surface 20a of the semiconductor substrate 20 is viewed in plan. Note that the X direction is a direction orthogonal to the Y direction. The trench 70a and the trench 70b are formed so as to intersect in a three-way manner. The upper surface 20a of the semiconductor substrate 20 is partitioned into square regions by the trenches 70a and 70b. Hereinafter, a region partitioned by the trench 70 is referred to as a cell 12. Each cell 12 is a square area. The cells 12 are arranged in a straight line in the X direction, and arranged in a state in which the position is shifted in the X direction by half a cell in the Y direction. The portion where the trench 70a and the trench 70b intersect with each other in the form of a three-way path can be regarded as the trench 70 being bent and extended. For example, when the trench 70a-1 and the trench 70b-1 in FIG. 1 are regarded as one continuous trench, it can be said that the trench is bent at 90 degrees and extends. In this case, a portion inside the corner of the trench (hereinafter referred to as an inner corner portion) is a portion indicated by reference numeral 72-1 in FIG. Further, when the trench 70a-2 and the trench 70b-1 in FIG. 1 are regarded as one continuous trench, it can be said that this trench also bends and extends at 90 degrees. In this case, the inner corner portion of the trench is a portion indicated by reference numeral 72-2 in FIG. As described above, the intersection between the trench 70 a and the trench 70 b can be regarded as a portion where the trench 70 is bent and extends, and each intersection has an inner corner portion 72. Therefore, one cell has four inner corner portions 72.

  The inner surface (that is, the bottom surface and the inner wall surface) of the trench 70 is covered with an insulating film 76. A gate electrode 80 is formed in the trench 70. The gate electrode 80 is filled in the trench 70 without a gap. The gate electrode 80 faces the semiconductor layer inside the semiconductor substrate 20 with the insulating film 76 interposed therebetween. The gate electrode 80 is insulated from the semiconductor layer inside the semiconductor substrate 20 by the insulating film 76. As shown in FIGS. 2 and 3, the upper surface of the gate electrode 80 is covered with an insulating film 78, and the emitter electrode 50 is formed so as to cover the insulating film 78. The gate electrode 80 is insulated from the emitter electrode 50 by the insulating film 78. Note that the gate electrode 80 is connected to a pad at a position not shown, and the potential of the gate electrode 80 can be controlled through the pad.

  Next, the structure of the semiconductor layer in the semiconductor substrate 20 in each cell 12 will be described. In addition, since the structure of each cell 12 is mutually equal, the structure of one cell 12 is demonstrated below. FIG. 4 shows an enlarged plan view of one cell 12. As shown in FIGS. 2 to 4, an emitter region 22, an upper body region 24, a barrier region 30, a lower body region 32, a drift region 34, and a collector region 36 are formed inside the semiconductor substrate 20. ing. The upper body region 24 has a body contact region 26 and a low concentration body region 28.

  The body contact region 26 is composed of a p-type semiconductor having a high p-type impurity concentration. The body contact region 26 is formed in a region in the vicinity of the upper surface 20a including the upper surface 20a of the semiconductor substrate 20 (hereinafter referred to as a surface layer region on the upper surface 20a side). The body contact region 26 is formed in the approximate center of the cell 12. The body contact region 26 is not in contact with the insulating film 76. The body contact region 26 is ohmically connected to the emitter electrode 50.

  The emitter region 22 is composed of an n-type semiconductor having a high n-type impurity concentration. Four emitter regions 22 are formed in one cell 12. Each emitter region 22 is formed in a surface layer region on the upper surface 20a side of the semiconductor substrate 20a. Each emitter region 22 is formed around the body contact region 26 and is in contact with the body contact region 26. Each emitter region 22 is formed so as to avoid a corner portion of the cell 12 (region in the vicinity of the inner corner portion 72). Each emitter region 22 is in contact with a linearly extending portion of the insulating film 76. Each emitter region 22 is ohmically connected to the emitter electrode 50.

  The low concentration body region 28 is made of a p-type semiconductor having a p-type impurity concentration lower than that of the body contact region 26. The low concentration body region 28 is formed in the surface layer region on the upper surface 20a side of the corner portion of the cell 12. That is, the low-concentration body region 28 is formed in the surface layer region on the upper surface 20a side in a range where the emitter region 22 and the body contact region 26 are not formed. Further, the low-concentration body region 28 is formed over the entire region in the lateral direction (that is, the X direction and the Y direction) of the cell 12 at a depth lower than the emitter region 22 and the body contact region 26. As shown in FIG. 3, the low-concentration body region 28 in the surface layer region is connected to the low-concentration body region 28 having a depth below the emitter region 22 and the body contact region 26. The low concentration body region 28 is in contact with the emitter region 22 and the body contact region 26. The low concentration body region 28 is in contact with the emitter electrode 50. However, since the n-type impurity concentration of the low concentration body region 28 is low, the low concentration body region 28 is Schottky connected to the emitter electrode 50. The low concentration body region 28 is electrically connected to the emitter electrode 50 through the body contact region 26. The low concentration body region 28 is in contact with the insulating film 76. In particular, as shown in FIGS. 3 and 4, the low-concentration body region 28 is in contact with the insulating film 76 present in the inner corner portion 72.

  The barrier region 30 is composed of an n-type semiconductor having a low n-type impurity concentration. The barrier region 30 is formed over the entire region in the lateral direction of the cell 12 at a depth below the low-concentration body region 28. The barrier region 30 is in contact with the low concentration body region 28. Barrier region 30 is separated from emitter region 22 and body contact region 26 by low-concentration body region 28. The barrier region 30 is in contact with the insulating film 76.

  Lower body region 32 is formed of a p-type semiconductor having a p-type impurity concentration lower than that of body contact region 26. The lower body region 32 is formed over the entire region in the lateral direction of the cell 12 at a depth below the barrier region 30. Lower body region 32 is in contact with barrier region 30. Lower body region 32 is separated from low concentration body region 28 by barrier region 30. Lower body region 32 is in contact with insulating film 76.

  The drift region 34 is composed of an n-type semiconductor having a low n-type impurity concentration. The drift region 34 is formed over the entire region in the lateral direction of the semiconductor substrate 20 at a depth below the lower body region 32. The drift region 34 is in contact with the lower body region 32. The drift region 34 is separated from the barrier region 30 by the lower body region 32. The lower end portion of the trench 70 reaches the drift region 34. The drift region 34 is in contact with the insulating film 76 at the lower end of the trench 70.

  The collector region 36 is composed of a p-type semiconductor having a high p-type impurity concentration. The collector region 36 is formed over the entire region in the lateral direction of the semiconductor substrate 20 in a region near the lower surface 20b including the lower surface 20b of the semiconductor substrate 20 (hereinafter referred to as a surface layer region on the lower surface 20b side). The collector region 36 is ohmically connected to the collector electrode 60. The collector region 36 is in contact with the drift region 34. The collector region 36 is separated from the lower body region 32 by the drift region 34.

  The distances La1 to La4 in FIG. 4 indicate distances measured when the upper surface 12a is viewed in plan, at the boundary line where the four low-concentration body regions 28 in the surface region on the upper surface 20a side are in contact with the insulating film 76. ing. The distances Lb1 to Lb4 in FIG. 3 indicate distances measured when the upper surface 12a of the boundary line where the four emitter regions 22 are in contact with the insulating film 76 is viewed in plan view. The sum Lb of the distances Lb1 to Lb4 is smaller than the sum La of the distances La1 to La4.

  Next, the operation of the IGBT 10 will be described. When the IGBT 10 is turned on, a voltage equal to or higher than the threshold value is applied to the gate electrode 80 in a state where a positive voltage is applied between the collector electrode 60 and the emitter electrode 50. Then, the upper body region 24 and the lower body region 32 in a range in contact with the insulating film 76 are inverted to n-type, and a channel is formed. For example, in the cross section shown in FIG. 2, channels are formed in the upper body region 24 and the lower body region 32 in a range in contact with the insulating film 76 of the trench 70 b extending in the Y direction. Further, as shown in FIG. 1, the cross section of FIG. 3 is a cross section of the semiconductor layer in the vicinity of the insulating film 76 of the trench 70a extending in the X direction. Therefore, a channel is formed by the gate electrode 80 extending in the X direction in the entire upper body region 24 and lower body region 32 appearing in the cross section of FIG. When the channel is formed, electrons flow from the emitter electrode 50 through the emitter region 22 and the channel into the drift region 34. At the same time, holes flow from the collector electrode 60 through the collector region 36 into the drift region 34. As a result, the electrical resistance of the drift region 34 decreases due to the conductivity modulation phenomenon. The electrons flowing into the drift region 34 pass through the drift region 34 and the collector region 36 and flow to the collector electrode 60. In this way, when electrons flow from the emitter electrode 50 to the collector electrode 60, a current flows through the IGBT.

  The holes flowing into the drift region 34 pass through the lower body region 32 and the barrier region 30 to the upper body region 24 as shown by an arrow 100 in FIGS. 2 and 3, and then from the body contact region 26. It flows to the emitter electrode 50. At this time, the barrier region 30 becomes a barrier that blocks the flow of holes. Therefore, the hole is suppressed from flowing to the upper body region 24. As a result, the hole concentration in the drift region 34 increases, so that the electrical resistance of the drift region 34 is further reduced.

  Further, since a positive potential is applied to the gate electrode 80, holes in the drift region 34 below the gate electrode 80 are avoided so as to avoid the gate electrode 80 as indicated by an arrow 102 in FIGS. Flowing. When the flow of this hole is illustrated in the XY directions, the flow is as shown by an arrow 104 in FIG. As is clear from FIG. 5, in the inner corner portion 72 of the trench 70, the flow of holes that avoids the gate electrode 80 in the trench 70a extending in the X direction and the hole flow that avoids the gate electrode 80 in the trench 70b extending in the Y direction. The flow merges. Therefore, in the drift region 34 (region 38 in FIG. 3) in the vicinity of the inner corner portion 72, the hole concentration is extremely high and the electrical resistance is extremely low. Further, as described above, a channel is formed in the upper body region 24 and the lower body region 32 that are in contact with the insulating film 76 of the inner corner portion 72. Therefore, as indicated by an arrow 110 in FIG. 3, many electrons flow through the channel near the inner corner portion 72 into the region 38 that is the drift region 34 near the inner corner portion 72. Since the electric resistance of the region 38 is extremely low, electrons flow to the collector electrode 60 with almost no loss in the drift region 34.

  As described above, in the IGBT 10, the trench 70 is formed in a bent shape. In the upper body region 24 and the lower body region 32, a channel is formed in a range in contact with the insulating film 76 of the inner corner portion 72, and electrons flow into the drift region 34 from the channel of the inner corner portion 72. Yes. On the other hand, holes are concentrated in the drift region 34 (that is, the region 38) near the inner corner portion 72. Furthermore, the effect of accumulating holes in the drift region 34 by the barrier region 30 is also obtained. Thereby, the on-resistance of the IGBT 10 is reduced. Note that the structure in which holes are accumulated in the drift region 34 by the barrier region 30 and the structure in which holes are concentrated in the drift region 34 in the vicinity of the inner corner 72 can reduce the on-resistance of the IGBT 10 even if only one of them is employed. be able to. However, it is preferable to employ both of these. FIG. 6 shows a result of a simulation for evaluating the respective on-resistances of the IGBT 200 having a conventional stripe-shaped gate electrode, the IGBT 100 having a structure in which the barrier region 30 is removed from the IGBT 10 of the example, and the IGBT 10 of the example. It is a graph which shows. The horizontal axis indicates the mesa width, and the vertical axis indicates the on-resistance. As shown in the drawing, in any IGBT, the on-resistance decreases as the mesa width decreases. As is clear from FIG. 6, the on-resistance cannot be reduced unless the mesa width is made extremely small in the conventional IGBT 200, whereas the on-resistance can be reduced even if the mesa width is not so small in the IGBT 10 and the IGBT 100. Can be reduced. In this simulation, even when the mesa width is about 5 times that of the conventional IGBT 200 in the IGBT 100, an on-resistance equivalent to that of the IGBT 200 is obtained. In the IGBT 10, the same resistance as that of the IGBT 200 is obtained even when the mesa width is about 25 times that of the conventional IGBT 200. An on-resistance was obtained. Thus, according to the configuration of the embodiment, the on-resistance of the IGBT can be reduced without performing fine processing.

  Further, as described above, the technology of the embodiment can reduce the on-resistance of the IGBT without reducing the mesa width. As a result, an increase in the saturation current of the IGBT (the collector current that flows when the collector-emitter voltage of the IGBT becomes excessive) can be suppressed. That is, in the technique of reducing the on-resistance by reducing the mesa width, the channel density (area of the channel existing per unit area of the substrate surface) is increased by reducing the mesa width. For this reason, a large amount of electrons are supplied from the channel to the drift region when the IGBT is on, and the holes supplied from the collector region to the drift region increase accordingly. As a result, a large current easily flows when an overvoltage is applied, and the saturation current increases. On the other hand, in the technique of the embodiment, the on-resistance of the IGBT can be reduced without reducing the mesa width, so that the increase of the saturation current of the IGBT can be suppressed. In particular, in the IGBT 10 of the embodiment, as described above, the total sum Lb of the distances Lb1 to Lb4 is smaller than the total sum La of the distances La1 to La4. A region indicated by distances Lb1 to Lb4 (a region where electrons flow from the emitter region 22 into the channel) has the smallest channel width. For this reason, since the total sum Lb is reduced, the substantial channel density is reduced, and the saturation current can be further reduced.

  According to the technique of the embodiment, the on-resistance can be reduced without reducing the mesa width, but this technique is not a technique for denying the reduction of the mesa width itself. By adopting both this technique and the technique for reducing the mesa width, the on-resistance of the IGBT can be further reduced. That is, the present technology and a technology for reducing the mesa width can be used in combination.

  In the IGBT 10 of the embodiment, four emitter regions 22 are formed in one cell 12, but the number of emitter regions 22 may be less than four. For example, as shown in FIG. 7, the number of emitter regions 22 in the cell 12 may be two. When the emitter region 22 is configured in this way, the total distance Lb described above becomes shorter, so that the saturation current can be further reduced.

  In the embodiment described above, the low-concentration body region 28 is formed in the surface layer region at the corner of the cell 12, but the emitter region 22 is formed in the surface layer region at the corner of the cell 12, as shown in FIG. May be. However, if the emitter region 22 is formed in the surface layer region at the corner of the cell 12, the following problem may occur. FIG. 9 shows a cross section taken along the line IX-IX in FIG. 8, and an arrow 120 in FIG. 9 indicates a path when holes in the low-concentration body region 28 below the emitter region 22 flow to the body contact region 26. Is shown. When the emitter region 22 is formed in the surface layer region at the corner of the cell 12, the direction from the end of the emitter region 22 toward the body contact region 26 (the direction indicated by the line IX-IX in FIG. 8) is the diagonal of the cell 12. Since it extends in the direction, the distance from the end of the emitter region 22 to the body contact region 26 becomes longer. Therefore, the movement path of the hole indicated by the arrow 120 in FIG. When this movement path becomes longer, the electric potential of the low concentration body region 28 increases the potential of the low concentration body region 28 below the emitter region 22. If this potential becomes too high, holes flow into the emitter region 22 as shown by the arrow 122 in FIG. 9, and the IGBT latches up. Like the IGBT 10 of the first embodiment, the low concentration body region 28 is formed in the surface layer region at the corner of the cell 12, and the emitter region 22 is formed in a region closer to the body contact region 26. Latch-up is less likely to occur.

  Moreover, in IGBT10 of the Example, the shape of the cell was a square. However, the cell shape may be rectangular. FIG. 10 shows the relationship between the cell aspect ratio (the ratio of the length of the cell in the X direction and the length of the cell in the Y direction) and the on-resistance of the IGBT. As shown in FIG. 10, the on-resistance is minimized when the aspect ratio is 1 (that is, the cell is square). It was also found that the on-resistance of the IGBT can be more effectively reduced when the aspect ratio is in the range of 0.4 to 2.5.

  11 to 19 show the arrangement of the trenches 70 (an arrangement when the upper surface of the semiconductor substrate is viewed in plan view) in the IGBT of the modification. In addition, in FIGS. 11-19, the trench 70 is shown by hatching in consideration of the visibility of the figure. 11 to 19, illustration of structures in the trench 70 and the semiconductor layer is omitted, but a gate electrode and an insulating film are formed in the trench 70, and each of the IGBTs is formed in the semiconductor layer. A region is formed. 11-19, since the trench 70 is bent, the electrical resistance of the drift region is reduced in the vicinity of the inner corner portion, and the on-resistance of the IGBT can be reduced. In FIG. 11, the gate electrode forms a four-way path. However, when such a configuration is adopted, when the gate electrode is embedded in the trench 70 in the IGBT manufacturing process, the intersection of the trench 70 is formed. Nests (spaces in which no electrode material exists) are easily formed. Therefore, a three-way road is preferred. FIG. 13 shows an example in which the cells are triangular, and FIG. 14 shows an example in which the cells are hexagonal. 15 to 17 show an example in the case where a cell is not formed (the region surrounded by the trench 70 does not exist). 18 and 19 show an example in which a dummy trench electrode 98 is provided. The dummy trench electrode 98 is an electrode that is formed in the trench 70 in the same manner as the gate electrode, but is not connected to the outside. That is, the potential of the dummy trench electrode 98 is floating. The dummy trench electrode 98 is an electrode for controlling the potential distribution of the semiconductor layer when the IGBT is off. Even when the trench 70 is disposed as shown in FIGS. 11 to 19, the on-resistance of the IGBT can be reduced by the inner corner portion of the trench 70.

  Further, in the IGBT 10 of the above-described embodiment, the barrier region 30 is formed, and thus carriers are accumulated in the drift region 34. However, as shown in FIG. 20, a high-concentration n-type region 42 having an n-type impurity concentration higher than that of the drift region 34 may be formed between the drift region 34 and the body region 24. In this configuration, the high-concentration n-type region 42 becomes a barrier when holes flow from the drift region 34 to the body region 24. Therefore, even in this configuration, holes can be accumulated in the drift region 34 and the on-resistance of the drift region 34 can be reduced. Further, when the on-resistance can be sufficiently reduced by the configuration having the inner corner portion 72, the barrier region 30 and the high-concentration n-type region 42 need not be formed.

Specific examples of the present invention have been described in detail above, but these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.
The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology illustrated in the present specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.

10: IGBT
12: Cell 20: Semiconductor substrate 20a: Upper surface 20b: Lower surface 22: Emitter region 24: Upper body region 26: Body contact region 28: Low concentration body region 30: Barrier region 32: Lower body region 34: Drift region 36: Collector region 38: region 42: n-type region 50: emitter electrode 60: collector electrode 70: trench 72: inner corner 76: insulating film 80: gate electrode 98: dummy trench electrode

Claims (6)

An IGBT,
It has a semiconductor substrate, an emitter electrode, a collector electrode, and a gate electrode,
A trench extending in a bent shape when the upper surface is viewed in plan is formed on the upper surface of the semiconductor substrate,
The inner surface of the trench is covered with an insulating film,
The gate electrode is arranged inside the trench,
The emitter electrode is formed on the upper surface of the semiconductor substrate,
The collector electrode is formed on the lower surface of the semiconductor substrate,
Inside the semiconductor substrate,
an emitter region made of an n-type semiconductor, in contact with the insulating film, and in ohmic contact with the emitter electrode;
A body region that is made of a p-type semiconductor, is in contact with the insulating film at a position adjacent to the emitter region, is in contact with the insulating film at an inner corner of the trench, and is in ohmic contact with the emitter electrode When,
a drift region formed of an n-type semiconductor, formed below the body region, separated from the emitter region by the body region, and in contact with the insulating film at the lower end of the trench;
a collector region made of a p-type semiconductor, formed below the drift region, separated from the body region by the drift region, and ohmic-connected to the collector electrode;
Is formed,
IGBT characterized by this. A barrier region separating the body region into an upper body region and a lower body region;
The upper body region is in contact with the emitter region,
The barrier region is made of an n-type semiconductor and is formed below the upper body region.
The lower body region is formed below the barrier region,
The IGBT according to claim 1. A high concentration n-type region is formed between the body region and the drift region,
The high-concentration n-type region is composed of an n-type semiconductor, is in contact with the body region, is separated from the emitter region by the body region, is in contact with the drift region, and is separated from the drift region. And has a higher n-type impurity concentration than the drift region,
The IGBT according to claim 1 or 2, characterized in that: The body region has a first region that is ohmically connected to the emitter electrode, and a second region that is electrically connected to the emitter electrode through the first region;
The first region is not in contact with the insulating film,
A second region is in contact with the insulating film;
The emitter region is not in contact with the insulating film at the inner corner of the trench;
The IGBT according to any one of claims 1 to 3, wherein: A quadrangular region partitioned by a trench when the top surface of the semiconductor substrate is viewed in plan is formed,
An emitter region and a body region are formed in a rectangular region,
When the semiconductor substrate is viewed in plan, the total distance of the boundary line in which the emitter region is in contact with the insulating film is shorter than the total distance of the boundary line in which the body region is in contact with the insulating film in the rectangular region.
The IGBT according to any one of claims 1 to 4, characterized in that: A quadrangular region partitioned by a trench when the top surface of the semiconductor substrate is viewed in plan is formed,
An emitter region and a body region are formed in a rectangular region,
The rectangular area has an aspect ratio in the range of 0.4 to 2.5,
The IGBT according to any one of claims 1 to 4, characterized in that:

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