JP2013140871A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of improving controllability of a residual film thickness of a silicon oxide film on a fuse element.SOLUTION: A method of manufacturing a semiconductor device includes the following steps of: forming a fuse element 10 on a semiconductor substrate 1 via an interlayer insulating film 3; forming a silicon oxide film 20 on the interlayer insulating film 3 so as to cover the fuse element 10; forming a silicon nitride film 30 on the silicon oxide film 20; and partially removing only the silicon nitride film 30 by etching to form above the fuse element 10 an opening 35 for laser trimming using the silicon oxide film 20 as a bottom face. At the time when an etching gas or an etchant reaches a surface of the silicon oxide film 20, the progress of etching processing for forming the opening 35 is suppressed. Accordingly, an initial film thickness of the silicon oxide film 20 becomes a residual film thickness of the silicon oxide film 20 at the bottom face of the opening 35 almost as it is.

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a fuse element.

  FIG. 8 is a cross-sectional view showing an example of a conventional fuse element 110 and its peripheral structure. As shown in FIG. 8, a first interlayer insulating film 103 is formed on the semiconductor substrate 101, and a fuse element 110 made of metal is formed on the first interlayer insulating film 103. A second interlayer insulating film 120 is formed on the fuse element 110, and a protective film (passivation film) 130 is formed on the second interlayer insulating film 120.

  Above the fuse cut region of the fuse element 110 (that is, the portion shown in cross section in FIG. 8), the protective film 130 is removed, and the second interlayer insulating film 120 is thinned. That is, an opening 135 for laser trimming that penetrates the protective film 130 and is thinner than the surroundings is provided above the fuse cut region.

In the laser trimming process, the second interlayer insulating film 120 and the fuse element 110 are irradiated with laser light through the opening 135. Then, the fuse element 110 is blown (that is, cut) by heat generated by laser light irradiation.
Here, if the second interlayer insulating film 120 located above the fuse cut region is too thin, the second interlayer insulating film 120 disappears before the temperature of the fuse element 110 reaches its melting point. In this case, the metal component constituting the fuse element 110 is not sufficiently ejected, and the fuse element 110 may not be sufficiently cut.

On the other hand, if the second interlayer insulating film 120 on the fuse element 110 is too thick, there is a possibility that the laser beam is excessively irradiated to the fuse cut region and its periphery, and the periphery of the fuse cut region is damaged.
For this reason, for example, as disclosed in Patent Document 1, it is necessary to control the thickness of the interlayer insulating film on the fuse element.

JP 2001-135792 A

  In Patent Document 1, after a lowermost interlayer insulating film is formed on a fuse element, an opening is formed in the new interlayer insulating film every time a new interlayer insulating film is formed on the fuse element. Yes. As a result, the etching removal amount of the interlayer insulating film on the fuse element is reduced during the protective film etching process, and the controllability of the remaining film thickness of the interlayer insulating film on the fuse element can be improved. Yes.

  However, Patent Document 1 describes that the lowermost interlayer insulating film is a BPSG film and the new interlayer insulating film is a TEOS film or a silicon oxide film. For this reason, it is considered that the lowermost interlayer insulating film on the fuse element is scraped little by little each time a new interlayer insulating film is removed by etching, and the thickness is surely thinner than that at the time of film formation. Further, the lowermost interlayer insulating film on the fuse element is not simply thinned. In this lowermost interlayer insulating film, it is considered that variations due to etching are cumulatively added in addition to variations during film formation. For this reason, even in Patent Document 1, there is room for improvement in the controllability of the remaining film thickness of the interlayer insulating film on the fuse element.

  Accordingly, the present invention has been made in view of such circumstances, and provides a method for manufacturing a semiconductor device in which the controllability of the remaining film thickness of a silicon oxide film on a fuse element can be improved. With the goal.

  In order to solve the above problems, a method for manufacturing a semiconductor device according to one embodiment of the present invention includes a step of forming a fuse element over a semiconductor substrate with an insulating film interposed therebetween, and a step of forming the fuse element on the insulating film so as to cover the fuse element. Forming a silicon oxide film on the silicon oxide film; forming a silicon nitride film on the silicon oxide film; and etching the silicon nitride film only partially to remove the silicon oxide film above the fuse element. Forming a laser trimming opening having an oxide film as a bottom surface.

  Here, “partial etching and removal of only the silicon nitride film” means that a part of the silicon nitride film is removed under an etching condition in which the etching rate of the silicon nitride film is higher than that of the silicon oxide film. It means that etching is performed until the surface of the silicon oxide film is exposed. In other words, this means that a part of the silicon nitride film is etched to expose the underlying silicon oxide film, and the underlying silicon oxide film is not etched as much as possible.

  With such a manufacturing method, the progress of the etching process for forming the opening is suppressed when the etching gas or the etchant reaches the surface of the silicon oxide film. Accordingly, the thickness (ie, initial film thickness) at the time of forming the silicon oxide film is almost the same as the thickness (ie, remaining film thickness) of the silicon oxide film remaining on the bottom surface of the opening. Therefore, by controlling the initial film thickness of the silicon oxide film, the remaining film thickness of the silicon oxide film on the bottom surface of the opening can be controlled with high accuracy. Thereby, the controllability of the remaining film thickness of the silicon oxide film on the fuse element can be enhanced. The “insulating film” of the present invention corresponds to, for example, an interlayer insulating film 3 described later. As the “opening”, for example, an opening 35 described later corresponds.

  In the method of manufacturing a semiconductor device, in the step of forming the opening, the silicon nitride film is etched under an etching condition in which an etching rate of the silicon oxide film is 1/10 or less of an etching rate of the silicon nitride film. The film is etched. With such a manufacturing method, the etching amount of the silicon oxide film can be made sufficiently small, and the controllability of the remaining film thickness of the silicon oxide film can be sufficiently improved.

  In the method for manufacturing a semiconductor device, an optimum thickness for the laser trimming is previously obtained with respect to the thickness of the silicon oxide film, and the silicon oxide film is formed in the step of forming the silicon oxide film. The film is formed to have the same thickness as the optimum thickness. Here, the “optimum thickness” is a thickness that can cut the fuse element with high reproducibility while suppressing damage to the periphery of the fuse element due to laser light irradiation.

  With such a manufacturing method, the remaining film thickness of the silicon oxide film on the bottom surface of the opening is the above-mentioned “optimum thickness” or a value close thereto. Therefore, it is possible to cut the fuse element with high reproducibility while suppressing damage to the periphery of the fuse element. This can contribute to improving the quality of the laser trimming process and improving the yield.

  According to the present invention, it is easy to bring the film thickness of the silicon oxide film on the bottom surface of the opening for laser trimming (that is, on the fuse element) close to a desired value, and the film thickness controllability is improved (that is, Can be improved).

Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 1). Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 2). Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 3). Sectional drawing which shows the manufacturing method of the semiconductor device which concerns on embodiment of this invention (the 4). FIG. 4 is a cross-sectional view showing an example of an opening 35 formed for a plurality of fuse elements 10. FIG. 5 is a plan view corresponding to FIG. FIG. 6 is a cross-sectional view showing another example of an opening 35 formed for a plurality of fuse elements 10. The figure which shows a prior art example.

Hereinafter, embodiments according to the present invention will be described with reference to the drawings. Note that, in each drawing described below, parts having the same configuration are denoted by the same reference numerals, and repeated description thereof is omitted.
FIG. 1A to FIG. 4B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. Here, a case will be described in which a fuse element is formed on a semiconductor substrate through an interlayer insulating film, and then the fuse element is irradiated with a laser beam and blown (ie, laser trimming) as necessary.

As shown in FIG. 1A, first, an interlayer insulating film 3 is formed on a semiconductor substrate 1. The semiconductor substrate 1 is, for example, a single crystal silicon substrate or an SOI (silicon on insulator) substrate having a structure in which a silicon layer is formed on an insulating layer. Various elements such as a MOS (metal oxide semiconductor) field effect transistor, a bipolar transistor, a capacitor, a resistor, and a coil are formed on the semiconductor substrate 1. These various elements are covered with an interlayer insulating film 3. The interlayer insulating film 3 is, for example, a silicon oxide film (SiO ₂ ), and the formation method thereof is, for example, a plasma enhanced chemical vapor deposition (PECVD) method. Here, the interlayer insulating film 3 is formed to a thickness of 3 μm or more, for example.

  Next, as shown in FIG. 1B, a metal film 10 ′ is formed on the interlayer insulating film 3. Here, as the metal film 10 ′, the titanium nitride film (TiN) 11 is 60 nm, the titanium film (Ti) 12 is 11.5 nm, the aluminum film (Al) 13 is 362 nm, the titanium nitride film 14 is 33 nm, and titanium is sequentially formed from the top. The film 15 is laminated to 11.5 nm. That is, as the metal film 10 ′, for example, a film having a laminated structure of Ti / TiN / Al / Ti / TiN = 11.5 / 33/362 / 11.5 / 60 nm is formed. The formation method of the metal film 10 ′ is, for example, a sputtering method.

  Next, as shown in FIG. 1C, a resist pattern 16 is formed on the metal film 10 'by photolithography. Here, the resist pattern 16 is formed in a shape that covers the region where the wiring is formed and the region where the fuse element is formed and exposes the other regions. Then, the metal film 10 ′ is etched using the resist pattern 16 as a mask. Thereby, as shown in FIG. 2A, the fuse element 10 made of the metal film 10 ′ and the wiring 50 made of the metal film 10 ′ are formed. After forming the fuse element 10 and the wiring 50, the resist pattern 16 is removed by, for example, ashing. As shown in FIG. 2B, after the resist pattern is removed, the fuse element 10 and the wiring 50 are exposed.

  Next, as shown in FIG. 2C, a silicon oxide film 20 is formed on the interlayer insulating film 3 so as to cover the fuse element 10 and the wiring 50. The silicon oxide film 20 is, for example, an uppermost interlayer insulating film among a plurality of interlayer insulating films formed on the semiconductor substrate 1. A method for forming the silicon oxide film 20 is, for example, a plasma CVD method. Here, the silicon oxide film 20 is formed to a thickness of 200 to 600 nm, for example.

Next, as shown in FIG. 3A, a silicon nitride film (Si ₃ N ₄ ) 30 is formed on the silicon oxide film 20. The silicon nitride film 30 is, for example, a protective film (that is, a passivation film), and its formation method is, for example, plasma CVD. Here, the silicon nitride film 30 is formed to a thickness of 600 to 1000 nm, for example. Next, as shown in FIG. 3B, a resist pattern 31 is formed on the silicon nitride film 30 by photolithography. This resist pattern 31 is formed in a shape that exposes the upper part of the fuse element 10 that is planned to be cut by laser trimming (that is, the fuse cut area) and covers the other areas.

Here, for example, when the width of the fuse cut region of the fuse element 10 is L1 and the width L2 of the opening 32 of the resist pattern 31 is set, the width L2 is set larger than the width L1 (that is, L2> L1). .
Next, the silicon nitride film 30 is etched using the resist pattern 31 as a mask. Thereby, as shown in FIG. 3C, the silicon nitride film 30 is removed from above the fuse cut region of the fuse element 10 to form an opening 35 having the silicon oxide film 20 as a bottom surface. This opening 35 is an opening for laser trimming. As described above, the opening 32 of the resist pattern 31 is formed wider than the fuse cut region of the fuse element 10 (L2> L1). For this reason, the opening 35 is also formed wider than the fuse cut region. That is, when the width of the opening 35 is L2 ′, L2≈L2 ′ and L2 ′> L1.

The etching process for forming the opening 35 may be performed by dry etching or wet etching. The processing conditions include an etching rate of the silicon oxide film 20 (that is, etching). The rate is sufficiently lower than the etching rate of the silicon nitride film 30.
An example is given of such processing conditions. When the etching process of the silicon nitride film 30 is dry etching, the gas species are tetrafluoromethane (CF ₄ ) and oxygen (O ₂ ), and the gas mixing ratio is CF ₄ : O ₂ = 9: 1. Use conditions. When the etching process of the silicon nitride film 30 is wet etching, a hot phosphoric acid solution (H ₃ PO ₄ : HNO ₃ , 150 to 160 ° C.) is used as the etching solution. Under such processing conditions, the silicon nitride film 30 above the fuse cut region can be removed and the opening 35 can be formed with little etching of the underlying silicon oxide film 20.

The above processing conditions are preferably such that the etching rate of the silicon oxide film 20 is 1/10 or less of the etching rate of the silicon nitride film 30. Thereby, the etching amount of the silicon oxide film 20 can be made sufficiently small, and the controllability of the remaining film thickness of the silicon oxide film 20 can be sufficiently enhanced.
As shown in FIG. 3C, after the opening 35 is formed, the resist pattern 31 is removed by ashing, for example. As shown in FIG. 4A, after the resist pattern is removed, the surface of the silicon nitride film 30 is exposed.

  Next, as shown in FIG. 4B, laser trimming is performed as necessary. For example, as shown in FIG. 5, a plurality of fuse elements 10 are formed on the interlayer insulating film 3. Above each of the plurality of fuse elements 10, an opening 35 having a silicon oxide film 20 as a bottom surface is formed. In the step of performing laser trimming, laser trimming is performed on at least a part of the plurality of fuse elements 10.

  For example, when the semiconductor device includes an analog circuit and the analog characteristics (resistance value, capacitance value, etc.) need to be finely adjusted, at least a part of the plurality of fuse elements 10 is irradiated with laser light, Cut the fuse cut area. Thereby, the analog characteristic can be brought close to the target value. When the semiconductor device includes a storage device such as a DRAM or a flash memory and it is necessary to relieve a defective memory cell, at least a part of the plurality of fuse elements 10 is irradiated with laser light, Cut the fuse cut area. Thereby, the defective memory cell can be replaced with a spare redundant cell, and the storage capacity can be recovered.

  FIG. 6 is a plan view corresponding to FIG. As shown in FIG. 6, in this embodiment, it is preferable that the width L2 ′ of the opening 35 is larger than the diameter (that is, the beam diameter) L3 of the laser light irradiation region (that is, L3 <L2 ′). ). Thereby, only the bottom surface of the opening 35 can be irradiated with laser light. It is possible to prevent the periphery of the opening 35 from being irradiated with laser light and damaging the periphery.

In this embodiment, the beam diameter L3 of the laser beam is preferably larger than the width L1 of the fuse cut region of the fuse element 10. Thereby, it is possible to cut each of the plurality of fuse elements 10 by spot irradiation with laser light (that is, irradiation with a fixed position without scanning the laser light). .
As described above, according to the embodiment of the present invention, a part of the silicon nitride film 30 is etched under the condition that the silicon nitride film is more easily etched than the silicon oxide film (that is, the selective condition). Then, the opening 35 having the silicon oxide film 20 as a bottom surface is formed. The progress of this etching process is suppressed when the etching gas or the etchant reaches the surface of the silicon oxide film 20. Therefore, the thickness at the time of forming the silicon oxide film 20 (that is, the initial film thickness) is almost the same as the thickness of the silicon oxide film 20 that remains on the bottom surface of the opening 35 (that is, the remaining film thickness).

For this reason, by controlling the initial film thickness of the silicon oxide film 20, the remaining film thickness of the silicon oxide film 20 on the bottom surface of the opening 35 can be controlled with high accuracy. Thereby, the controllability of the remaining film thickness of the silicon oxide film 20 on the fuse element 10 can be enhanced.
For example, regarding the thickness of the silicon oxide film 20, an “optimum value” for performing laser trimming is obtained in advance by experiments or simulations. In the step of forming the silicon oxide film 20, the initial film thickness of the silicon oxide film 20 is set to the same size as the “optimum thickness”. Thereby, when performing laser trimming, the remaining film thickness of the silicon oxide film 20 on the bottom surface of the opening 35 becomes the above-mentioned “optimum thickness” or a value close thereto. Therefore, it is possible to cut the fuse element 10 with high reproducibility while suppressing damage to the surroundings. This can contribute to improving the quality of the laser trimming process and improving the yield.

  In the above embodiment, as shown in FIG. 5, the case where the opening 35 is provided above each of the plurality of fuse elements 10 has been described. However, the present invention is not limited to this. For example, as shown in FIG. 7, one large opening 35 may be provided above the plurality of fuse elements 10. In other words, the opening 35 may be provided so as to open above the plurality of fuse elements 10 at once. Even in such a case, the same effects as those of the above-described embodiment can be obtained.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 3 Interlayer insulation film 10 Fuse element 10 'Metal film 11, 14 Titanium nitride film 12, 15 Titanium film 13 Aluminum film 16, 31 Resist pattern 20 Silicon oxide film 30 Silicon nitride film 32 Opening 35 (resist pattern) Opening 50 (silicon nitride film)

Claims (3)

Forming a fuse element on a semiconductor substrate via an insulating film;
Forming a silicon oxide film on the insulating film so as to cover the fuse element;
Forming a silicon nitride film on the silicon oxide film;
Forming a laser trimming opening having the silicon oxide film as a bottom surface above the fuse element by partially etching and removing only the silicon nitride film. A method for manufacturing a semiconductor device. In the step of forming the opening,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the silicon nitride film is etched under an etching condition in which an etching rate of the silicon oxide film is 1/10 or less of an etching rate of the silicon nitride film. . Regarding the thickness of the silicon oxide film, an optimum thickness when performing the laser trimming is obtained in advance,
In the step of forming the silicon oxide film,
The method of manufacturing a semiconductor device according to claim 1, wherein the silicon oxide film is formed to have the same thickness as the optimum thickness.

Images