JP2013097460A - Peripheral equipment for programmable controller - Google Patents

Abstract

A peripheral device of a programmable controller having a program check function capable of detecting an overlapping state between a received data area of a communication unit and a data area output by a sequence program instruction.
Means for reading sequence program 14a and communication unit parameter 14b, instruction information table 14e of sequence program 14a, first data area output by instruction, and reception data area of communication unit parameter 14b The acquisition means, the second data area that is the reception data area, the usage status registration means for determining the duplication status of the first data area and the second data area, the usage status table 14c and the duplication list 14d, and the duplication list 14d And a program check means 26d for confirming the overlapping state of the data areas of the sequence program 14a and the communication unit parameter 14b.
[Selection] Figure 1

Description

  The present invention relates to a peripheral device for a programmable controller.

  Production facilities include a system that includes a plurality of programmable controllers, and each programmable controller is connected to a network to exchange data. For such data exchange, communication using a common memory system is generally used. In the common memory system, each communication unit included in each programmable controller has a common memory (common memory). Each programmable controller has an internal memory accessible from a sequence program. Data transmission to other programmable controllers is performed by writing data in the transmission data area set in the internal memory of the programmable controller itself to a predetermined area on the common memory of the communication unit. When data is written in a predetermined area on the common memory, the data written by its own programmable controller is reflected in a predetermined area on the common memory of the communication unit of another programmable controller. The data is received by the programmable controller reading data written by another programmable controller from a predetermined area on the common memory of the communication unit provided in the programmable controller and writing the data to the reception data area set in the internal memory. . As described above, the transmission data area and the reception data area set in the internal memory of the programmable controller itself are accessed from the sequence program, thereby enabling data exchange with other programmable controllers. The transmission data area and reception data area of the internal memory are set according to the parameters of the communication unit.

  The sequence program is created by a peripheral device of a programmable controller having a sequence program editing function, and this sequence program can be implemented by writing the sequence program created from the peripheral device to the programmable controller. Also, the peripheral device has various parameter setting functions. For example, the communication unit link configuration and the transmission / reception data area are set as the parameter setting of the communication unit. By writing this parameter to the programmable controller, the communication unit performs the set communication process.

  By the way, in the instructions constituting the sequence program, if an overlap state occurs between the data areas output by the instructions, the sequence program may malfunction. For this reason, before the sequence program is written from the peripheral device to the programmable controller, the overlapping state of the data area is checked by the program check function provided in the peripheral device to prevent the malfunction of the sequence program. This program check function detects an overlapping state that occurs between data areas output by instructions of a sequence program. (Patent Document 1)

JP 2003-122409 A

  However, the overlapping state of the data areas does not only occur between the data areas output by the instructions of the sequence program. When the programmable controller is connected to the network via the communication unit and the sequence program is exchanging data with other programmable controllers, it is between the received data area of the communication unit and the data area output by the sequence program instructions. However, it is assumed that an overlapping state will occur. The conventional program check function has a problem in that it cannot detect this overlapping state.

  The present invention has been made to solve such a problem, and for a sequence program for exchanging data with other programmable controllers, a communication unit received data area and a data area for outputting a sequence program instruction; It is an object of the present invention to provide a peripheral device of a programmable controller having a program check function capable of detecting an overlapping state between the two.

  In order to solve the above problems, the invention according to claim 1 is a storage means for storing a sequence program and a communication unit parameter, a sequence program reading means for reading the sequence program from the storage means, and the storage Means for reading out the communication unit parameter from the means, an information table storing instructions constituting the sequence program and a data size output by the instruction, and the instruction of the sequence program A first data area to be output; a reception data area acquisition means for acquiring a reception data area set in the communication unit parameter; a second data area acquired by the reception data area acquisition means; and the first data Area and the second data area A usage status table for registering usage status, usage status registration means for registering the usage status table for the usage status of the first data area and the second data area, and for determining a duplication status between the areas, and the duplication status A duplication list for registering the data area, and program check means for confirming the duplication status of the sequence program and the communication unit parameter by the duplication list.

  The invention according to claim 2 is the peripheral device of the programmable controller according to claim 1, wherein the reception data area acquisition means includes a communication method determination means for determining a communication method of the communication unit parameter, and the communication Parameter information defined for each method, parameter setting value acquisition means for acquiring the setting value of the communication unit / parameter, and the start address and data size of the data area for storing received data are calculated from the parameter setting value. Address calculating means.

  The invention according to claim 3 is the peripheral device of the programmable controller according to claim 1 or 2, comprising a usage status display means for displaying the usage status and the overlapping status of the data area on the screen in an identifiable manner. It is.

  The invention according to claim 4 is the peripheral device of the programmable controller according to claim 1 or 2, wherein the instruction code of the sequence program to which the address of the data area in an overlapping state is assigned is the other of the instruction code. A sequence program display means for displaying on the screen so as to be distinguishable from the instruction code is provided.

  According to the invention of claim 1 configured as described above, the peripheral device of the programmable controller generates the usage status table by calling the usage status registration means, and the data used by the sequence program and the communication unit parameter It is possible to check the overlapping state of the areas. The sequence program and the communication unit parameter are read by the sequence program reading unit and the communication unit parameter reading unit. The usage status registration means refers to the sequence program instruction and the information table to obtain the data area indicated by the head address and data size output by the instruction. The data area output by the sequence program instruction is defined as a first data area. Also, the usage status registration means acquires the second data area, which is the reception data area set in the communication unit parameter, by the reception data area acquisition means. Then, the usage status registration means registers the usage status of the first data area and the second data area in the usage status table and determines the overlapping status of the data areas. Data areas determined to be in a duplicate state are registered in a duplicate list.

  If the data area is not registered in the overlap list, the first data area output by the sequence program instruction and the first data area output by the sequence program instruction and the reception data area of the communication unit This indicates that there is no overlapping data area with a certain second data area.

  If the data area is registered in the duplicate list, the first data area output by the sequence program instruction and the first data area output by the sequence program instruction and the received data of the communication unit This indicates that there is an overlapping data area with the second data area, which is an area.

  In this way, the usage status registration means can automatically detect the duplication status including the reception data area of the communication unit. Therefore, before the sequence program is written to the programmable controller, the usage status registration means uses the duplication list. By generating the program, it is possible to reliably perform the program check including the duplicate state before executing the sequence program. Furthermore, since the sequence program command and communication unit parameters that caused the overlap state can be specified, the overlap state can be easily eliminated.

  According to the invention according to claim 2, even if the communication unit parameter is a parameter that differs for each communication method, the communication method is determined by the communication method determination means, and the parameter setting value acquisition means is defined for each communication method. By referring to the parameter information thus obtained, the parameter setting value can be acquired. Since the address calculation means can calculate the start address and data size of the data area for storing the received data from the parameter setting value, the usage status registration means corresponds to communication units of various communication methods. The overlap state can be determined.

  According to the invention of claim 3, since the peripheral device of the programmable controller displays the overlapping state on the screen so that the use state of the data area can be identified by the use state display means, the sequence program and the communication unit -You can see the overlapping status of data areas used by parameters in a list.

  According to the invention of claim 4, the peripheral device of the programmable controller uses the sequence program display means to transfer the instruction code assigned with the address of the data area in the overlapping state in the display of the sequence program to another instruction. And can be displayed on the screen in an identifiable manner. As a result, since the sequence program instruction that caused the overlap state can be easily identified on the display of the sequence program, the overlap state can be easily eliminated.

1 is a system configuration diagram of a peripheral device showing a first embodiment of the present invention. The block diagram of the programmable controller which shows the 1st Embodiment of this invention. Explanatory drawing of the CPU unit and communication unit of FIG. The communication unit parameter setting screen of the peripheral device showing the first embodiment of the present invention. FIG. 5 is an explanatory diagram showing a memory configuration for parameter setting in FIG. 4. Explanatory drawing of the information table of the peripheral device which shows the 1st Embodiment of this invention. Explanatory drawing of the usage condition table of the peripheral device which shows the 1st Embodiment of this invention. Explanatory drawing of the sequence program of the peripheral device which shows the 1st Embodiment of this invention. 5 is a flowchart of program check processing of the peripheral device according to the first embodiment of this invention. The flowchart of the usage status registration process of the peripheral device which shows the 1st Embodiment of this invention. The usage-condition display example of the peripheral device which shows the 2nd Embodiment of this invention. 10 is a sequence program display example of a peripheral device showing a third embodiment of the present invention.

[First Embodiment]
There are various types of peripheral devices for programmable controllers, such as those composed of dedicated hardware and those composed of general-purpose personal computers (hereinafter referred to as PCs). FIG. 1 is a system configuration diagram when a PC on which peripheral device software of this embodiment is installed is used as the peripheral device 10.
Hereinafter, the system configuration of the peripheral device 10 according to the embodiment of the present invention will be described with reference to the drawings.

  As shown in FIG. 1, the peripheral device 10 includes a system memory 28, a hard disk drive (HDD) 24, a communication interface 27, a keyboard 22, a mouse 23, and the like via a system bus 12 of a CPU (central processing unit) 11. A display 21 is connected. Peripheral device software 26 is installed in the HDD 24.

  The system memory 28 is a storage means including a RAM (random access memory) 14 and a ROM (read only memory) 13. The RAM 14 is used by the CPU 11 to read out and execute each program from the HDD 24. The RAM 14 is used as a data area for temporarily storing data required for executing each program and a work area for generating various information. The ROM 13 stores a basic input / output system (BIOS) program 13a, which performs initial settings when the peripheral device 10 is activated, and activates an operating system (OS) 25 installed in the HDD 24. . The communication interface 27 communicates with the programmable controller via a communication cable (not shown). The display 21 is an output device, and is used to output a screen display when the peripheral device software 26 edits a sequence program. The keyboard 22 and the mouse 23 are input devices, respectively, and are used for inputting information when the peripheral device software 26 edits a sequence program. The HDD 24 is a storage device composed of a hard disk, and has peripheral device software 26 and an OS 25 installed therein.

  The peripheral device software 26 includes a sequence / program editing program 26a, a conversion program 26b, a communication unit / parameter setting program 26c, a program check program 26d, and the like. Each function of the peripheral device 10 is implemented by each program of the peripheral device software 26. For example, Windows (registered trademark) 7 or the like is applied to the OS 25.

  The sequence program editing program 26a edits the sequence program (source code) 14a in the form of a corresponding ladder diagram. The sequence program (source code) 14a is obtained by reading a sequence program (binary code) (not shown) and converting it into a conversion program 26b. The edited sequence program (source code) 14a is converted into a sequence program (binary code) by the conversion program 26b.

  The communication unit / parameter setting program 26c sets the communication unit / parameter 14b when the communication unit is used in the sequence program (source code) 14a.

  The program check program 26d checks the consistency and usage of the sequence program (source code) 14a. In this usage status check, a usage status table 14c and a duplication list 14d indicating the usage status of the data area are generated.

  The created sequence program communicates with the programmable controller via the communication interface 27 and writes the sequence program and parameters to the programmable controller. At this time, in order to prevent malfunction of the sequence program, a program check process is performed before this writing.

  FIG. 2 is a configuration diagram of the programmable controller 100 in the production facility configured by a plurality of programmable controllers connected to the FL-net network. This programmable controller exchanges data with other programmable controllers via the FL-net network. As shown in FIG. 2, the programmable controller 100 includes a CPU unit 110 and a communication unit 120. The CPU unit 110 and the communication unit 120 are connected via an internal bus 112 that connects the units. This communication unit 120 corresponds to the FL-net standard.

  FL-net is a network standard that interconnects various devices (programmable controller, robot controller, numerical controller, personal computer, etc.) incorporated in the FA control system. FL-net is a standard proposed by JEMA (Japan Electrical Manufacturers' Association) and adopts a common memory system. The programmable controller 100 includes the communication unit 120 which is a communication device corresponding to the FL-net standard, so that the programmable controller 100 can be incorporated into the FL-net network. In FL-net, devices are connected by Ethernet (registered trademark), and UDP / IP (User Datagram Protocol / Internet Protocol) is used as a communication protocol.

  The CPU unit 110 is connected to a ROM 115, a RAM 114, a program memory 113, an I / O control circuit 118, and a communication interface 119 via an internal bus 112 of the CPU 111. The communication interface 119 communicates with the peripheral device 10 via a communication cable (not shown). The sequence program and parameters written by the peripheral device 10 via the communication interface 119 are stored in the program memory 113. The ROM 115 stores a system program 115a, and the RAM 114 stores an internal memory 114a. The system program 115a controls the CPU unit 110 and executes sequence control by executing the sequence program 113a.

  The communication unit 120 is connected to the ROM 125, the RAM 124, the common memory 124a, and the communication interface 129 via the internal bus of the CPU 121, and is connected to the FL-net network via the communication interface 129. An Ethernet (registered trademark) cable is used for connection to the FL-net network. The control program 125a controls the communication unit 120. A plurality of communication units 120 may be provided.

  FIG. 3 is an explanatory diagram of the internal memory 114 a of the CPU unit 110 and the common memory 124 a of the communication unit 120. A reception data area and a transmission data area are set in the internal memory 114a accessible from the sequence program 113a. Other device data of the common memory 124a received via the network is read out to the received data area of the internal memory 114a. Further, by writing the data in the transmission data area into the common memory 124a, the device data is transmitted via the network. Each programmable controller shares a common memory by performing cyclic communication between the programmable controllers via this network.

  FIG. 4 shows the FL-net communication unit / parameter setting 300 by the communication unit / parameter setting program 26c. After setting a parameter value by the FL-net communication unit / parameter setting 300, the communication unit performs communication processing for setting by writing this parameter to the programmable controller.

  As shown in FIG. 4, the FL-net communication unit / parameter setting 300 includes settings of a relay link 310 and a register link 410. The relay link 310 is an address setting of the data area of the internal memory that can be accessed mainly in bit units, and the register link 410 is an address setting of the data area of the internal memory that can be accessed mainly in word units. It is. Parameters of link area head addresses 311 and 411, link area word numbers 313 and 413, transmission area head addresses 314 and 414, and transmission area word numbers 316 and 416 can be set, respectively. The link area end addresses 322 and 422 and the transmission area end addresses 325 and 425 are automatically calculated from the set parameters.

  Here, the communication unit parameter is numbered for each communication unit, and has additional information such as a communication method. When the programmable controller includes a plurality of communication units, it is necessary to set communication units and parameters for each of the units. In the case of the FL-net communication unit, it is necessary to set a node number or the like separately.

  FIG. 5 is an explanatory diagram showing a memory configuration for parameter setting of the register link 410 of FIG. The reception data area of the register link 410 is an area of R0000 to R02FF and R0500 to R05FF excluding the range of the transmission area from the range of the link area. Although not shown, the reception data area of the relay link 310 is an area of L000 to L0FF and L200 to L3FF.

  Here, R0000, L000, etc. are address formats that can be recognized by the sequence program, and are obtained by adding a hexadecimal address to the head identification character. An address having a leading identification character R is a word unit address called a link register, and an address having a leading identification character L is a bit unit address called a link relay. Further, the 16 bits of the addresses L000 to L00F can be specified in units of words by expressing them as L00W. In the present embodiment, a system is assumed in which 2 bytes (16 bits) are one word.

  In the peripheral device 10 of the present embodiment configured as described above, processing for detecting an overlapping state of data areas will be described.

  FIG. 6 is an explanatory diagram of the information table 14e. As shown in FIG. 6, the information table 14 e has an operand number having an address 601 of a data area output by the instruction 600 and an operand number having a data size 602. For example, in the case of WBMOV, the address of the data area to be output is described in the second operand, and the data size is described in the third operand.

  FIG. 7 is an explanatory diagram of the usage status table 14c. As shown in FIG. 7, the usage status table 14c includes usage status flag information corresponding to each address of the internal memory of the programmable controller. The flag information of the usage status of each address is shown in a table in ascending order of address, divided into 10H records in the address order.

  In the usage status table 14c, a portion where the flag information is in an ON state indicates that the data area of the internal memory at that address is used. For example, in FIG. 7, the flag information of addresses R0300 to R04FF is in an off state, indicating that this data area 426 is not used.

Next, the program check processing of this embodiment will be described with reference to the flowchart of FIG.
As shown in FIG. 9, in the program check process, a data area overlap state check and a consistency check are performed.

  The consistency check checks whether the sequence program 14a is in a predetermined format, whether the address used by the instruction is correct, whether a jump destination label exists, and the like. (Step S101)

  Then, the check result is determined. If there is a problem, the check result is stored, and if there is no problem, the check result is skipped. (Step S102) (Step S103)

  Next, the duplication state of the data area is checked by the use status registration process for the sequence program 14a. A usage table and a duplicate list are output. (Step S104)

  The output duplicate list is read, the contents are stored if the duplicate list is not empty, and skipped if the duplicate list is empty. (Step S105) (Step S106) (Step S107)

  The stored consistency check result and the contents of the duplicate list are displayed in the display format. (Step S108)

  Next, the usage status registration process of this embodiment will be described with reference to the flowchart of FIG.

  As shown in FIG. 10, in the usage status registration process, first, initialization and acquisition of the first communication unit parameter are performed. In the initialization, a usage status table and a duplicate list are generated, and flag information of all addresses in the usage status table is turned off. The duplicate list is empty. (Step S001)

  Next, the reception data storage area acquisition process acquires the address and data size for storing the reception data set in the communication unit parameter. (Step S002)

  For example, a case where the parameters set by the FL-net communication unit / parameter setting 300 of FIG. 4 are acquired will be described. In the received data storage area acquisition process, the communication method determining means determines that the parameter communication method is FL-net. Then, referring to the parameter information of FL-net, the setting values of the link area head address, the number of link area words, the transmission area head address, and the number of transmission area words are acquired. Thereby, the link area head address L00W, the link area word number 64, the transmission area head address L10W, and the transmission area word number 16 are acquired.

  Then, the reception data area of the relay link is calculated by the address calculation means as the data size FH words from the address L00W excluding the transmission area range from the link area range and the data size 1FH words from the address L20W. Also, the reception data area of the register link is calculated from the address R0000 excluding the range of the transmission area from the link area to the data size 2FF words and from the address R0500 to the data size FFH words.

  Referring to the usage status table, flag information corresponding to the data area indicated by the address and data size is acquired, and the usage status is determined. (Step S003)

  If the flag information is in an off state indicating that the data area is not used, the flag information is changed to an on state indicating that the data area is used. (Step S004)

  If the data area is already used, the number and address indicating this communication unit parameter are registered in the duplicate list. (Step S005)

  For example, when the above communication unit parameters are read out and the usage status table is referenced, flag information corresponding to addresses R0000 to R02FF, R0500 to R05FF, L000 to L0FF, and L200 to L3FF is in an off state. To do.

  The received data area of the communication unit parameter is addresses R0000-R02FF, R0500-R05FF, L000-L0FF, L200-L3FF, and these are not used, so addresses R0000-R02FF, R0500-R05FF, L000-L0FF The flag information corresponding to L200 to L3FF is registered in the usage status table as the on state.

  Here, in the usage status table, if there is an address that is already in the flag information corresponding to the addresses R0000 to R02FF, R0500 to R05FF, L000 to L0FF, and L200 to L3FF, the address is in a duplicated state. Judge that there is.

  Then, the numbers and addresses indicating the communication unit parameters are registered in the duplicate list. Note that flag information of addresses other than the duplicate status address is registered in the usage status table as an on state.

  Then, the next communication unit parameter is obtained from the parameter. (Step S006)

  For all communication units / parameters, it is determined whether the parameters have been acquired. If they have not been acquired, steps S002 to S006 are repeated. If they have been acquired, the process proceeds to the next step. (Step S007)

  Next, one instruction of the first step is acquired from the sequence program (source code). (Step S008)

  By referring to the information table, the address and data size of the data output by the step instruction are acquired. (Step S009)

  For example, the sequence program (source code) in FIG. 8B corresponds to the ladder diagram in FIG. When step 0105 in FIG. 8B is read, FUNC of mnemonic 700 and WBMOV of operand 710 are obtained. This indicates that Step 0105 indicates that the instruction is a function type FUNC and the type thereof is WBMOV.

  WBMOV is an instruction (function) for block transfer in units of words, and takes three operands as arguments from the address of the first operand 721 to the address of the second operand 722 for the data size (number of words) of the third operand 723. It is a specification to transfer. By referring to the information table 14e in FIG. 6, when the instruction 600 is WBMOV, it can be understood that the address 601 of the data area is described in the second operand and the data size 602 is described in the third operand. .

  Here, D0100 of the first operand 721, R04FC of the second operand 722, and 8d of the third operand 723 are acquired from FIG. 8B. Therefore, as shown in FIG. 8C, the data area output by the WBMOV in step 0105 has a data size of 8 words from the address R04FC. Here, d indicates a decimal value.

  In the usage status table, flag information corresponding to the data area indicated by the address and the data size is acquired to determine the usage status. (Step S010)

  If the flag information is in an off state indicating that the data area is not used, the flag information is changed to an on state indicating that the data area is used. (Step S011)

  If the flag information is in an on state indicating that the data area is already used, the step number and address of this instruction are registered in the duplicate list. (Step S012)

  For example, in the case where WBMOV is read in step 0105 in FIG. 8B, it is assumed that the flag information corresponding to the addresses R04FC to R0503 is in the OFF state when the usage status table is referred to.

  The data area output by the WBMOV in step 0105 has a data size of 8 words from the address R04FC, and since the addresses R04FC to R0503 are not used, the flag information corresponding to the addresses R04FC to R0503 is turned on, and the usage status table Register with.

  As shown in FIG. 7, it is assumed that the flag information corresponding to the addresses R04FC to R04FF is in the off state and the flag information corresponding to the addresses R0500 to R0503 is in the on state in the usage status table.

  Since the data area output by the WBMOV in step 0105 has a data size of 8 words from the address R04FC, it is determined by checking the usage status table whether the addresses R04FC to R0503 are used.

  In this case, in the usage status table, the flag information of the addresses R04FC to R04FF is in the off state, but the flag information of the addresses R0500 to R0503 is already in the on state. Therefore, it is determined that the data area of the addresses R0500 to R0503 is in the overlapping state. Is done.

  Then, information of addresses R0500 to R0503 and step number 0105 is registered in the duplicate list. Note that the flag information of the addresses R04FC to R04FF is registered in the usage status table as an on state.

  Next, one instruction of the next step is acquired from the sequence program (source code). (Step S013)

  It is determined whether or not an instruction has been acquired up to the last step of the sequence program (source code). If not acquired, steps S009 to S013 are repeated. If acquired, the process ends. (Step S014)

  In this way, the usage status registration process checks the usage status of the received data area of the communication unit and the data area output by the sequence program instruction, and outputs the result to the usage status table and the duplicate list.

  The program check function of the present invention can detect an overlapping state between the received data area of the communication unit and the data area output by the sequence program instruction by the usage status registration process. Even when data exchange with other programmable controllers is performed, a reliable program check can be performed. Furthermore, since the sequence program command and communication unit parameters that caused the overlap state can be specified, the overlap state can be easily eliminated.

[Second Embodiment]
FIG. 11 is a usage status display example showing the second embodiment of the present invention.
In the present embodiment, the usage status of the sequence program 14 a is displayed on the display of the peripheral device 10.

  As shown in FIG. 11, the usage status display 800 displays the usage status of the designated address. The usage status display 800 displays the usage status table and the duplicate list information generated by the usage status registration processing in the form of a list in the order of addresses. When the identification character of the address to be displayed is input to the display address 801, the flag information of the usage status of each address is displayed in a list 802 in ascending order of address, divided into lines every 10H in the address order. By operating a scroll bar 803 provided beside the list 802, the address range to be displayed can be changed. In the usage status display 800, a data area used by a sequence program instruction is indicated by an address identification character 811, and an unused data area 810 is indicated by a midpoint (•). The reception data area 820 set in the communication unit parameter is displayed so that the background color can be distinguished from the other. The address in the duplicate list information highlights the address identification character 821 as a data area in the duplicate state. Therefore, in FIG. 11, addresses R04EC to R04F3 and R04FC to R0503 are used by instructions of the sequence program, and R0500 to R05FF are set in the reception data area, so R0500 to R0503 are in an overlapping state. I can understand.

  In this way, the usage status can be displayed at an arbitrary timing.For example, by displaying the usage status while editing a sequence program, the data area can be used without generating an overlapping state. It can be easily grasped whether it can be secured. In addition, in the usage status display, it is possible to identify data areas that are in an overlapping state, so it is easy to check which data area to use and to determine which data area to use to eliminate the overlapping state I can grasp it.

[Third Embodiment]
FIG. 12 is a sequence program display example showing the third embodiment of the present invention.
In the present embodiment, in the display of the sequence program by the peripheral device 10, the instructions and addresses that use the overlapping data areas are displayed so as to be identifiable.

  As shown in FIG. 12, the sequence program display 900 can display the instructions using the data area in the overlapping state so as to be identifiable on the sequence program. The sequence program display 900 highlights an instruction and an address that use a data area in an overlapped state with reference to the use state table and the duplicate list information generated by the use state registration process. Therefore, in FIG. 12, it can be understood that the address L220 of the coil 911 and the instruction (function) 912 are in an overlapping state.

  In this manner, the peripheral device 10 can highlight the instructions and addresses that use the overlapping data areas in the display of the sequence program, so that the related instructions and addresses can be easily found.

  In this embodiment, in the usage status display, the output data area and the reception data area of the instruction are displayed. However, the input data area and the transmission data area of the instruction can be identified, and both data areas are displayed. May be. All data areas used in the sequence program can be grasped visually.

10: peripheral device, 11: CPU, 12: internal bus,
13: ROM, 13a: BIOS, 14: RAM,
14a: sequence program (source code),
14b: Communication unit parameter 14c: Usage status table
14d: Duplicate list, 14e: Information table, 21: Display,
22: Keyboard, 23: Mouse, 24: HDD, 25: OS,
26: Peripheral device software, 26a: Sequence program editing program,
26b: Conversion program, 26c: Communication unit / parameter setting program,
26d: program check program, 27: communication interface,
28: System memory,
100: Programmable controller,
110: CPU unit, 111: CPU, 112: Internal bus,
113: Program memory, 113a: Sequence program,
114: RAM, 114a: internal memory,
115: ROM, 115a: system program,
118: I / O control circuit, 119: Communication interface,
120: Communication unit 121: CPU
124: RAM, 124a: Common memory,
125: ROM, 125a: control program,
129: Communication interface,
300: FL-net communication parameter setting,
310: relay link,
311: Link head address, 313: Number of link area words,
314: Transmission area start address, 316: Number of transmission area words,
321: Link start address (setting value), 321: Link end address,
323: Link area word number (setting value), 324: Transmission area head address (setting value),
325: Transmission area end address, 326: Transmission area word number (setting value),
410: Register link,
411: Link head address, 413: Link area word number,
414: Transmission area start address, 416: Transmission area word count,
421: link start address (setting value), 421: link end address,
423: Link area word number (setting value), 424: Transmission area head address (setting value),
425: transmission area end address, 426: transmission area word number (setting value),
600: Instruction, 601: Address, 602: Data size,
700: mnemonic, 710: operand, 720: instruction (function),
721: first operand, 722: second operand, 723: third operand,
800: Usage status display, 801: Display address, 802: List,
803: Scroll bar,
810: Data area, 811: Identification character,
820: Received data area, 821: Identification character (highlighted),
900: Sequence program display, 901: Coil, 902: Command (function)

Claims (4)

Storage means for storing sequence programs and communication unit parameters;
Sequence program reading means for reading the sequence program from the storage means;
Communication unit / parameter reading means for reading out the communication unit / parameter from the storage means;
An information table storing instructions constituting the sequence program and data sizes output by the instructions;
A first data area output by the instruction of the sequence program;
A reception data area acquisition means for acquiring a reception data area set in the communication unit parameter;
A second data area obtained by the received data area obtaining means;
A usage status table for registering usage statuses of the first data area and the second data area;
Usage status registration means for registering the usage status of the first data area and the second data area in the usage status table and determining an overlapping status between the areas;
A duplicate list for registering the data area in the duplicate state;
Program check means for confirming the duplication status of the sequence program and the communication unit parameter by the duplication list;
A peripheral device for a programmable controller, comprising: The peripheral device of the programmable controller according to claim 1,
The reception data area acquisition means includes
A communication method determining means for determining a communication method of the communication unit parameter;
Parameter information defined for each communication method;
Parameter setting value acquisition means for acquiring a setting value of the communication unit parameter;
An address calculating means for calculating a start address and a data size of a data area for storing received data from the set value of the parameter;
A peripheral device for a programmable controller, comprising: The peripheral device of the programmable controller according to claim 1 or 2,
A peripheral device for a programmable controller, comprising: a usage status display means for displaying the usage status and the overlapping status of the data area on a screen in an identifiable manner. The peripheral device of the programmable controller according to claim 1 or 2,
What is claimed is: 1. A programmable controller comprising: a sequence program display means for displaying the instruction code of the sequence program to which an address of the data area in an overlapping state is assigned on the screen so as to be distinguishable from other instruction codes. Peripheral device.

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