JP2013089881A - Solid state image sensor, method of manufacturing the same and electronic information apparatus - Google Patents

Abstract

An object of the present invention is to improve the alignment accuracy between a photodiode on the front surface side of a back-illuminated solid-state imaging device, a microlens and a color filter on the back surface side.
In a backside illumination type solid-state imaging device, a plurality of light receiving units (a plurality of photodiodes) for photoelectrically converting image light from a subject on the surface side of a silicon substrate 2 as a semiconductor substrate and imaging. A trench structure formed in the silicon substrate 2 through one or a plurality of interlayer films (interlayer insulating films) on the silicon substrate 2 at a predetermined position with reference to the first alignment mark used when forming the light receiving portion. The color filter 21 having a predetermined color arrangement on the back surface side of the silicon substrate 2 so as to correspond to each of the plurality of light receiving portions with reference to the second alignment mark 18 and the upper side thereof. Each of the microlenses 22 is formed.
[Selection] Figure 1

Description

  The present invention relates to a solid-state imaging device configured by a semiconductor element that photoelectrically converts image light from a subject to capture an image, a manufacturing method thereof, and a solid-state imaging device manufactured by the manufacturing method as an image input device for an imaging unit. The present invention relates to electronic information devices such as digital cameras such as digital video cameras and digital still cameras, image input cameras such as surveillance cameras (security cameras), scanner devices, facsimile devices, television telephone devices, and camera-equipped mobile phone devices.

  In conventional solid-state imaging devices such as CMOS and CCD, it is important to increase the area of the photodiode portion in order to improve sensitivity, and a back-illuminated type that is not affected by wiring or the like is becoming mainstream. A silicon trench embedding mark has been devised as an alignment between the back surface and the front surface.

  In this type of conventional back-illuminated solid-state imaging device, a trench as an alignment mark is formed in a silicon layer during surface processing, and an oxide film is embedded therein. This is used at the time of back surface processing as an alignment mark between the front surface side and the back surface side. This is disclosed in Patent Document 1.

  FIG. 6 is a longitudinal sectional view showing an example of the configuration of the main part of a conventional back-illuminated solid-state imaging device disclosed in Patent Document 1.

  As shown in FIG. 6, in the imaging region 101A on the center side of the conventional back-illuminated solid-state imaging device 100, the back surface side of a silicon layer 102 in which a plurality of light receiving sensors 101 are formed in a two-dimensional matrix ( A planarizing film 103 is formed on the upper side of the drawing, and a color filter 104 and a microlens 105 are provided on each of the light receiving sensors 101 on the planarizing film 103. A trench (groove) is formed in the silicon layer 102 around the imaging region 101A, and insulating layers 106 and 107 are embedded in the wrench (groove) to form an insulating separation layer. In particular, an insulating layer 107 is embedded around the contact layer 110 that connects the electrode layer 108 of the pad portion and the wiring layer 109 on the surface side to form an insulating separation layer.

  Further, as described above, in the pad portion on the peripheral side of the imaging region 101A, trenches (grooves) are formed in the silicon layer 102, and the insulating layers 106 and 107 are embedded in the respective trenches (grooves), thereby forming the trenches (grooves). The conductive layer is embedded in the insulating layer 107 embedded in the contact layer 110, and the electrode layer 108 in the pad portion is connected to the wiring layer 109 in the pad portion through the conductive layer. A color filter corresponding to each light receiving sensor 101 on the back side (upper side in the drawing) of the silicon layer 102 using the insulating layer 106 embedded in the trench (groove) around the imaging region 101A as an alignment mark. Further, a microlens 105 is formed.

  On the other hand, a first wiring layer 112 is formed on the surface side (lower side of the drawing) of the silicon layer 102 with an interlayer insulating film 111 interposed therebetween, and a second layer is formed thereon with the interlayer insulating film 111 interposed therebetween. A wiring layer 112 is formed, and a third wiring layer 112 is formed on the wiring layer 112 with an interlayer insulating film 111 interposed therebetween. A support substrate 115 is formed on the planarized interlayer insulating film 111 via adhesive layers 113 and 114.

JP 2005-150463 A

  In the conventional back-illuminated solid-state imaging device 100 disclosed in Patent Document 1, trenches (grooves) are formed as alignment marks in the silicon layer 102 during surface processing, and insulating layers 106 and 107 are embedded therein. This is used as an alignment mark for the back side when processing the back side. However, in this case, the alignment mark may become unreadable due to cracks or deformation in the trench (groove) as the alignment mark due to the effects of heat treatment during surface processing or stress due to film formation. Further, when the surface is recognized by an infrared camera or the like, the alignment accuracy is not good.

  SUMMARY OF THE INVENTION The present invention solves the above-described conventional problems, and a solid-state imaging device capable of improving the alignment accuracy between a photodiode on the front side of a back-illuminated solid-state imaging device, a microlens and a color filter on the back side, and An object of the present invention is to provide an electronic information device such as a camera-equipped mobile phone device using the manufacturing method and the solid-state imaging device as an image input device in an imaging unit.

  The solid-state imaging device of the present invention is a backside-illuminated solid-state imaging device, which is used when forming a plurality of light-receiving portions that photoelectrically convert image light from a subject on the surface side of a semiconductor substrate and forming the light-receiving portions. A second alignment mark having a trench structure formed in the semiconductor substrate through one or more interlayer films on the semiconductor substrate at a predetermined position with respect to the first alignment mark. A color filter having a predetermined color arrangement and a microlens thereon are respectively formed on the back side so as to correspond to each of the plurality of light receiving portions with reference to the second alignment mark. This achieves the above object.

  Preferably, the second alignment mark in the solid-state imaging device of the present invention reaches the semiconductor substrate or penetrates the semiconductor substrate.

  Further preferably, in the solid-state imaging device of the present invention, the trench depth to the semiconductor substrate is formed shallower than the thickness of the semiconductor substrate after the backside polishing, or the trench depth to the semiconductor substrate is backside polished. It is formed deeper than the thickness of the subsequent semiconductor substrate.

  Further preferably, the second alignment mark in the solid-state imaging device of the present invention is formed in the semiconductor substrate from directly under the support substrate attached via the adhesive layer on the surface side of the semiconductor substrate.

  Further preferably, on the surface side of the semiconductor substrate in the solid-state imaging device of the present invention, a gate electrode is provided via a gate insulating film, and the interlayer film is provided on the gate electrode and the gate insulating film, A plurality of sets of interlayer films and wirings on which wiring is provided on the interlayer film are provided, and the second alignment mark is formed in the semiconductor substrate through the interlayer film of the plurality of layers. A support substrate is disposed via an adhesive layer.

  Further preferably, on the surface side of the semiconductor substrate in the solid-state imaging device of the present invention, a gate electrode is provided via a gate insulating film, and the interlayer film is provided on the gate electrode and the gate insulating film, A plurality of sets of interlayer films and wirings on which wiring is provided on the interlayer film are stacked, a passivation film is provided on the interlayer film, and the second alignment mark is formed in a plurality of layers from the passivation film. Is formed in the semiconductor substrate through an interlayer film, and a support substrate is disposed thereon via an adhesive layer.

  Further preferably, the predetermined position in the solid-state imaging device of the present invention is a scribe line for dividing into a plurality of chips or an in-chip region.

  Further, preferably, when the predetermined position in the solid-state imaging device of the present invention is a scribe line, a trace of the second alignment mark is left on the chip cut surface that has been separated.

  Further preferably, the shape of the second alignment mark in the solid-state imaging device of the present invention is one or a plurality of quadrangular shapes or a cross shape in plan view.

  The method for manufacturing a solid-state imaging device according to the present invention is the method for manufacturing a back-illuminated solid-state imaging device. Forming one or more interlayer films on the semiconductor substrate, and penetrating the one or more interlayer films at a predetermined position with respect to the first alignment mark A substrate surface structure forming step for forming a second alignment mark having a trench structure extending inward, and corresponding to each of the plurality of light receiving portions on the back side of the semiconductor substrate after polishing with reference to the second alignment mark And forming a color filter having a predetermined color arrangement and forming a microlens on the color filter. It is made.

  Preferably, the substrate surface structure forming step in the method for manufacturing a solid-state imaging device of the present invention includes forming a gate electrode on the surface side of the semiconductor substrate via a gate insulating film, and using the gate electrode and the mask. Forming a plurality of light receiving portions arranged in a matrix in the matrix direction, forming the interlayer film on the gate electrode and the gate insulating film, and wiring on the interlayer film Forming the interlayer film and the wiring forming process one or more times, forming a passivation film on the wiring and the interlayer film via the interlayer film, and performing a heat treatment, and the light receiving section A trench extending from the passivation film to the semiconductor substrate is formed using the first alignment mark as a reference when the insulating film material is formed, and an insulating film material is embedded in the trench. Nde having an alignment mark forming process of the second alignment mark, and a supporting substrate adhering step of adhering the support substrate via an adhesive layer on the passivation film.

  Further preferably, the substrate surface structure forming step in the method for manufacturing a solid-state imaging device of the present invention includes forming a gate electrode on the surface side of the semiconductor substrate via a gate insulating film, and using the gate electrode and the mask Forming a plurality of light receiving portions arranged in a matrix in the matrix direction, forming the interlayer film on the gate electrode and the gate insulating film, and wiring on the interlayer film Forming the interlayer film and wiring forming process one or more times, and forming the interlayer film on the uppermost interlayer film and wiring and forming the light receiving portion as a reference Forming a trench extending from the interlayer film into the semiconductor substrate, and embedding an insulating film material in the trench to form the second alignment mark When, and a support substrate bonding step of bonding the supporting substrate through an adhesive layer on the uppermost layer of the interlayer film.

  Further preferably, the substrate back surface structure forming step in the method of manufacturing a solid-state imaging device of the present invention includes a polishing step of polishing a back surface side of the semiconductor substrate by a predetermined amount, and a back surface side after polishing of the semiconductor substrate. A color filter / micro-chip that forms a color filter of a predetermined color array so as to correspond to each of the light receiving portions with reference to two alignment marks, and forms a micro lens on the color filter so as to correspond to each of the light receiving portions. A lens forming step.

  Further preferably, in the color filter / microlens forming step in the solid-state imaging device manufacturing method of the present invention, the formation of the microlens is performed simultaneously with the formation of the color filter by simultaneously applying the color filter in the region corresponding to the second alignment mark. It removes and it comprises so that this 2nd alignment mark can be seen clearly.

  Further preferably, the substrate surface structure forming step in the method for manufacturing a solid-state imaging device of the present invention is formed such that the trench depth to the semiconductor substrate is shallower than the thickness of the semiconductor substrate after back surface polishing, or The trench depth to the semiconductor substrate is formed deeper than the thickness of the semiconductor substrate after the backside polishing.

  Further preferably, in the method for manufacturing a solid-state imaging device of the present invention, the heat treatment on the surface layer side of the semiconductor substrate and the film formation of the interlayer film are completed, and the second alignment mark is formed immediately before bonding the support substrate.

  The electronic information device of the present invention uses the solid-state imaging device of the present invention as an image input device in an imaging unit, and thereby achieves the above object.

  With the above configuration, the operation of the present invention will be described below.

  In the present invention, in the back-illuminated solid-state imaging device, a plurality of light receiving portions that photoelectrically convert image light from a subject on the surface side of the semiconductor substrate and the first alignment used when forming the light receiving portions. A second alignment mark having a trench structure formed in the semiconductor substrate through one or a plurality of interlayer films on the semiconductor substrate at a predetermined position with respect to the mark. With reference to the two alignment marks, a color filter of a predetermined color array and a microlens thereon are formed so as to correspond to each of the plurality of light receiving portions.

  As a result, the second alignment mark is formed before attaching the support substrate immediately before the film formation and heat treatment on the front surface are completed. Therefore, the photodiode on the front surface side of the back-illuminated solid-state imaging device, the microlens and the color on the back surface side It is possible to improve the alignment accuracy with the filter.

  As described above, according to the present invention, the second alignment mark is formed before attaching the support substrate immediately before the film formation and the heat treatment on the surface are completed. The alignment accuracy with the side microlens and the color filter can be improved.

It is a longitudinal cross-sectional view which shows typically the example of a principal part structure of the CMOS type solid-state image sensor in Embodiment 1 of this invention. It is an enlarged plan view of the alignment mark used for the CMOS type solid-state image sensor of FIG. It is a longitudinal cross-sectional view which shows typically the example of a principal part structure of the CMOS type solid-state image sensor in Embodiment 2 of this invention. It is a longitudinal cross-sectional view which shows typically the example of a principal part structure of the CMOS type solid-state image sensor in Embodiment 3 of this invention. It is a block diagram which shows the example of schematic structure of the electronic information device which used the solid-state image sensor of Embodiment 1, 2 of this invention for the imaging part as Embodiment 3 of this invention. It is a longitudinal cross-sectional view which shows the example of a principal part structure of the conventional backside illumination type solid-state image sensor currently disclosed by patent document 1. FIG.

  Below, the case where Embodiments 1 and 2 of the backside illumination type solid-state imaging device and the manufacturing method thereof according to the present invention are applied to the CMOS type solid-state imaging device and the manufacturing method thereof will be described. Embodiment 3 of an electronic information device such as a camera-equipped mobile phone device using Embodiment 1 and Embodiment 2 of the image pickup device and the manufacturing method thereof as an image input device in an image pickup unit will be described in detail with reference to the drawings. In addition, each thickness, length, etc. of the structural member in each figure are not limited to the structure to illustrate from a viewpoint on drawing preparation. In addition, the number of gate electrodes and the number of wiring stages do not need to match those of an actual device, and are set in consideration of the convenience of illustration and description, and are not limited to the illustrated configuration.

(Embodiment 1)
FIG. 1 is a vertical cross-sectional view schematically showing an exemplary configuration of a main part of a CMOS type solid-state imaging device according to Embodiment 1 of the present invention.

  In FIG. 1, a CMOS solid-state imaging device 1 according to the first embodiment has a two-dimensional shape in which a plurality of photodiodes 3 (light receiving portions) as a plurality of photoelectric conversion portions are formed on a surface layer of a silicon substrate 2 as a semiconductor substrate. It is formed in a matrix. Adjacent to each photodiode 3, a charge transfer portion of a charge transfer transistor for transferring signal charges from each photodiode 3 to a floating diffusion portion FD as an electrification voltage conversion portion is provided on the surface layer of the silicon substrate 2. It has been. On the charge transfer portion of the surface layer of the silicon substrate 2, a gate electrode 5 that is a lead electrode made of a polysilicon film is provided via a gate insulating film 4. Further, the signal charge transferred to the floating diffusion portion FD for each photodiode 3 is converted into a voltage, amplified according to the converted voltage, and read out as an imaging signal for each pixel portion. Yes.

  Above the gate electrode 5, a first interlayer insulating film 6 as an interlayer film is formed as a circuit wiring portion of the readout circuit, a first wiring 7 is formed thereon, and a second interlayer insulating film is formed thereon. A film 8 is formed, a second wiring 9 is formed thereon, a third interlayer insulating film 10 is formed thereon, a third wiring 11 is formed thereon, and a fourth interlayer insulating film 12 is formed thereon. The fourth wiring 13 is formed thereon, the fifth interlayer insulating film 14 is formed thereon, and the fifth wiring 15 is formed thereon. Further, a sixth interlayer insulating film 16 is formed on the fifth wiring 15, and a passivation film 17 is formed thereon. Here, the wiring is formed of five layers of metal wiring, but the number of wiring layers is not limited to five, and may be three layers or four layers, for example.

  Also, between these wiring layers 7 and the silicon substrate 2, between the wiring layer 7 and the gate electrode 5, and between the wiring layers (between the wiring layers 7 and 9, between the wiring layers 9 and 11, between the wiring layers 11 and 13, and Contact plugs (not shown) made of a conductive material are appropriately formed between the wiring layers 13 and 15, and between the wiring layer 7 and the semiconductor substrate 2, between the wiring layer 7 and the gate electrode 5, and between the wiring layers. A readout circuit for each pixel is constituted by being electrically connected.

  Further, from the moisture-resistant passivation film 17 to the sixth interlayer insulating film 16, the fifth interlayer insulating film 14, the fourth interlayer insulating film 12, the third interlayer insulating film 10, the second interlayer insulating film 8, and the first interlayer insulating film 6 A trench (groove) reaching the silicon substrate 2 via the gate insulating film 4 is formed, and this trench (groove) reaches a depth of 1 to 2 μm in the silicon substrate 2. An insulating film is buried in the trench to form an alignment mark 18 as a second alignment mark. The alignment mark 18 is formed with reference to the position of the photodiode 3 or the position of the reference mark when the photodiode 3 is formed.

  Further, a support substrate 20 is provided on the passivation film 17 via an adhesive layer 19. Further, the back side of the silicon substrate 2 opposite to the support substrate 20 is polished to a thickness of about 3 μm. A planarizing film (not shown) is formed on the back surface of the silicon substrate 2 as necessary, and an R is formed on each of the photodiodes 3 constituting the light receiving unit on the basis of the tip position of the alignment mark 18. , G, B color filters (Bayer color array) form a color filter 21. Further thereon, condensing microlenses 22 are formed corresponding to the respective photodiodes 3 with reference to the tip position of the alignment mark 18.

  Here, a manufacturing method of the solid-state imaging device 1 having the above configuration will be described.

  First, in the light receiving portion forming step, the gate electrode 5 of the charge transfer transistor is formed through the gate insulating film 4 in the imaging region on the surface side (upper side of the drawing) of the silicon substrate 3, and the gate electrode 5 and the mask are used. A plurality of photodiodes 3 arranged in a matrix in the matrix direction are formed by impurity ion implantation, and a transistor region and other diffusion regions constituting an element isolation film, a peripheral drive circuit, and the like are formed on the peripheral side.

  Next, in the wiring formation step, a first interlayer insulating film 6 is formed on the gate electrode 5 and the gate insulating film 4, and a contact plug (not shown) is formed at a necessary portion of the first interlayer insulating film 6, A first wiring 7 is formed on them. Further, a second interlayer insulating film 8 is formed on the first interlayer insulating film 6 and the first wiring 7, a contact plug (not shown) is formed at a necessary portion of the second interlayer insulating film 8, and a top thereof is formed. A second wiring 9 is formed. Further, a third interlayer insulating film 10 is formed on the second interlayer insulating film 8 and the second wiring 9, and a contact plug (not shown) is formed at a necessary portion of the third interlayer insulating film 10, and on them A third wiring 11 is formed. Further, a fourth interlayer insulating film 12 is formed on the third interlayer insulating film 10 and the third wiring 11, contact plugs (not shown) are formed at necessary portions of the fourth interlayer insulating film 12, and a top thereof is formed. A fourth wiring 13 is formed. Further, a fifth interlayer insulating film 14 is formed on the fourth interlayer insulating film 12 and the fourth wiring 13, contact plugs (not shown) are formed at necessary portions of the fifth interlayer insulating film 14, and the tops thereof are formed. A fifth wiring 15 is formed. A sixth interlayer insulating film 16 is formed on the fifth interlayer insulating film 14 and the fifth wiring 15 and planarized.

  Subsequently, in a sintering process, a passivation film 17 made of a moisture-resistant SiN film made of a nitride film is formed on the entire surface of the sixth interlayer insulating film 16. Thereafter, a heat treatment is performed at about 400 degrees Celsius to remove the hydrogen in the passivation film 17 and perform a sintering process for suppressing dark current on the surface of the silicon substrate 2.

  Thereafter, in the alignment mark formation step, a trench extending from the passivation film 17 to the silicon substrate 2 is formed with reference to the alignment mark as the first alignment mark when forming the light receiving portion region of the photodiode 3, and in this trench An insulating film is embedded to form the alignment mark 18. The depth of the alignment mark 18 to the silicon substrate 2 is about 1 to 2 μm. Since the alignment mark 18 is based on the alignment mark at the time of forming the light receiving portion region, it is formed at an accurate position with respect to the light receiving region (photodiode 3). The alignment mark 18 is formed in the chip, for example, in a dicing line or an element isolation region in the periphery of the imaging region for each chip.

  Further, in the supporting substrate bonding step, an adhesive layer 19 is formed on the passivation film 17, and the supporting substrate 20 is bonded on the adhesive layer 19 to strongly support the entire substrate.

  Next, in the polishing step, the back side of the silicon substrate 2 on the opposite side of the bonded support substrate 20 is polished to a thickness of about 3 μm to be thinned. In this case, since the thickness of the silicon substrate 2 is 3 μm and the depth of the alignment mark 18 to the silicon substrate 2 is 1 to 2 μm, the alignment mark is formed from the back side through the thickness of the difference 1 μm of the silicon substrate 2. The shape of the tip of 18 can be clearly confirmed.

  Subsequently, in the color filter / microlens formation process, a planarization film (not shown) is formed on the back surface of the silicon substrate 2 as necessary, and a color on which alignment accuracy is required in the photolithography process. The filter 21 and the microlens 22 thereon are formed at an accurate position with respect to the photodiode 3. In short, the color filter 21 having a predetermined color arrangement is formed at an accurate position with respect to each photodiode 3 with reference to the tip position of the alignment mark 18 from the back side. Further, the microlens 22 is formed at an accurate position with respect to each photodiode 3 with reference to the tip position of the alignment mark 18 from the back side. Confirmation of the tip position of the alignment mark 18 at the time of forming each microlens 22 is performed by removing the color filter 21 in the region corresponding to the tip position of the alignment mark 18 by the photolithography process at the same time as forming the color filter 21. It is preferable to make the tip of the tip more clearly visible.

  In short, the manufacturing method of the backside illumination type solid-state imaging device 1 includes forming the gate electrode 5 on the surface side of the silicon substrate 2 as a semiconductor substrate via the gate insulating film 4, and using the gate electrode 5 and the mask. Forming a plurality of photodiodes 3 as a plurality of light receiving portions arranged in a matrix in the matrix direction, forming an interlayer film on the gate electrode 5 and the gate insulating film 4, An interlayer film for forming wiring on the film and a wiring forming process for repeating the wiring forming process one or more times (here, five times because it is a five-layer wiring layer), and an interlayer film (here, the uppermost wiring and interlayer film) A sintering process for forming a passivation film 17 via an interlayer insulating film 16) and performing a heat treatment, and a first alignment mark when the photodiode 3 is formed as a reference An alignment mark forming step of forming a trench extending from the passivation film 17 into the silicon substrate 2 and embedding an insulating film material in the trench to form the second alignment mark 18, and a supporting substrate on the passivation film 17 via an adhesive layer 19 20 is bonded to the photodiode 3 with reference to the second alignment mark 18 on the back surface side after polishing the silicon substrate 2 and a polishing step for polishing the back surface side of the silicon substrate 2 by a predetermined amount. A color filter 21 having a predetermined color arrangement is formed correspondingly, and a microlens 22 is formed on the color filter 21 so as to correspond to each photodiode 3.

  In this way, a plurality of photodiodes 3 and peripheral circuits are formed on the surface layer of the silicon substrate 2, heat treatment on the surface layer side of the silicon substrate 2, and formation of wiring and various films before the support substrate is formed. When this is completed, the alignment mark 18 on the surface layer side of the silicon substrate 2 is formed. This alignment mark 18 has a structure in which trenches (grooves) are dug from directly below the support substrate 20 to the silicon substrate 2, and the depth of the trench from the silicon substrate 2 is about 1 to 2 μm, and is polished from the back surface. For example, when the thickness of the silicon substrate 2 is reduced to about 3 μm, the tip of the alignment mark 18 is made visible from the back side. In short, the trench depth into the silicon substrate 2 (here, 1 to 2 μm, but not limited to this) is larger than the plate thickness dimension of the silicon substrate 2 after back surface polishing (here, 3 μm but not limited to this). It is shallow. However, the position of the alignment mark 18 may be within the effective chip or the scrub line. The alignment mark 18 is provided for each shot of the reticle for each chip.

  In such alignment marks 18 on the front surface side and the back surface side, a trench structure pattern is formed on the silicon substrate 2 from just below the support substrate 20 to about 1 to 2 μm from the front surface immediately before the support substrate is formed. For example, the alignment marks 18 may be formed into nine squares in a) or a cross shape as shown in FIG. The mask pattern is aligned with the alignment mark 18 as a whole. When the alignment mark 18 is provided on the scribe line, the line width of the scribe line is about 80 to 100 μm. Therefore, when the size of one side of the alignment mark 18 is about 60 to 80 μm, the wafer in which the solid-state imaging device is built is used. The cutting allowance may be set so that the alignment mark 18 remains on the side surface of each chip even if the chips are cut along the grid-like scribe lines and separated into individual chips. Including such a case, if the alignment mark 18 is provided in the area of each chip, the trace of the alignment mark 18 remains even after the wafer is cut and separated into individual chips. It becomes clear that the color filter 21 and the microlens 22 have been accurately formed by using them.

  As described above, according to the first embodiment, in the backside illumination type solid-state imaging device 1, a plurality of light receiving units (photographing the image light from the subject by photoelectric conversion on the surface side of the silicon substrate 2 as a semiconductor substrate) A plurality of photodiodes 3) and one or a plurality of interlayer films (interlayer insulating films) on the silicon substrate 2 are penetrated through a silicon substrate 2 at a predetermined position with reference to the first alignment mark used when forming the light receiving portion. The second alignment mark 18 having a trench structure formed in the second alignment mark 18 is arranged, and a predetermined color array is arranged on the back surface side of the silicon substrate 2 so as to correspond to each of the plurality of light receiving portions with the second alignment mark 18 as a reference. The color filter 21 and the micro lens 22 thereon are formed.

  As described above, in the backside illumination type solid-state imaging device 1, a groove reaching the silicon substrate 2 is formed immediately before bonding the support substrate 20 as the alignment mark 18 when aligning the front surface and the back surface of the silicon substrate 1. An alignment film 18 is formed by embedding an insulating film therein. The alignment mark 18 has a trench structure having a depth of 1 to 2 μm from the surface of the silicon substrate 2 from directly below the support substrate 20.

  As described above, in the prior art, since the deep trench is formed, there is a possibility that the pattern of the alignment mark may be damaged due to stress or heat treatment due to film formation. In the first embodiment, however, the surface side of the silicon substrate 2 is damaged. Since the alignment mark 18 is formed when all of the heat treatment and film formation are completed, there is no possibility that the pattern of the alignment mark 18 will be damaged such as cracks. The alignment accuracy of the diode 3, the micro lens 22 on the back side, and the color filter 21 can be improved.

(Embodiment 2)
In the first embodiment, the trench depth (for example, deeper than 3 μm and shallower than 4 μm) in the silicon substrate 2 is formed smaller than the polished silicon plate thickness (for example, 3 μm). A case will be described in which the trench depth to the substrate 2 is formed to be larger than the silicon plate thickness after polishing, and the trench structure penetrates the silicon substrate 2 after polishing to form an alignment mark having good visibility from the back surface.

  FIG. 3 is a longitudinal sectional view schematically showing an example of the configuration of the main part of a CMOS solid-state imaging device according to Embodiment 2 of the present invention. In FIG. 3, the same reference numerals are given to the constituent members having the same operational effects as the constituent members of FIG. 1.

  In FIG. 3, the solid-state imaging device 1 </ b> A of the second embodiment is different from the solid-state imaging device 1 of the first embodiment in that the alignment mark 18 </ b> A as the second alignment mark is directly below the support substrate 20. This is that the silicon substrate 2 is penetrated from the passivation film 17.

  On the surface side of the silicon substrate 2 as a semiconductor substrate, a gate electrode 5 is provided via a gate insulating film 4, and a first interlayer insulating film 6 is provided on the gate electrode 5 and on the gate insulating film 4. A first wiring 7 is provided on the interlayer insulating film 6, a second interlayer insulating film 8 is provided on the first interlayer insulating film 6 and the first wiring 7, and a second wiring 9 is provided on the second interlayer insulating film 8. , A third interlayer insulating film 10 is provided on the second interlayer insulating film 8 and the second wiring 9, and a third wiring 11 is provided on the third interlayer insulating film 10. A fourth interlayer insulating film 12 is provided on the upper and third wirings 11, a fourth wiring 13 is provided on the fourth interlayer insulating film 12, and a fifth layer is formed on the fourth interlayer insulating film 12 and the fourth wiring 13. An interlayer insulating film 14 is provided, and a fifth wiring 15 is provided on the fifth interlayer insulating film 14 to provide an interlayer insulating film and Five sets of wirings are provided, an interlayer insulating film 16 is provided thereon, a passivation film 17 is provided on the interlayer insulating film 16, and the alignment mark 18A is formed from the passivation film 17 to a plurality of layers of interlayer insulating films 16, 14. 12, 10, 8, 6 are formed through the silicon substrate 2, and a support substrate 20 is disposed thereon via an adhesive layer 19.

  In the alignment mark forming step in the manufacturing method of the solid-state imaging device 1A of Embodiment 2, a trench extending from the passivation film 17 to the silicon substrate 2 is formed with reference to the alignment mark when forming the light receiving region of the photodiode 3. Then, an insulating film material is buried in the trench to form an alignment mark 18A. The depth of the alignment mark 18A to the silicon substrate 2 is about 3 to 4 μm. Since the alignment mark 18A is based on the alignment mark at the time of forming the light receiving portion region, it is formed at an accurate position with respect to the light receiving region (photodiode 3). The alignment mark 18A is formed, for example, in a dicing line or an element isolation region in the periphery of the imaging region for each chip.

  After the support substrate 20 is bonded onto the passivation film 17 through the adhesive layer 19 in the next support substrate bonding step, the silicon substrate 2 opposite to the bonded support substrate 20 has a thickness of 3 μm in the subsequent polishing step. Polished to a certain degree and thinned. At this time, since the thickness of the silicon substrate 2 is 3 [mu] m and the depth of the alignment mark 18A to the silicon substrate 2 is 3 to 4 [mu] m, the alignment mark 18A appears on the back surface due to polishing. 18A can be confirmed more clearly than the alignment mark 1818 of the first embodiment.

  In short, the manufacturing method of the back-illuminated solid-state imaging device 1A includes forming the gate electrode 5 on the surface side of the silicon substrate 2 as the semiconductor substrate via the gate insulating film 4, and using the gate electrode 5 and the mask. Forming a plurality of photodiodes 3 as a plurality of light receiving portions arranged in a matrix in the matrix direction, forming an interlayer film on the gate electrode 5 and the gate insulating film 4, An interlayer film for forming wiring on the film and a wiring forming process for repeating the wiring forming process one or more times (here, five times because it is a five-layer wiring layer), and an interlayer film (here, the uppermost wiring and interlayer film) Using a sintering process for forming a passivation film 17 via an interlayer insulating film 16) and performing a heat treatment, and a first alignment mark when the photodiode 3 is formed as a reference After the backside polishing from the passivation film 17, a trench is formed to a depth penetrating the silicon substrate 2, an insulating film material is embedded in the trench to form the second alignment mark 18 A, and the passivation film 17 is formed on the passivation film 17. The support substrate bonding step of bonding the support substrate 20 via the adhesive layer 19, the polishing step of polishing the back surface side of the silicon substrate 2 by a predetermined amount, and the silicon substrate 2 penetrated the back surface side after polishing of the silicon substrate 2. Using the second alignment mark 18A as a reference, color filters 21 having a predetermined color array are formed so as to correspond to the photodiodes 3, and microlenses 22 are formed on the color filters 21 so as to correspond to the photodiodes 3, respectively. A color filter / microlens forming step.

  In this way, the heat treatment (gate insulating film formation, sintering process, etc.) on the surface layer side of the silicon substrate 2 and the film formation of the wiring and various films are completed, and the alignment mark 18A is formed immediately before the formation of the support substrate 20. By doing so, it is possible to prevent the trench (groove) from cracking or deforming. The alignment mark 18A has a trench structure from directly below the support substrate 20 to the silicon substrate 2 through the adhesive layer 19, and the depth from the surface of the silicon substrate 2 is 3 to 4 μm, which is thicker than the polished silicon plate thickness. Set. Alignment in the back surface process step can be performed based on the alignment mark 18A, and alignment with high positional accuracy of the color filter 21 and the micro lens 22 on the back surface side can be performed with respect to each photodiode 3 on the front surface side. In the second embodiment, since the alignment mark 18A only penetrates the silicon substrate 2, the other manufacturing processes of the solid-state imaging device 1A are the same as those in the first embodiment.

  As described above, according to the second embodiment, since the alignment mark 18A penetrates the silicon substrate 2, the mark visibility from the back surface is improved, and the surface side photo of the backside illumination type solid-state imaging device 1A is improved. The alignment accuracy between the diode 3 and the micro lens 22 and the color filter 21 on the back surface side can be further improved. Also in this case, as in the case of the first embodiment, since the alignment mark 18A is formed immediately after the film formation and the heat treatment and immediately before the support substrate is formed, the mark breakage due to the film formation stress or the heat treatment can be prevented. The alignment position accuracy of the color filter 21 (color resist) and the micro lens 22 on the back surface side of each photodiode 3 on the front surface side of the silicon substrate 2 can be improved.

(Embodiment 3)
In the first and second embodiments, the case where the wiring layer is five layers and the passivation film 17 is provided thereon has been described. However, in the third embodiment, the wiring layer is two layers and the passivation film 17 is not provided thereon. Will be described.

  FIG. 4 is a vertical cross-sectional view schematically showing an exemplary configuration of a main part of a CMOS solid-state imaging device according to Embodiment 3 of the present invention. In FIG. 4, the same reference numerals are given to the constituent members having the same operational effects as the constituent members of FIG. 3.

  In FIG. 4, the solid-state imaging device 1 </ b> B of the third embodiment is different from the solid-state imaging device 1 </ b> A of the second embodiment in that the alignment mark 18 </ b> B as the second alignment mark is directly below the support substrate 20 from the adhesive layer 19. In this case, the silicon substrate 2 is penetrated from the interlayer insulating film 10 through the interlayer insulating films 8 and 6. In short, the trench depth into the silicon substrate 2 (deeper than 3 μm and shallower than 4 μm) is formed deeper than the plate thickness dimension (3 μm) of the silicon substrate 2 after backside polishing.

  On the surface side of the silicon substrate 2 as a semiconductor substrate, a gate electrode 5 is provided via a gate insulating film 4, and a first interlayer insulating film 6 is provided on the gate electrode 5 and on the gate insulating film 4. A first wiring 7 is provided on the interlayer insulating film 6, a second interlayer insulating film 8 is provided on the first interlayer insulating film 6 and the first wiring 7, and a second wiring 9 is provided on the second interlayer insulating film 8. Are provided, two sets of interlayer insulating films and wirings are provided, a third interlayer insulating film 10 is provided thereon, and the alignment mark 18B passes through the plurality of layers of interlayer insulating films 10, 8, and 6 to connect the silicon substrate 2. The support substrate 20 is disposed through the adhesive layer 19 thereon.

  In the wiring formation step in the method for manufacturing the solid-state imaging device 1B according to the third embodiment, the first interlayer insulating film 6 is formed on the gate electrode 5 and the gate insulating film 4 (formed by heat treatment). Contact plugs (not shown) are formed at the necessary locations, and the first wiring 7 is formed thereon. Further, a second interlayer insulating film 8 is formed on the first interlayer insulating film 6 and the first wiring 7, a contact plug (not shown) is formed at a necessary portion of the second interlayer insulating film 8, and a top thereof is formed. The second wiring 9 is formed to form two wiring layers. Further, a third interlayer insulating film 10 is formed on the second interlayer insulating film 8 and the second wiring 9 and planarized.

  Next, in the alignment mark forming step, a trench extending from the third interlayer insulating film 10 to the silicon substrate 2 is formed with reference to the alignment mark as the first alignment mark when forming the light receiving portion region of the photodiode 3, An insulating film material is buried in the trench to form an alignment mark 18B as a second alignment mark. The depth of the alignment mark 18B to the silicon substrate 2 is about 3 to 4 μm. Since the alignment mark 18B is based on the alignment mark at the time of forming the light receiving portion region, it is formed at an accurate position with respect to the light receiving region (photodiode 3). The alignment mark 18B is formed in the chip, for example, in a dicing line or an element isolation region in the periphery of the imaging region for each chip.

  Further, in the supporting substrate bonding step, an adhesive layer 19 is formed on the third interlayer insulating film 10, and the supporting substrate 20 is bonded on the adhesive layer 19 to strongly support the entire substrate. In the third embodiment, the number of wiring layers is two and the passivation film 17 is not provided on the two wiring layers. The other manufacturing processes of the solid-state imaging device 1B are the same as those in the first embodiment.

  In short, the manufacturing method of the back-illuminated solid-state imaging device 1A includes forming the gate electrode 5 on the surface side of the silicon substrate 2 as the semiconductor substrate via the gate insulating film 4, and using the gate electrode 5 and the mask. Forming a plurality of photodiodes 3 as a plurality of light receiving portions arranged in a matrix in the matrix direction, forming an interlayer film on the gate electrode 5 and the gate insulating film 4, An interlayer film for forming a wiring on the film and a wiring forming process in which the wiring forming process is repeated one or more times (here, since it is a two-layer wiring layer) and the first alignment mark when the photodiode 3 is formed as a reference As shown in FIG. 1, the trench is formed to a depth penetrating the silicon substrate 2 after the backside polishing from the uppermost wiring and the interlayer film (here, the interlayer insulating film 10) formed on the interlayer film. An alignment mark forming step of forming and aligning an insulating film material in the trench to form the second alignment mark 18B, and a support substrate 20 on the uppermost interlayer film (here, the interlayer insulating film 10) via the adhesive layer 19 The supporting substrate bonding step for bonding, the polishing step for polishing the back surface side of the silicon substrate 2 by a predetermined amount, and the second alignment mark 18 penetrating the silicon substrate 2 on the back surface side after polishing of the silicon substrate 2 is used as a reference. A color filter / microlens forming step for forming a color filter 21 having a predetermined color arrangement corresponding to each of the diodes 3 and forming a microlens 22 on the color filter 21 corresponding to each of the photodiodes 3. doing.

  As described above, according to the third embodiment, since the trench structure of the alignment mark 18B is shallower than those in the first and second embodiments, the manufacturing is easy and the silicon substrate 2 is penetrated. The mark visibility from the back surface is improved, and the alignment accuracy between the photodiode 3 on the front surface side of the back-illuminated solid-state imaging device 1A, the micro lens 22 and the color filter 21 on the back surface side can be further improved. Also in this case, as in the case of the first embodiment, since the alignment mark 18B is formed immediately after the film formation and the heat treatment and immediately before the support substrate is formed, the mark breakage due to the film formation stress or the heat treatment can be prevented. The alignment position accuracy of the color filter 21 (color resist) and the micro lens 22 on the back surface side of each photodiode 3 on the front surface side of the silicon substrate 2 can be improved.

  In the third embodiment, the trench depth to the silicon substrate 2 is formed to be larger than the thickness of the silicon plate after polishing, and the trench structure penetrates the silicon substrate 2 after polishing and has good alignment from the back surface. In the case of the mark 18B, the case where the wiring layer is two layers and the passivation film 17 is not provided thereon has been described. However, the present invention is not limited thereto, and the trench depth to the silicon substrate 2 is determined by the silicon plate thickness after polishing. Even if the trench structure is used as an alignment mark that does not penetrate the silicon substrate 2 after polishing, and the wiring layer has two layers and does not have the passivation film 17 thereon, the present invention can be realized. Can be applied. Of course, the number of layers (number of layers) of the wiring layer is not limited to two or five, and may be other plural numbers.

(Embodiment 4)
FIG. 4 is a block diagram illustrating a schematic configuration example of an electronic information device using the solid-state imaging device according to any one of Embodiments 1 to 3 of the present invention as an imaging unit as Embodiment 3 of the present invention.

  In FIG. 4, the electronic information device 90 according to the third embodiment performs predetermined analog and digital signal processing on the image pickup signal for each pixel from the solid-state image pickup device 1, 1 </ b> A, or 1 </ b> B according to any of the first to third embodiments. A solid-state imaging device 91 that obtains a color image signal by performing (color interpolation, white balance, etc.), a recording medium that enables data recording after the color image signal from the solid-state imaging device 91 is subjected to predetermined signal processing for recording, and the like A memory unit 92, a display unit 93 such as a liquid crystal display device which can display a color image signal from the solid-state imaging device 91 on a display screen such as a liquid crystal display screen after predetermined signal processing for display, A communication unit 94 such as a transmission / reception device capable of performing communication processing after performing predetermined signal processing for color image signals from the solid-state imaging device 91 for communication, and the solid-state imaging device And an image output unit 95 such as a printer which allows printing process after a predetermined printing signal processing for printing a color image signal from 1. The electronic information device 90 is not limited to this, but in addition to the solid-state imaging device 91, at least one of a memory unit 92, a display unit 93, a communication unit 94, and an image output unit 95 such as a printer. You may have.

  As described above, the electronic information device 90 includes, for example, a digital camera such as a digital video camera and a digital still camera, an in-vehicle camera such as a surveillance camera, a door phone camera, and an in-vehicle rear surveillance camera, and a video phone camera. An electronic device having an image input device such as an image input camera, a scanner device, a facsimile device, a camera-equipped mobile phone device, and a portable terminal device (PDA) is conceivable.

  Therefore, according to the third embodiment, based on the color image signal from the solid-state imaging device 91, it can be displayed on the display screen, or can be printed out on the paper by the image output unit 95. (Printing), communicating this as communication data in a wired or wireless manner, performing a predetermined data compression process in the memory unit 92 and storing it in a good manner, or performing various data processings satisfactorily Can do.

  In the first to third embodiments, in the back-illuminated solid-state imaging device 1, 1 </ b> A or 1 </ b> B, a plurality of images obtained by photoelectrically converting image light from a subject on the surface side of a silicon substrate 2 as a semiconductor substrate. One or a plurality of interlayer films (interlayer insulating films) on the silicon substrate 2 are penetrated at predetermined positions with reference to the light receiving section (a plurality of photodiodes 3) and the first alignment mark used when forming the light receiving section. A second alignment mark 18, 18A or 18B having a trench structure formed on the silicon substrate 2, and a plurality of light receiving elements on the back side of the silicon substrate 2 with reference to the second alignment mark 18, 18A or 18B. A color filter 21 having a predetermined color array and a microlens 22 thereon are formed so as to correspond to the respective portions. Further, in the method of manufacturing the back-illuminated solid-state imaging device 1, 1A, or 1B, a plurality of light receiving units that photoelectrically convert image light from a subject on the surface side of the silicon substrate 2 serving as a semiconductor substrate and image them. The photodiode 3 is formed with reference to the first alignment mark, and one or a plurality of interlayer films (here, interlayer insulating films provided above and below the five wiring layers) are formed on the silicon substrate 2, and the first A substrate surface structure forming step of forming a second alignment mark 18 having a trench structure penetrating through one or a plurality of interlayer films into a silicon substrate at a predetermined position with respect to the alignment mark 18, and after polishing the silicon substrate 2 A color filter having a predetermined color arrangement on the back surface side of each of the plurality of photodiodes 3 with reference to the second alignment mark 18 1 and the substrate back surface structure forming step of forming the microlens 22 thereon, the photodiode on the front side of the back side illumination type solid-state imaging device and the back side It is possible to achieve the object of the present invention that can improve the alignment accuracy with the microlens and the color filter.

  Although not particularly described in the first to third embodiments, the present invention can be applied not only to a CMOS solid-state imaging device and a manufacturing method thereof but also to a CCD solid-state imaging device and a manufacturing method thereof. can do.

  As mentioned above, although this invention has been illustrated using preferable Embodiment 1-4 of this invention, this invention should not be limited and limited to this Embodiment 1-4. It is understood that the scope of the present invention should be construed only by the claims. It is understood that those skilled in the art can implement an equivalent range from the description of specific preferred embodiments 1 to 4 of the present invention based on the description of the present invention and the common general technical knowledge. Patents, patent applications, and documents cited herein should be incorporated by reference in their entirety, as if the contents themselves were specifically described herein. Understood.

  The present invention relates to a solid-state imaging device configured by a semiconductor element that photoelectrically converts image light from a subject to capture an image, a manufacturing method thereof, and a solid-state imaging device manufactured by the manufacturing method as an image input device for an imaging unit. Fields of electronic information equipment such as digital cameras such as digital video cameras and digital still cameras, image input cameras such as surveillance cameras (security cameras), scanner devices, facsimile devices, television telephone devices, camera-equipped mobile phone devices, etc. In order to form the second alignment mark before attaching the support substrate immediately before the completion of film formation and heat treatment on the surface, the photodiode on the front side of the back-illuminated solid-state imaging device, the microlens on the back side, and the color filter And the alignment accuracy can be improved.

1, 1A, 1B MOS type solid-state imaging device 2 Silicon substrate (semiconductor substrate)
3 Photodiode (photoelectric converter)
4 Gate insulating film 5 Gate electrode 6 First interlayer insulating film (interlayer film)
7 First wiring 8 Second interlayer insulating film (interlayer film)
9 Second wiring 10 Third interlayer insulating film (interlayer film)
11 Third wiring 12 Fourth interlayer insulating film (interlayer film)
13 4th wiring 14 5th interlayer insulation film (interlayer film)
15 5th wiring 16 6th interlayer insulation film (interlayer film)
17 Passivation film 18, 18A, 18B Alignment mark (second alignment mark)
DESCRIPTION OF SYMBOLS 19 Adhesive layer 20 Support substrate 21 Color filter 22 Micro lens 90 Electronic information equipment 91 Solid-state imaging device 92 Memory part 93 Display part 94 Communication part 95 Image output part

Claims (17)

In the back-illuminated solid-state image sensor,
A plurality of light receiving portions that photoelectrically convert image light from a subject on the surface side of the semiconductor substrate and a first alignment mark used at the time of forming the light receiving portion are positioned at predetermined positions on the semiconductor substrate. A second alignment mark having a trench structure formed in the semiconductor substrate through one or more interlayer films,
Solid-state imaging in which color filters of a predetermined color array and microlenses thereon are respectively formed on the back surface side of the semiconductor substrate so as to correspond to each of the plurality of light receiving portions with respect to the second alignment mark element.   The solid-state imaging device according to claim 1, wherein the second alignment mark reaches the semiconductor substrate or penetrates the semiconductor substrate.   The trench depth to the semiconductor substrate is formed shallower than the plate thickness dimension of the semiconductor substrate after back surface polishing, or the trench depth to the semiconductor substrate is deeper than the plate thickness size of the semiconductor substrate after back surface polishing. The solid-state imaging device according to claim 2 formed.   2. The solid-state imaging device according to claim 1, wherein the second alignment mark is formed in the semiconductor substrate from directly under a support substrate attached to the front surface side of the semiconductor substrate via an adhesive layer.   On the surface side of the semiconductor substrate, a gate electrode is provided via a gate insulating film, and the interlayer film is provided on the gate electrode and on the gate insulating film, and an interconnection is provided on the interlayer film. And a plurality of sets of wirings are provided, the second alignment mark is formed in the semiconductor substrate through the multilayer film, and a support substrate is disposed thereon via an adhesive layer. The solid-state imaging device according to claim 1.   On the surface side of the semiconductor substrate, a gate electrode is provided via a gate insulating film, and the interlayer film is provided on the gate electrode and on the gate insulating film, and an interconnection is provided on the interlayer film. And a plurality of sets of wirings are provided by being laminated, a passivation film is provided thereon via an interlayer film, and the second alignment mark is formed in the semiconductor substrate from the passivation film through a plurality of interlayer films. The solid-state imaging device according to claim 1, wherein a support substrate is disposed thereon via an adhesive layer.   2. The solid-state imaging device according to claim 1, wherein the predetermined position is a scribe line for singulation into a plurality of chips or an in-chip region.   2. The solid-state imaging device according to claim 1, wherein when the predetermined position is a scribe line, a trace of the second alignment mark is left on an individual chip cut surface.   2. The solid-state imaging device according to claim 1, wherein a shape of the second alignment mark is one or a plurality of quadrangular shapes or a cross shape in a plan view. In the manufacturing method of the back-illuminated solid-state imaging device,
On the surface side of the semiconductor substrate, a plurality of light-receiving portions that photoelectrically convert image light from a subject to form an image with reference to the first alignment mark, and one or more interlayer films are formed on the semiconductor substrate, A substrate surface structure forming step of forming a second alignment mark having a trench structure penetrating through the one or more interlayer films into the semiconductor substrate at a predetermined position with respect to the first alignment mark;
A color filter having a predetermined color arrangement is formed on the back side of the semiconductor substrate after polishing so as to correspond to each of the plurality of light receiving portions with reference to the second alignment mark, and a micro lens is formed thereon. The manufacturing method of the solid-state image sensor which has a substrate back surface structure formation process to form. The substrate surface structure forming step includes
A gate electrode is formed on the surface side of the semiconductor substrate via a gate insulating film, and a plurality of light receiving portions arranged in a matrix in the matrix direction are formed using the gate electrode and the mask. Forming process;
Forming the interlayer film on the gate electrode and the gate insulating film, and forming the wiring on the interlayer film and a wiring forming step of repeating the wiring forming process one or more times;
A sintering process for forming a passivation film on the wiring and the interlayer film via an interlayer film and performing a heat treatment;
An alignment mark that forms a trench from the passivation film into the semiconductor substrate with the first alignment mark when the light receiving portion is formed as a reference, and fills the trench with an insulating film material to form a second alignment mark Forming process;
The manufacturing method of the solid-state image sensor of Claim 10 which has a support substrate adhesion process which adhere | attaches a support substrate on this passivation film through an adhesive layer. The substrate surface structure forming step includes
A gate electrode is formed on the surface side of the semiconductor substrate via a gate insulating film, and a plurality of light receiving portions arranged in a matrix in the matrix direction are formed using the gate electrode and the mask. Forming process;
Forming the interlayer film on the gate electrode and the gate insulating film, and forming the wiring on the interlayer film and a wiring forming step of repeating the wiring forming process one or more times;
An interlayer film is formed on the uppermost interlayer film and wiring, and a trench extending from the interlayer film to the semiconductor substrate is formed with reference to the first alignment mark when the light receiving portion is formed. Forming an alignment mark by embedding an insulating film material into the second alignment mark;
The manufacturing method of the solid-state image sensor of Claim 10 which has a support substrate adhesion process which adhere | attaches a support substrate on an uppermost interlayer film through an adhesive layer. The substrate back surface structure forming step includes:
A polishing step of polishing a predetermined amount of the back side of the semiconductor substrate;
On the back side of the semiconductor substrate after polishing, a color filter having a predetermined color arrangement is formed so as to correspond to each of the light receiving portions with reference to the second alignment mark, and the color filters corresponding to the light receiving portions, respectively. The method for producing a solid-state imaging device according to claim 10, further comprising: a color filter / microlens formation step of forming a microlens on the color filter.   In the color filter / microlens formation step, the microlens is formed by removing the color filter in the region corresponding to the second alignment mark simultaneously with the formation of the color filter so that the second alignment mark can be clearly seen. The manufacturing method of the solid-state image sensor of Claim 13 comprised.   In the substrate surface structure forming step, the trench depth to the semiconductor substrate is formed to be shallower than the thickness of the semiconductor substrate after the back surface polishing, or the trench depth to the semiconductor substrate is the semiconductor after the back surface polishing. The method for manufacturing a solid-state imaging element according to claim 10, wherein the solid-state imaging element is formed deeper than a thickness of the substrate.   11. The method of manufacturing a solid-state imaging element according to claim 10, wherein the second alignment mark is formed immediately after the heat treatment on the surface layer side of the semiconductor substrate and the film formation of the interlayer film are completed and the support substrate is bonded.   An electronic information device using the solid-state imaging device according to claim 1 as an image input device in an imaging unit.

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