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JP2012238771A - Underfill having dilatancy characteristics - Google Patents

Underfill having dilatancy characteristics Download PDF

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Publication number
JP2012238771A
JP2012238771A JP2011107714A JP2011107714A JP2012238771A JP 2012238771 A JP2012238771 A JP 2012238771A JP 2011107714 A JP2011107714 A JP 2011107714A JP 2011107714 A JP2011107714 A JP 2011107714A JP 2012238771 A JP2012238771 A JP 2012238771A
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underfill
composition
semiconductor package
solder
semiconductor device
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Tetsuro Nishimura
西村哲郎
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Nihon Superior Sha Co Ltd
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    • H10W90/724
    • H10W90/734

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Abstract

【課題】鉛フリーはんだ組成のBGA等のはんだバンプを形成し半導体装置と実装用基板を接続する半導体パッケージにおいて、耐衝撃特性に優れ、高い接続信頼性を有する半導体パッケージ等の電子部品装着を提供する。
【解決手段】GA等のはんだ端子を有する半導体装置1と半導体装置と接続する実装用基板3、半導体装置と実装用基板の間に介在させるアンダーフィル4からなる半導体パッケージ等の接続構造に対して、アンダーフィルにダイラタンシー特性を有する組成を用いることによって、落下等の衝撃に対してはんだ接合部にかかる衝撃を劇的に緩和し、耐落下等の衝撃特性を向上させることを可能にした。また、アンダーフィルにはんだ接合部に対して酸化防止効果を有する組成を選択することによって、経時での接続信頼性が向上する。
【選択図】図1
In a semiconductor package in which a solder bump such as BGA having a lead-free solder composition is formed and a semiconductor device is connected to a mounting substrate, electronic component mounting such as a semiconductor package having excellent impact resistance and high connection reliability is provided. To do.
A semiconductor device having a solder terminal such as a GA, a mounting substrate connected to the semiconductor device, and a connection structure such as a semiconductor package comprising an underfill interposed between the semiconductor device and the mounting substrate. By using a composition having a dilatancy characteristic for the underfill, it is possible to dramatically reduce the impact applied to the solder joint with respect to impact such as dropping, and to improve impact characteristics such as drop resistance. Further, by selecting a composition having an anti-oxidation effect on the solder joint in the underfill, connection reliability over time is improved.
[Selection] Figure 1

Description

本発明は、電子部品を実装した電子機器に関し、詳しくは、CSPパッケージ等の半導体を実装した半導体パッケージのアンダーフィルに関する。 The present invention relates to an electronic device mounted with an electronic component, and more particularly to an underfill of a semiconductor package mounted with a semiconductor such as a CSP package.

近年、携帯電話に代表される携帯情報機器において、機器の小型軽量化や多機能化の進歩は急速であり、それら携帯情報機器に搭載される半導体パッケージも小型化が進んでいる。これらの半導体パッケージの実装にはBGA(Ball
Grid Array)に代表される微細なはんだボール等が多く用いられている。
一方、半導体パッケージに用いられているはんだボールは、環境への影響を考慮して、Sn-Cu系、Sn-Ag-Cu系、Sn−Cu−Ni系等の鉛フリーはんだ合金が用いられ、所謂リフロー方式ではんだ接合がなされている。
2. Description of the Related Art In recent years, in portable information devices typified by mobile phones, the progress of miniaturization and weight reduction and multi-functionalization of devices has been rapid, and semiconductor packages mounted on these portable information devices have also been miniaturized. For mounting these semiconductor packages, BGA (Ball
A fine solder ball represented by (Grid Array) is often used.
On the other hand, the lead-free solder alloy such as Sn—Cu, Sn—Ag—Cu, Sn—Cu—Ni is used for the solder balls used in the semiconductor package in consideration of the influence on the environment. Solder bonding is performed by a so-called reflow method.

また、携帯情報機器は、その使用環境から、落下等の衝撃的負荷の危険に絶えず晒されており、当然のことながら、搭載されている半導体パッケージに対しても、落下衝撃負荷や機械的負荷に対する耐久性が求められ、これらの負荷に対する信頼性の保証が必要とされている。
そこで、BGA等を用いたはんだ接続部の耐衝撃特性を向上させるため種々の提案がなされている。
In addition, mobile information devices are constantly exposed to the risk of impact loads such as dropping due to their usage environment, and of course, even for mounted semiconductor packages, drop impact loads and mechanical loads. Therefore, it is necessary to guarantee the reliability of these loads.
Therefore, various proposals have been made to improve the impact resistance characteristics of the solder connection portion using BGA or the like.

例えば、特許文献1や特許文献2のように、合金組成に着目して落下衝撃に対するはんだ接合部の強度を向上させた提案や、特許文献3のように、Ag又はCuの箔材の表面にSn層を有したロウ材シートを用いて落下強度を向上させる提案、特許文献4のように、アンダーフィル用樹脂を用いて落下等によるはんだボール接合部に発生する応力を緩和して、はんだボール接合部が破断しにくくした提案がなされている。また、特許文献5には、アンダーフィルの組成にダイラタンシーを付与して、アンダーフィルの含浸性を向上させてボイドの発生を抑制し、信頼性を向上させた提案がなされている。
しかしながら、上記の提案等においても、落下等の衝撃によるはんだ接合部の破断等の不良が発生しているのが現状であり、より接続信頼性を向上させた技術が求められている。
For example, as disclosed in Patent Document 1 and Patent Document 2, focusing on the alloy composition, a proposal for improving the strength of a solder joint against a drop impact, or as disclosed in Patent Document 3, on the surface of an Ag or Cu foil material. Proposal for improving drop strength by using a brazing material sheet having an Sn layer, as disclosed in Patent Document 4, a solder ball is used to relieve stress generated in a solder ball joint due to dropping by using an underfill resin. Proposals have been made in which the joint is less likely to break. Further, Patent Document 5 proposes that dilatancy is imparted to the composition of the underfill to improve the underfill impregnation property, thereby suppressing the generation of voids and improving the reliability.
However, in the above proposals and the like as well, defects such as breakage of solder joints due to impacts such as dropping are currently occurring, and a technique that further improves connection reliability is demanded.

特開2005−254298号公報JP 2005-254298 A 特開2004−154845号公報JP 2004-154845 A 特開2006−272449号公報JP 2006-272449 A 特開2009−152501号公報JP 2009-152501 A 特開2009−57575号公報JP 2009-57575 A

本発明の課題は、上記現状に鑑み、鉛フリーはんだ組成のBGA等のはんだバンプを形成し半導体装置と実装用基板を接続する半導体パッケージにおいて、耐衝撃特性に優れ、しかも、高い接続信頼性を有する半導体パッケージ等の電子部品装着を提供することである。 In view of the above situation, the object of the present invention is to provide a semiconductor package in which a solder bump such as a BGA having a lead-free solder composition is formed to connect a semiconductor device and a mounting substrate, and has excellent impact resistance and high connection reliability. It is to provide electronic component mounting such as a semiconductor package.

本発明は、上記課題を達成するため、鋭意検討の結果、BGA等のはんだ端子を有する半導体装置と当該半導体装置と接続する実装用基板、当該半導体装置と当該実装用基板の間に介在させるアンダーフィルからなる半導体パッケージ等の接続構造に対して、アンダーフィルにダイラタンシー特性を有する組成を用いることによって、落下等の衝撃に対してはんだ接合部にかかる衝撃を劇的に緩和し、耐落下等の衝撃特性を向上させることを可能にした。
すなわち、落下等の衝撃で生じる半導体パッケージ内のはんだ接合部に対する衝撃に対して、介在するダイラタンシー特性を有するアンダーフィルが、落下衝撃を緩和して、はんだ接合部に対する負荷を劇的に緩和することとなる。
また、アンダーフィル組成に、はんだ接合部に対して酸化防止効果を有する組成を選択することによって、経時での接続信頼性が向上し、結果的に信頼性が相乗的に向上することとなる。
In order to achieve the above-described object, the present invention has been made through extensive studies, and as a result, a semiconductor device having a solder terminal such as a BGA, a mounting substrate connected to the semiconductor device, and an underlayer interposed between the semiconductor device and the mounting substrate. By using a composition with dilatancy characteristics in the underfill for the connection structure such as semiconductor package made of fill, the impact on the solder joints is dramatically reduced with respect to the impact such as dropping. The impact characteristics can be improved.
In other words, against the impact on the solder joints in the semiconductor package caused by impact such as dropping, the underfill with intervening dilatancy characteristics can alleviate the drop impact and dramatically reduce the load on the solder joints. It becomes.
Further, by selecting a composition having an antioxidant effect on the solder joint as the underfill composition, the connection reliability over time is improved, and as a result, the reliability is synergistically improved.

本発明のアンダーフィルを用いた半導体パッケージは、耐落下衝撃特性を向上させることが可能となるため、落下等の危険に晒される携帯情報機器等の電子機器においても、落下に伴う接続不良発生を低減させることが期待できる。 Since the semiconductor package using the underfill of the present invention can improve the drop impact resistance, even in an electronic device such as a portable information device exposed to danger of dropping, a connection failure caused by dropping occurs. It can be expected to reduce.

半導体パッケージの接続を表したモデル図。The model figure showing the connection of a semiconductor package. 従来のアンダーフィルを用いた半導体パッケージに落下衝撃を与えた場合のはんだ接合部及び半導体装置の歪の変化を表したモデル図。The model figure showing the change of the distortion of a solder joint part and a semiconductor device at the time of giving a drop impact to the semiconductor package using the conventional underfill. 本発明のアンダーフィルを用いた半導体パッケージに落下衝撃を与えた場合のはんだ接合部及び半導体装置の歪の変化を表したモデル図。The model figure showing the change of the distortion of the solder joint part and semiconductor device at the time of giving a drop impact to the semiconductor package using the underfill of the present invention.

以下、本発明の実施の形態について図面を基に説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

図1示すように、半導体パッケージは、半導体装置の一例としてBGA型半導体装置(1)、はんだバンプ(2)、実装用基板(3)、及びアンダーフィル(4)から構成されている場合が多い。
そして、従来の半導体パッケージには、アンダーフィルとして、エポキシ樹脂等の熱硬化性樹脂が多く用いられている。
これら熱硬化性樹脂は、毛細管現象を利用して、BGA型半導体装置(1)と実装用基板(3)の間の空間に浸透させ、その後、加熱硬化させる工程をとるが、液状特性からボイドが残留する等の問題も残っている。
特許文献5のように、アンダーフィルにダイラタンシー特性を付与することにより、含浸性を向上させた提案もあるが、ボイドを完全に無くするまでに至ってはいない。
また、熱硬化性樹脂を用いた場合は、作業工程で生じた不良品等のリワーク作業を行うことが困難であるという問題も存在する。
As shown in FIG. 1, the semiconductor package is often composed of a BGA type semiconductor device (1), a solder bump (2), a mounting substrate (3), and an underfill (4) as an example of the semiconductor device. .
And in the conventional semiconductor package, many thermosetting resins, such as an epoxy resin, are used as an underfill.
These thermosetting resins use capillary action to permeate the space between the BGA type semiconductor device (1) and the mounting substrate (3) and then heat cure. There are still problems such as remaining.
There is also a proposal for improving the impregnation property by imparting dilatancy characteristics to the underfill as in Patent Document 5, but the void has not been completely eliminated.
In addition, when a thermosetting resin is used, there is a problem that it is difficult to perform rework work such as defective products generated in the work process.

次に、落下衝撃により、半導体パッケージに損傷が発生する現象について説明する。
図1に示す半導体パッケージのアンダーフィル(4)がエポキシ樹脂等の熱硬化性樹脂であった場合、図2に示すように落下衝撃が加わる前の半導体装置とはんだバンプ、及び実装用基板の接合状態を(A)とし、落下衝撃が加わった瞬間を(B)とし、落下衝撃が加わって暫くした状態を(C)で表した。落下衝撃が加わった瞬間は、落下衝撃力によって最も変形しやすい箇所(モデル図では、半導体装置を仮定した。)が変形し、同様に接合されたはんだバンプ(2)も変形する。その後、復元力により落下衝撃を加える前の状態に近づくが、その際、はんだバンプと半導体装置の接合部に亀裂が発生する場合があると考えられる。
Next, a phenomenon in which a semiconductor package is damaged due to a drop impact will be described.
When the underfill (4) of the semiconductor package shown in FIG. 1 is a thermosetting resin such as an epoxy resin, as shown in FIG. The state was shown as (A), the moment when the drop impact was applied was shown as (B), and the state after the drop impact was added was shown as (C). At the moment when the drop impact is applied, the portion that is most likely to be deformed by the drop impact force (in the model diagram, a semiconductor device is assumed) is deformed, and similarly, the solder bump (2) joined is also deformed. Thereafter, the state before the drop impact is applied by the restoring force is approached, but at that time, it is considered that a crack may occur at the joint between the solder bump and the semiconductor device.

更に、本発明のダイラタンシー特性を有したアンダーフィル組成を用いた場合について、図3を例示して説明する。図1に示す半導体パッケージのアンダーフィル(4)にダイラタンシー特性を有する組成を用いることにより、図3に示すように落下衝撃が加わる前の半導体装置とはんだバンプ、及び実装用基板の接合状態を(D)とし、落下衝撃が加わった瞬間を(E)とし、落下衝撃が加わって暫くした状態を(F)で表した。落下衝撃が加わった瞬間は、従来の半導体パッケージ同様に、落下衝撃力によって最も変形しやすい箇所(モデル図では、半導体装置を仮定した。)が若干変形するが、直ちにダイラタンシー特性が作用して、衝撃を緩和するため、半導体装置の変形度合いが少なく、それに伴い、はんだバンプの変形も微小となり、はんだバンプと半導体装置の接合部に損傷を与えることがないと考える。 Furthermore, the case where the underfill composition having the dilatancy characteristic of the present invention is used will be described with reference to FIG. By using a composition having dilatancy characteristics for the underfill (4) of the semiconductor package shown in FIG. 1, the bonding state of the semiconductor device, the solder bump, and the mounting substrate before the drop impact is applied as shown in FIG. D), the moment when the drop impact was applied, (E), and the state where the drop impact was applied for a while was represented by (F). At the moment when the drop impact is applied, as in the conventional semiconductor package, the portion that is most likely to be deformed by the drop impact force (in the model diagram, a semiconductor device is assumed) is slightly deformed, but the dilatancy characteristic immediately acts, In order to mitigate the impact, the degree of deformation of the semiconductor device is small, and accordingly, the deformation of the solder bump is also small, and it is considered that the joint between the solder bump and the semiconductor device is not damaged.

本発明のダイラタンシー特性を有したアンダーフィルは、本発明の効果であるダイラタンシー特性を有する限りにおいて、その組成や性状、半導体パッケージに使用する量等に関して特に制限はない。
組成に関して、液状性組成として、エポキシ樹脂等の熱硬化樹脂やウレタン樹脂、エンジニアリングプラスチック等の樹脂やグリセリンや多価アルコール等を用いることができ、固体性組成として、シリカやシリコーン樹脂末等のフィラーを用いることができる。そして、用途に合わせて前記各組成の1種又は複数種を組み合わせて用いることも可能である。
また、半導体パッケージに注入可能であれば制限はなく、本発明のダイラタンシー特性を有したアンダーフィルが半導体パッケージの接合部に注入された状態では、如何なる性状も許容可能であり、液状、ジェル状、ゼリー状等が例示でき、はんだバンプや半導体パッケージに与える影響を考慮すると軽量及び軟性を有するものが好ましい。
The underfill having the dilatancy characteristics of the present invention is not particularly limited with respect to its composition and properties, the amount used for the semiconductor package, and the like as long as it has the dilatancy characteristics that are the effects of the present invention.
Regarding the composition, thermosetting resins such as epoxy resins, urethane resins, engineering plastics, glycerin, polyhydric alcohols, etc. can be used as the liquid composition, and fillers such as silica and silicone resin powder can be used as the solid composition. Can be used. And it is also possible to use combining the 1 type or multiple types of each said composition according to a use.
In addition, there is no limitation as long as it can be injected into a semiconductor package, and any properties are acceptable in a state where the underfill having the dilatancy characteristics of the present invention is injected into a junction portion of the semiconductor package, liquid, gel, A jelly-like shape can be exemplified, and those having light weight and flexibility are preferable in consideration of the influence on solder bumps and semiconductor packages.

本発明のダイラタンシー特性を有したアンダーフィルの効果として、半導体パッケージの製造や、当該半導体パッケージ電子機器に接合する際にリペア作業が必要となる場合は、液状性組成に熱可塑性樹脂用いることや、溶剤等を用いて除去できる組成を選択することにより可能となる。
更に、本発明のダイラタンシー特性を有したアンダーフィルの効果として、接合に用いるフラックスを除去することを必要としない組成を選択すること、及び性状とするも可能であり、その場合は、半導体パッケージの製造作業性の向上、並びに応用用途が広がる。
As an effect of the underfill having the dilatancy characteristic of the present invention, when a repair work is required when manufacturing a semiconductor package or joining to the semiconductor package electronic device, a thermoplastic resin can be used for the liquid composition, This can be achieved by selecting a composition that can be removed using a solvent or the like.
Furthermore, as an effect of the underfill having the dilatancy characteristic of the present invention, it is possible to select a composition that does not require removal of the flux used for bonding, and to make it a property. Improvement of manufacturing workability and application applications are widened.

本発明のダイラタンシー特性を有したアンダーフィル組成に、グリセリンやポリグリコールを用いることによって、はんだバンプの酸化が抑制され、経時劣化が抑制され、はんだ接合の信頼性が向上する。 By using glycerin or polyglycol for the underfill composition having the dilatancy characteristics of the present invention, oxidation of solder bumps is suppressed, deterioration with time is suppressed, and the reliability of solder joints is improved.

1 BGA型半導体装置
2 はんだバンプ
3 実装用基板
4 アンダーフィル
5 はんだバンプ接合部に生じた亀裂





DESCRIPTION OF SYMBOLS 1 BGA type semiconductor device 2 Solder bump 3 Mounting board 4 Underfill 5 Crack which arose in solder bump junction part





Claims (4)

はんだバンプを用意した半導体装置、実装用基板、及びアンダーフィルからなる半導体パッケージにおいて、アンダーフィルにダイラタンシー特性を有する組成を用いたことを特徴とする半導体パッケージ。 A semiconductor package comprising a semiconductor device having a solder bump, a mounting substrate, and an underfill, wherein the underfill uses a composition having a dilatancy characteristic. アンダーフィルに酸化防止効果を有する組成を含有させたことを特徴とする請求項1記載の半導体パッケージ。 2. The semiconductor package according to claim 1, wherein the underfill contains a composition having an antioxidant effect. ダイラタンシー特性を有する組成がシリカ及び/又はシリコーン樹脂であることを特徴とする
請求項1乃至請求項2記載の半導体パッケージ。
3. The semiconductor package according to claim 1, wherein the composition having dilatancy characteristics is silica and / or silicone resin.
酸化防止効果を有する組成が、グリセリン及び/又はポリグリセリングリコールであることを特徴とする請求項2乃至請求項4記載の半導体パッケージ。



5. The semiconductor package according to claim 2, wherein the composition having an antioxidant effect is glycerin and / or polyglycerin glycol.



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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110997855A (en) * 2017-08-08 2020-04-10 索尼公司 Adhesive, electronic device, and optical device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110997855A (en) * 2017-08-08 2020-04-10 索尼公司 Adhesive, electronic device, and optical device
CN110997855B (en) * 2017-08-08 2021-11-26 索尼公司 Adhesive, electronic device, and optical device
US11643577B2 (en) 2017-08-08 2023-05-09 Sony Corporation Adhesive, electronic apparatus, and optical apparatus

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