JP2012121749A - SiC SEMICONDUCTOR SELF-SUPPORTING SUBSTRATE AND SiC SEMICONDUCTOR ELECTRONIC DEVICE - Google Patents

Abstract

An SiC semiconductor free-standing substrate and an SiC semiconductor electronic device capable of improving the yield by suppressing variations in withstand voltage, on-resistance, element lifetime, and the like of an electronic device formed on the SiC semiconductor free-standing substrate.
An SiC semiconductor crystal 3 constituting a SiC semiconductor free-standing substrate is a hexagonal system, and variations in the lattice constant of the SiC semiconductor crystal 3 are represented by a standard lattice constant in the a-axis direction in the main surface of the SiC semiconductor free-standing substrate. When the deviation is a value obtained by dividing the deviation by the average value of the lattice constant in the a-axis direction, the dispersion of the lattice constant is ± 55 ppm or less.
[Selection] Figure 3

Description

  The present invention relates to a SiC semiconductor free-standing substrate and a SiC semiconductor electronic device.

  Silicon carbide (SiC) is attracting attention as an environmentally resistant semiconductor material because it has excellent heat resistance, high mechanical strength, and physical and chemical properties such as resistance to radiation. In recent years, a demand for a SiC semiconductor free-standing substrate is increasing as a substrate for forming a short wavelength optical device from blue to ultraviolet, a high-voltage high-frequency electronic device, and the like.

For example, in Patent Document 1, as a method for obtaining a SiC single crystal substrate including a high-quality SiC single crystal, a seed crystal for growing a SiC single crystal having a groove having a width of 0.7 mm or more and less than 2 mm on a growth surface is used for sublimation. An SiC single crystal ingot growth method is disclosed in which a SiC single crystal is grown on a seed crystal by a recrystallization method, and the threading dislocation density is reduced to 1 × 10 ⁴ cm ⁻² or less.

JP 2009-292723 A

  However, it has been found that there is a new problem that cannot be solved only by reducing the threading dislocation density of the SiC semiconductor free-standing substrate. That is, according to further research by the present inventors, when an electronic device is formed using the SiC semiconductor free-standing substrate as described above, and a plurality of elements are formed by mounting, the withstand voltage and the on-resistance are included in these. It has been found that elements with extremely inferior element life and the like are included, and large variations occur between elements. If the withstand voltage, on-resistance, element lifetime, etc. vary greatly from the design value, the yield may be reduced.

  Accordingly, an object of the present invention is to provide a SiC semiconductor free-standing substrate and a SiC semiconductor electronic capable of improving the yield by suppressing variations in withstand voltage, on-resistance, element lifetime, etc. of an electronic device formed using the SiC semiconductor free-standing substrate. To provide a device.

  According to a first aspect of the present invention, there is provided a SiC semiconductor free-standing substrate made of a SiC semiconductor crystal, wherein the SiC semiconductor crystal is a hexagonal system, and variation in lattice constant of the SiC semiconductor crystal is determined by the SiC semiconductor free-standing substrate. When the standard deviation of the lattice constant in the a-axis direction in the main surface of the substrate is divided by the average value of the lattice constant in the a-axis direction, an SiC semiconductor free-standing substrate having a variation in the lattice constant of ± 55 ppm or less is obtained. Provided.

  According to the second aspect of the present invention, the variation in the lattice constant is a variation in a main surface excluding a region from the outermost periphery of the SiC semiconductor free-standing substrate to the inner side by 2 mm in the radial direction. The SiC semiconductor self-supporting substrate described in 1. is provided.

  According to a third aspect of the present invention, there is provided the SiC semiconductor free-standing substrate according to the first or second aspect, wherein the SiC semiconductor crystal is doped with an impurity that controls conductivity of the SiC semiconductor crystal. Is done.

According to the 4th aspect of this invention, a SiC semiconductor electronic device provided with the epitaxial layer for electronic devices formed on the SiC semiconductor self-supporting substrate in any one of the 1st to 3rd aspects is provided.

  According to the present invention, a SiC semiconductor free-standing substrate and a SiC semiconductor electronic device capable of improving the yield by suppressing variations in withstand voltage, on-resistance, element lifetime, and the like of an electronic device formed using the SiC semiconductor free-standing substrate. Is provided.

It is a schematic block diagram which shows the smoothing processing apparatus which smoothes with respect to the SiC seed | substrate used for manufacture of the SiC semiconductor self-supporting substrate which concerns on one Embodiment of this invention. It is the schematic which shows the step terrace structure of the SiC seed | substrate used for manufacture of the SiC semiconductor self-supporting substrate which concerns on one Embodiment of this invention. It is a schematic block diagram of the SiC semiconductor crystal manufacturing apparatus used for manufacture of the SiC semiconductor self-supporting substrate which concerns on one Embodiment of this invention. It is a schematic sectional drawing of the SiC semiconductor electronic device comprised as a Schottky barrier diode which concerns on one Embodiment of this invention. It is a top view which shows the measurement location of the step height and terrace width in the SiC seed | species board | substrate surface which concerns on the Example of this invention. It is a schematic sectional drawing which shows the crystal growth process of the SiC semiconductor crystal which concerns on a prior art.

<Knowledge>
First, prior to the description of the embodiment of the present invention, the knowledge obtained by the present inventor will be described.

  According to the present inventors, even if the threading dislocation density in the SiC semiconductor crystal is reduced in order to obtain a high-quality SiC semiconductor free-standing substrate, it is not sufficient to obtain a high-performance electronic device. That is, the inventor forms an electronic device using a SiC semiconductor free-standing substrate including a SiC semiconductor crystal with reduced threading dislocation density, and characteristics such as withstand voltage, on-resistance, and element lifetime of the obtained plurality of elements As a result, there was a remarkable variation in characteristics between elements depending on the position in the substrate surface where each element was obtained, and some of these elements were extremely inferior in characteristics. . Such variation in characteristics may lead to a decrease in yield.

  Therefore, the present inventor has further researched, the variation in the characteristics of the element in the substrate surface is due to dislocations newly generated in the growth process of the epitaxial layer for electronic devices during the electronic device manufacturing process, It was also found that such dislocations were caused by variations in lattice constants in the SiC semiconductor free-standing substrate surface. According to the inventor's consideration, the dispersion of the lattice constant in the surface of the SiC semiconductor free-standing substrate is generated by the following mechanism when the SiC semiconductor crystal is formed.

  The SiC semiconductor crystal constituting the SiC semiconductor free-standing substrate is generally formed by a sublimation recrystallization method using a SiC {0001} plane substrate as a seed crystal. That is, the SiC seed substrate is placed in a crucible, SiC raw material powder also placed in the crucible is heated and sublimated, and a sublimation gas is attached to the SiC seed substrate to grow a SiC semiconductor crystal on the SiC seed substrate. . At this time, in order to control the conductivity of the SiC semiconductor crystal, the SiC semiconductor crystal is grown while adding impurities. The conductivity in the SiC semiconductor crystal can be controlled by substituting the position of the silicon (Si) atom or carbon (C) atom in the SiC semiconductor crystal structure with an impurity element.

FIG. 6 shows how a SiC semiconductor crystal grows on the SiC seed substrate. The SiC seed substrate 52 is, for example, a {0001} plane substrate with no off-angle. As shown in FIG. 6A, the surface of the SiC seed substrate 52 has an uneven surface 51. An upper surface (table surface) 51c of the uneven surface 51 is a c-plane ((0001) plane), which is an original crystal growth surface. The core side surface (facet surface) 51f of the concavo-convex surface 51 is a surface having an inclination with respect to the c-axis ([0001] axis) that is the crystal growth direction, for example, the (11-22) plane, (1-102) Plane, (11-23) plane, (11-25) plane, and the like.

  As shown in FIG. 6B, when the SiC semiconductor crystal 63 is grown on the SiC seed substrate 52, the uneven surface 51 as described above acts as an island-like nucleus by two-dimensional nucleus formation, and the upper surface 51c. The crystal growth rate of the nucleus side surface 51f is slower than the crystal growth rate of. For this reason, the amount of impurities taken up in the nucleus side surface region 61f in the SiC semiconductor crystal 63 is relatively large, and the impurity concentration is higher than that in the upper surface region 61c in the SiC semiconductor crystal 63.

  As the growth of the SiC semiconductor crystal 63 further progresses, the slope of the growth surface of the SiC semiconductor crystal 63 formed on the nucleus side surface 51f becomes gentle and the impurity concentration decreases, but as shown in FIG. Further, for example, the influence of the bias of the impurity concentration continues until the concave portion formed by the nucleus side surface 51f is filled and the surface of the SiC semiconductor crystal 63 becomes substantially flat, and the impurity concentration extending in the thickness direction of the SiC semiconductor crystal 63 is high. SiC semiconductor crystal 63 is formed in a state where nucleus side regions 61f, 62f, 63f and upper surface regions 61c, 62c, 63c having a low impurity concentration and substantially constant are mixed. In the nucleus side regions 61f, 62f, and 63f, the distortion of the crystal lattice is larger than the other regions due to the influence of high concentration impurities. In FIG. 6, the level of the impurity concentration is represented by the density of the dots added to the cross section.

  Such nuclear side regions 61f, 62f, 63f with high impurity concentration reach the surface of the SiC semiconductor crystal 63 or near the surface, and regions having different impurity concentrations appear on the surface of the SiC semiconductor crystal 63 or in the vicinity of the surface. This is considered to be a cause of variation in lattice constant within the surface of the semiconductor free-standing substrate.

  The present inventor has further studied earnestly to solve the above problems. As a result, it has been found that variations in withstand voltage, on-resistance, element lifetime, and the like can be reduced by suppressing the variation in lattice constant to a predetermined value or less. In addition, when a predetermined smoothing process is performed on the SiC seed substrate, it has been found that the variation in lattice constant due to the uneven surface can be reduced. The present invention is based on the above findings found by the inventors.

<One Embodiment of the Present Invention>
A SiC semiconductor free-standing substrate according to an embodiment of the present invention will be described below. Here, the self-supporting substrate means a substrate that not only can hold its own shape but also has a strength that does not cause inconvenience in handling.

(1) SiC semiconductor free-standing substrate An SiC semiconductor free-standing substrate according to an embodiment is a free-standing substrate having a diameter of 2 inches composed of a hexagonal SiC semiconductor crystal containing impurities, and forms a SiC semiconductor electronic device. It has a surface. The main surface on which the SiC semiconductor electronic device is formed is, for example, a Si (0001) surface. In this case, the main surface on the opposite side is the C (000-1) plane. The variation of the lattice constant in the substrate surface on the main surface side forming the SiC semiconductor electronic device should be within a predetermined range, for example, ± 55 ppm or less, preferably ± 25 ppm or less, more preferably ± 15 ppm or less. . The variation of the lattice constant is specifically the variation of the lattice constant in the a-axis direction, that is, the variation of the a-axis length.

The a-axis length can be calculated from measurement data obtained by X-ray diffraction. In obtaining the measurement data of X-ray diffraction, a plurality of areas in the substrate surface excluding a region in the substrate surface where the electronic device is actually formed, for example, a region from the outermost periphery of the SiC semiconductor free-standing substrate to the inner side by 2 mm in the radial direction. Measure at the location. The dispersion of the lattice constant is a value obtained by dividing the standard deviation of the lattice constant in the a-axis direction calculated from a plurality of measurement data in the substrate surface by the average value. Below, the calculation method of a-axis length and the acquisition method of measurement data are explained in full detail.

The a-axis length of the hexagonal crystal lattice included in the SiC semiconductor crystal is measured by the interplanar spacing d ₀₀₀₆ of SiC (0006) obtained by X-ray diffraction and the interplanar spacing d _20-24 of SiC (20-24). From the results, the following formulas (1) and (2) are used. Expression (1) is an expression for calculating the c-axis length, and Expression (2) is an expression for calculating the a-axis length from the c-axis length.
c = 6 × d ₀₀₀₆ (1)

  The reason why SiC (0006) and SiC (20-24) are used for the measurement of the lattice constant is that measurement with less error is possible.

Interplanar spacing _{d 20-24} of the aforementioned SiC (0006) plane spacing _{d 0006} and SiC of (20-24) can be measured, for example, by X-ray diffraction using X'Pert MRD manufactured by Spectris Co., Ltd.. The anode material of the X-ray tube is preferably copper (Cu), the acceleration voltage is preferably 45 kV, and the current passed through the filament is preferably 40 mA. The optical system at the tip of the X-ray tube is arranged in the order of a 1/2 ° divergence slit, an X-ray mirror, a Ge (220) 2 crystal monochromator, and a cross slit collimator having a width of 0.2 mm × length of 0.2 mm. Can be configured. Further, for example, when measuring a SiC semiconductor free-standing substrate having a diameter of 2 inches, it is preferable to measure at a 1 mm interval in the diameter direction of the substrate so as to obtain a distribution of lattice constants in the substrate surface. Here, it is desirable that the region from the outermost periphery to the inner side by 2 mm is not evaluated.

(2) Manufacturing method of SiC semiconductor free-standing substrate Next, the manufacturing method of the SiC semiconductor free-standing substrate concerning one embodiment is explained below. In this embodiment, the surface of a SiC seed substrate having a diameter of 2 inches is subjected to a smoothing process by photocatalytic reaction, and a SiC semiconductor crystal is grown on the smoothed surface of the SiC seed substrate to form a SiC semiconductor free-standing substrate. .

(Smoothing processing of SiC seed substrate)
First, the smoothing process by the photocatalytic reaction type chemical processing method of the SiC seed substrate according to the present embodiment will be described with reference to FIG. FIG. 1 is a schematic configuration diagram illustrating a smoothing processing apparatus that performs smoothing on a SiC seed substrate used for manufacturing a SiC semiconductor free-standing substrate according to the present embodiment.

In the photocatalytic reaction type chemical processing method, a thin film having photocatalytic activity in an aqueous solution to which a radical scavenger is added is disposed opposite to the surface of a substrate to be processed, and the thin film is irradiated with light to oxidize the thin film. In this method, the active species are generated, the active species are chemically reacted with atoms on the surface, and the surface is converted into an eluting compound and removed, thereby smoothing the surface.

A smoothing processing apparatus shown in FIG. 1 includes a container 11 that contains an aqueous solution 10, a quartz (SiO ₂ ) substrate 6 as a photocatalytic film support on which a titanium dioxide (TiO ₂ ) thin film 5 as a photocatalytic thin film is formed, Ultraviolet irradiation means (not shown) for transmitting ultraviolet light UV to the TiO ₂ thin film 5 through the quartz substrate 6 from the surface opposite to the surface on which the TiO ₂ thin film 5 is formed is provided. As the aqueous solution 10, for example, water (H ₂ O) having a high dissolved oxygen amount and a predetermined amount of methanol (CH ₃ OH) as a radical scavenger can be used. The TiO ₂ thin film 5 is formed, for example, by sputtering with a TiO ₂ fired body as a target by a magnetron sputtering method on a quartz substrate 6 maintained at a predetermined pressure and a predetermined temperature in an argon (Ar) gas atmosphere.

  As a to-be-processed substrate which performs a smoothing process by said smoothing apparatus, the SiC seed | species board | substrate 2 which makes Si (0001) surface the main surface 1 is used, for example. For example, the main surface 1 of the SiC seed substrate 2 is mechanically mirror-polished, but the main surface 1 has an uneven portion similar to the uneven surface 51 shown in FIG.

The TiO ₂ thin film 5 is brought into contact with the main surface 1 of the SiC seed substrate 2 in the aqueous solution 10, and the UV light UV is irradiated to the TiO ₂ thin film 5 from the quartz substrate 6 side. At this time, hydroxyl radicals (hydroxy radicals: OH ^* ) are generated on the surface of the TiO ₂ thin film 5 by irradiation with ultraviolet rays UV, and the generated hydroxyl radicals mainly react with Si atoms on the main surface 1 of the SiC seed substrate 2. Then, silicon oxide (SiO ₂ ) is formed. After the reaction, SiO ₂ formed by the photocatalytic reaction is removed from the main surface 1 of the SiC seed substrate 2 with, for example, an aqueous solution of hydrogen fluoride (HF) (hydrofluoric acid).

In uneven portion having the main surface 1 of the SiC seed crystal 2, the active species is preferentially adsorbed on the convex portion, continue to form a SiO ₂ reacts with the surface atoms. As described above, the main surface 1 is smoothed as the reaction proceeds, and a step terrace structure including the step s and the terrace t as shown in FIG. 2 is formed on the main surface 1. At this time, by adjusting the addition amount (concentration) of methanol, the distance at which the active species can diffuse from the surface of the TiO ₂ thin film 5 can be controlled, and the SiC seed substrate 2 has a predetermined smoothness, that is, a predetermined level. It can be smoothed to have a step height and terrace width.

  Thus, the smoothing process of the SiC seed substrate 2 according to the present embodiment is completed.

(Formation of SiC semiconductor crystal)
Next, formation of the SiC semiconductor crystal by the sublimation recrystallization method on the main surface 1 (surface to be processed) of the SiC seed substrate 2 subjected to the smoothing process will be described with reference to FIG. FIG. 3 is a schematic diagram of a SiC semiconductor crystal manufacturing apparatus used for manufacturing the SiC semiconductor free-standing substrate according to the present embodiment.

  The SiC semiconductor crystal manufacturing apparatus shown in FIG. 3 includes a vacuum vessel 20, a high-purity graphite crucible 21 disposed in the vacuum vessel 20 and surrounded by a heat insulating material 23, and a high-purity graphite product via the vacuum vessel 20. A gas introduction pipe 28 for introducing atmospheric gas into the crucible 21 and a vacuum exhaust device 26 for exhausting the gas introduced into the high purity graphite crucible 21 are provided. A work coil 27 for heating the inside of the high-purity graphite crucible 21 by induction heating is disposed on the outer wall of the vacuum vessel 20. A lid 22 is provided on the upper portion of the high purity graphite crucible 21, and a smoothened SiC seed substrate 2 is provided on the lower surface of the lid 22, that is, the surface facing the crucible 21 made of high purity graphite. The main surface 1 (surface to be processed) is mounted downward. A SiC raw material powder 4 is filled in the bottom of the high-purity graphite crucible 21 facing the main surface 1 of the SiC seed substrate 2.

  In the present embodiment, the SiC semiconductor crystal 3 is formed on the SiC seed substrate 2 by the SiC semiconductor crystal manufacturing apparatus. That is, the inside of the high-purity graphite crucible 21 is evacuated by the vacuum evacuation device 26, current is passed through the work coil 27, and the inside of the crucible 21 is preheated by induction heating to bring the SiC raw material powder 4 to a predetermined temperature. Next, for example, high-purity Ar gas is introduced into the high-purity graphite crucible 21 as an atmospheric gas, and the temperature is further increased to a processing temperature while maintaining the high-purity graphite crucible 21 at a predetermined pressure. Thereafter, the inside of the high-purity graphite crucible 21 is kept at the same temperature for a predetermined time. As a result, the SiC raw material powder 4 is sublimated, and the generated SiC sublimation gas adheres to the main surface 1 of the SiC seed substrate 2 subjected to the smoothing process, and the SiC semiconductor crystal 3 grows.

  At this time, in order to control the conductivity of the SiC semiconductor crystal 3, a gas containing an impurity element is added to the Ar gas, or impurities are mixed in advance in the SiC raw material powder 4, so that the SiC semiconductor crystal 3 The substrate is grown while doping impurities. The carrier type of SiC semiconductor crystal 3 is determined by the type of impurity element, and the conductivity of SiC semiconductor crystal 3 can be controlled by controlling the impurity concentration. For example, when the carrier type is n-type, nitrogen (N) or the like can be doped as an impurity element, and when it is p-type, boron (B), aluminum (Al), or the like can be doped. These impurities act as substitutional impurities.

  At this time, the main surface 1 of the SiC seed substrate 2 on which the SiC semiconductor crystal 3 is grown has a step terrace structure. Therefore, the growth process of SiC semiconductor crystal 3 is step flow growth. That is, the occurrence frequency of the two-dimensional nucleus on the terrace t shown in FIG. 2 is low, and the growth at the end of step s becomes dominant. Thereby, it is possible to form SiC semiconductor crystal 3 having a good crystal structure substantially the same as that of SiC seed substrate 2 and having little variation in impurity concentration.

  After the SiC semiconductor crystal 3 is grown for a predetermined time, the formation of the SiC semiconductor crystal 3 is finished. Thus, an ingot of SiC semiconductor crystal 3 is obtained. The ingot thus obtained is sliced at a predetermined thickness perpendicular to the growth direction (c-axis direction) of the SiC semiconductor crystal 3, the substrate is cut out, the surface of the substrate is subjected to mirror polishing or the like, and the SiC semiconductor electronic device A SiC semiconductor free-standing substrate having a Si surface (main surface) that forms the substrate is manufactured.

(3) Manufacturing method of SiC semiconductor electronic device Subsequently, the manufacturing method of the SiC semiconductor electronic device which concerns on one Embodiment is demonstrated below. In the present embodiment, an SiC semiconductor electronic device is manufactured by forming an SiC layer as an epitaxial layer for an electronic device on the previously manufactured SiC semiconductor free-standing substrate.

  FIG. 4 illustrates a SiC semiconductor electronic device according to this embodiment. The SiC semiconductor electronic device according to the present embodiment is configured as, for example, a Schottky barrier diode, and includes a SiC semiconductor crystal substrate 33 in which a SiC semiconductor free-standing substrate is diced into a chip shape, and a Si surface on the surface of the SiC semiconductor crystal substrate 33. SiC layer 34 as an epitaxial layer for electronic devices formed on the top, Schottky electrode 32 formed on SiC layer 34 and formed by etching or the like, and formed on the C surface on the back surface of SiC semiconductor crystal substrate 33 And an ohmic electrode 31.

(Formation of SiC layer)
The SiC layer 34 is formed on the SiC semiconductor free-standing substrate by, for example, an epitaxial growth method. The epitaxial growth method may be a liquid phase or a gas phase. In the present embodiment, a case where the SiC layer 34 is formed by a vapor phase epitaxial growth method, that is, a CVD (Chemical Vapor Deposition) method will be described. The CVD method is one of the general methods for epitaxial growth of SiC, has a relatively high growth rate, and is excellent in controllability and reproducibility of various characteristics such as the layer thickness of the epitaxial layer.

The CVD apparatus according to the present embodiment is configured as a hot wall type CVD apparatus, for example, a reaction furnace composed of quartz or the like, a graphite susceptor that is provided in the reaction furnace and on which a substrate is placed, and a carrier gas Hydrogen (H ₂ ) gas, propane (C ₃ H ₈ ) gas as C source gas, monosilane (SiH ₄ ) gas as Si source gas, and nitrogen (N ₂ ) gas as dopant gas in the reactor A carrier gas supply system to be supplied, a C source gas supply system, an Si source gas supply system, a dopant gas supply system, and a dry pump for exhausting the gas supplied into the reaction furnace are provided. A high-frequency induction heating device for heating the susceptor by induction heating is disposed on the outer wall of the reaction furnace near the susceptor (none of which is shown).

The SiC layer 34 is formed by the following using the above CVD apparatus. That is, a SiC semiconductor free-standing substrate is placed on the susceptor in the reaction furnace with the Si surface facing up, and the pressure in the reaction furnace is reduced to a vacuum level of, for example, 3 × 10 ⁻⁵ Pa or less by a dry pump. Subsequently, H ₂ gas is supplied at a predetermined flow rate from the carrier gas supply system, the inside of the reaction furnace is set to a predetermined pressure, and heating of the susceptor is started by a high frequency induction heating device. When the susceptor reaches a predetermined temperature, preheating is performed by maintaining the supply of H ₂ gas for a predetermined time, and then the temperature of the susceptor is further raised to the processing temperature. Next, C ₃ H ₈ gas is supplied into the reactor while maintaining the susceptor at the processing temperature. Next, SiH ₄ gas and N ₂ gas are supplied into the reaction furnace. The respective flow rates of the C ₃ H ₈ gas and the SiH ₄ gas are controlled so that the C / Si ratio of the SiC layer 34 to be formed becomes a desired value. The supply of each gas is maintained for a predetermined time, and the SiC layer 34 having a predetermined thickness is formed.

When the SiC layer 34 having a predetermined film thickness is obtained after a predetermined time has elapsed, the supply of SiH ₄ gas and N ₂ gas is stopped, and then the supply of C ₃ H ₈ gas is stopped. Next, induction heating by the high-frequency induction heating device is stopped, and the susceptor is cooled in an H ₂ gas stream. When the susceptor is sufficiently cooled, the supply of H ₂ gas is stopped, the inside of the reaction furnace is evacuated, and the SiC semiconductor free-standing substrate on which the SiC layer 34 is formed is taken out from the processing furnace.

(Formation of electrodes)
Next, electrodes are formed on both surfaces of the SiC semiconductor free-standing substrate (later SiC semiconductor crystal substrate 33), and the SiC layer 34 is used as a drift layer for device formation, for example, a SiC semiconductor electronic device configured as a Schottky barrier diode. Form. That is, for example, nickel (Ni) is vacuum-deposited on the C surface (the surface opposite to the surface on which the SiC layer 34 is formed) of the SiC semiconductor free-standing substrate, and heat treatment is performed at, for example, 800 ° C. to reduce contact resistance. The electrode 31 is formed. Further, on the SiC layer 34 on the Si surface side of the SiC semiconductor free-standing substrate, for example, titanium (Ti) is vacuum-deposited and formed by etching or the like to form the Schottky electrode 32 having an electrode size of 200 μm, for example.

  Thereafter, the SiC semiconductor free-standing substrate on which the SiC layer 34 and the electrodes 31 and 32 are formed is diced into chips of a predetermined size to obtain an SiC semiconductor electronic device configured as a Schottky barrier diode.

(4) Effects According to One Embodiment According to one embodiment, one or a plurality of effects described below are exhibited.

According to the present embodiment, the SiC semiconductor crystal 3 included in the SiC semiconductor free-standing substrate has a hexagonal crystal lattice, and the variation in the lattice constant of the crystal lattice is determined by the lattice constant in the a-axis direction in the plane of the SiC semiconductor free-standing substrate. When the standard deviation is divided by the average value, the variation in lattice constant is ± 55 ppm or less. As a result, when an electronic device is formed using a SiC semiconductor free-standing substrate, it is possible to improve the yield of the electronic device by suppressing variations in withstand voltage, on-resistance, element life, etc. due to variations in lattice constant. Become.

  In addition, according to the present embodiment, the SiC semiconductor electronic device includes the SiC layer 34 formed on the SiC semiconductor free-standing substrate in which the variation in lattice constant is ± 55 ppm or less. Thereby, generation of dislocations during the growth process of the SiC layer 34 can be suppressed, and a high-quality SiC layer 34 can be formed. In addition, the yield of the SiC semiconductor device provided with this SiC layer 34 can be improved.

  Further, according to the present embodiment, the main surface 1 of the SiC seed substrate 2 on which the SiC semiconductor crystal 3 is grown is subjected to smoothing processing by a photocatalytic reaction type chemical processing method. As a result, the main surface 1 of the SiC seed substrate 2 has a step terrace structure, and the SiC semiconductor crystal 3 can be grown on the main surface 1 by step flow growth, and variations in impurity concentration in the SiC semiconductor crystal 3 can be obtained. It is possible to suppress the variation of the lattice constant to ± 55 ppm or less.

  Moreover, according to this embodiment, the smoothing process by the photocatalytic reaction type chemical processing method of the SiC seed | species board | substrate 2 is performed in methanol aqueous solution adjusted to the predetermined addition amount. Thereby, the step height and terrace width of SiC seed substrate 2 can be controlled to predetermined values, and a desired SiC semiconductor crystal 3 can be formed.

<Other embodiments>
As mentioned above, although embodiment of this invention was described concretely, this invention is not limited to the above-mentioned embodiment, It can change variously in the range which does not deviate from the summary.

  For example, in the above-described embodiment, the main surface of the SiC semiconductor free-standing substrate whose lattice constant variation is within a predetermined range is the Si (0001) plane, but the C (000-1) plane or other low index Further, the main surface may be an inclined surface inclined at a predetermined off angle in a predetermined direction with respect to the Si (0001) surface or the like.

  In the above-described embodiment, the SiC semiconductor crystal 3 grown on the SiC seed substrate 2 is sliced to obtain a SiC semiconductor free-standing substrate. However, the SiC semiconductor substrate includes a SiC seed substrate, that is, a SiC seed substrate. A SiC semiconductor free-standing substrate may be constituted by the SiC semiconductor crystal grown thereon.

  In the above-described embodiment, an impurity (dopant) that imparts conductivity is added to the SiC semiconductor free-standing substrate. However, an SiC semiconductor free-standing substrate that does not intentionally add impurities may be used.

In the above-described embodiment, a Schottky barrier diode is formed using a SiC semiconductor free-standing substrate as the SiC semiconductor electronic device. However, the present invention is not limited to this. For example, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor: metal The present invention can be applied to oxide semiconductor field effect transistors (MISFETs), MISFETs (Metal-Insulator-Semiconductor FETs), MESFETs (Metal-Semiconductor FETs), and power applications. This is useful for semiconductor electronic devices.

  Further, in the above-described embodiment, Ar gas is used as the atmospheric gas when the SiC semiconductor crystal is manufactured by the SiC semiconductor crystal manufacturing apparatus. However, the atmospheric gas is not limited to this, for example, helium (He) gas, It is also possible to use an inert gas such as neon (Ne) gas or xenon (Xe) gas.

In the above-described embodiment, when forming the epitaxial layer for an electronic device, C ₃ H ₈ gas is used as the C source gas. However, the C source gas is not limited to this, for example, ethane (C ₂ H ₄ ) It is also possible to use other hydrocarbon gases such as gas. In addition to SiH ₄ gas, silicon hydride gas such as disilane (Si ₂ H ₆ ) gas, trisilane (Si ₃ H ₈ ) gas, silicon chloride gas, or the like is used as the Si source gas. Is also possible.

  In the above-described embodiment, the example of the SiC semiconductor free-standing substrate having a diameter of 2 inches has been described. However, the diameter of the SiC semiconductor free-standing substrate is preferably 2 inches or more. The diameter of the SiC semiconductor free-standing substrate depends on the diameter of the SiC seed substrate before smoothing used at the time of manufacture. By using a large-diameter SiC seed substrate, a large-diameter SiC semiconductor free-standing substrate can be obtained accordingly. .

  Next, examples according to the present invention will be described together with comparative examples.

(1) Shape evaluation of step terrace structure First, similarly to the smoothing process of the SiC seed substrate 2 according to the above-described embodiment, the main surface of the SiC seed substrate is smoothed using the photocatalytic reaction type chemical processing method. gave. The TiO ₂ thin film used as the photocatalytic thin film was formed by the magnetron sputtering method under the following conditions.
Processing pressure (total pressure): 3 Pa (Ar gas 100% atmosphere)
Substrate temperature: 300 ° C
Plasma output: 300W
Processing time: 24 minutes

As the SiC seed substrate, a 2 inch 4H—SiC substrate with no off-angle was used. The SiC seed substrate was smoothed by a photocatalytic reaction type chemical processing method in aqueous solutions having different methanol concentrations to prepare samples 1 to 3 of the SiC seed substrate according to the example. Detailed conditions at the time of smoothing are shown below.
Methanol concentration Sample 1: 1 vol%
Sample 2: 15 vol%
Sample 3: 40 vol%
UV irradiation time: 2 hours SiO ₂ removal: 25% HF aqueous solution

Samples 1 to 3 of the SiC seed substrate according to the above example, and an SiC seed substrate not subjected to smoothing processing as a comparative example are observed with an atomic force microscope (AFM), and the step height and terrace width are determined. It was measured. As shown in FIG. 5, the measurement locations in each sample according to the example and the comparative example were a total of five locations in the center of each substrate surface and 15 mm above, below, left, and right from the center. The step average height and terrace average width in each sample according to the example and the comparative example are shown below.
Sample 1 (1 vol% methanol aqueous solution)
Step average height: about 26.3 nm, terrace average width: ≧ 35 nm
Sample 2 (15 vol% methanol aqueous solution)
Step average height: about 0.45 nm, terrace average width: ≧ 335 nm
Sample 3 (40 vol% methanol aqueous solution)
Step average height: about 0.29 nm, terrace average width: ≧ 1250 nm
Comparative example (without smoothing)
Neither step nor terrace is observed

  The observation of the SiC seed substrate samples 1 to 3 and the comparative example according to the example revealed that the step terrace structure that was not recognized before the smoothing process was formed by the smoothing process. Furthermore, it was found that as the concentration of methanol was increased, the step height decreased, the terrace width increased, and the smoothness of the substrate surface increased.

(2) Evaluation of variation in lattice constant Next, by using the same method as the above-described embodiment, samples 1 to 3 of the SiC seed substrate according to the example and the main surface (Si (0001) surface of the SiC seed substrate according to the comparative example) ), A SiC semiconductor crystal was grown. The growth conditions of the SiC semiconductor crystal were the same for all samples and comparative examples according to the examples as follows.
High-purity graphite crucible pressure: 15.0 kPa
Atmospheric gas: High purity Ar gas (purity 99.9995%)
Impurity: Nitrogen at 50% concentration (N ₂ gas is added when Ar gas is introduced)
Preheating temperature: 2000 ° C
Processing temperature: 2350 ° C. (processing time: about 16 hours)
* Temperature gradient in crucible made of high purity graphite: 10 ° C / cm)

  The SiC semiconductor crystal ingots thus obtained were cut out to form SiC semiconductor free-standing substrates.

About each SiC semiconductor self-supporting substrate obtained from the samples 1 to 3 according to the example and the SiC seed substrate according to the comparative example, the interplanar spacing d ₀₀₀₆ of SiC (0006) and SiC by X-ray diffraction as in the above-described embodiment. The in-plane distribution of the plane spacing d _20-24 of (20-24) was measured, and the variation of the a-axis length was calculated. The results are shown below.
Sample 1 (1 vol% methanol aqueous solution): ± 54.23 ppm
Sample 2 (15 vol% methanol aqueous solution): ± 23.75 ppm
Sample 3 (40 vol% methanol aqueous solution): ± 12.46 ppm
Comparative example (without smoothing): ± 65.63 ppm

  Variations in the lattice constants of SiC semiconductor free-standing substrates obtained from samples 1 to 3 of the SiC seed substrate according to the embodiment subjected to the smoothing processing, more specifically, variations in the a-axis length are not subjected to the smoothing processing. It was found that it was reduced compared to the comparative example. In addition, the SiC semiconductor free-standing substrate obtained by using a sample smoothed in a high-concentration methanol aqueous solution and having a higher smoothness of the Si surface of the SiC seed substrate (surface to be smoothed and the surface on which the SiC semiconductor crystal is formed). It was found that the variation of the lattice constant of the was reduced.

(3) Evaluation of non-defective product ratio of Schottky barrier diode On each SiC semiconductor free-standing substrate obtained from the SiC seed substrate samples 1 to 3 according to the example and the SiC seed substrate according to the comparative example, as in the above embodiment, A SiC layer was formed by an epitaxial growth method. As described below, the SiC layer growth conditions were the same for all SiC semiconductor free-standing substrates.
High-purity graphite crucible pressure: 13.3 kPa
Carrier gas: H ₂ gas 20 slm
C source gas: C ₃ H ₈ gas 2.4 sccm
Si source gas: SiH ₄ gas 6.0 sccm (C / Si ratio: 1.2)
Dopant gas: N ₂ gas 1.0 sccm
(Impurity concentration: 1.1 × 10 ¹⁶ cm ⁻³ )
Preheating temperature: 1400 ° C (holding time: 5 minutes)
Processing temperature: 1500 ° C (processing time: 30 minutes)

  Under the above conditions, a SiC layer having a layer thickness of 6.0 μm was formed. Thereafter, each electrode was formed and diced by the same method as in the above-described embodiment to obtain a Schottky barrier diode.

For each of the Schottky barrier diodes thus obtained, current / voltage measurement (IV measurement) is performed to investigate the leakage current value, the breakdown voltage at the reverse voltage, and its variation range, and the Schottky barrier. The quality of the diode was judged. In the determination, a non-defective product having a current value of 1 μA / cm ² or less when a reverse voltage of 200 V was applied to each Schottky barrier diode was determined as non-defective, and a non-defective product ratio (%) was calculated.

  A Schottky barrier diode using a SiC semiconductor free-standing substrate with less variation in lattice constant had a lower leakage current value and a higher breakdown voltage. Moreover, the variation range of pressure resistance was narrow and the yield rate was high. The following table shows the variation range (V) of the withstand voltage and the non-defective product rate (%) together with the measurement data shown so far.

  From the above results, it was found that the variation in the characteristics of the SiC semiconductor electronic device obtained from the SiC semiconductor free-standing substrate can be reduced by setting the variation in the lattice constant in the main surface of the SiC semiconductor free-standing substrate to a predetermined value or less. From the evaluation results described above, it can be seen that the non-defective product ratio of the Schottky barrier diode is drastically decreased when the variation in the lattice constant exceeds ± 55 ppm. Therefore, the allowable range of variation in lattice constant is, for example, ± 55 ppm or less, preferably ± 25 ppm or less, more preferably ± 15 ppm or less, from the results of Samples 1 to 3 according to the examples.

  From the above results, it was found that smoothing the SiC seed substrate by the photocatalytic reaction type chemical processing method is effective for reducing the variation of the lattice constant. Furthermore, it was found that the smoothness (step height and terrace width) of the SiC seed substrate can be controlled by adjusting the methanol concentration in the aqueous solution to be smoothed.

1 Main surface (Si surface)
2 SiC seed substrate 3 SiC semiconductor crystal 31 Ohmic electrode 32 Schottky electrode 33 SiC semiconductor crystal substrate 34 SiC layer (epitaxial layer for electronic device)

Claims (4)

A SiC semiconductor free-standing substrate made of a SiC semiconductor crystal,
The SiC semiconductor crystal is hexagonal,
When the variation of the lattice constant of the SiC semiconductor crystal is a value obtained by dividing the standard deviation of the lattice constant in the a-axis direction in the main surface of the SiC semiconductor free-standing substrate by the average value of the lattice constant in the a-axis direction, A SiC semiconductor free-standing substrate characterized in that variation in lattice constant is ± 55 ppm or less. 2. The SiC semiconductor free-standing substrate according to claim 1, wherein the variation in the lattice constant is a variation in a main surface excluding a region from the outermost periphery of the SiC semiconductor free-standing substrate to a radius of 2 mm inside. 3. . The SiC semiconductor free-standing substrate according to claim 1, wherein an impurity that controls conductivity of the SiC semiconductor crystal is added to the SiC semiconductor crystal. An SiC semiconductor electronic device comprising an epitaxial layer for an electronic device formed on the SiC semiconductor free-standing substrate according to claim 1.

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