JP2012104709A - Lead frame and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the reliability while reducing the size and thickness of a semiconductor device where a semiconductor chip is bonded to a planar die pad by solder.SOLUTION: A lead frame comprises: a die pad 3 to which a semiconductor chip 2 is bonded by solder 4; and, in the region of arranging the semiconductor chip 2 on the flat upper surface 3a of the die pad 3, a recess 12 recessed from the upper surface 3a and receiving the solder 4. In the lead frame, the recess 12 is defined by a flat bottom 12a located lower than the upper surface 3a of the die pad 3 and extending in parallel therewith, and an inclined plane 12b extending from the circumference of the bottom 12a toward the upper surface 3a of the die pad 3 to recede gradually from the arranging region.

Description

  The present invention relates to a lead frame and a semiconductor device.

As shown in FIG. 8, for example, a conventional semiconductor device includes a semiconductor chip 102 bonded to a die pad 103 with solder 104 (see Patent Document 1). When the semiconductor chip 102 is bonded to the die pad 103 in manufacturing the semiconductor device, first, solder 104 (solder paste) is applied to the upper surface 103a of the die pad 103 by screen printing or the like, and then the semiconductor chip 102 is placed on the die pad 103. To place. Thereafter, the semiconductor chip 102 is bonded to the die pad 103 by melting the solder 104 by reflow.
In this type of semiconductor device, it is necessary to ensure a sufficient thickness of the solder 104 interposed between the die pad 103 and the semiconductor chip 102 so as to ensure the reliability.

JP 2006-303216 A

Incidentally, in order to ensure the thickness of the solder 104, a sufficient amount of solder 104 must be applied to the upper surface 103a of the die pad 103. However, as shown in FIG. There is a case where a desired thickness of the solder 104 cannot be secured due to spreading on the upper surface 103a, and there is a problem that the reliability of the semiconductor device cannot be secured.
Further, when the amount of the solder 104 applied to the upper surface 103a of the die pad 103 is further increased so that the thickness of the solder 104 can be secured even if the solder 104 spreads out during reflow, the solder 104 that has spread out becomes the side surface 103b of the die pad 103. May be reached (see FIG. 9). In this case, the reliability of the semiconductor device may be reduced, for example, the adhesiveness between the mold resin for sealing the semiconductor chip 102 and the die pad 103 and the die pad 103 may be reduced.
In Patent Document 1, it is considered that a dam portion having a rectangular frame shape in plan view protruding from the upper surface 103 a of the die pad 103 is provided around the arrangement region of the semiconductor chip 102. However, even with such a configuration, since the solder 104 and the semiconductor chip 102 are sequentially stacked on the upper surface 103a of the die pad 103, there remains a problem that miniaturization and thinning of the semiconductor device are hindered. .

  The present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a semiconductor device capable of improving reliability and miniaturizing / thinning, and a lead frame used for manufacturing the semiconductor device. And

  In order to solve this problem, a lead frame according to the present invention includes a plate-like die pad for joining semiconductor chips with solder, and is recessed from the upper surface in a region where the semiconductor chip is arranged in a flat upper surface of the die pad. A recess for receiving the solder is formed.

When a semiconductor device is manufactured using the lead frame having the above-described configuration, paste solder is applied so as to be accommodated in the recess, and then the semiconductor chip is disposed on the solder. Thereafter, the solder is melted by reflow. However, since the solder is accommodated in the recess, the solder does not spread out as in the conventional case. Therefore, when the semiconductor chip is bonded to the die pad, the thickness of the solder interposed between the die pad and the semiconductor chip can be sufficiently ensured. That is, the reliability of the semiconductor device can be improved.
Further, since the solder is accommodated in the concave portion of the die pad, the thickness dimension of the configuration in which the semiconductor chip is stacked on the die pad can be reduced, and the semiconductor device can be reduced in size and thickness.

  In the lead frame, the concave portion is positioned lower than the top surface of the die pad and is parallel to the top surface, and away from the placement region from the periphery of the bottom surface toward the top surface of the die pad. It is preferable that it is comprised by the inclined surface extended like this.

  When the semiconductor chip is joined to the die pad by reflow, the solder in the recess expands and contracts, but when the solder contracts, stress may be generated in the solder in the recess. Also, when the semiconductor device is heated and cooled by conducting a thermal cycle test or thermal fatigue test on a semiconductor device manufactured with a lead frame having a recess, the difference in the material between the lead frame and the solder Due to the difference in thermal expansion coefficient between the two, stress may be generated in the solder accommodated in the recess.

On the other hand, by forming an inclined surface in the recess as in the above configuration, the stress applied to the solder in the recess during the reflow or heating / cooling of the semiconductor device is reduced, and the solder in the recess is cracked. It can be prevented from occurring. Further, it is possible to prevent the stress generated in the solder in the recess from being transmitted to the semiconductor chip and causing cracks in the semiconductor chip.
Further, as will be described later, when the shape of the recess in plan view is larger than the semiconductor chip placement region, the semiconductor chip floats on the molten solder during reflow, and therefore contacts the periphery of the recess in plan view. There are things to do. Here, if the inclined surface is formed in the recess, the stress applied to the semiconductor chip when the semiconductor chip comes into contact with the periphery of the recess during reflow can be reduced.
From the above, the reliability of the semiconductor device can be further improved.

Furthermore, in the lead frame, it is further preferable that the inclined surface is curved so as to bulge inside the recess, and the inclined surface and the upper surface of the die pad are smoothly connected.
In this configuration, the stress generated in the portion located near the corner between the inclined surface of the recess and the upper surface of the die pad among the solder in the recess can be particularly relieved, and as a result, the solder located near the corner is cracked. This can be particularly prevented.

In the lead frame, it is preferable that the shape of the concave portion viewed from the upper surface side of the die pad is larger than the arrangement area so as to include the entire arrangement area of the semiconductor chip.
In this configuration, part of the solder contained in the recess is exposed to the outside, so that the air (void) interposed between the solder and between the solder and the semiconductor chip can be easily removed outward during the reflow described above. Can escape.

Further, in the lead frame, it is preferable that the shape of the recess in plan view is similar to the shape of the semiconductor chip in plan view.
In this case, in the lead frame, it is more preferable that the semiconductor chip and the recess are formed in a polygonal shape in plan view, and an inscribed circle of the recess in plan view is smaller than a circumscribed circle of the semiconductor chip.
With this configuration, it is possible to prevent the semiconductor chip that floats on the molten solder from rotating during reflow. That is, it can suppress that the direction of a semiconductor chip shifts with melting of solder.

Furthermore, in the lead frame, it is preferable that the corners of the recesses in plan view are rounded.
In this configuration, when the semiconductor chip that floats on the solder melted during reflow moves and the corner of the semiconductor chip in plan view comes into contact with the corner of the recess, the stress applied to the corner of the semiconductor chip Can be relaxed. Therefore, it is possible to prevent cracks from occurring at the corners of the semiconductor chip.

Further, in the lead frame, a relief groove that is recessed from the inner side surface of the concave portion in a direction along the upper surface of the die pad and is exposed outward from the upper surface of the die pad is formed in a corner portion of the concave portion in plan view. More preferably.
In this configuration, even if the semiconductor chip that floats on the solder melted during reflow moves toward the corner of the recess, the corner of the semiconductor chip in plan view can enter the escape groove. It can be prevented that it abuts against the corner of itself. Therefore, it is possible to reliably prevent cracks from occurring at the corners of the semiconductor chip.

  In the lead frame, the recess may be formed by coining.

  The semiconductor device of the present invention is manufactured using the lead frame, and the semiconductor chip is bonded to the upper surface side of the die pad via the solder accommodated in the recess of the die pad. It is characterized by that.

  According to the present invention, the reliability of a semiconductor device can be improved, and the semiconductor device can be reduced in size and thickness.

1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a schematic plan view showing a state where the semiconductor device shown in FIG. 1 is viewed from the upper surface side of the die pad. It is a schematic sectional drawing which shows the semiconductor device which concerns on 2nd embodiment of this invention. It is a schematic sectional drawing which shows the semiconductor device which concerns on 3rd embodiment of this invention. It is a schematic plan view which shows the semiconductor device which concerns on 4th embodiment of this invention. It is a schematic plan view which shows the semiconductor device which concerns on 5th embodiment of this invention. It is a schematic sectional drawing which shows the semiconductor device which concerns on other embodiment of this invention. It is a schematic sectional drawing which shows an example of the conventional semiconductor device. It is a schematic sectional drawing which shows one of the problems which arise in the conventional semiconductor device.

[First embodiment]
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS.
As shown in FIGS. 1 and 2, the semiconductor device according to this embodiment is manufactured by a lead frame including a plate-like die pad 3 on which a semiconductor chip 2 is mounted, and the upper surface 3 a side of the die pad 3 by a solder 4. The semiconductor chip 2 is joined to each other.
Note that the lead frame includes a known lead or the like that is electrically connected to the semiconductor chip 2 by a connector such as a bonding wire in addition to the die pad 3 by performing press processing or etching processing on a conductive plate material. In the present embodiment, description of other structures of the lead frame excluding the die pad 3 is omitted. In addition to the semiconductor chip 2, die pad 3 and solder 4, the semiconductor device includes, for example, the above-described well-known leads and connectors, and well-known molds for sealing the semiconductor chip 2, die pad 3, leads and connectors. Although resin etc. may be provided, in this embodiment, description of other composition of a semiconductor device except semiconductor chip 2, die pad 3, and solder 4 is omitted.

The semiconductor chip 2 of this embodiment is formed in a rectangular plate shape in plan view. The semiconductor chip 2 may have a structure in which electrode pads are formed on both the upper surface and the lower surface, such as a large current transistor, or a structure in which a plurality of electrode pads are provided only on the upper surface. .
The die pad 3 constituting the lead frame of this embodiment is formed with a recess 11 that is recessed from the flat upper surface 3a. The recess 11 is formed in a region (arrangement region) in which the semiconductor chip 2 is disposed on the upper surface 3 a of the die pad 3, and the solder 4 for joining the semiconductor chip 2 is accommodated in the recess 11. Yes.

The planar view shape of the recess 11 viewed from the upper surface 3 a side of the die pad 3 is formed in a rectangular shape similar to the planar view shape of the semiconductor chip 2. The size of the recess 11 in plan view is larger than the arrangement area so as to include the entire arrangement area of the semiconductor chip 2. The size of the recess 11 in plan view is set so that the inscribed circle C1 of the recess 11 in plan view is smaller than the circumscribed circle C2 (in the arrangement region) of the semiconductor chip 2.
Furthermore, the concave portion 11 of the present embodiment is positioned lower than the upper surface 3a of the die pad 3 and is parallel to the upper surface 3a, and the inner surface of the concave portion 11 rises vertically from the periphery of the bottom surface 11a toward the upper surface 3a of the die pad 3. It is defined by the side surface 11b. That is, the concave portion 11 of the present embodiment is formed in a rectangular shape in a sectional view in which the opening area of the concave portion 11 opening in the upper surface 3a of the die pad 3 is equal to the area of the bottom surface 11a.

  The concave portion 11 of the present embodiment can be formed by coining processing or etching processing. In addition, when forming the recessed part 11 by coining process, the formation part of the recessed part 11 should just be compressed among the die pads 3, and the thickness of the formation part of the recessed part 11 should be made thinner than the thickness of the other part of the die pad 3. . The formation of the recess 11 can be performed before or after forming the die pad 3 or the lead on the conductive plate material, or simultaneously.

When a semiconductor device is manufactured using the lead frame configured as described above, paste solder 4 is applied so as to be accommodated in the recess 11, and then the semiconductor chip 2 is disposed on the solder 4. Good. Thereafter, the solder 4 is melted by reflow. However, since the solder 4 is accommodated in the recess 11, the solder 4 does not spread out as in the conventional case.
Therefore, according to the lead frame of the present embodiment, the thickness of the solder 4 interposed between the die pad 3 and the semiconductor chip 2 can be sufficiently secured in a state where the semiconductor chip 2 is bonded to the die pad 3. That is, the reliability of the semiconductor device can be improved.
Further, since the solder 4 is accommodated in the recess 11 of the die pad 3, the thickness dimension of the configuration in which the semiconductor chip 2 is stacked on the die pad 3 can be suppressed, and the semiconductor device can be reduced in size and thickness. You can also plan.

Furthermore, since the planar view shape of the recess 11 is formed larger than the arrangement region of the semiconductor chip 2, even if the semiconductor chip 2 is arranged on the solder 4, a part of the solder 4 is exposed to the outside. At the time of reflow, the air (void) interposed between the solder 4 and between the solder 4 and the semiconductor chip 2 can be easily released to the outside.
Further, since the shape of the recess 11 in plan view is formed larger than the arrangement region of the semiconductor chip 2, the semiconductor chip 2 floats on the molten solder 4 during reflow. On the other hand, in the lead frame of this embodiment, the shape of the recess 11 in plan view is formed in a polygonal shape similar to the shape of the semiconductor chip 2 in plan view, and the inscribed circle C1 of the recess 11 in plan view is a semiconductor. Since it is set smaller than the circumscribed circle C2 of the chip 2, even if the semiconductor chip 2 floats on the molten solder 4, it can be prevented from rotating on the solder 4. In other words, it is possible to suppress the orientation of the semiconductor chip 2 from being shifted as the solder 4 melts. Note that the rotation of the semiconductor chip 2 can be suppressed because, after the semiconductor chip 2 is bonded to the die pad 3, a connector such as a bonding wire is individually bonded to a plurality of electrode pads formed on the upper surface of the semiconductor chip 2. This is particularly effective for the configuration to be performed.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to FIG. Here, only differences from the first embodiment will be described, and the same components and manufacturing methods as those of the lead frame and semiconductor device of the first embodiment will be denoted by the same reference numerals, and the description thereof will be omitted. To do.
As shown in FIG. 3, the recess 12 of the die pad 3 constituting the lead frame according to this embodiment is formed to be recessed from the upper surface 3a of the die pad 3 as in the first embodiment. The recess 12 is positioned lower than the upper surface 3a of the die pad 3 and is parallel to the upper surface 3a. The recess 12 is separated from the arrangement region of the semiconductor chip 2 from the periphery of the bottom surface 12a toward the upper surface 3a of the die pad 3. And a flat inclined surface (inner surface) 12b extending in this manner. That is, the concave portion 12 of the present embodiment is formed in a trapezoidal shape in a sectional view in which the opening area of the concave portion 12 opening in the upper surface 3a of the die pad 3 is larger than the area of the bottom surface 12a.

And the planar view shape of this recessed part 12 is formed in the rectangular shape similar to the planar view shape of the semiconductor chip 2 similarly to 1st embodiment. That is, the opening and bottom surface 12a of the recess 12 are both formed in a rectangular shape in plan view.
Also, the size of the recess 12 in plan view is formed larger than the arrangement area so as to include the entire arrangement area of the semiconductor chip 2 as in the first embodiment. More specifically, the sizes of the opening and the bottom surface 12a of the recess 12 in plan view are both set larger than the arrangement region of the semiconductor chip 2.
Further, the size of the opening of the recess 12 in plan view is such that the inscribed circle C1 of the opening of the recess 12 in plan view is smaller than the circumscribed circle C2 of the semiconductor chip 2 as in the first embodiment. Is set. Note that the size of the bottom surface 12a of the recess 12 in plan view is such that the inscribed circle C1 of the bottom surface 12a of the recess 12 in plan view is smaller than the circumscribed circle C2 of the semiconductor chip 2 as in the case of the opening. It may be set, but is not limited to this.

The lead frame according to this embodiment has the same effects as the first embodiment.
Further, according to this lead frame, the stress applied to the solder 4 accommodated in the recess 12 can be relaxed. More specifically, when the semiconductor chip 2 is joined to the die pad 3 by reflow, the solder 4 in the recess 12 expands and contracts, but when the solder 4 contracts, stress is applied to the solder 4 in the recess 12. May occur. Further, when the semiconductor device is heated and cooled by performing a thermal cycle test or a thermal fatigue test on the semiconductor device manufactured by the lead frame having the recess 12, the material of the lead frame and the solder 4 is changed. Stress may occur in the solder 4 in the recess 12 due to the difference in thermal expansion coefficient between the two based on the difference.

On the other hand, by forming the inclined surface 12b in the concave portion 12 as in the above configuration, the stress applied to the solder 4 in the concave portion 12 is relieved during reflow or heating and cooling of the semiconductor device. It is possible to prevent the solder 4 from being cracked. It is also possible to prevent the stress generated in the solder 4 in the recess 12 from being transmitted to the semiconductor chip 2 and causing cracks in the semiconductor chip 2.
Furthermore, according to the lead frame of this embodiment, even if the semiconductor chip 2 that floats on the solder 4 melted during reflow moves and contacts the periphery of the recess 12 in plan view, the periphery of the recess 12 is inclined. By being 12b, the stress applied to the semiconductor chip 2 when the semiconductor chip 2 comes into contact with the periphery of the recess 12 can be relaxed.
From the above, the configuration of this embodiment can further improve the reliability of the semiconductor device.

[Third embodiment]
Next, a third embodiment of the present invention will be described with reference to FIG. Here, only differences from the second embodiment will be described, and the same components and manufacturing methods as those of the lead frame and semiconductor device of the second embodiment will be denoted by the same reference numerals, and the description thereof will be omitted. To do.
As shown in FIG. 4, the recess 13 of the die pad 3 constituting the lead frame according to this embodiment is located lower than the upper surface 3a of the die pad 3 and is flat and parallel to the upper surface 3a, as in the second embodiment. The bottom surface 13a and an inclined surface (inner side surface) 13b extending away from the arrangement region of the semiconductor chip 2 from the periphery of the bottom surface 13a toward the upper surface 3a of the die pad 3 are configured. In addition, the planar view shape and magnitude | size of the opening part and this bottom face 13a of this recessed part 13 are all the same as the recessed part 12 of 2nd embodiment.
In this embodiment, the inclined surface 13b is curved so as to bulge inside the recess 13, and the inclined surface 13b and the upper surface 3a of the die pad 3 are smoothly connected. That is, the corners of the inclined surface 13b and the upper surface 3a of the die pad 3 are rounded. In the illustrated example, the corners of the inclined surface 13b and the bottom surface 13a are not rounded, but may be rounded, for example.

  According to the lead frame of this embodiment, in addition to the same effects as those of the second embodiment, of the solder 4 accommodated in the recess 13, the corner between the inclined surface 13 b of the recess 13 and the upper surface 3 a of the die pad 3. The stress generated in the portion located near the portion can be particularly relieved. Therefore, it is possible to particularly prevent cracks from occurring in the solder 4 located in the vicinity of the corner.

[Fourth embodiment]
Next, a fourth embodiment of the present invention will be described with reference to FIG. Here, only differences from the first to third embodiments will be described, and the same components and manufacturing methods as those of the lead frame and semiconductor device of the first to third embodiments will be denoted by the same reference numerals. The description is omitted.
As shown in FIG. 5, the concave portion 14 of the die pad 3 constituting the lead frame according to this embodiment is formed to be recessed from the upper surface 3a of the die pad 3 as in the first to third embodiments. The sectional view of the recess 14 may be formed in a rectangular shape like the recess 11 in the first embodiment, or in a trapezoidal shape like the recesses 12 and 13 in the second and third embodiments. May be.
And in the recessed part 14 of this embodiment, although the planar view shape is formed in the rectangular shape similar to the planar view shape of the semiconductor chip 2 similarly to 1st-3rd embodiment, the recessed part 14 planarly viewed The corner portion 14c is rounded. In addition, the magnitude | size of the recessed part 14 planarly viewed is the same as that of the recessed parts 11-13 of 1st-3rd embodiment.

Therefore, according to the lead frame of this embodiment, the same effects as those of the first to third embodiments can be obtained.
Also, according to this lead frame, when the semiconductor chip 2 that floats on the solder 4 melted during reflow moves, the corner of the semiconductor chip 2 in plan view comes into contact with the corner 14c of the recess 14 In addition, the stress applied to the corners of the semiconductor chip 2 can be particularly relaxed. Therefore, it is possible to prevent cracks from occurring at the corners of the semiconductor chip 2.

[Fifth embodiment]
Next, a fifth embodiment of the present invention will be described with reference to FIG. Here, only differences from the first to third embodiments will be described, and the same components and manufacturing methods as those of the lead frame and semiconductor device of the first to third embodiments will be denoted by the same reference numerals. The description is omitted.
As shown in FIG. 6, the concave portion 15 of the die pad 3 constituting the lead frame according to this embodiment is formed to be recessed from the upper surface 3a of the die pad 3 as in the first to third embodiments. The sectional view of the recess 15 may be formed in a rectangular shape like the recess 11 in the first embodiment, or in a trapezoidal shape like the recesses 12 and 13 in the second and third embodiments. May be.
And in the recessed part 15 of this embodiment, although the planar view shape is formed in the rectangular shape similar to the planar view shape of the semiconductor chip 2 similarly to 1st-3rd embodiment, the recessed part 15 planarly viewed An escape groove 21 that is recessed from the inner side surface 15 b of the recess 15 in the direction along the upper surface 3 a of the die pad 3 is formed at the corner portion. The escape groove 21 is exposed outward from the upper surface 3 a of the die pad 3. In the illustrated example, the escape groove 21 is formed in a circular shape in plan view, but may be formed in an arbitrary plan view shape such as a polygonal shape.
The size of the recess 15 formed as described above in plan view is the same as that of the recesses 11 to 13 of the first to third embodiments.

Therefore, according to the lead frame of this embodiment, the same effects as those of the first to third embodiments can be obtained.
Furthermore, according to this lead frame, even if the semiconductor chip 2 that floats on the solder 4 melted during reflow moves toward the corner of the recess 15, the corner of the semiconductor chip 2 in plan view is a relief groove. 21 can be prevented from coming into contact with the corner of the recess 15 itself. Therefore, it is possible to reliably prevent cracks from occurring at the corners of the semiconductor chip 2.

Although the five embodiments according to the lead frame and the semiconductor device of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are made without departing from the spirit of the present invention. It is possible.
For example, in the second and third embodiments, the sizes of the bottom surfaces 12a and 13a of the recesses 12 and 13 are set larger than the arrangement area of the semiconductor chip 2, but are set smaller than the arrangement area, for example. Also good. That is, the periphery of the semiconductor chip 2 in plan view may be located on the inclined surfaces 12b and 13b, for example.

Moreover, in the recessed parts 11-15 of all the embodiment mentioned above, although the whole bottom face 11a-13a is made into the flat surface, it does not restrict to this. For example, as shown in FIG. 7, an annular groove 22 that is recessed from the bottom surface 16 a may be formed in the peripheral region of the bottom surface 16 a of the recess 16 that is recessed from the upper surface 3 a of the die pad 3. The shape and size of the annular groove 22 are preferably set so that the annular groove 22 overlaps the periphery of the semiconductor chip 2 in plan view as shown in the drawing, but is not limited thereto.
Note that the annular groove 22 in the illustrated example has a V-shaped cross section, but may have an arbitrary cross-sectional shape such as a rectangular shape or an arc shape. Moreover, although the recessed part 16 of the example of illustration becomes cross-sectional view shape which has the inclined surface (inner surface) 16b similarly to 2nd embodiment, it becomes cross-sectional view shape similar to 1st, 3rd embodiment, for example. It may be.

Furthermore, the size of the recesses 11 to 16 in plan view is not limited to that of the above embodiment. That is, the size of the recesses 11 to 16 in plan view may be set so that, for example, the inscribed circle C1 of the recesses 11 to 16 in plan view is equal to or larger than the circumscribed circle C2 of the semiconductor chip 2. Absent.
Further, the size of the recesses 11 to 16 in plan view is not limited to be set larger than the arrangement region of the semiconductor chip 2, so that at least the semiconductor chip 2 can be bonded to the solder 4 accommodated in the recesses 11 to 16. Should be set. Therefore, the size of the concave portions 11 to 16 in plan view may be set to be equal to or smaller than the arrangement region of the semiconductor chip 2, for example.

  Furthermore, the entire recesses 11 to 16 are not limited to overlap with the arrangement region of the semiconductor chip 2. Only the portion may overlap with the arrangement region of the semiconductor chip 2. In this case, even when the size of the recesses 11 to 16 in plan view is smaller than the arrangement region of the semiconductor chip 2, the semiconductor chip 2 is arranged on the recesses 11 to 16 as in the above embodiment. Since a part of the solder 4 accommodated in the recesses 11 to 16 is exposed to the outside, voids existing inside the solder 4 and the like during reflow can be easily released to the outside.

In all the embodiments described above, only the semiconductor chip 2 having a rectangular shape in plan view has been described. However, the present invention can be applied to a semiconductor chip having an arbitrary plan view shape. That is, the planar view shape of the semiconductor chip may be, for example, a circular shape or an arbitrary polygonal shape.
In this case, the shape of the recess formed in the die pad 3 in plan view may be set to an arbitrary shape unrelated to the shape of semiconductor chip in plan view, but may be similar to the shape of semiconductor chip in plan view. More preferred.

  Further, when the semiconductor chip has a polygonal shape in plan view as in the above embodiment, the shape in plan view of the recess formed in the die pad 3 is similar to the shape in plan view of the semiconductor chip, as in the above embodiment. In addition, it is more preferable that the inscribed circle of the concave portion in plan view is set to be smaller than the circumscribed circle of the semiconductor chip.

2 Semiconductor chip 3 Die pad 3a Upper surface 4 Solder 11, 12, 13, 14, 15, 16 Recess 11a, 12a, 13a, 16a Bottom surface 11b, 15b Inner side surface 12b, 13b, 16b Inclined surface (inner side surface)
14c Corner portion 21 Relief groove 22 Annular groove C1 Inscribed circle C2 circumscribed circle

Claims (10)

A lead frame having a plate-like die pad for joining semiconductor chips by solder,
A lead frame, wherein a concave portion that is recessed from the upper surface and accommodates the solder is formed in an arrangement region of the semiconductor chip in a flat upper surface of the die pad.   The concave portion is configured by a flat bottom surface that is positioned lower than the top surface of the die pad and parallel to the top surface, and an inclined surface that extends away from the placement region from the periphery of the bottom surface toward the top surface of the die pad. The lead frame according to claim 1, wherein the lead frame is formed.   3. The lead frame according to claim 2, wherein the inclined surface is curved so as to bulge inside the concave portion, and the inclined surface and the upper surface of the die pad are smoothly connected.   4. The planar view shape of the recess as viewed from the upper surface side of the die pad is formed larger than the arrangement region so as to include the entire arrangement region of the semiconductor chip. The lead frame according to any one of the above.   The lead frame according to claim 4, wherein a shape of the recess in plan view is similar to a shape of the semiconductor chip in plan view. The semiconductor chip and the recess are formed in a polygonal shape in plan view,
The lead frame according to claim 4, wherein an inscribed circle of the concave portion in plan view is smaller than an inscribed circle of the semiconductor chip.   The lead frame according to claim 6, wherein corners of the concave portion in plan view are rounded.   The corner of the concave portion in plan view is recessed in the direction along the upper surface of the die pad from the inner surface of the concave portion, and an escape groove is formed to be exposed outward from the upper surface of the die pad. The lead frame according to claim 6.   The lead frame according to claim 1, wherein the recess is formed by coining. A semiconductor device manufactured using the lead frame according to any one of claims 1 to 9,
A semiconductor device, wherein a semiconductor chip is bonded to the upper surface side of the die pad through solder accommodated in a recess of the die pad.

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