JP2012145775A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of suppressing reduction in a numerical aperture.SOLUTION: A liquid crystal display device comprises: a first substrate including a signal line linearly extending through centers of respective pixels, an insulating film covering the signal line, and a belt-shaped pixel electrode positioned directly above the signal line with the insulating film and linearly extending substantially parallel to the signal line; a second substrate including belt-shaped counter electrodes each disposed between adjacent pixels and linearly extending substantially parallel to the pixel electrode; and a liquid crystal layer held between the first substrate and the second substrate.

Description

  Embodiments described herein relate generally to a liquid crystal display device.

  2. Description of the Related Art In recent years, flat display devices have been actively developed. In particular, liquid crystal display devices have attracted particular attention because of their advantages such as light weight, thinness, and low power consumption. In particular, an active matrix liquid crystal display device in which a switching element is incorporated in each pixel has a structure using a lateral electric field (including a fringe electric field) such as an IPS (In-Plane Switching) mode or an FFS (Fringe Field Switching) mode. Attention has been paid. Such a horizontal electric field mode liquid crystal display device includes a pixel electrode and a counter electrode formed on an array substrate, and switches liquid crystal molecules with a horizontal electric field substantially parallel to the main surface of the array substrate.

  On the other hand, a technique for switching liquid crystal molecules by forming a lateral electric field or an oblique electric field between a pixel electrode formed on an array substrate and a counter electrode formed on the counter substrate has been proposed.

JP 2009-192822 A JP-A-9-160041

  An object of the present embodiment is to provide a liquid crystal display device capable of suppressing a reduction in aperture ratio.

According to this embodiment,
A signal line that extends straight through the center of each pixel, an insulating film that covers the signal line, and a straight line that is positioned directly above the signal line through the insulating film and substantially parallel to the signal line A first substrate including a strip-shaped pixel electrode extending; and a second substrate including a strip-shaped counter electrode disposed between adjacent pixels and extending in a straight line substantially parallel to the pixel electrode; A liquid crystal display device comprising: a liquid crystal layer held between the first substrate and the second substrate is provided.

According to this embodiment,
A gate wiring extending along the first direction, a source wiring extending along the second direction passing through the center of each pixel and intersecting the first direction, and electrically connected to the gate wiring and the source wiring A switching element, an insulating film covering the source wiring, and a strip that is electrically connected to the switching element and is located immediately above the source wiring through the insulating film and extends in the second direction A first substrate including a pixel electrode, a second substrate including a strip-shaped counter electrode that is disposed between pixels adjacent in the first direction and extends along the second direction, and the first substrate There is provided a liquid crystal display device comprising a liquid crystal layer held between a substrate and the second substrate.

FIG. 1 is a diagram schematically showing a configuration of a liquid crystal display device according to the present embodiment. FIG. 2 is a diagram schematically showing a configuration and an equivalent circuit of the liquid crystal display panel shown in FIG. FIG. 3 is a plan view schematically showing the structure of the array substrate AR when the pixels of the liquid crystal display panel shown in FIG. 2 are viewed from the counter substrate side. FIG. 4 is a plan view schematically showing the pixel structure on the counter substrate of the liquid crystal display panel shown in FIG. FIG. 5 schematically shows a cross-sectional structure taken along line VV including the switching elements of the array substrate shown in FIG. FIG. 6 is a diagram schematically showing a cross-sectional structure of the pixel including the counter electrode shown in FIG. 4 taken along line VI-VI. FIG. 7 is a diagram schematically showing a cross-sectional structure including a pixel electrode and a counter electrode of a liquid crystal display panel according to a modification of the present embodiment.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a diagram schematically illustrating a configuration of a liquid crystal display device according to the present embodiment.

  That is, the liquid crystal display device 1 includes an active matrix type liquid crystal display panel LPN, a drive IC chip 2 connected to the liquid crystal display panel LPN, a flexible wiring board 3, and the like.

  The liquid crystal display panel LPN is held between an array substrate AR as a first substrate and a counter substrate CT as a second substrate, which are arranged to face each other at a predetermined interval, and between the array substrate AR and the counter substrate CT. And a liquid crystal layer (not shown). The array substrate AR and the counter substrate CT are bonded together by a sealing material (not shown).

  Such a liquid crystal display panel LPN is provided with an active area ACT for displaying an image on the inner side surrounded by a sealing material. The active area ACT has, for example, a substantially rectangular shape and includes a plurality of pixels PX arranged in an m × n matrix (where m and n are positive integers).

  In the present embodiment, the liquid crystal display panel LPN has a transmissive display function, and the liquid crystal display device 1 includes a backlight 4 that illuminates the liquid crystal display panel LPN. In the illustrated example, the backlight 4 is disposed on the back side of the liquid crystal display panel LPN, that is, on the back side of the array substrate AR. As such a backlight 4, various forms are applicable, and any of those using a light emitting diode (LED) as a light source or a cold cathode tube (CCFL) is applicable. Description of the detailed structure is omitted.

  FIG. 2 is a diagram schematically showing a configuration and an equivalent circuit of the liquid crystal display panel LPN shown in FIG.

  In the active area ACT, the liquid crystal display panel LPN includes n gate lines G (G1 to Gn), n auxiliary capacitance lines C (C1 to Cn), m source lines S (S1 to Sm), and the like. ing. The gate line G and the auxiliary capacitance line C extend along the first direction X, respectively. The gate lines G and the auxiliary capacitance lines C are alternately arranged in parallel along the second direction Y that intersects (is orthogonal to) the first direction X. The source line S extends along the second direction Y that intersects the gate line G and the auxiliary capacitance line C, respectively. The source lines S are arranged in parallel along the first direction X. That is, the gate line G and the auxiliary capacitance line C and the source line S are substantially orthogonal.

  Each gate line G is drawn outside the active area ACT and connected to the gate driver GD. Each gate line G corresponds to a signal line for supplying a control signal for controlling ON / OFF of the switching element SW. Each source line S is drawn outside the active area ACT and connected to the source driver SD. Each source line S corresponds to a signal line for supplying a signal voltage written to the pixel electrode PE. At least a part of the gate driver GD and the source driver SD is formed on, for example, the array substrate AR, and is connected to the driving IC chip 2 that incorporates the controller.

  Each pixel PX includes a switching element SW, a pixel electrode PE, a counter electrode CE, and the like. The storage capacitor Cs is formed, for example, between the storage capacitor line C and the pixel electrode PE.

  In the present embodiment, the liquid crystal display panel LPN has a configuration in which the pixel electrode PE is formed on the array substrate AR and the counter electrode CE is formed on the counter substrate CT. The pixel electrode PE and the counter electrode The liquid crystal molecules in the liquid crystal layer LQ are switched mainly using an electric field formed between the CE and the CE. The electric field formed between the pixel electrode PE and the counter electrode CE is a lateral electric field substantially parallel to the main surface of the array substrate AR or the main surface of the counter substrate CT (or a slant slightly inclined with respect to the main surface of the substrate). Electric field).

  The switching element SW is constituted by, for example, an n-channel thin film transistor (TFT). The switching element SW is electrically connected to the gate line G and the source line S. In the active area ACT, m × n switching elements SW are formed.

  The pixel electrode PE is electrically connected to the switching element SW. In the active area ACT, m × n pixel electrodes PE are formed. The counter electrode CE has a common potential, for example, and is disposed in common with respect to the plurality of pixel electrodes PE via the liquid crystal layer LQ. The counter electrode CE is electrically connected to a power supply unit VS formed on the array substrate AR via a conductive member (not shown). The auxiliary capacitance line C is electrically connected to a voltage application unit VCS to which an auxiliary capacitance voltage is applied.

  FIG. 3 is a plan view schematically showing the structure of the array substrate AR when the pixel PX of the liquid crystal display panel LPN shown in FIG. 2 is viewed from the counter substrate CT side. Here, only main parts necessary for the description are shown.

  The gate wirings G0 and G1 extend along the first direction X, respectively. The source line S passes through the center of each pixel PX and extends linearly. In the illustrated example, the source line S extends along the second direction Y. The gate line G1 and the source line S are electrically connected to the switching element SW.

  The pixel electrode PE is disposed at the center of the pixel PX. That is, the pixel electrode PE is formed in a strip shape that is located immediately above the signal wiring passing through the center of the pixel PX and extends in a straight line substantially parallel to the signal wiring. In the illustrated example, the pixel electrode PE is formed in a strip shape that is located immediately above the source line S and extends along a second direction Y substantially parallel to the source line S. The pixel electrode PE having such a configuration is electrically connected to the switching element SW. In the illustrated example, only the pixel electrode PE disposed in one pixel PX is illustrated, but the pixel electrodes PE having the same shape are disposed in the other pixels that are not illustrated.

  In the figure, RB1 indicates the first rubbing direction of the first alignment film disposed on the surface of the array substrate AR, and RB2 in the figure indicates the second alignment disposed on the surface of the counter substrate (not shown). The second rubbing direction of the film is shown. The first rubbing direction RB1 and the second rubbing direction RB2 are parallel and opposite to each other. In addition, the first rubbing direction RB1 and the second rubbing direction RB2 are slightly inclined by several degrees with respect to the second direction Y. For example, the first rubbing direction RB1 and the second rubbing direction RB2 The angle formed by the two directions Y is 7 °.

  FIG. 4 is a plan view schematically showing the structure of the pixel PX on the counter substrate CT of the liquid crystal display panel LPN shown in FIG. Here, only main parts necessary for the description are shown.

  The counter electrode CE is disposed between adjacent pixels PX, and is formed in a strip shape extending in a straight line substantially parallel to the pixel electrode PE. In the illustrated example, the counter electrode CE is disposed between the pixels PX adjacent to each other in the first direction X, and is formed in a strip shape extending along the second direction Y. Such a counter electrode CE is disposed at a position shifted from the position immediately above the source line S and the pixel electrode PE passing through the center of the pixel PX.

  That is, the counter electrodes CE do not overlap with the pixel electrodes PE, but are alternately arranged along the first direction X at a certain interval. Here, when the counter electrodes CE located on both sides of the pixel electrode PE are CE1 and CE2, respectively, the distance between each of the counter electrodes CE1 and CE2 and the pixel electrode PE is substantially the same. That is, the distance along the first direction X between the pixel electrode PE and the counter electrode CE1 and the distance along the first direction X between the pixel electrode PE and the counter electrode CE2 are substantially the same.

  In the present embodiment, the pixel PX corresponds to a square area formed by the gate wirings G0 and G1 and the counter electrodes CE1 and CE2, as indicated by a broken line in the drawing, and extends along the first direction X. The length along the second direction Y is longer than the length. A substantially rectangular opening is formed between the pixel electrode PE and the counter electrode CE1 and between the pixel electrode PE and the counter electrode CE2. Such an opening corresponds to a transmission part that mainly contributes to display in each pixel PX. A region overlapping with the pixel electrode PE or a region overlapping with the counter electrodes CE1 and CE2 hardly contributes to display.

  D1 in the figure indicates the main alignment direction of the liquid crystal molecules due to the electric field formed by the potential difference between the pixel electrode PE and the counter electrode CE1. Further, D2 in the figure indicates the main alignment direction of the liquid crystal molecules due to the electric field formed by the potential difference between the pixel electrode PE and the counter electrode CE2. These orientation directions D1 and D2 are substantially parallel to the first direction X and are directions opposite to each other. Thus, in the example shown here, the liquid crystal molecules in the liquid crystal layer are aligned in directions opposite to each other across the pixel electrode PE in a state where an electric field is formed between the pixel electrode PE and the counter electrode CE. To do. For this reason, in each pixel PX, the alignment direction of the liquid crystal molecules is divided into two.

  FIG. 5 schematically shows a cross-sectional structure taken along the line VV including switching elements SW of array substrate AR shown in FIG.

  That is, the array substrate AR is formed by using a first insulating substrate 10 having light transparency such as a glass substrate. The array substrate AR includes a switching element SW, a pixel electrode PE, and the like on the first insulating substrate 10. Here, the case where the switching element SW is a bottom gate type thin film transistor provided with an amorphous silicon semiconductor layer will be described. However, the present invention is not limited to this example, and a thin film transistor provided with a polycrystalline silicon semiconductor layer may be used. A thin film transistor having a gate type structure may be used.

  The gate electrode WG of the switching element SW is formed on the first insulating substrate 10. The gate electrode WG is electrically connected to a gate wiring (G1) (not shown) or is a part of the gate wiring. The gate wiring G and the gate electrode WG are made of a conductive material such as molybdenum, aluminum, tungsten, titanium, tantalum, or chromium, for example. Such a gate electrode WG is covered with the first insulating film 11. The first insulating film 11 is also disposed on the first insulating substrate 10.

  The semiconductor layer SC of the switching element SW is formed on the first insulating film 11 and is located immediately above the gate electrode WG. The semiconductor layer SC is made of island-shaped amorphous silicon. Such a semiconductor layer SC is covered with the second insulating film 12. The second insulating film 12 is also disposed on the first insulating film 11.

  The source electrode WS of the switching element SW is formed on the second insulating film 12 and is in contact with the semiconductor layer SC. The source electrode WS is electrically connected to the source line S. In the illustrated example, the source electrode WS is a part of the source wiring S. The source wiring S and the source electrode WS are formed of a conductive material such as molybdenum, aluminum, tungsten, titanium, tantalum, or chromium, for example. The source electrode WS and the source line S are covered with the third insulating film 13. The third insulating film 13 is also disposed on the second insulating film 12. Such a third insulating film 13 corresponds to an insulating film covering the signal wiring or an insulating film covering the source wiring S.

  The drain electrode WD of the switching element SW is formed on the third insulating film 13 and is in contact with the semiconductor layer SC. The drain electrode WD is electrically connected to the pixel electrode PE. In the illustrated example, the drain electrode WD is a part of the pixel electrode PE, but may be another form, for example, an electrode formed in the same layer as the source electrode WS.

  The surface of the array substrate AR is covered with the first alignment film 14. The first alignment film 14 is disposed on the third insulating film 13 and also on the drain electrode WD and the pixel electrode PE.

  FIG. 6 is a diagram schematically showing a cross-sectional structure of the pixel PX including the counter electrode CE shown in FIG. 4 taken along line VI-VI.

  In the array substrate AR, the source line S is formed on the second insulating film 12. The third insulating film 13 covers the source line S. The pixel electrode PE is located immediately above the source line S via the third insulating film 13. In the illustrated example, the pixel electrode PE is formed on the third insulating film 13. Such a pixel electrode PE is formed of a light-transmitting conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

  The surface of the pixel electrode PE is covered with the first alignment film 14. The first alignment film 14 is also disposed on the third insulating film 13 and is provided on the surface in contact with the liquid crystal layer LQ of the array substrate AR. The first alignment film 14 is made of a material exhibiting horizontal alignment, and is rubbed in the first rubbing direction RB1 as described above.

  On the other hand, the counter substrate CT is formed using a second insulating substrate 20 having optical transparency such as a glass substrate. The counter substrate CT includes a color filter layer 21, a counter electrode CE, and the like on the inner surface of the second insulating substrate 20 (that is, the surface facing the array substrate AR).

  The color filter layer 21 is formed on the second insulating substrate 20. The color filter layer 21 is formed of resin materials colored in a plurality of different colors, for example, three primary colors such as red, blue, and green. Although not described in detail, the resin material colored in red is arranged corresponding to the red pixel. Similarly, the resin material colored in blue is arranged corresponding to the blue pixel, and the resin material colored in green is It is arranged corresponding to the green pixel.

  The counter electrode CE is formed on the color filter layer 21. The counter electrode CE is disposed so as to form a lateral electric field with the pixel electrode PE. That is, while the pixel electrode PE is arranged at the center of the pixel PX, the opposing electrodes CE1 and CE2 on both sides of the pixel electrode PE are around each pixel PX or between adjacent pixels PX. Has been placed. Similar to the pixel electrode PE, the counter electrode CE is formed of a light-transmitting conductive material such as ITO or IZO.

  The surface of the counter electrode CE is covered with the second alignment film 22. The second alignment film 22 is also disposed on the color filter layer 21 and is provided on the surface in contact with the liquid crystal layer LQ of the counter substrate CT. The second alignment film 22 is formed of a material having a horizontal alignment property, such as polyimide, like the first alignment film 14, and is rubbed in the second rubbing direction RB2 as described above.

  The array substrate AR and the counter substrate CT as described above are arranged so that the first alignment film 14 and the second alignment film 22 face each other. At this time, between the first alignment film 14 of the array substrate AR and the second alignment film 22 of the counter substrate CT, for example, a columnar spacer formed integrally with one substrate by a resin material is disposed. As a result, a predetermined cell gap is formed. The array substrate AR and the counter substrate CT are bonded together with a sealing material (not shown) in a state where a predetermined cell gap is formed. The liquid crystal layer LQ is enclosed in the cell gap described above. The liquid crystal layer LQ is made of, for example, a positive liquid crystal material.

  A first polarizing plate PL1 is attached to one outer surface of the liquid crystal display panel LPN, that is, the outer surface of the first insulating substrate 10 constituting the array substrate AR with an adhesive or the like. A second polarizing plate PL2 is attached to the other outer surface of the liquid crystal display panel LPN, that is, the outer surface of the second insulating substrate 20 constituting the counter substrate CT with an adhesive or the like. In this embodiment, the absorption axis of the first polarizing plate PL1 and the absorption axis of the second polarizing plate PL2 are orthogonal to each other, thereby realizing a normally black mode.

  That is, when no electric field is generated between the pixel electrode PE and the counter electrode CE, the liquid crystal molecules of the liquid crystal layer LQ are aligned in a direction parallel to the first rubbing direction RB1 and the second rubbing direction RB2. Yes. In this state, since the backlight from the backlight 4 does not pass through the second polarizing plate PL2, black is displayed in the pixel PX.

  On the other hand, in a state where a potential difference is formed between the pixel electrode PE and the counter electrode CE, the liquid crystal molecules are aligned so that the major axis thereof is substantially parallel to the direction of the electric field. For example, in a state where electric fields are respectively formed between the pixel electrode PE and the counter electrodes CE1 and CE2, the liquid crystal molecules are aligned along these electric fields. For this reason, in the transmissive part formed between the pixel electrode PE and the counter electrodes CE1 and CE2, the backlight from the backlight 4 is transmitted, and white is displayed in the pixel PX.

  At this time, an electric field for controlling the alignment of liquid crystal molecules is hardly formed near the pixel electrode PE and the counter electrodes CE1 and CE2 (or an electric field sufficient to drive the liquid crystal molecules is not formed). The liquid crystal molecules hardly move from the first rubbing direction RB1 and the second rubbing direction RB2 as in the case of no electric field. For this reason, although the vicinity of the pixel electrode PE and the counter electrodes CE1 and CE2 are formed of a light-transmitting conductive material, the backlight does not pass through these regions and does not contribute to display.

  According to the present embodiment, the pixel electrode PE is disposed on the source line S via the third insulating film 13. Since the source wiring S is originally formed of a light-shielding conductive material, even if the liquid crystal molecules in the region overlapping the pixel electrode PE are oriented in an orientation that does not contribute to display, the aperture ratio of the pixel PX is hardly affected. Absent. Further, even if misalignment between the array substrate AR and the counter substrate CT occurs, the area that does not contribute to display does not increase, and thus it is possible to suppress a reduction in the aperture ratio of each pixel PX.

  When misalignment between the array substrate AR and the counter substrate CT occurs, a difference may occur between the distance between the pixel electrode PE and the counter electrode CE1 and the distance between the pixel electrode PE and the counter electrode CE2. . However, since such misalignment occurs in common for all the pixels PX, there is no difference in the electric field distribution among the pixels PX, and the deterioration of the display quality of the image is suppressed.

  As described above, even when a potential difference is formed between the pixel electrode PE and the counter electrode CE, the liquid crystal molecules in the region overlapping the pixel electrode PE and the counter electrodes CE1 and CE2 are aligned in the direction contributing to display. Often not. For this reason, the pixel electrode PE and the counter electrode CE are not necessarily formed of a transparent conductive material, and may be formed using a conductive material such as aluminum or silver.

  Next, a modification of this embodiment will be described.

  FIG. 7 is a diagram schematically showing a cross-sectional structure including the pixel electrode PE and the counter electrode CE of the liquid crystal display panel LPN in a modification of the present embodiment.

  This modification is different from the example shown in FIG. 6 in that a shield electrode SL is disposed between the source line S and the pixel electrode PE. That is, the array substrate AR is formed on the third insulating film 13 between the third insulating film 13 that covers the source wiring S that is a signal wiring and the pixel electrode PE, and is positioned directly above the source wiring S. And an interlayer insulating film 15 that covers the shield electrode SL and serves as a base of the pixel electrode PE. The pixel electrode PE is formed on the interlayer insulating film 15. The pixel electrode PE and the interlayer insulating film 15 are covered with the first alignment film 14. Other configurations are the same as the example shown in FIG.

  According to such a modified example, in addition to the above-described effect, since the source line S is shielded by the shield electrode SL, generation of undesired capacitance between the source line S and the pixel electrode PE is suppressed. It becomes possible. In addition, it is possible to suppress generation of an undesired electric field between the source line S and the counter electrode CE.

  As described above, according to the present embodiment, it is possible to provide a liquid crystal display device capable of suppressing a reduction in aperture ratio.

  In addition, this invention is not limited to the said embodiment itself, In the stage of implementation, it can change and implement a component within the range which does not deviate from the summary. Further, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

LPN ... Liquid crystal display panel AR ... Array substrate CT ... Counter substrate LQ ... Liquid crystal layer PE ... Pixel electrode SW ... Switching element S ... Source wiring G ... Gate wiring SL ... Shield electrode 11 ... First insulating film 12 ... Second insulating film 13 ... Third insulating film 15 ... Interlayer insulating film CE ... Counter electrode

Claims (7)

A signal line that extends straight through the center of each pixel, an insulating film that covers the signal line, and a straight line that is positioned directly above the signal line through the insulating film and substantially parallel to the signal line A first substrate comprising an elongated strip-like pixel electrode;
A second substrate having a strip-shaped counter electrode that is disposed between adjacent pixels and extends in a straight line substantially parallel to the pixel electrode;
A liquid crystal layer held between the first substrate and the second substrate;
A liquid crystal display device comprising:   The liquid crystal display device according to claim 1, wherein the signal line is a source line that supplies a signal voltage written to the pixel electrode.   The first substrate is further formed between the insulating film covering the signal wiring and the pixel electrode, the shield electrode having a fixed potential formed on the insulating film and positioned immediately above the signal wiring, and the shield electrode The liquid crystal display device according to claim 1, further comprising: an interlayer insulating film that covers the pixel electrode and serves as a base of the pixel electrode. A gate wiring extending along the first direction, a source wiring extending along the second direction passing through the center of each pixel and intersecting the first direction, and electrically connected to the gate wiring and the source wiring A switching element, an insulating film covering the source wiring, and a strip that is electrically connected to the switching element and is located immediately above the source wiring through the insulating film and extends in the second direction A first substrate comprising: a pixel electrode;
A second substrate including a strip-shaped counter electrode that is disposed between pixels adjacent to each other in the first direction and extends along the second direction;
A liquid crystal layer held between the first substrate and the second substrate;
A liquid crystal display device comprising:   The first substrate is further formed between the insulating film covering the source wiring and the pixel electrode, the shield electrode having a fixed potential formed on the insulating film and located immediately above the source wiring, and the shield electrode The liquid crystal display device according to claim 4, further comprising: an interlayer insulating film that covers and covers the pixel electrode.   6. The liquid crystal display device according to claim 1, wherein a distance between each of the counter electrodes located on both sides of the pixel electrode and the pixel electrode is substantially the same.   The liquid crystal molecules of the liquid crystal layer are aligned in directions opposite to each other with the pixel electrode in between, with an electric field formed between the pixel electrode and the counter electrode. The liquid crystal display device according to any one of 6.

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