JP2012039367A - Electronic camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize an integrated circuit for executing processing based on a plurality of functions mounted at low cost.
A plurality of integrated circuits that execute different processes, a selection unit that selects one of a plurality of functions that are executed by combining at least two of the different processes, and a selection unit that selects And a control unit that drives the integrated circuit that executes processing based on the function selected from the plurality of integrated circuits when the function is executed.
[Selection] Figure 2

Description

  The present invention relates to an electronic camera having a plurality of functions.

  In recent years, there are many cases where a plurality of processing blocks are mounted in accordance with the multi-functionalization of electronic cameras represented by digital cameras. These processing blocks are incorporated in a state where they are integrated in one ASIC (Application Specific Integrated Circuit). In addition to this, for example, arithmetic means for executing predetermined processing such as compression / decompression processing on image data, for example, is composed of, for example, an FPGA (field programmable gate array) and the like, while replacing programs executed on the FPGA. In particular, a method of executing processing based on a plurality of functions has been proposed (see Patent Document 1).

JP 2001-285703 A

  Such an electronic camera tends to minimize the configuration of the camera itself by executing processing based on a plurality of functions mounted on one integrated circuit. For this reason, for example, when switching a connection I / F to which a storage medium such as a memory card is electrically connected or a connection I / F to be connected to a display device such as an LCD to an optimal one, In addition to changing these I / Fs, it is necessary to newly design the entire integrated circuit, which leads to an increase in design cost.

  An object of the present invention is to provide an electronic camera that can realize an integrated circuit for executing processing based on a plurality of functions mounted at low cost.

  In order to solve the above-described problem, an image processing apparatus according to the present invention includes a plurality of integrated circuits that execute different processes and a plurality of functions that are executed by combining at least two of the different processes. And a control unit that drives an integrated circuit that performs processing based on the selected function from the plurality of integrated circuits when the function selected by the selection unit is executed. It is characterized by having.

  The plurality of integrated circuits include a first integrated circuit that performs at least image processing on an image signal, and the first integrated circuit includes an input unit to which the image signal is input and the input the input signal. An image processing unit that performs the image processing on the image signal, an encoding unit that performs compression processing on the image signal input to the input unit, or an image signal that has been image processed by the image processing unit, A transmission unit that transmits the image signal compressed by the encoding unit; and a first circuit control unit that controls operations of the input unit, the image processing unit, the encoding unit, and the transmission unit. It is preferable.

  The plurality of integrated circuits include a second integrated circuit that writes and reads image signals to and from a storage medium to be mounted, and the second integrated circuit receives compressed image signals from the storage medium. A connection unit that reads an image signal written to or written in the storage medium, a decoding unit that decompresses the read image signal, and a compressed image signal that is received and decompressed by the decoding unit It is preferable to include a transmission / reception unit that transmits the received image signal, and a second circuit control unit that controls operations of the connection unit, the decoding unit, and the transmission / reception unit.

  The plurality of integrated circuits include a third integrated circuit that displays an image based on an image signal on a connected display unit, and the third integrated circuit includes a receiving unit that receives the image signal; A transfer unit that transfers the image signal received by the reception unit as display data to be displayed on the display unit; and a third circuit control unit that controls operations of the reception unit and the transfer unit. Preferably it is.

  Further, it is preferable that the second integrated circuit changes an operation speed according to a signal amount of the image signal transmitted from the first integrated circuit or a compression rate of the image signal.

  Moreover, it is preferable that the selection unit operates the second integrated circuit and the third integrated circuit when displaying an image based on the image signal stored in the storage medium.

  In addition, it is preferable that the selection unit operates the first integrated circuit and the third integrated circuit when displaying an image based on the image signal continuously input during non-photographing.

  According to another aspect of the present invention, there is provided an imaging apparatus including the above-described image processing apparatus and an imaging element that acquires an image signal by performing photoelectric conversion by receiving subject light.

  According to the present invention, an integrated circuit for executing processing based on a plurality of functions to be mounted can be realized at low cost.

It is a functional block diagram which shows the outline of a structure of the electronic camera using this invention. It is a functional block diagram which shows the structure of an image processing circuit.

  Hereinafter, an electronic camera using the present invention will be described. As shown in FIG. 1, the electronic camera 10 includes an imaging optical system 15, an imaging device 16, an A / D conversion unit 17, a timing generator (TG) 18, an image processing circuit 20, a storage medium 21, a display unit 22, and a connection. An I / F 23, a CPU 26, a built-in memory 27, an operation unit 28, and a power supply unit 29 are provided.

  The imaging optical system 15 includes a plurality of lenses such as a zoom lens and a focus lens. For example, when changing the zoom magnification, the zoom lens is moved in the optical axis (L) direction by a lens driving mechanism (not shown). At the time of focus adjustment, the focus lens is moved in the optical axis (L) direction by the lens driving mechanism. The lens driving mechanism is controlled by the CPU 26.

  A known CCD image sensor or a CMOS image sensor is used as the image sensor 16. An image signal output from the image sensor 16 is input to the A / D converter 17 and converted from an analog signal to a digital signal. The image signal digitized by the A / D converter 17 is output to the image processing circuit 20. The timing generator 18 synchronizes the drive timings of the image sensor 16 and the A / D converter 17.

  The image processing circuit 20 performs noise removal processing on the image signal converted into a digital signal by the A / D conversion unit 17 and then performs color reproduction processing such as interpolation processing, gradation conversion processing, and contour enhancement processing. Apply. The image processing circuit 20 generates a display image signal by performing resolution conversion processing on the image signal on which color reproduction processing has been performed. Hereinafter, an image signal subjected to noise removal processing is referred to as RAW data, an image signal subjected to color reproduction processing is referred to as color reproduction image data, and a display image signal is referred to as view image data.

  In addition, the image processing circuit 20 performs compression processing on the generated RAW data, color reproduction image data, and view image data. Hereinafter, data obtained by performing compression processing on RAW data and color reproduction image data will be referred to as compressed RAW data and compressed image data.

  In addition, the image processing circuit 20 performs a decompression process on the compressed RAW data, the compressed image data, and the compressed view image data read from the storage medium 21. The configuration of the image processing circuit 20 will be described later.

  Examples of the storage medium 21 include a memory card, an optical disk, a magnetic disk, and an HDD (Hard disk drive) that can be externally connected to the electronic camera 10. The storage medium 21 stores compressed RAW data, compressed image data, compressed view image data, and the like. Note that the compressed image data and the compressed RAW data are stored as one image file combined with the compressed view image data and the accompanying information. Examples of the incidental information include information such as shooting conditions, shooting date and time, and camera model. In the present embodiment, the case where one storage medium is mounted is described. However, the present invention is not limited to this, and an electronic camera that can mount a plurality of storage media may be used.

  The display unit 22 is a through image obtained by performing the above-described color reproduction process and resolution conversion process on the image signal captured by the image sensor 16 in the shooting standby state, or an image based on the above-described view image data. Is displayed. In addition, the display unit 22 displays a menu image. Here, the image data on which the menu image is based may be stored in the storage medium 21 or stored in a built-in memory (not shown) provided in the image processing circuit 20. An example of the display unit 22 is an LCD.

  The connection I / F 23 is for connecting a connection cable for connecting the electronic camera 10 and an external electronic device. Examples of the connection I / F 23 include a USB (registered trademark) terminal, an HDMI (High-Definition Multimedia Interface: registered trademark) terminal, and a coaxial terminal.

  The CPU 26 comprehensively controls each part of the electronic camera 10 by executing a control program written in the built-in memory 27. Further, the CPU 26 controls each unit of the electronic camera 10 based on the operation of the operation unit 28. The built-in memory 27 stores the control program described above, operators used for AE processing and AF processing executed at the time of shooting, and the like. Examples of the operation unit 28 include a release button, a menu button, and a cross key. Note that the functions of these operation units 28 are well known, and are omitted here. The power supply unit 29 supplies power to each unit of the electronic camera 10. Examples of the power supply unit 29 include a primary battery and a secondary battery that are loaded into the electronic camera 10.

  Next, the configuration of the image processing circuit 20 will be described with reference to FIG. The image processing circuit 20 includes integrated circuits (ASIC) 31, 32, and 33. Hereinafter, these integrated circuits will be referred to as ASICs. These ASICs 31, 32 and 33 are electrically connected via a bus 34.

  The ASIC 31 performs the above-described color reproduction process, resolution conversion process, and compression process on the input image signal. The ASIC 31 includes an input unit 41, an image processing unit 42, encoding units 43 and 44, a controller 45, a buffer memory 46, and a communication I / F 47, which are electrically connected via a bus 48. The controller 45 of the ASIC 31 is always supplied with power from the power supply unit 29.

  The input unit 41 receives the digital image signal output from the A / D conversion unit 17. The image signal received by the input unit 41 is stored in the buffer memory 46.

  The image processing unit 42 performs a noise removal process on the image signal input to the buffer memory 46, and then performs a color reproduction process and a resolution conversion process. The image signal subjected to these processes is stored in the buffer memory 46 every time each process is performed.

  The encoding unit 43 performs compression (encoding) processing on the RAW data stored in the buffer memory 46. Since compression processing for RAW data is well known, the details thereof are omitted here. The encoding unit 43 performs a lossless compression represented by Huffman compression after thinning the 12-bit RAW data to, for example, 9.5 bits. The compressed RAW data generated by the encoding unit 43 is stored in the buffer memory 46.

  The encoding unit 44 performs lossy compression such as Jpeg on the color reproduction image data and the view image data stored in the buffer memory 46. The compressed image data subjected to the compression processing by the encoding unit 43 and the view image data subjected to the compression processing are stored in the buffer memory 46, respectively. The compression rate in the compression processing in the encoding unit 43 and the data size in the compressed image data are set by operating the operation unit 28.

  The controller 45 controls each part of the ASIC 31 based on the drive command from the CPU 26. Upon receiving a drive command from the CPU 26, the controller 45 supplies the power supplied from the power supply unit 29 to each unit of the ASIC 31 and the ASIC 33. Examples of the timing at which the drive command described above is output include when the operation mode of the electronic camera 10 is set to the shooting mode or when the mode is shifted to the shooting mode. If the display unit 22 is set not to display a through image at the time of shooting, the controller 45 does not supply power to the ASIC 33 even if it receives a drive command from the CPU 26.

  The communication I / F 47 is electrically connected to the ASICs 32 and 33 via the bus 34. In addition to transmitting the view image data stored in the buffer memory 46 to the ASIC 33, the communication I / F 47 is compressed RAW data, compressed image data, or compressed data. The processed view image data is output to the ASIC 32.

  The ASIC 32 is a process for writing the compressed RAW data, the compressed image data, and the compressed view image data transmitted from the ASIC 31 to the storage medium 21, and the compressed RAW data, the compressed image data, and the compressed process stored in the storage medium 21. A process of reading any one of the view image data is executed. The ASIC 32 includes a controller 51, a decoding unit 52, a buffer memory 53, a connection I / F 54, and a communication I / F 55, which are electrically connected via a bus 56.

  The controller 51 receives a drive command from the CPU 26 and controls each part of the ASIC 32. At the time of this drive command, the controller 51 supplies the power supplied from the power supply unit 29 to each unit of the ASIC 32 and the ASIC 33. Here, the drive command input to the ASIC 32 has shifted to the shooting mode described above, the playback mode for reproducing an image based on the image data stored in the storage medium 21, or the setting mode for performing initial setting of the electronic camera 10 or the like. Time is given. Of these modes, when a drive command is input to the ASIC 32 at the timing of shifting to the shooting mode, power is supplied from the ASIC 31 to the ASIC 33. In this case, the controller 51 is supplied from the power supply unit 29. Is not supplied to the ASIC 33.

  In addition, when the compressed RAW data and the compressed image data are transmitted from the ASIC 31 to the ASIC 32, the controller 51 reads the compression rate when the image data is compressed and the data size after the compression process, and reads the compressed compression rate, Alternatively, each part of the ASIC 32 is controlled so that the operation speed is based on the data size.

  The decoding unit 52 performs decompression (decoding) processing on the compressed RAW data, the compressed image data, and the compressed view image data read from the storage medium 21. Since the decompression process is well known, it is omitted here. The data expanded by the decoding unit 52 is written in the buffer memory 53.

  The storage medium 21 is connected to the connection I / F 54. The connection I / F 54 writes the compressed RAW data, the compressed image data, and the compressed view image data to the storage medium 21, or stores the compressed RAW data, the compressed image data, and the compressed image data stored in the storage medium 21. Read any of the view image data. The compressed RAW data, the compressed image data, and the compressed view image data read from the storage medium 21 are stored in the buffer memory 53.

  The communication I / F 55 receives the compressed RAW data, the compressed image data, and the compressed view image data transmitted from the ASIC 31. The compressed RAW data, the compressed image data, and the compressed view image data received by the communication I / F 55 are written in the buffer memory 53. If the data stored in the buffer memory 53 is view image data decompressed by the decoding unit 52, the communication I / F 55 transmits the view image data stored in the buffer memory 53 to the ASIC 33. .

  The ASIC 33 executes processing for displaying an image. The ASIC 33 includes a controller 61, a communication I / F 62, a buffer memory 63, and display I / Fs 64 and 65, which are electrically connected via a bus 66.

  The controller 61 operates when power is supplied from the ASIC 31 or the ASIC 32 and controls each part of the ASIC 33. The communication I / F 62 receives view image data transmitted from the ASIC 31 or the ASIC 32. The view image data received by the communication I / F 62 is written in the buffer memory 63. The display I / F 64 is electrically connected to the display unit 22 and transmits the view image data written in the buffer memory 63 to the display unit 22. On the other hand, the display I / F 65 is connected to the connection I / F 23. By connecting the reception to the connection I / F 23 with the display I / F 65, it is possible to display and output the view image on an external display device.

  Hereinafter, the operation of the image processing circuit 20 will be described. When the main power supply of the electronic camera 10 is turned on by the operation of the operation unit 28 by the user, the CPU 26 instructs the power supply unit 29 to start power supply. Based on this, the power supply unit 29 supplies power to each unit of the electronic camera 10. At this time, power is supplied to the image processing circuit 20 only to the controller 45 of the ASIC 31 and the controller 51 of the ASIC 32.

  For example, when the operation mode of the electronic camera 10 is set to the shooting mode, or when the operation mode of the electronic camera 10 is changed to the shooting mode by the operation of the operation unit 28 by the user, the CPU 26 of the image processing circuit 20 A drive command is output to the ASIC 31. In response to this, the controller 45 of the ASIC 31 supplies power to each part of the ASIC 31 and the ASIC 33.

  When the release button is not operated in the shooting mode, image signals are output from the image sensor 16 at regular intervals. These image signals output at regular intervals are input to the ASIC 31 via the A / D converter 17. The image processing unit 42 performs noise removal processing, color reproduction processing, and resolution conversion processing on the image signals input at regular intervals, and generates through image data in accordance with the resolution of the display unit 22. The generated through image data is input to the ASIC 33 via the communication I / F 47. In this case, since the through image data is composed of image data obtained by performing resolution conversion processing on the image data that has been subjected to color reproduction processing, communication traffic between the ASIC 31 and the ASIC 33 can be suppressed.

  The through image data transmitted from the communication I / F 47 is received by the communication I / F 62 of the ASIC 33. The received through image data is stored in the buffer memory 63. Thereafter, the data is output to the display unit 22 via the display I / F 64. Thereby, the through image is displayed on the display unit 22. When the electronic camera 10 is connected to another display device (not shown), the electronic camera 10 is output to the other display device via the display I / F 65 and the connection I / F 23, and is displayed on the display device. A through image is displayed.

  Note that when the display unit 22 is set not to display the through image, the controller 45 of the ASIC 31 does not supply power to the ASIC 33, and thus the above-described processing related to the display of the through image is not executed. If the display unit 22 is operated to stop displaying an image, the controller 45 of the ASIC 31 stops the supply of power to the ASIC 33. Accordingly, as described above, Display of the through image ends. Thus, when displaying a through image, power is supplied only to the ASIC 31 and the ASIC 33, so that power consumption can be suppressed.

  When the user operates the release button in the shooting mode, the CPU 26 outputs a drive command to the ASIC 32. In response to this, the controller 51 of the ASIC 32 supplies power to each part of the ASIC 32. As a result, all the ASICs 31, 32, and 33 operate.

  When the release button is operated, an image signal obtained based on the determined exposure condition is output from the image sensor 16. This image signal is input to the ASIC 31 of the image processing circuit 20.

  For example, when RAW data is recorded as color reproduction image data, the image processing unit 42 performs noise removal processing on the image signal stored in the buffer memory 46. Thereby, RAW data is generated and stored in the buffer memory 46. The encoding unit 43 reads out the RAW data stored in the buffer memory 46 and executes a compression process on the RAW data. Thereby, compressed RAW data is generated. Further, the image processing unit 42 performs color reproduction processing on the RAW data. Then, the image processing unit 42 performs resolution conversion processing on the image data subjected to these processes, and generates view image data. This view image data is transmitted to the ASIC 33 via the communication I / F 47. The generated view image data is subjected to compression processing by the encoding unit 43, and is transmitted to the ASIC 32 via the communication I / F 47 together with the compressed RAW data.

  The view image data transmitted to the ASIC 33 is received by the communication I / F 62 and stored in the buffer memory 63. The controller 61 reads the view image data stored in the buffer memory 63 and outputs it to the display unit 22 via the display I / F 64. Thereby, an image based on the view image data is displayed on the display unit 22. Note that when the image acquired at the time of shooting is not displayed on the display unit 22, the view image data is not transmitted to the ASIC 33.

  On the other hand, the compressed RAW data and the compressed view image data transmitted to the ASIC 32 are received by the communication I / F 55 and stored in the buffer memory 53. In the process of receiving these image data through the communication I / F 55, the controller 51 specifies the compression rate of the compressed image data or the data size of the image data, and based on the specified compression rate or data size. The operating speed of the ASIC 32 is changed. For example, when the operating speed of the ASIC 32 is changed based on the compression rate of the image data, the data size of the image data after the compression processing is small when the compression rate of the image data is high. In such a case, the controller 51 slows or does not change the operating speed of the ASIC 32. In addition, when the compression rate of the image data is low, the data size of the image data written to the storage medium 21 is large. In such a case, the controller 51 increases the operating speed of the ASIC 32. Note that whether or not the compression rate of the image data is high may be determined by comparing a preset threshold value with the compression rate of the image data. The same applies to the case where the operation speed is changed based on the data size. If the data size of the image data is small, the controller 51 slows down or does not change the operation speed of the ASIC 32. On the other hand, if the data size is large, the controller 51 increases the operating speed of the ASIC 32.

  When recording color reproduction image data, processing such as interpolation processing, gradation conversion processing, and contour enhancement processing is performed on the data that has been subjected to noise removal processing in the image processing unit 42. The encoding unit 44 performs a compression process on the color reproduction image data generated thereby. Thereby, image data in Jpeg format is generated. The process of recording the image data in the Jpeg format is the same as the RAW data that has been subjected to the compression process, and is therefore omitted here.

  Next, a case where the operation mode of the electronic camera 10 is the playback mode will be described. When the operation mode of the electronic camera is the playback mode or when the operation mode of the electronic camera 10 is changed to the playback mode by the operation of the operation unit 28 by the user, the CPU 26 outputs a drive command to the ASIC 32 of the image processing circuit 20. To do. In response to this, the controller 51 of the ASIC 32 supplies power to each unit. At the same time, power is supplied to the ASIC 33. As a result, the ASIC 33 operates.

  Thereafter, the controller 51 of the ASIC 32 reads the view image data from the image file stored in the storage medium 21 via the connection I / F 54 and stores it in the buffer memory 53. Since the view image data included in the image file stored in the storage medium 21 is compressed image data, the encoding unit 52 decompresses the view image data stored in the buffer memory 53. Then, the decompressed view image data is transmitted to the ASIC 33 via the communication I / F 55. This view image data is received by the communication I / F 62 of the ASIC 33 and stored in the buffer memory 63. Thereafter, the view image data stored in the buffer memory 63 is read by the controller 61 and output to the display unit 22 via the display I / F 64. Thereby, an image based on the view image data is displayed on the display unit 22. As described above, in the playback mode, power is supplied only to the ASIC 32 and the ASIC 33 among the three ASICs 31, 32, and 33, so that the power consumption can be suppressed as in the case of displaying a through image. .

  In this manner, the image processing circuit 20 is configured from a plurality of ASICs 31, 32, and 33 that perform different processes, and power is selectively supplied to the ASIC based on the operation to be performed. Power consumption can be suppressed, and power consumption in a power feeding unit mounted on the electronic camera 10 can be suppressed.

  Further, by configuring the image processing circuit 20 from a plurality of ASICs 31, 32, 33 that perform different processing, for example, when changing the connection I / F 54 connected to the storage medium 21, only the ASIC 32 is replaced, or If one of the display I / Fs 64 and 65 is changed, only one of the ASICs 33 is replaced. For example, an image processing circuit of a different form can be generated at a low cost by replacing one of the ASICs. .

  In this embodiment, power is supplied to the ASIC 33 by either the controller 45 of the ASIC 31 or the controller 51 of the ASIC 32, but the present invention is not limited to this. For example, power is supplied to the controllers 45, 51, 61 of all the ASICs 31, 32, 33, and when the controller 61 of the ASIC 33 receives a drive command from the ASIC 31 or ASIC 32, the controller 61 of the ASIC 33 supplies power to each part of the ASIC 33. May be supplied.

  In this embodiment, a case will be described in which an encoding unit that performs compression processing on RAW data and an encoding unit that performs compression processing on image data generated by performing image processing are separately formed. However, the present invention is not limited to this, and it is possible to cope with one encoding unit.

  In the present embodiment, the view image data is transmitted to the ASIC 33 without being subjected to compression processing. However, the present invention is not limited to this, and the view image data subjected to the compression processing may be transmitted to the ASIC 33. . In this case, a decoding unit may be provided in the ASIC 33, and when the image data is transmitted to the display unit 22, the compressed view image data may be decompressed by the decoding unit.

  In this embodiment, the decoding unit 52 provided in the ASIC 32 decompresses the view image data read from the image file stored in the storage medium 22 and then transmits the view image data to the ASIC 33. It is not necessary to limit to this, and the read view image data can be transmitted from the ASIC 32 to the ASIC 33 as it is. In this case, a decoding unit may be provided in the ASIC 33, and the received view image data may be decompressed by the decoding unit and then output to the display unit 22.

  In this embodiment, the image processing circuit is configured by a combination of an ASIC that performs image processing and compression processing, an ASIC that performs display processing, and a process that writes image data to a storage medium and a process that reads from the storage medium. For example, an image processing circuit having a wireless communication function or a GPS function may be used. In this case, the wireless function and the GPS function may be executed by an ASIC different from the above-described three ASICs.

  In the present embodiment, an electronic camera is taken as an example, but the present invention is not limited to this, and an image processing apparatus including the image processing circuit 20 illustrated in FIG. 2 may be used.

  DESCRIPTION OF SYMBOLS 10 ... Electronic camera, 16 ... Image pick-up element, 20 ... Image processing circuit, 21 ... Storage medium, 22 ... Display part, 26 ... CPU, 28 ... Operation part, 29 ... Power feeding part, 31, 32, 33 ... ASIC, 34, 48, 56, 66 ... bus

Claims (8)

A plurality of integrated circuits that perform different processes;
A selection unit that selects one of a plurality of functions executed by combining at least two of the different processes;
A control unit that drives an integrated circuit that executes processing based on the selected function from the plurality of integrated circuits when executing the function selected by the selection unit;
An image processing apparatus comprising: The image processing apparatus according to claim 1.
The plurality of integrated circuits include a first integrated circuit that performs at least image processing on an image signal,
The first integrated circuit includes:
An input unit to which the image signal is input;
An image processing unit that performs the image processing on the input image signal;
An encoding unit that performs compression processing on the image signal input to the input unit or the image signal that has been subjected to image processing by the image processing unit;
A transmission unit for transmitting the image signal compressed by the encoding unit;
A first circuit control unit that controls operations of the input unit, the image processing unit, the encoding unit, and the transmission unit;
An image processing apparatus comprising: The image processing apparatus according to claim 1 or 2,
The plurality of integrated circuits include a second integrated circuit that writes and reads image signals to and from a storage medium to be mounted,
The second integrated circuit includes:
A connection unit for writing the compressed image signal to the storage medium or reading the image signal written to the storage medium;
A decoding unit for decompressing the read image signal;
A transmission / reception unit that receives the compressed image signal and transmits the image signal expanded by the decoding unit;
A second circuit control unit that controls operations of the connection unit, the decoding unit, and the transmission / reception unit;
An image processing apparatus comprising: The image processing apparatus according to any one of claims 1 to 3,
The plurality of integrated circuits include a third integrated circuit that displays an image based on an image signal on a connected display unit,
The third integrated circuit includes:
A receiving unit for receiving the image signal;
A transfer unit that transfers the image signal received by the receiving unit as display data to be displayed on the display unit;
A third circuit control unit for controlling operations of the reception unit and the transfer unit;
An image processing apparatus comprising: The image processing apparatus according to claim 3 or 4,
The image processing apparatus, wherein the second integrated circuit changes an operation speed according to a signal amount of the image signal transmitted from the first integrated circuit or a compression rate of the image signal. The image processing apparatus according to any one of claims 1 to 5,
The image processing apparatus, wherein the selection unit operates the second integrated circuit and the third integrated circuit when displaying an image based on the image signal stored in the storage medium. The image processing apparatus according to any one of claims 1 to 5,
The selection unit operates the first integrated circuit and the third integrated circuit when displaying an image based on the image signal continuously input during non-photographing. Processing equipment. The image processing apparatus according to any one of claims 1 to 7,
An image sensor that obtains an image signal by photoelectrically converting light by receiving subject light;
An imaging apparatus comprising:

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