JP2012005295A - Motor driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a motor driving circuit that has a small switching loss, and that can operate a motor with stability.SOLUTION: A motor driving circuit 1 has an inverter circuit 2, a control circuit part 3, buffer circuits 4a-4c, a resistor R2, and capacitor elements C1-C3. The buffer circuit 4a has a PMOS transistor Q1a, an NMOS transistor Q1b, a resistor R1a, and a resistor R2a. Since MOS transistors are used for the buffer circuits 4a-4c, the turn-on time Ton and the turn-off time Toff can be shortened, and the switching loss can be reduced. In addition, since charging is performed via the resistor R2a when the gate of the MOS transistor Q1 is set to a high, and discharging is performed via the resistors R2a and R1a when the gate is set to a low, the turn-on time Ton becomes longer than the turn-off time Toff. Therefore, the dead time for setting all phases to be off is not required, and a motor can be driven with stability.

Description

  The present invention relates to a motor drive circuit that drives a motor.

  FIG. 3 is a circuit diagram showing an example of a conventional brushless DC motor driving circuit. The motor drive circuit 11 in FIG. 3 includes an inverter circuit 12, a control circuit unit 13, a buffer circuit 14, resistors R1 and R2, and a capacitor element C1. The inverter circuit 12 includes a PMOS transistor Q1 and an NMOS transistor Q2. The buffer circuit 14 has an NPN bipolar transistor Q11 and resistors R11 and R12.

  MOS transistors Q1, Q2 are connected in cascade between DC power supply Vcc and the ground terminal via resistor R2. Bipolar transistor Q11 is connected between the gate of MOS transistor Q1 and the ground terminal. The resistors R12 and R11 are connected in series between the output terminal of the control circuit unit 13 and the ground terminal. A connection node between the resistor R12 and the resistor R11 is connected to the base of the bipolar transistor Q11. Resistor R1 and capacitor element C1 are connected in parallel between DC power supply Vcc and the gate of MOS transistor Q1.

  A brushless DC motor (not shown) has, for example, three coils composed of U, V, and W phases. A connection node of the MOS transistors Q1 and Q2, which are output terminals of the inverter circuit 12, is connected to the U-phase coil. A drive circuit similar to that shown in FIG. 3 is also connected to the V-phase and W-phase coils, but this is not shown.

  The control circuit unit 13 controls on / off of the MOS transistors Q1, Q2. When the high-side MOS transistor Q1 is turned on and the low-side MOS transistor Q2 is turned off, the source and drain of the MOS transistor Q1 become conductive, and the connection node between the MOS transistors Q1 and Q2 is set high. As a result, a current flows from DC power supply Vcc to U-phase coil via MOS transistor Q1. On the other hand, when the MOS transistor Q1 is turned off and the MOS transistor Q2 is turned on, the source and drain of the MOS transistor Q2 are turned on, and the connection node of the MOS transistors Q1 and Q2 is set to low. As a result, a current flows from the U-phase coil to the ground terminal via the MOS transistor Q2.

  The buffer circuit 14 is provided between the control circuit unit 13 and the gate of the MOS transistor Q1. The buffer circuit 14 adjusts the current and voltage supplied to the inverter circuit 12, and controls the turn-on time and turn-off time of the MOS transistor Q1 described later. In FIG. 3, since the buffer circuit is provided on the MOS transistor Q1 side, the buffer circuit 14 is not provided in the MOS transistor Q2 when it is not necessary to change the gate voltage or control the turn-on time and the turn-off time.

  Resistor R1 supplies current to bipolar transistor Q11. Capacitor element C1 reduces the superposition of the pulse signal input to the gate of MOS transistor Q2 as noise on the gate of MOS transistor Q1.

  FIG. 4A is a voltage waveform diagram of the gate voltage Va of the MOS transistor Q1 in the motor drive circuit 11 of FIG. 3 and the gate voltage Vb of the MOS transistor in the inverter circuit 12 connected to the V-phase coil. FIG. 4B is an enlarged view of a portion A in FIG.

  In the motor drive circuit 11 of FIG. 3, the charge accumulated in the internal capacitances of the capacitor element C1 and the MOS transistor Q1 is calculated from the time required to charge the internal capacitances of the capacitor element C1 and the MOS transistor Q1 via the resistor R1. The time required for discharging through the bipolar transistor Q11 is longer. For this reason, as shown in FIG. 4B, the turn-on time Ton from the high level to the threshold voltage is longer than the turn-off time Toff until the gate voltage Va reaches the threshold voltage from the low level. Therefore, the other phase is not turned on at the same time when one phase is turned off, and it is not necessary to provide a dead time period for setting all the phases to be turned off.

  However, the motor driving circuit 11 shown in FIG. 3 has the following problems.

  (1) Since the bipolar transistor Q11 has a large output capacity, the rise time and fall time of the gate voltage Va of the MOS transistor Q1 become longer as shown in FIG. 4B. For this reason, the turn-on time Ton and turn-off time Toff of the MOS transistor Q1 become longer, and the MOS transistor Q1 cannot be switched on / off quickly, resulting in a large switching loss.

  (2) When the value of the capacitor element C1 is increased in order to reduce noise superimposed on the gate of the MOS transistor Q2, the turn-on time Ton and the turn-off time Toff of the MOS transistor Q1 are increased, and the switching loss of the MOS transistor Q1 is further increased. It gets bigger.

  (3) Since the collector current of the bipolar transistor Q11 flows through the resistor R1, a large power loss occurs. If the collector current is reduced to suppress the loss, the turn-on time Ton and the turn-off time Toff of the MOS transistor Q1 are lengthened, and the switching loss of the MOS transistor Q1 is further increased.

  Patent Document 1 discloses a motor drive circuit using a MOS transistor for the buffer circuit 14. FIG. 5A is a voltage waveform diagram of the gate voltages Va and Vb when a MOS transistor is used for the buffer circuit 14, and FIG. 5B is an enlarged view of a portion A in FIG. 5A. Since a MOS transistor is used instead of a bipolar transistor, the rise time and fall time of the gate voltage Va of the MOS transistor Q1 are shortened as shown in the figure, and the problem (1) is reduced.

JP-A-8-275577

  However, Patent Document 1 has a problem that both the turn-on time Ton and the turn-off time Toff are shortened and both are substantially equal, so that one phase is turned off and the other phase is turned on at the same time. For example, as shown in FIG. 5B, the V phase is turned on simultaneously with the U phase being turned off. For this reason, it is necessary to provide a dead time period in which all phases are set to OFF. However, if the dead time period is provided, the motor torque fluctuates and the motor operation becomes unstable.

  Moreover, the problems (2) and (3) are not solved.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a motor drive circuit that has a small switching loss and can stably operate a motor.

  According to one aspect of the present invention, the motor drive circuit includes a control circuit unit, a first switching element, a second switching element, a buffer circuit, and a capacitor element. The control circuit unit generates first and second drive signals. The first switching element controls whether or not one end of the motor coil is set to the first reference voltage. The second switching element controls whether one end of the coil is set to a second reference voltage according to the second drive signal. The buffer circuit generates a control signal input to the control terminal of the first switching element based on the first drive signal. One end of the capacitor element is set to the first reference voltage, and the other end is connected to the control terminal. The buffer circuit includes first and second MOS transistors and a first impedance element. The first and second MOS transistors are turned on / off so that they are not turned on simultaneously. The first impedance element is connected between the output side terminal of the first MOS transistor and the output side terminal of the second MOS transistor.

  According to the present invention, the switching loss can be reduced by using the MOS transistor in the buffer circuit, and the motor can be stably driven by eliminating the dead time period.

1 is a circuit diagram of a motor drive circuit 1 and a motor 10 according to an embodiment of the present invention. The figure which shows an example of the voltage waveform of the gate voltage Va of MOS transistor Q1, and the gate voltage Vb of MOS transistor Q3. The circuit diagram which shows an example of the conventional brushless DC motor drive circuit. FIG. 4 is a voltage waveform diagram of a gate voltage Va of a U-phase high-side switching element (MOS transistor) Q1 and a gate voltage Vb of a V-phase high-side switching element in the motor drive circuit 11 of FIG. The voltage waveform figure of gate voltage Va, Vb at the time of using a MOS transistor for a buffer circuit as a prior art example.

  Hereinafter, embodiments of a motor drive circuit according to the present invention will be specifically described with reference to the drawings.

  FIG. 1 is a circuit diagram of a motor drive circuit 1 and a motor 10 according to an embodiment of the present invention. The motor drive circuit 1 includes an inverter circuit 2, a control circuit unit 3, buffer circuits 4a to 4c, a resistor R2, and capacitor elements C1 to C3. The inverter circuit 2 has arm circuits 5a to 5c. In the present embodiment, an example in which the motor 10 is a brushless DC motor is shown, but another motor may be used.

  The motor 10 includes three coils that are star-connected between the U, V, and W terminals that are output terminals of the arm circuits 5a to 5c, that is, a U-phase coil Lu, a V-phase coil Lv, and a W-phase coil Lw, And the illustrated rotor. In the present embodiment, since the motor 10 has three coils Lu to Lw, three buffer circuits 4a to 4c, three arm circuits 5a to 5c, and three capacitor elements C1 to C3 are provided in the motor drive circuit 1. More generally, the same number of buffer circuits, arm circuits, and capacitor elements as the coils may be provided.

  The buffer circuit 4a and the arm circuit 5a control the voltage Vu at the U terminal. The buffer circuit 4a includes a PMOS transistor (first MOS transistor) Q1a, an NMOS transistor (second MOS transistor) Q1b, a resistor (first impedance element) R1a, and a resistor (second impedance element) R2a. Have The arm circuit 5a includes a PMOS transistor (first switching element) Q1 and an NMOS transistor (second switching element) Q2.

  MOS transistor Q1a, resistor R1a, and MOS transistor Q1b in buffer circuit 4a are connected in cascade between a DC power supply Vcc (for example, 12V) and a ground terminal. A common drive signal (first drive signal) is input from the control circuit unit 3 to the gates (control terminals) of the MOS transistors Q1a and Q1b. The resistor R2a is connected between a connection node between the MOS transistor Q1a and the resistor R1a and the gate of the MOS transistor Q1 in the arm circuit 5a.

  The buffer circuit 4a generates a control signal obtained by inverting the phase of the drive signal generated by the control circuit unit 3.

  MOS transistors Q1 and Q2 in arm circuit 5a are connected in cascade between DC power supply Vcc and the ground terminal via resistor R2. A control signal is input from the buffer circuit 4a to the gate (control terminal) of the MOS transistor Q1. On the other hand, a drive signal (second drive signal) is input from the control circuit unit 3 to the gate (control terminal) of the MOS transistor Q2. The connection node of MOS transistors Q1, Q2 is a U terminal, and is connected to one end of U-phase coil Lu.

  When the gate of the MOS transistor Q1 is set low, the MOS transistor Q1 is turned on and the source and drain of the MOS transistor Q1 are conducted. As a result, the voltage Vu at the U terminal is set to high (first reference voltage). On the other hand, when the gate of the MOS transistor Q2 is set high, the MOS transistor Q2 is turned on and the source and drain of the MOS transistor Q2 are conducted. As a result, the voltage Vu at the U terminal is set to low (second reference voltage).

  Capacitor element C1 is connected between DC power supply Vcc and the gate of MOS transistor Q1. Capacitor element C1 reduces the superposition of the pulse signal input to the gate of MOS transistor Q2 as noise on the gate of MOS transistor Q1. Unlike the motor drive circuit 11 of FIG. 3, it is not necessary to provide a resistor for supplying current to the buffer circuits 4a to 4c.

  The buffer circuit 4b and the arm circuit 5b for controlling the voltage Vv at the V terminal and the buffer circuit 4c and the arm circuit 5c for controlling the voltage Vw at the W terminal are the same as the buffer circuit 4a and the arm circuit 5a. To do.

  The control circuit unit 3 generates a drive signal to turn on one of the high-side PMOS transistors Q1, Q3, and Q5 and one of the low-side NMOS transistors Q2, Q4, and Q6. However, both transistors in one arm circuit are not turned on at the same time. For example, the control circuit unit 3 turns on the PMOS transistor Q1 and the NMOS transistor Q4. At this time, the voltage Vu at the U terminal is set to high and the voltage Vv at the V terminal is set to low. As a result, drive current flows from the DC power source Vcc in the order of the MOS transistor Q1, the U-phase coil Lu, the V-phase coil Lv, the MOS transistor Q4, the resistor R2, and the ground terminal. The rotor rotates by switching the drive currents flowing through two of the coils Lu to Lw in order.

  FIG. 2A is a diagram illustrating an example of voltage waveforms of the gate voltage Va of the MOS transistor Q1 and the gate voltage Vb of the MOS transistor Q3, and FIG. 2B is an enlarged view of a portion A in FIG. is there.

  As shown in the figure, since MOS transistors are used for the buffer circuits 4a to 4c, the rise time and the fall of the gate voltage Va of the MOS transistor Q1 and the gate voltage Vb of the MOS transistor Q3 are compared with the case where a bipolar transistor is used. Time can be shortened. Therefore, the turn-on time Ton required for the gate voltages Va and Vb to transition from OFF to ON, that is, the time until the threshold voltage is reached from high, and the turn-off time Toff required for the transition from ON to OFF, that is, the gate The time until the voltages Va and Vb reach the threshold voltage from low is shortened, and the switching loss of the MOS transistors Q1 and Q3 can be reduced.

  The turn-off time Toff is a time required for charging the internal capacitances of the capacitor element C1 and the MOS transistor Q1 from the DC power supply Vcc via the MOS transistor Q1a and the resistor R2a. Therefore, the turn-off time Toff depends on (the combined capacitance of the capacitor element C1 and the internal capacitance of the MOS transistor Q1) * R2a. On the other hand, the turn-on time Ton is a time required to discharge the charges accumulated in the capacitor element C1 and the MOS transistor Q1 to the ground terminal via the resistors R2a, R1a and the MOS transistor Q1b. Therefore, the turn-on time Ton depends on (the combined capacity of the capacitor element C1 and the internal capacity of the MOS transistor Q1) * (R2a + R1a).

  Thus, the turn-on time Ton is longer than the turn-off time Toff by the amount of the resistor R1a. Therefore, as shown in FIG. 2B, after the MOS transistor Q1 is turned off (U phase is turned off) at time t1, the MOS transistor Q3 is turned on (V phase is turned on) at time t2. In other words, one phase does not turn on at the same time as one phase turns off. Therefore, it is not necessary to provide a dead time period in which all phases are set off, and the motor can be driven stably. The period between times t1 and t2, which is the difference between the turn-on time Ton and the turn-off time Toff, can be adjusted by the value of the resistor R1a.

  As the resistor R2a, a connection node between the MOS transistor Q1a and the resistor R1a and the gate of the MOS transistor Q1 may be directly connected without providing a single resistance element, and the wiring resistance may be the resistor R2a. However, in order to make the turn-on time Ton longer than the turn-off time Toff, it is preferable to provide a resistance element as the resistor R1a.

  Further, the turn-on time Ton and the turn-off time Toff depend on not only the value of the capacitor element C1 but also the value of the resistor R2a. Therefore, when the value of the capacitor element C1 is increased, the influence on the turn-on time Ton and the turn-off time Toff is relatively small. Therefore, the value of capacitor element C1 can be set large without significantly increasing turn-on time Ton and turn-off time Toff, and noise superimposed on the signal input to the gate of MOS transistor Q1 can be suppressed. Even if the value of the capacitor element C1 is increased, by increasing the values of the resistors R1a and R2a, the increase in the turn-on time Ton and the turn-off time Toff can be suppressed to the minimum, and the switching loss can be suppressed.

  In addition, since it is not necessary to provide a resistor (for example, the resistor R1 in FIG. 3) for operating the buffer circuits 4a to 4c, power consumption can be suppressed.

  Thus, in this embodiment, since the MOS transistors are used for the buffer circuits 4a to 4c, the turn-on time Ton and the turn-off time Toff can be shortened. Therefore, switching loss can be reduced. Further, when the gate of the MOS transistor Q1 is set high, charging is performed through the resistor R2a, and when it is set low, discharging is performed through the resistors R2a and R1a. Therefore, the turn-on time Ton becomes longer than the turn-off time Toff. Therefore, it is not necessary to provide a dead time period in which all phases are set off, and the motor can be driven stably. Further, the value of the capacitor element C1 can be increased without significantly increasing the turn-on time Ton and the turn-off time Toff, and noise superimposed on the gate of the MOS transistor Q1 can be reduced.

  The motor drive circuit in FIG. 1 is merely an example, and various modifications are possible. For example, a motor drive circuit in which the conductivity type of the transistor is reversed and the connection position of the DC power supply and the ground terminal is reversed accordingly may be configured. In this case, the basic operation principle is the same. For example, the buffer circuit 4a in FIG. 1 includes a PMOS transistor on the DC power supply Vcc side and an NMOS transistor on the ground terminal side. In this case, the buffer circuit 4a inputs a control signal obtained by inverting the phase of the drive signal generated by the control circuit unit 3 to the gate of the MOS transistor Q1. On the other hand, an NMOS transistor may be provided on the DC power supply side and a PMOS transistor may be provided on the ground terminal side. In this case, the buffer circuit 4a inputs the drive signal generated by the control circuit unit 3 to the gate of the MOS transistor Q1 without inverting the phase. In consideration of this, the control circuit unit 3 may generate a drive signal.

  In the motor drive according to the present invention, the entire circuit may be formed on the same semiconductor substrate, or a part of the circuit may be formed on another semiconductor substrate. The motor drive circuit according to the present invention may be mounted on a printed circuit board or the like using discrete components.

  Based on the above description, those skilled in the art may be able to conceive additional effects and various modifications of the present invention, but the aspects of the present invention are not limited to the individual embodiments described above. Absent. Various additions, modifications, and partial deletions can be made without departing from the concept and spirit of the present invention derived from the contents defined in the claims and equivalents thereof.

DESCRIPTION OF SYMBOLS 1 Motor drive circuit 2 Inverter circuit 3 Control circuit part 4a-4c Buffer circuit 5a-5c Arm circuit 10 Motor (brushless DC motor)
Q1, Q3, Q5 PMOS transistor (first switching element)
Q2, Q4, Q6 NMOS transistor (second switching element)
Q1a, Q3a, Q5a PMOS transistors (first MOS transistors)
Q1b, Q3b, Q5b NMOS transistor (second MOS transistor)
R2 resistor R1a, R1b, R1c resistor (first impedance element)
R2a, R2b, R2c Resistance (second impedance element)
C1 to C3 Capacitor element Lu U phase coil Lv V phase coil Lw W phase coil Vcc DC power supply Va, Vb Gate voltage

Claims (6)

A control circuit unit for generating first and second drive signals;
A first switching element that controls whether one end of the motor coil is set to a first reference voltage;
A second switching element that controls whether one end of the coil is set to a second reference voltage by the second drive signal;
A buffer circuit that generates a control signal input to a control terminal of the first switching element based on the first drive signal;
A capacitor element having one end set to the first reference voltage and the other end connected to the control terminal;
With
The buffer circuit is
First and second MOS transistors that perform on / off operations so as not to be turned on simultaneously;
A motor drive circuit comprising: a first impedance element connected between an output side terminal of the first MOS transistor and an output side terminal of the second MOS transistor.   One end is connected to a connection node between the output side terminal of the first MOS transistor and the first impedance element, and the second impedance element is provided to output the control signal from the other end. Item 2. The motor drive circuit according to Item 1. The first MOS transistor is
A first control terminal to which the first drive signal is input;
A first output side terminal set to the first reference voltage;
A second output side terminal connected to one end of the first impedance element,
The second MOS transistor is
A second control terminal to which the first drive signal is input;
A third output-side terminal set to the second reference voltage;
The motor drive circuit according to claim 1, further comprising: a fourth output-side terminal connected to the other end of the first impedance element.   4. The time according to claim 1, wherein the time required for the first switching element to transition from off to on is longer than the time required for the transition from on to off. Motor drive circuit. The first switching element is a PMOS transistor;
The second reference voltage is a ground voltage;
The first reference voltage is higher than the ground voltage;
When the first switching element is turned off, the internal capacitance of the first switching element and the capacitor element are charged from the voltage source of the first reference voltage via the first MOS transistor, and the first switching element is turned on. The charge accumulated in the capacitor and the capacitor element of the first switching element is sometimes discharged through the first impedance element and the second MOS transistor. The motor drive circuit according to any one of the above.   The motor drive circuit according to claim 1, wherein the motor is a brushless DC motor.

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