JP2012064751A - Wiring board, and method of manufacturing semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce warpage of a wiring board after forming a sealing body in manufacturing a semiconductor device.
A wiring board having product areas 102a and 102b composed of one or more product forming portions 101, and mold areas 109a and 109b set on the wiring board so as to include the product area are sealed with resin. In the wiring substrate 100 to be stopped, the product area is arranged and formed in the mold area so as to be eccentric so that the planar center position of the product area deviates from the planar center position of the mold area.
[Selection] Figure 1

Description

  The present invention relates to a wiring board and a method for manufacturing a semiconductor device using the wiring board.

  Conventionally, in manufacturing a BGA (Ball Grid Array) type semiconductor device, a wiring board having a plurality of product forming portions is prepared, and a semiconductor chip is mounted on each of the product forming portions, thereby forming a plurality of products on the wiring substrate. A MAP (Mold Array Process) method is used in which a sealing body is formed by integrally covering portions with a mold resin, and a wiring board is divided into individual product forming portions (Patent Documents 1 and 2).

  In such a MAP method, for example, the planar center position of the product area of the wiring board is configured to be substantially the same position as the planar center position of the mold resin.

JP 2001-044324 A JP 2001-044229 A

  However, when sealing with mold resin, the mold resin is pressed from the gate by a transfer mold to fill the cavity, so the mold resin filler (spherical glass member) on the gate side and air vent side in the cavity Distribution will be different. Specifically, by injecting mold resin into the cavity from the gate by transfer molding, the filler contained in the mold resin flows to the air vent side, so the filler distribution is more on the gate side of the sealing body than on the air vent side. It will decrease.

  Due to such uneven distribution of the filler, there is a problem that the planar balance of the sealing body is lost and the wiring board is warped. In particular, on the gate side where the filler distribution is small, negative warping (warping toward the sealing body side) is large, and warping in the product area in the first row from the gate side is large, resulting in a problem of poor mountability.

  As described above, if the wiring board is warped after the sealing body is formed, there is a possibility that the transportability of the wiring board is lowered and the positioning accuracy to the wiring board is lowered. In addition, there is a risk that the manufacturing efficiency of the semiconductor device may be reduced due to a decrease in the transportability of the wiring board. Furthermore, depending on the decrease in positioning accuracy, the ball mounting accuracy and the substrate cutting accuracy may decrease, and a defective product may be produced.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to reduce the warpage of a wiring board after forming a sealing body in manufacturing a semiconductor device.

  According to one aspect of the present invention, a wiring board having a product area composed of one or more product forming portions, wherein a mold area set in the wiring board so as to include the product area is sealed with a resin In the printed wiring board, the product area is arranged and formed in the mold area so as to be decentered so that the planar center position of the product area deviates from the planar center position of the mold area. A substrate is provided.

  According to another aspect of the present invention, the above-described wiring board, one or more semiconductor chips mounted on the wiring board, and the semiconductor chip sealed together with a mold resin for each mold area. An intermediate structure of a semiconductor device is provided.

  According to still another aspect of the present invention, a step of preparing a wiring board in which a mold area is set so as to include a product area composed of one or more product forming portions, and one or more semiconductors in each product forming portion. The step of mounting the chip and the wiring board on which the semiconductor chip is mounted are set in a molding apparatus, mold resin is injected into the cavity of the molding apparatus, and one or more semiconductor chips are collectively sealed for each mold area. Forming a stopped sealing body, and as the wiring board, the product area is decentered so that a planar center position of the product area deviates from a planar center position of the mold area. A method of manufacturing a semiconductor device is provided, comprising preparing a wiring board that is arranged and formed.

  According to the present invention, when manufacturing a semiconductor device, it is possible to reduce the warpage of the wiring substrate after forming the sealing body, and as a result, it is possible to reduce the warpage of the semiconductor device.

It is the top view and sectional drawing which show the wiring board used for manufacture of the BGA type semiconductor device which concerns on the 1st Embodiment of this invention. It is the top view and sectional view for explaining the chip mounting process of the manufacturing method of the BGA type semiconductor device concerning a 1st embodiment of the present invention. It is the top view and sectional view for explaining the wire bonding process of the manufacturing method of the BGA type semiconductor device concerning a 1st embodiment of the present invention. It is the top view and sectional drawing for demonstrating schematic structure of the shaping | molding apparatus used for the manufacturing method of the BGA type semiconductor device which concerns on the 1st Embodiment of this invention, and a molding process. It is the top view and sectional drawing which show the intermediate structure obtained by the molding process of FIG. It is the top view and sectional view for explaining the ball mounting process of the manufacturing method of the BGA type semiconductor device concerning a 1st embodiment of the present invention. It is the top view and sectional view for explaining the substrate dicing process of the manufacturing method of the BGA type semiconductor device concerning a 1st embodiment of the present invention. It is sectional drawing of the semiconductor device obtained by the board | substrate dicing process of FIG. It is the top view and sectional drawing which show the modification of the wiring board used for this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  With reference to FIGS. 1-8, the manufacturing method of the BGA type semiconductor device which concerns on the 1st Embodiment of this invention is demonstrated.

  1A and 1B are diagrams showing a schematic configuration of a wiring board used for manufacturing the BGA type semiconductor device according to the first embodiment, wherein FIG. 1A is a plan view and FIG. 1B is a cross-sectional view.

  The wiring board 100 is a glass epoxy wiring board having a thickness of 0.2 mm, for example, and has a plurality of product forming portions 101 arranged in a matrix as shown in FIG. The plurality of product forming portions 101 arranged in a matrix form, for example, 16 × 2 product areas 102a and 102b each having a size of 4 × 4. A predetermined wiring pattern (not shown) is formed on each of the plurality of product forming portions 101 of the wiring substrate 100, and the wiring pattern is partially covered with an insulating film (not shown), for example, a solder resist.

  A plurality of connection pads 103 are formed in a portion exposed from the solder resist of the wiring on the one surface side of the product forming portion 101. In addition, a plurality of lands 104 are formed in a portion exposed from the solder resist of the wiring on the other surface of the product forming unit 101. The connection pad 103 and the land 104 corresponding to the connection pad 103 are electrically connected to each other by the wiring 105 of the wiring board 100.

  Further, a frame portion 106 is arranged around the product areas 102a and 102b where the product forming portions 101 are arranged in a matrix. Positioning holes 107 are provided in the frame portion 106 at a predetermined interval so as to enable conveyance and positioning. Further, a dicing line 108 is formed between adjacent product forming portions 101. In this way, a wiring board 100 as shown in FIGS. 1A and 1B is prepared.

  In FIG. 1A, the lower side is the gate side and the upper side is the air vent side. In FIG. 1B, the left side is the gate side and the right side is the air vent side.

  Here, the wiring board used in the manufacture of the BGA type semiconductor device according to the first embodiment has two mold areas 109a and 109b as shown by alternate long and short dash lines in the drawing corresponding to the product areas 102a and 102b. Is set. In particular, the mold areas 102 a and 102 b are set in a substantially central area of the wiring board 100, that is, in an area that is substantially equidistant from the edge of the wiring board 100. Up to now, the two product areas are shown as broken lines as normal product areas in the figure so that the respective planar centers substantially coincide with the planar centers of the corresponding mold areas 109a and 109b. It was arranged and formed in the mold areas 109a and 109b.

  On the other hand, in the wiring substrate 100 used in the first embodiment, the product areas 102a and 102b have their planar center positions deviated from the planar centers of the corresponding mold areas 109a and 109b. Eccentric and arranged and formed in the mold areas 109a and 109b. Here, in particular, the product areas 102a and 102b are respectively shifted from the conventional arrangement position indicated by a broken line in the drawing to the air vent side by a distance d1 and away from each other (direction perpendicular to the direction from the gate to the air vent, that is, FIG. 1). They are arranged so as to be shifted by a distance d2 in the horizontal direction (a).

  Next, as shown in FIGS. 2A and 2B, the wiring substrate 100 is shifted to a chip mounting process, and the semiconductor chip 200 is mounted on each product forming unit 101.

  In the semiconductor chip 200, for example, a logic circuit and a memory circuit are formed on one surface of a Si substrate, and a plurality of electrode pads (not shown) are formed in the vicinity of the periphery. A passivation film (not shown) is formed on one surface of the semiconductor chip excluding the electrode pads to protect the circuit formation surface.

  Then, in the chip mounting process, the other surface of the semiconductor chip 200 (one surface on which the electrode pad is formed is defined at a substantially central portion of the product forming portion 101 on one surface side of the wiring substrate 100 by using a die bonding apparatus (not shown). The opposite surface is bonded and fixed via an insulating adhesive or DAF (Die Attached Film). The wiring substrate 100 on which the semiconductor chip 200 is mounted on all the product forming portions 101 is transferred to the wire bonding process.

  In the wire bonding step, referring to FIGS. 3A and 3B, the electrode pads formed on one surface of the semiconductor chip 200 and the corresponding connection pads 103 of the product forming unit 101 are connected to the conductive wires 110. Connect with. The wire 110 is made of, for example, Au or Cu. One end of the wire 110 melted and formed with a ball at the tip is connected by ultrasonic thermocompression bonding onto the electrode pad of the semiconductor chip 200 by a wire bonding apparatus (not shown), and then a predetermined loop shape is drawn. The other end is connected to the corresponding connection pad 103 by ultrasonic thermocompression bonding. The wiring board 100 in which the wire connection to all the product forming units 101 is completed is configured as shown in FIG. 3 and is transferred to the molding process.

  Next, the sealing process of the semiconductor device according to the first embodiment of the present invention will be described.

  FIG. 4 is a cross-sectional view illustrating a schematic configuration of a molding apparatus (transfer mold apparatus) used in the sealing process of the semiconductor device according to the first embodiment.

  As shown in FIG. 4A, the molding apparatus 300 has a molding die including an upper mold 301 and a lower mold 302. A cavity 303 is formed in the upper mold 301, and a recess 304 for mounting the wiring substrate 100 is formed in the lower mold 302.

  The wiring substrate 100 (see FIG. 3) that has undergone the wire bonding is set in the concave portion 304 of the lower mold 302, as shown in FIG. 4B. Then, by closing the upper mold 301 with respect to the lower mold 302, a space corresponding to the cavity 303 and the gate 305 having a predetermined size is formed above the wiring substrate 100. As shown in FIG. 1A and the like, the molding apparatus 300 has a plurality of (here, three) gates 305 for one mold area. In this embodiment, since it is configured by the MAP method, the cavity 303 is configured to have a size that collectively covers the plurality of product forming units 101. In this embodiment, the cavity 303 is divided and arranged in two so as to correspond to the mold areas 109a and 109b. And the tablet 306 (resin tablet) is supplied to the pot of the lower mold | type 302, and it heat-melts.

  Then, as shown in FIG. 4C, the molten mold resin 307 is injected into the cavity 303 by the plunger 308 via the cal 305-1, the runner 305-2, and the gate 305-3. After the cavity 303 is filled with the mold resin 307, the mold resin 307 is cured by curing at a predetermined temperature, for example, 180 ° C., and two sealing bodies corresponding to the two mold areas are formed.

  Thereafter, the molding die of the molding apparatus 300 is opened, the wiring board 100 with the sealing body is taken out, and the sealing body is completely cured by reflowing at a predetermined temperature, for example, 240 ° C. In addition, as shown in FIG.4 (d), the sealing body taken out from the molding die has mold resin in the part corresponding to the cal 305-1 of the molding die, the runner 305-2, and the gate 305-3. Remains but is removed.

  In this way, as shown in FIGS. 5A and 5B, two sealing bodies 401a and 401b each sealing the two mold areas 109a and 109b set on the wiring board 100 with the resin are provided. The intermediate structure 400 of the formed semiconductor device is formed.

  The two sealing bodies 401a and 401b of the intermediate structure 400 are each formed in an area approximately equidistant from the edge of the wiring board 100. In the two sealing bodies 401a and 401b, the product area 102a, Reference numeral 102b denotes a position where the respective planar centers are decentered from the planar centers of the sealing bodies 401a and 401b. In other words, the product area 102a in which the plurality of semiconductor chips 200 are mounted and the product area 102b in which the plurality of semiconductor chips 200 are mounted are closer to the air vent and away from each other in the sealing bodies 401a and 401b (FIG. 5 ( It is sealed in a region that is eccentric (offset) on the side of (a) in the left-right direction). Note that the upper surfaces of the sealing bodies 401a and 401b are flat.

  In this way, by offsetting the product area on the air vent side in the mold area, the region on the gate side of the mold resin (sealing body) can be out of the product area without changing the molding die. . As a result, the area of the mold resin on the gate side where the amount of filler distribution is small and resin warpage is likely to occur can be outside the product area, and warpage of the semiconductor device can be reduced.

  In the mold area, the two product areas are offset in the direction away from each other, that is, in the left-right direction in FIG. In this case, as shown in FIG. 1A as gate positions, a plurality of gates of the molding die 300 are defined as dicing lines 108 defined between the semiconductor chips 200 mounted on the product forming portion 101 as much as possible. The two product areas 102a and 102b can be offset in the left-right direction so as to be arranged at positions corresponding to (FIG. 1), thereby improving the fluidity of the molten resin injected into the mold area in the molding process. be able to. Thereby, generation | occurrence | production of the void to a mold area can be reduced.

  In the first embodiment, since the product area is offset in the mold area, the size of the wiring board, the mold area of the wiring board, and the mold are fixed without change. Therefore, it is possible to reduce the warpage of the semiconductor device and improve the fluidity of the sealing resin without impairing the versatility of the wiring board.

  In the first embodiment, in the two mold areas, the two product areas are offset from the air vent side in the left-right direction, but the product areas are offset from only one of the two mold areas. You may do it.

  Next, the wiring board 100 is transferred to a ball mounting process, and as shown in FIGS. 6A and 6B, a conductive material is formed on the plurality of lands 104 arranged in a lattice pattern on the other surface of the wiring board 100. The solder balls 500 are mounted, and bump electrodes serving as external terminals are formed.

  In the ball mounting process, using a suction mechanism (not shown) in which a plurality of suction holes are formed in accordance with the arrangement of the lands 104 on the wiring substrate 100, a solder ball 500 made of, for example, solder or the like is held in the suction holes. The solder balls 500 are collectively mounted on the lands 104 of the wiring board 100 via a flux.

  After the solder balls 500 are mounted on all the product forming portions 101, the wiring substrate 100 is reflowed to form bump electrodes (external terminals). Since the sealing bodies 401a and 401b reduce the warp of the intermediate structure 400, the solder balls 500 can be satisfactorily mounted.

  Next, the wiring substrate 100 on which the solder balls 500 are mounted is transferred to a substrate dicing process.

  As shown in FIGS. 7A and 7B, the wiring substrate 100 is cut along a plurality of dicing lines 108 in the vertical and horizontal directions and separated into product forming portions 101. In the substrate dicing step, the sealing bodies 401a and 401b side of the wiring substrate 100 are bonded to the dicing tape 600, and the wiring substrate 100 is supported by the dicing tape 600. Thereafter, the wiring board 100 is cut along vertical and horizontal dicing lines by a dicing blade of a dicing apparatus (not shown) and cut and separated for each product forming portion 101. After cutting and separating, the semiconductor device 700 as shown in FIG. 8 is obtained by picking up from the dicing tape 600. As described above, the semiconductor chip 200 is bonded and fixed on the wiring substrate 100 with the adhesive 701.

  As mentioned above, although this invention was demonstrated based on embodiment, it cannot be overemphasized that this invention is not limited to the said embodiment, and can be variously changed in the range which does not deviate from the summary.

  For example, in the above embodiment, the case where the product areas 102a and 102b are offset to the air vent side in the mold areas 109a and 109b has been described. However, as shown in FIG. 9, the product areas 102a ′ and 102b ′ are It may be configured to be offset by a distance d3 on the gate side in 109b. When the product area is offset to the gate side within the mold area, the air vent area is provided in the product area, so that generation of voids on the air vent side of the product area can be reduced. Of course, in FIG. 9, the two product areas 102 a ′ and 102 b ′ may be offset from each other in the left and right directions within the two mold areas 109 a and 109 b.

  In the above-described embodiment, the case where the present invention is applied to a semiconductor device in which one semiconductor chip is mounted in one product forming portion has been described. However, an MCP (Multi Chip Package) type semiconductor in which a plurality of semiconductor chips are juxtaposed or stacked and mounted. You may apply to an apparatus.

  Moreover, although the said embodiment demonstrated the wiring board which consists of a glass epoxy base material, you may apply to the flexible wiring board etc. which consist of a polyimide base material.

DESCRIPTION OF SYMBOLS 100 Wiring board 101 Product formation part 102a, 102b Product area 103 Connection pad 104 Land 105 Wiring 106 Frame part 107 Positioning hole 108 Dicing line 200 Semiconductor chip 110 Wire 300 Molding apparatus 301 Upper mold 302 Lower mold 303 Cavity 304 Recess 305-1 Cal 305-2 Runner 305-3 Gate 306 Tablet 307 Mold resin 308 Plunger 400 Intermediate structure

Claims (11)

In a wiring board having a product area composed of one or more product forming portions, wherein a mold area set in the wiring board so as to include the product area is sealed with a resin,
A wiring board, wherein the product area is arranged and formed in the mold area so as to be decentered so that a planar center position of the product area deviates from a planar center position of the mold area.   The mold area set on the wiring board has a portion corresponding to the gate side of the molding apparatus and a portion corresponding to the air vent side of the molding apparatus, and the product area corresponds to the air vent side of the mold area. The wiring board according to claim 1, wherein the wiring board is arranged and formed in the mold area so as to be eccentric toward a partial side.   There are at least two product areas, and at least two mold areas are set so as to include the two product areas, respectively, and the two product areas are arranged in the corresponding mold areas and away from each other. The wiring board according to claim 1, wherein the wiring board is eccentrically arranged and formed. Each of the two mold areas is sealed with resin by injection of mold resin through a plurality of gates of a molding apparatus,
The product area is composed of a plurality of product forming portions arranged in a matrix, and a dicing line is set between adjacent product forming portions,
The eccentricity of the product area in the direction away from each other is set so that a portion corresponding to the plurality of gates in the mold area and a plurality of the dicing lines correspond to each other. Item 4. The wiring board according to Item 3.   The mold area set on the wiring board has a portion corresponding to the gate side of the molding apparatus and a portion corresponding to the air vent side of the molding apparatus, and the product area corresponds to the gate side of the mold area. The wiring board according to claim 1, wherein the wiring board is arranged and formed in the mold area so as to be eccentric toward a partial side. The wiring board according to any one of claims 1 to 5,
One or more semiconductor chips mounted on the wiring board;
An intermediate structure of a semiconductor device, comprising: a sealing body in which the semiconductor chip is collectively sealed with a mold resin for each mold area. Preparing a wiring board in which a mold area is set so as to include a product area composed of one or more product forming portions;
Mounting one or more semiconductor chips in each product forming section;
The wiring board on which the semiconductor chip is mounted is set in a molding apparatus, and a molding resin is injected into the cavity of the molding apparatus to form a sealing body in which one or more semiconductor chips are collectively sealed for each mold area. Including the steps of:
Preparing as the wiring board a wiring board in which the product area is eccentrically disposed and formed in the mold area such that the planar center position of the product area deviates from the planar center position of the mold area. A method of manufacturing a semiconductor device.   The mold area set on the wiring board has a portion corresponding to the gate side of the molding device and a portion corresponding to the air vent side of the molding device, and the product area is on the air vent side of the mold area. The method of manufacturing a semiconductor device according to claim 7, wherein the semiconductor device is arranged and formed in the mold area so as to be decentered toward a corresponding partial side.   The wiring board has at least two product areas, and at least two mold areas are set so as to include the two product areas, respectively, and the two product areas are in corresponding mold areas. 9. The method of manufacturing a semiconductor device according to claim 7, wherein the semiconductor device is arranged and formed in an eccentric manner in a direction away from each other. The sealing body is formed by injecting mold resin into a cavity through a plurality of gates in the molding apparatus,
The product area is composed of a plurality of product forming portions arranged in a matrix, and a dicing line is set between adjacent product forming portions,
The eccentricity of the product area in the direction away from each other is set such that portions corresponding to the plurality of gate sides in the mold area and a plurality of the dicing lines have a corresponding arrangement relationship. A method for manufacturing a semiconductor device according to claim 9.   The mold area set on the wiring board has a portion corresponding to the gate side of the molding device and a portion corresponding to the air vent side of the molding device, and the product area is on the gate side of the mold area. The method of manufacturing a semiconductor device according to claim 7, wherein the semiconductor device is arranged and formed in the mold area so as to be decentered toward a corresponding partial side.

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