JP2012060511A - Electric charge detection circuit, and inspection method thereof - Google Patents

Abstract

Provided is an integrating amplifier that improves durability against static electricity and the like, improves inspection accuracy, and shortens inspection time.
An operational amplifier OP and an integration circuit 41 including a sampling capacitor Cf connected between an inverting input terminal and an output terminal of the operational amplifier OP are provided. A mode switch SWtest that can switch between opening and closing of the electrical connection between the input terminal IN and the inverting input terminal of the operational amplifier OP is provided. The inspection circuit 42 includes a transfer capacitor CT and switches SW1 to SW4 for charging and discharging the transfer capacitor CT. The inspection circuit 42 sends a part of the charged charge to the sampling capacitor Cf by discharging the transfer capacitor CT. There is a discharge switch SWinit that discharges the sampling capacitor Cf while the transfer capacitor CT is charged by the switches SW1 to SW4.
[Selection] Figure 1

Description

  An embodiment of the present invention includes an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, and an integrating circuit including a feedback capacitor connected between the inverting input terminal and the output terminal of the operational amplifier. The present invention relates to a charge detection circuit having the same and an inspection method thereof.

  A planar X-ray detector using an active matrix has been developed as a new generation X-ray diagnostic detector. In this flat X-ray detector, by detecting the irradiated X-rays, an X-ray image or a real-time X-ray image is output as an electrical signal.

  In this X-ray detector, X-rays are converted into visible light, that is, fluorescence by a scintillator layer, and this fluorescence is converted into signal charges by a photoelectric conversion element such as an amorphous silicon (a-Si) photodiode or a CCD (Charge Coupled Device). Convert. Alternatively, X-rays are converted into charges by the charge generation layer, and the charges are read as signal charges.

  At this time, since the signal charge is extremely small, it is amplified and output by an integration amplifier, that is, a charge amplifying circuit (hereinafter referred to as CSA) which is a charge detection circuit, and sequentially converted into a digital signal by an A / D converter. By converting, the charge signals having these digital values are sequentially arranged according to the row and column of pixels to obtain an image.

JP 2003-133537 A

  In the CSA, a charge signal is read from an inspection system connected to the outside, and its operation is tested. In CSA, a minute charge signal must be read out. However, an electrostatic protection circuit or the like normally connected to an input circuit leads to a leakage current at the time of reading a charge signal and may cause a data error of the read charge signal. It is preferable to do. For this reason, this electrostatic protection circuit has a lower electrostatic withstand voltage than a general electrostatic protection circuit. Therefore, it is desired to prevent electrostatic breakdown or the like when connecting a test system. In addition, it is desired to suppress the inspection time by using a minute charge for inspection as an appropriate input amount accurately.

  The present invention has been made in view of the above points, and provides a charge detection circuit and an inspection method thereof that improve durability against static electricity during inspection, improve inspection accuracy, and shorten inspection time. The purpose is to do.

  The charge detection circuit of the embodiment includes an inverting input terminal, a non-inverting input terminal, and an output terminal, an operational amplifier having an output terminal electrically connected to the output terminal unit, and the inverting input terminal and the output terminal of the operational amplifier And an integrating circuit having a feedback capacitor connected between them. The charge detection circuit also has mode switching means capable of switching between opening and closing of the electrical connection between the input terminal portion and the inverting input terminal of the operational amplifier. The charge detection circuit further includes a charge transfer capacity and charge / discharge switching means for charging / discharging the charge transfer capacity in a state where the electrical connection between the input terminal unit and the inverting input terminal of the operational amplifier is interrupted by the mode switching means. And an inspection circuit for sending a part of the charge charged in the charge transfer capacitor to the feedback capacitor of the integration circuit by discharging the charge transfer capacitor. The charge detection circuit has discharge means for discharging the feedback capacity in a state where the charge transfer capacity is charged by the charge / discharge switching means.

  In the charge detection circuit inspection method of the embodiment, the electrical connection between the input terminal unit and the inverting input terminal of the operational amplifier is cut off by the mode switching means. Further, in the inspection method of the charge detection circuit, the charge transfer capacity is charged by the charge / discharge switching means and the feedback capacity is discharged by the discharge means. In the inspection method for the charge detection circuit, the charge transfer capacity is discharged by the charge / discharge switching means, and a part of the charge charged in the charge transfer capacity is sent to the feedback capacity.

It is a circuit diagram which shows the electric charge detection circuit of one Embodiment. It is a circuit diagram which shows the normal operation mode state of a charge detection circuit same as the above. It is a circuit diagram which shows the initial state in the test | inspection mode of a charge detection circuit same as the above. It is a circuit diagram which shows the charge state of the capacitor in the test | inspection mode of a charge detection circuit same as the above. It is a circuit diagram which shows the discharge state of the capacitor in the test | inspection mode of a charge detection circuit same as the above. It is a timing chart which shows the operation timing of each switching means of a charge detection circuit same as the above. It is a block diagram of the X-ray detector as a radiation detector provided with the charge detection circuit same as the above. It is a perspective view of the decomposition | disassembly state of a X-ray detector same as the above. It is a front view showing an X-ray detector typically.

  Hereinafter, the configuration of an embodiment will be described with reference to FIGS.

  In FIG. 8, reference numeral 10 denotes an X-ray detector as a radiation detector. The X-ray detector 10 is an indirect X-ray image detector, and includes an X-ray detector main body 11 as a radiation detector main body. The X-ray detector main body 11 includes a photoelectric conversion substrate 13 having a plurality of pixels 12 arranged in a matrix, and fluorescence as a phosphor that is an input surface stacked on the surface of the photoelectric conversion substrate 13 The conversion film 14 is used.

  The photoelectric conversion substrate 13 has a circuit substrate 17 in which a circuit layer 16 is formed on a flat substrate 15 as a substrate mainly composed of glass, and a photodiode 18 as a photoelectric conversion element is formed on the circuit substrate 17. Each pixel 12 is formed.

  When X-rays 19 as radiation enter the fluorescence conversion film 14, visible light corresponding to the two-dimensional distribution of the X-rays 19 is generated in the fluorescence conversion film 14, and the generated visible light enters the photodiode 18. Then, it is converted into electric charge, and image information is obtained.

  Next, a front view schematically showing the X-ray detector 10 is shown in FIG.

  A thin film transistor (TFT) 21 serving as a switching element, a capacitor 22 serving as a capacitor, and a photodiode 18 are arranged in a lattice pattern as a set, and each set corresponds to a pixel 12 of an X-ray image. On the planar substrate 15, a plurality of selection lines (or signal lines or gate lines) 23 connecting the gate electrodes of the respective thin film transistors 21 are arranged in the row direction, and a plurality of signal lines 24 connecting the drains of the respective thin film transistors 21 are arranged. Are arranged in the column direction.

  Next, FIG. 7 shows a configuration diagram of the X-ray detector 10.

  A drive circuit 31 is connected to each selection line 23 of the X-ray detector main body 11, and an output circuit 32 is connected to each signal line 24.

  The drive circuit 31 includes a plurality of gate drivers 33 connected to the selection lines 23 of the X-ray detector main body 11 and a row selection circuit 34 connected to the gate drivers 33. The gate driver 33 has a function of sequentially changing the voltage of the selection line 23 when receiving a signal from the row selection circuit 34. The row selection circuit 34 has a function of sending a signal to the corresponding gate driver 33 in accordance with the scanning direction of the X-ray image.

  The output circuit 32 includes an integration amplifier (CSA) 35 that is a charge amplification circuit as a plurality of charge detection circuits connected to each signal line 24 of the X-ray detector main body 11. An A / D converter 36 is connected to these integrating amplifiers 35, and an image synthesis circuit 37 is connected to these A / D converters 36.

  The integrating amplifier 35 includes an integrating circuit 41 that is an amplifying unit between an input terminal unit IN electrically connected to the signal line 24 and an output terminal unit OUT electrically connected to the A / D converter 36. A test circuit 42 electrically connected to the inverting input terminal of the integration circuit 41, and a normal operation mode and a test mode are provided between the test circuit 42 and the input terminal section IN. A mode switch SWtest as a mode switching means for switching is electrically connected. Further, although not shown in the figure, an electrostatic protection circuit is electrically connected to the integrating amplifier 35 between the input terminal IN and the mode switch SWtest. The integrating amplifier 35 has a function of amplifying and outputting an extremely small charge signal output from the X-ray detector 10. Further, in the integrating amplifier 35, an integrating circuit 41 and an inspection circuit 42 are formed on one chip.

  The integration circuit 41 is a sampling as a feedback (feedback) capacitor for sampling an input signal that is electrically connected between an inverting input terminal and an output terminal of the operational amplifier OP as an amplifier main body, and the inverting input terminal of the operational amplifier OP. And a capacitor Cf to form a negative feedback circuit. In parallel with the sampling capacitor Cf, a discharge switch SWinit is electrically connected as a discharge (reset) discharge means for short-circuiting the input signal and the output signal.

  The operational amplifier OP has a non-inverting input terminal electrically connected to the reference potential Vref, and an output terminal electrically connected to the output terminal portion OUT. Further, the inverting input terminal of the operational amplifier OP can be electrically connected to the input terminal portion IN via the mode switch SWtest.

  On the other hand, the inspection circuit 42 includes a transfer capacitor CT as a charge transfer capacity for sending (transfer) charges, switches SW1 and SW2 which are charge changeover switches as charge / discharge changeover means, and charge / discharge changeover means as charge / discharge changeover means. It has switches SW3 and SW4 which are discharge changeover switches, and constitutes a switched capacitor circuit. The switched capacitor circuit is controlled by control means (not shown) that switches the switches SW1 to SW4.

  The transfer capacitor CT can have an arbitrary capacity, but preferably has the same capacitance value as the sampling capacitor Cf, for example.

  The switch SW1 is electrically connected between one end of the transfer capacitor CT and the reference potential Vtest for inspection. Further, the switch SW2 is electrically connected between the other end of the transfer capacitor CT and the common potential Vcom. The switches SW1 and SW2 are switched on and off (on / off) by a predetermined input clock by the control means, and the switches SW1 and SW2 are closed (on) so that the transfer capacitor CT is connected to the reference potential Vtest and the common potential. It is configured to charge with a voltage difference from Vcom.

  The switch SW3 is electrically connected between one end of the transfer capacitor CT and the common potential Vcom. The switch SW4 is electrically connected between the other end of the transfer capacitor CT and the inverting input terminal of the operational amplifier OP. These switches SW3 and SW4 are opened and closed (on / off) by a predetermined output clock by the control means, and when the switches SW3 and SW4 are closed (on), the charge charged in the transfer capacitor CT is sampled. It is configured to be sent (moved) to the capacitor Cf.

  The reference potential Vtest has a predetermined voltage value set in advance, for example, and the common potential Vcom is set to a ground potential, for example.

  The control means is formed on one chip together with the integration circuit 41 and the inspection circuit.

  The electrostatic protection circuit is a protection circuit for preventing electrostatic breakdown, and is manufactured in a small size so as to reduce the leakage current when the integration amplifier 35 reads the charge signal. In the case of the X-ray detector 10, the electrostatic protection circuit is not an essential configuration. In other words, since the X-ray detector 10 handles a minute charge signal, there are cases where the electrostatic protection circuit cannot be formed in consideration of the influence of the leakage current in the electrostatic protection circuit on the detection accuracy.

  The A / D converter 36 sequentially converts signals output from the integrating amplifiers 35 into digital signals.

  Further, the image composition circuit 37 sequentially arranges the charge signals converted into digital values by the A / D converter 36 according to the rows and columns of the pixels 12 arranged in the X-ray detector main body 11 and outputs them as image signals to the outside. Output.

  Although not shown, the X-ray detector 10 includes a control circuit that controls the X-ray detector 10, a power supply circuit that supplies power to the X-ray detector 10, and the like. Further, the X-ray detector main body 11, the drive circuit 31, the output circuit 32, a circuit including a control circuit, and the like are accommodated in a casing (not shown).

  Next, the operation of such an X-ray detector 10 will be described.

  In the initial state, charges are stored in the capacitor 22, and a reverse bias voltage is applied to the photodiodes 18 connected in parallel. The voltage at this time is the same as the voltage applied to the selection line 23. Since the photodiode 18 is a kind of diode, even if a reverse bias voltage is applied, almost no current flows. For this reason, the electric charge stored in the capacitor 22 is held without decreasing.

  In this situation, when X-rays 19 are incident on the fluorescence conversion film 14, the high-energy X-rays 19 are converted into a large amount of low-energy fluorescent light within the fluorescence conversion film 14. Part of the fluorescence generated inside the fluorescence conversion film 14 reaches the photodiode 18 disposed on the surface of the photoelectric conversion substrate 13.

  Fluorescence incident on the photodiode 18 is converted into charges consisting of electrons and holes inside the photodiode 18, and reaches both terminals of the photodiode 18 along the electric field direction applied by the capacitor 22. It is observed as a current flowing through the photodiode 18.

  The current flowing through the photodiode 18 generated by the incidence of fluorescence flows into the capacitor 22 connected in parallel, and acts to cancel the charge stored in the capacitor 22. As a result, the charge stored in the capacitor 22 decreases, and the potential difference generated between the terminals of the capacitor 22 also decreases compared to the initial state.

  The selection line 23 shown in FIG. 9 is connected to the specific selection line 23 of the gate driver 33 shown in FIG. The gate driver 33 has a function of changing the potential of a large number of selection lines 23 in order. At a specific time, the gate driver 33 has only one selection line 23 whose potential is changing, and the terminals between the source and drain of the thin film transistor 21 connected in parallel to the selection line 23 whose potential has changed are insulated. Changes from the current state to the conductive state.

  A specific voltage is applied to each selection line 23 and is applied to the capacitor 22 connected through the source and drain terminals of the thin film transistor 21 connected to the selection line 23 whose potential has been converted.

  Since the capacitor 22 is in the same potential state as the signal line 24 in the initial state, if the amount of charge in the capacitor 22 is not changed from the initial state, no charge transfer from the signal line 24 occurs in the capacitor 22. However, in the capacitor 22 connected in parallel with the photodiode 18 in which the fluorescence generated inside the fluorescence conversion film 14 is incident from the X-ray 19 from the outside, the charge stored inside is reduced, and the initial state The electric potential of is changed. For this reason, charge transfer occurs from the signal line 24 through the thin film transistor 21 in the conductive state, and the amount of charge stored in the capacitor 22 returns to the initial state. In addition, the amount of electric charge that has moved becomes a signal that flows through the signal line 24 and is transmitted to the outside.

  The signal line 24 in FIG. 9 is connected to the integrating amplifier 35 shown in FIG. The signal lines 24 are connected one-to-one to the integrating amplifiers 35 corresponding thereto. The current flowing through the signal line 24 is input to the corresponding integrating amplifier 35 from the input terminal section IN shown in FIG. In the integrating amplifier 35, as shown in FIG. 2, only the mode switch SWtest is closed (ON), and the other switches SW1 to SW4 and SWinit are open (OFF) (normal operation mode). In this integrating amplifier 35, the conductor entered from the input terminal section IN flows into the sampling capacitor Cf electrically connected to the inverting input terminal of the operational amplifier OP as it is, and according to the amount of charge accumulated in the sampling capacitor Cf. The operational amplifier OP outputs a voltage to the output terminal section OUT. That is, the integration amplifier 35 has a function of integrating the current flowing within a predetermined time and outputting a voltage corresponding to the integration value from the output terminal portion OUT to the outside. By performing this operation, the amount of charge flowing through the signal line 24 within a certain time can be converted into a voltage value. As a result, the charge signal generated inside the photodiode 18 corresponding to the fluorescence intensity distribution generated inside the fluorescence conversion film 14 by the X-ray 19 is converted into potential information by the integrating amplifier 35.

  The potential generated by the integrating amplifier 35 is sequentially converted into a digital signal by the A / D converter 36. The signals that have become digital values are sequentially arranged in accordance with the rows and columns of the pixels 12 inside the image composition circuit 37, and are output to the outside as image signals.

  By continuously performing such an operation, the X-ray image information incident from the outside is converted into image information by an electric signal and output to the outside. Image information based on the electrical signal output to the outside can be easily imaged by a normal display device, and an X-ray image of the image can be observed as an image by visible light.

  Then, an inspection method for each integrating amplifier 35 will be described.

  As shown in FIG. 6, the mode switch SWtest is opened (turned off), and the input terminal IN and the internal circuit (integration circuit 41 and test circuit 42) are disconnected to enter the initial state of the test mode shown in FIG. Thereafter, the switches SW1 and SW2 and the discharge switch SWinit are simultaneously closed (turned on), whereby the charging state shown in FIG. 4 is achieved. That is, in this state, the transfer capacitor CT is charged with the potential difference (Vtest−Vcom) to store the charge CT · (Vtest−Vcom) and the sampling capacitor Cf is discharged. Here, CT represents the capacitance value of the transfer capacitor CT, Vtest represents the reference potential Vtest potential, and Vcom represents the common potential Vcom potential.

  Thereafter, as shown in FIG. 6, after the switches SW1 and SW2 and the discharge switch SWinit are simultaneously opened (off), the switches SW3 and SW4 are simultaneously closed (on), so that the discharge state shown in FIG. It becomes. That is, a part of the electric charge is switched and output from the charged transfer capacitor CT, and this electric charge becomes a minute electric charge for inspection and is sent to the sampling capacitor Cf. Therefore, the voltage across the sampling capacitor Cf is CT / Cf · (Vtest−Vcom). Therefore, the voltage at the output terminal OUT, which is the output side of the operational amplifier OP, is CT / Cf · (Vtest−Vcom) + Vref. Here, Cf represents the capacitance value of the sampling capacitor Cf, and Vref represents the potential of the reference potential Vref. That is, an accurate charge proportional to the potential difference between the reference potential Vtest and the common potential Vcom is input to the integrating circuit 41, and a desired voltage is output to the output terminal portion OUT.

  As described above, according to the embodiment described above, the charge charged in the transfer capacitor CT is sent to the sampling capacitor Cf in a state where the input terminal IN is electrically cut off. An input terminal IN that has a relatively low electrostatic protection effect by reducing the electrostatic protection circuit or preventing the formation of an electrostatic protection circuit in order to prevent leakage current or other data errors in the read charge signal. Thus, the integration amplifier 35 can be inspected without being affected by disturbance or the like without connecting any inspection equipment or the like. The capacitors Cf and CT include a manufacturing error of about 10%, for example. However, since the voltage obtained at the output terminal OUT during the inspection is proportional to the capacitance ratio of the capacitors Cf and CT, the capacitors Cf and CT are manufactured. Regardless of the above error, the inspection can be performed in a short period of time with high accuracy and accurate minute charge input proportional to the potential difference between the reference potential Vtest and the common potential Vcom at the time of inspection. That is, according to the above embodiment, it is possible to improve the inspection accuracy and shorten the inspection time while improving the durability against static electricity or the like during the inspection.

  Moreover, since the above inspection is performed with the input terminal IN electrically disconnected, for example, if an abnormality occurs during normal operation of the X-ray detector 10, is the cause on the X-ray detector main body 11 side? It is possible to easily and immediately specify whether it is on the side of the integrating amplifier 35 (integrating circuit 41).

  Further, by forming the integration circuit 41, the inspection circuit 42, and the (control means) on one chip, the integration circuit 41, the inspection circuit 42, and the (control means) are configured separately. As a result, downsizing and simplification of the structure can be achieved, and mounting becomes easier and productivity can be improved.

  In the above embodiment, the X-ray detector 10 is not limited to the above configuration. That is, the photoelectric conversion substrate 13 and the like can be arbitrarily configured.

  The integration amplifier 35 is applicable not only to the X-ray detector 10 but also to any circuit that detects minute signals, such as a circuit that detects cosmic rays.

35 Integration Amplifier as Charge Detection Circuit
41 Integration circuit
42 Inspection circuit
Cf Sampling capacitor as feedback capacitance
CT transfer capacitor as charge transfer capacity
IN input terminal
OP operational amplifier
OUT output terminal
SW1 to SW4 Switches as charge / discharge switching means
SWinit Discharge switch as discharge means
SWtest Mode switch as mode switching means

Claims (3)

Input terminal section,
An output terminal,
An operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, the output terminal being electrically connected to the output terminal portion, and between the inverting input terminal and the output terminal of the operational amplifier An integrator circuit with a connected feedback capacitor;
Mode switching means capable of switching opening and closing of the electrical connection between the input terminal portion and the inverting input terminal of the operational amplifier;
A charge transfer capacity; and charge / discharge switching means for charging / discharging the charge transfer capacity in a state where electrical connection between the input terminal portion and the inverting input terminal of the operational amplifier is interrupted by the mode switching means, A test circuit for sending a part of the charge charged in the charge transfer capacitor by discharging the transfer capacitor to the feedback capacitor of the integrating circuit;
Discharge means for discharging the feedback capacity in a state where the charge transfer capacity is charged by the charge / discharge switching means. The charge detection circuit according to claim 1, wherein the integration circuit and the inspection circuit are formed on one chip. An input terminal section, an output terminal section, an operational amplifier whose output terminal is electrically connected to the output terminal section, and a feedback capacitor connected between the inverting input terminal and the output terminal of the operational amplifier An integration circuit, mode switching means capable of switching opening and closing of the electrical connection between the input terminal section and the inverting input terminal of the operational amplifier, a charge transfer capacity, and a charge / discharge capable of charging / discharging the charge transfer capacity A test method for a charge detection circuit comprising a test circuit having a switching means and a discharge means capable of discharging the feedback capacitance,
The electrical connection between the input terminal unit and the inverting input terminal of the operational amplifier is cut off by the mode switching means,
The charge transfer capacity is charged by the charge / discharge switching means and the feedback capacity is discharged by the discharge means,
A method for inspecting a charge detection circuit, comprising: discharging a portion of the charge transfer capacitor by discharging the charge transfer capacitor using the charge / discharge switching means;

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