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JP2012059964A - Emission wavelength adjustment method of semiconductor optical device and method for manufacturing semiconductor optical device using the same - Google Patents

Emission wavelength adjustment method of semiconductor optical device and method for manufacturing semiconductor optical device using the same Download PDF

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JP2012059964A
JP2012059964A JP2010202396A JP2010202396A JP2012059964A JP 2012059964 A JP2012059964 A JP 2012059964A JP 2010202396 A JP2010202396 A JP 2010202396A JP 2010202396 A JP2010202396 A JP 2010202396A JP 2012059964 A JP2012059964 A JP 2012059964A
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active layer
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emission wavelength
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Masako Kobayakawa
将子 小早川
Junji Yoshida
順自 吉田
Noriyuki Yokouchi
則之 横内
Akihiko Kasukawa
秋彦 粕川
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Furukawa Electric Co Ltd
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Abstract

【課題】活性層での発光波長を所望の波長となるように調整でき、歩留まりを向上させる半導体光素子の製造方法を提供すること。
【解決手段】イオウがドープされたn型InP基板1の上に、順次、n型InPクラッド層2、GaInAsP活性層3、p型InPクラッド層4、p型GaInAsPキャップ層11を成長させる。再成長温度から再成長の際の短波長シフト量を予想し、最終的に得たいGaInAsP活性層3のPL発光のピーク波長の値である1.48μmに、予想した短波長シフト量分を足した値1.50μmを求めておき、1.50μmのピーク波長が得られるようにGaInAsP量子井戸層の組成を設計しておく。
【選択図】図1
A method of manufacturing a semiconductor optical device capable of adjusting a light emission wavelength in an active layer to a desired wavelength and improving a yield.
An n-type InP clad layer 2, a GaInAsP active layer 3, a p-type InP clad layer 4 and a p-type GaInAsP cap layer 11 are sequentially grown on an n-type InP substrate 1 doped with sulfur. Estimate the short wavelength shift amount at the time of regrowth from the regrowth temperature, add the predicted short wavelength shift amount to 1.48 μm which is the peak wavelength value of PL emission of the GaInAsP active layer 3 to be finally obtained. The obtained value is 1.50 μm, and the composition of the GaInAsP quantum well layer is designed so that a peak wavelength of 1.50 μm is obtained.
[Selection] Figure 1

Description

本発明は、半導体光素子の発光波長調整方法およびそれを用いた半導体光素子の製造方法に関し、さらに詳しくは、イオウ(S)がドープされたInP基板を用いて活性層が設けられる半導体光素子の発光波長調整方法と半導体光素子の製造方法に関する。   The present invention relates to a method for adjusting a light emission wavelength of a semiconductor optical device and a method for manufacturing a semiconductor optical device using the same, and more particularly, a semiconductor optical device in which an active layer is provided using an InP substrate doped with sulfur (S). The present invention relates to an emission wavelength adjusting method and a semiconductor optical device manufacturing method.

光通信システムにおいて、半導体光素子は無くてはならないものである。光通信における信号光源としての半導体光素子や半導体光変調器には、InP半導体基板上に形成されたGaInAsPでなる活性層が多く用いられている。半導体基板としては、n型ドーパントであるイオウが添加されたInP基板を用いたものが知られている(例えば、特許文献1参照)。   In an optical communication system, a semiconductor optical device is indispensable. For semiconductor optical devices and semiconductor optical modulators as signal light sources in optical communications, an active layer made of GaInAsP formed on an InP semiconductor substrate is often used. As a semiconductor substrate, one using an InP substrate to which sulfur which is an n-type dopant is added is known (for example, see Patent Document 1).

特開2003−60309号公報JP 2003-60309 A

S. D. Perrion, et al., J. Elect. Mat. 23(1994) 81.S. D. Perrion, et al., J. Elect. Mat. 23 (1994) 81.

量子井戸構造を有する活性層の場合、熱処理によって井戸層と障壁層との界面で元素の相互拡散が起こり、発光波長が短波長側にシフトする現象が知られている(例えば、非特許文献1参照)。このため、上述の半導体光素子を製造する場合に、活性層の量子井戸構造は、複数回の選択成長などの際に加熱されることによって、その発光波長が、加熱を受ける度に、短波長側にシフトしてしまうことが知られている。   In the case of an active layer having a quantum well structure, a phenomenon is known in which element mutual diffusion occurs at the interface between the well layer and the barrier layer due to heat treatment, and the emission wavelength shifts to the short wavelength side (for example, Non-Patent Document 1). reference). For this reason, when manufacturing the above-mentioned semiconductor optical device, the quantum well structure of the active layer is heated at the time of multiple times of selective growth, etc. It is known to shift to the side.

一方、分布帰還型(DFB:Distributed Feedback)の半導体レーザのように、活性層に沿って回折格子が形成されてなる特定の発振波長を持つ半導体光素子では、デチューニング量が設計値から外れると、しきい値電流が上昇し光出力が低下したり、発振スペクトルの単一モード性が劣化したりする。なお、デチューニング量とは、活性層のフォトルミネッセンス(PL;Photo Luminescence)発光のピーク波長(発光波長)と、回折格子の間隔で決定される発振波長の差をいう。特に、電子冷却器を用いないで駆動するクーラーレスのDFBレーザにおいては、駆動環境の温度により量子井戸の発光波長が変化する。このため、例えば−40度から90度の動作環境において、しきい値電流の上昇や、光出力の低下を防止するために、デチューニング量が0〜5meVであることが、望ましいとされている。   On the other hand, in a semiconductor optical device having a specific oscillation wavelength in which a diffraction grating is formed along an active layer, such as a distributed feedback (DFB) semiconductor laser, the detuning amount deviates from the design value. As a result, the threshold current increases and the optical output decreases, or the single mode property of the oscillation spectrum deteriorates. The detuning amount refers to the difference between the peak wavelength (emission wavelength) of the photoluminescence (PL) emission of the active layer and the oscillation wavelength determined by the distance between the diffraction gratings. In particular, in a coolerless DFB laser driven without using an electronic cooler, the emission wavelength of the quantum well varies depending on the temperature of the driving environment. For this reason, for example, in an operating environment of -40 degrees to 90 degrees, it is desirable that the detuning amount is 0 to 5 meV in order to prevent an increase in threshold current and a decrease in light output. .

ここで、半導体レーザを作製する途中の熱処理工程において、上述した発光波長の短波長側へのシフト量がばらつくため、所望の発光波長が得られず、互いに異なる基板に作製された半導体光素子同士では発光波長にばらつきが生じてしまうという問題があった。このため、半導体光素子の製造歩留まりが低下するという問題があった。特にクーラーレスのDFBレーザの場合は、結果的に上記のデチューニング量がばらつき、歩留まりが著しく低下するという問題があった。   Here, in the heat treatment step in the process of manufacturing the semiconductor laser, the amount of shift of the emission wavelength toward the short wavelength side varies, so that the desired emission wavelength cannot be obtained, and the semiconductor optical devices manufactured on different substrates However, there is a problem that the emission wavelength varies. For this reason, there was a problem that the manufacturing yield of the semiconductor optical device was lowered. In particular, in the case of a coolerless DFB laser, there is a problem in that the detuning amount varies as a result, and the yield significantly decreases.

この発明は、上記に鑑みてなされたものであって、活性層での発光波長を所望の波長となるように調整できる半導体光素子の発光波長調整方法、およびそれを用いて歩留まりを向上させる半導体光素子の製造方法を提供することを目的とする。   The present invention has been made in view of the above, and an emission wavelength adjustment method for a semiconductor optical device capable of adjusting an emission wavelength in an active layer to a desired wavelength, and a semiconductor using the same to improve yield An object of the present invention is to provide a method for manufacturing an optical element.

本発明者らは、イオウ(S)がドープされたInP基板上に成長した量子井戸構造を有する活性層の発光波長が、熱処理によって、組成・膜厚などの活性層構造だけでなく、InP基板中のイオウ濃度に応じたシフト量だけ短波長側へシフトすることを見出した。これを活性層の発光波長の調整方法に適用することに想到したことにより、本発明は完成したものである。   The inventors of the present invention determined that the emission wavelength of an active layer having a quantum well structure grown on an InP substrate doped with sulfur (S) is not only the active layer structure such as composition and film thickness, but also an InP substrate by heat treatment. It has been found that the shift amount is shifted to the short wavelength side according to the sulfur concentration in the medium. The present invention has been completed by conceiving that this is applied to the method for adjusting the emission wavelength of the active layer.

上述した課題を解決し、目的を達成するために、本発明は、イオウ(S)を含むInP半導体基板上に、活性層が形成され、前記活性層の形成後に熱処理工程を経て作製される半導体光素子の発光波長調整方法であって、前記半導体基板中のイオウ濃度と、前記熱処理工程に伴い前記活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味して、前記活性層が前記熱処理工程後に所望の発光波長となるように、前記イオウ濃度または活性層構造を決定することを特徴とする。   In order to solve the above-described problems and achieve the object, the present invention provides a semiconductor in which an active layer is formed on an InP semiconductor substrate containing sulfur (S), and a heat treatment process is performed after the formation of the active layer. A method for adjusting the emission wavelength of an optical element, which takes into account the relationship between the sulfur concentration in the semiconductor substrate and the short wavelength shift amount by which the emission wavelength in the active layer shifts to the short wavelength side in accordance with the heat treatment step. Then, the sulfur concentration or the active layer structure is determined so that the active layer has a desired emission wavelength after the heat treatment step.

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記活性層がGaInAsPを含むことを特徴とする。   The method for adjusting the emission wavelength of a semiconductor optical device according to the present invention is characterized in that, in the above invention, the active layer contains GaInAsP.

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記イオウ濃度は、1×1018〜1×1019cm−3であることを特徴とする。 Moreover, the emission wavelength adjusting method for a semiconductor optical device according to the present invention is characterized in that, in the above invention, the sulfur concentration is 1 × 10 18 to 1 × 10 19 cm −3 .

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記活性層構造を一定とし、前記イオウ濃度と前記短波長シフト量との関係をもとに、所定のイオウ濃度の前記半導体基板を選択することを特徴とする。   The method for adjusting the emission wavelength of a semiconductor optical device according to the present invention is the above-described invention, wherein the active layer structure is constant, and a predetermined sulfur concentration based on the relationship between the sulfur concentration and the short wavelength shift amount. The semiconductor substrate is selected.

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記半導体基板のイオウ濃度を一定とし、前記イオウ濃度と前記短波長シフト量との関係をもとに、前記活性層構造を決定することを特徴とする。   Also, the method for adjusting the emission wavelength of a semiconductor optical device according to the present invention is the above-described invention, wherein the sulfur concentration of the semiconductor substrate is constant, and the activity is based on the relationship between the sulfur concentration and the short wavelength shift amount. The layer structure is determined.

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記活性層構造は、量子井戸層や障壁層の膜厚ならびに組成から規定されることを特徴とする。   The method for adjusting the emission wavelength of a semiconductor optical device according to the present invention is characterized in that, in the above invention, the active layer structure is defined by the film thickness and composition of the quantum well layer and the barrier layer.

また、本発明に係る半導体光素子の発光波長調整方法は、上記の発明において、前記熱処理工程に用いる温度の範囲が600℃〜800℃であることを特徴とする。   Moreover, in the above invention, the method for adjusting the emission wavelength of the semiconductor optical device according to the present invention is characterized in that the temperature range used in the heat treatment step is 600 ° C. to 800 ° C.

上述した課題を解決し、目的を達成するために、本発明は、イオウ(S)を含むInP半導体基板の上に、活性層を形成する活性層形成工程と、前記活性層形成工程の後に行われる熱処理工程と、を備えた半導体光素子の製造方法であって、前記半導体基板のイオウ濃度と、前記熱処理工程に伴い前記活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味して、前記活性層が前記熱処理工程後に所望の発光波長となるように、予め、前記イオウ濃度または活性層構造を決定しておくことを特徴とする。   In order to solve the above-described problems and achieve the object, the present invention includes an active layer forming step of forming an active layer on an InP semiconductor substrate containing sulfur (S), and an active layer forming step after the active layer forming step. And a heat treatment step, comprising: a sulfur concentration of the semiconductor substrate; and a short wavelength shift amount at which an emission wavelength in the active layer is shifted to a short wavelength side in accordance with the heat treatment step. The sulfur concentration or the active layer structure is determined in advance so that the active layer has a desired emission wavelength after the heat treatment step.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記活性層がGaInAsPを含むことを特徴とする。   The method for manufacturing a semiconductor optical device according to the present invention is characterized in that, in the above invention, the active layer contains GaInAsP.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記イオウ濃度は、1×1018〜1×1019cm−3であることを特徴とする。 In the method of manufacturing a semiconductor optical device according to the present invention, the sulfur concentration is 1 × 10 18 to 1 × 10 19 cm −3 in the above invention.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記活性層構造は、量子井戸層や障壁層の膜厚ならびに組成から規定されることを特徴とする。   In the method of manufacturing a semiconductor optical device according to the present invention, the active layer structure is defined by the thickness and composition of the quantum well layer and the barrier layer.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記活性層を含む光導波路をメサ構造に形成する光導波路形成工程を備え、前記熱処理工程は、前記光導波路の幅方向の両側面に接する埋め込み層を形成する工程であることを特徴とする。   Moreover, the method for manufacturing a semiconductor optical device according to the present invention includes, in the above invention, an optical waveguide forming step of forming an optical waveguide including the active layer in a mesa structure, and the heat treatment step is performed in the width direction of the optical waveguide. The method is characterized in that it is a step of forming a buried layer in contact with both side surfaces of the substrate.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記熱処理工程に用いる温度の範囲が600℃〜800℃であることを特徴とする。   The method for manufacturing a semiconductor optical device according to the present invention is characterized in that, in the above invention, a temperature range used in the heat treatment step is 600 ° C. to 800 ° C.

また、本発明に係る半導体光素子の製造方法は、上記の発明において、前記活性層の上に更に回折格子層を形成する工程を備えることを特徴とする。   The method for manufacturing a semiconductor optical device according to the present invention is characterized in that, in the above invention, a step of further forming a diffraction grating layer on the active layer is provided.

この発明によれば、活性層での発光波長を所望の波長となるように調整できる半導体光素子の発光波長調整方法を実現することができる。また、この発明によれば、半導体光素子間で発光波長のばらつきのない歩留まりを向上させる半導体光素子の製造方法を実現することができる。   According to the present invention, it is possible to realize a method for adjusting the emission wavelength of a semiconductor optical device that can adjust the emission wavelength in the active layer to a desired wavelength. In addition, according to the present invention, it is possible to realize a method of manufacturing a semiconductor optical device that improves the yield without variation in emission wavelength between the semiconductor optical devices.

図1は、本発明の実施の形態1に係る半導体光素子の製造方法を示す断面工程図である。FIG. 1 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the first embodiment of the present invention. 図2は、本発明の実施の形態1に係る半導体光素子の製造方法を示す断面工程図である。FIG. 2 is a cross-sectional process diagram illustrating the method of manufacturing the semiconductor optical device according to the first embodiment of the present invention. 図3は、本発明の実施の形態1に係る半導体光素子の製造方法を示す断面工程図である。FIG. 3 is a cross-sectional process diagram illustrating the method of manufacturing the semiconductor optical device according to the first embodiment of the present invention. 図4は、本発明の実施の形態1に係る半導体光素子の製造方法を示す断面工程図である。FIG. 4 is a cross-sectional process diagram illustrating the method of manufacturing the semiconductor optical device according to the first embodiment of the present invention. 図5は、半導体光素子における基板のキャリア濃度と、短波長シフト量と、熱処理温度と、の関係を示す図である。FIG. 5 is a diagram showing the relationship between the carrier concentration of the substrate, the short wavelength shift amount, and the heat treatment temperature in the semiconductor optical device. 図6は、熱処理工程におけるアニール温度と、短波長シフト量と、基板のキャリア濃度と、の関係を示す図である。FIG. 6 is a diagram showing the relationship between the annealing temperature, the short wavelength shift amount, and the carrier concentration of the substrate in the heat treatment step. 図7は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 7 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図8は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 8 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図9は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 9 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図10は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 10 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図11は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 11 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図12は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 12 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図13は、本発明の実施の形態2に係る半導体光素子の製造方法を示す断面工程図である。FIG. 13 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor optical device according to the second embodiment of the present invention. 図14は、本発明の実施の形態2に係る半導体光素子を示す部分破断斜視図である。FIG. 14 is a partially broken perspective view showing a semiconductor optical device according to the second embodiment of the present invention. 図15は、イオウ濃度と、製造枚数と、得られたピーク波長の差が5meV(発光波長1550nmの場合における10nmの波長差相当)以内となる歩留まりと、の関係を示す図である。FIG. 15 is a diagram showing the relationship between the sulfur concentration, the number of manufactured products, and the yield at which the obtained peak wavelength difference is within 5 meV (corresponding to a wavelength difference of 10 nm in the case of the emission wavelength of 1550 nm).

以下に、本発明を実施するための形態である半導体光素子の発光波長調整方法について説明する。   Below, the light emission wavelength adjustment method of the semiconductor optical element which is a form for implementing this invention is demonstrated.

(半導体光素子の発光波長調整方法)
本実施の形態に係る半導体光素子の発光波長調整方法は、イオウ(S)を含む半導体基板としてのInP基板上に、GaInAsPでなる活性層が形成されると共に、この活性層の形成後に熱処理工程を経て作製される半導体光素子に適用される。
(Semiconductor optical device emission wavelength adjustment method)
In the method for adjusting the emission wavelength of the semiconductor optical device according to the present embodiment, an active layer made of GaInAsP is formed on an InP substrate as a semiconductor substrate containing sulfur (S), and a heat treatment step is performed after the formation of this active layer. It is applied to a semiconductor optical device manufactured through the process.

この発光波長調整方法は、InP基板中のイオウ濃度と、熱処理工程に伴い活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味して、活性層が熱処理工程後に所望の発光波長となるように、InP基板のイオウ濃度または活性層構造を決定する。   This light emission wavelength adjusting method takes into account the relationship between the sulfur concentration in the InP substrate and the short wavelength shift amount at which the light emission wavelength in the active layer shifts to the short wavelength side in accordance with the heat treatment step, so that the active layer is in the heat treatment step. Later, the sulfur concentration or active layer structure of the InP substrate is determined so that the desired emission wavelength is obtained.

また、半導体光素子の発光波長調整方法としては、活性層構造を一定とし、InP基板中のイオウ濃度と熱処理工程に伴い活性層での発光波長が短波長側にシフトする短波長シフト量との関係をもとに、所定のイオウ濃度のInP基板を選択してもよい。   Further, as a method for adjusting the emission wavelength of the semiconductor optical device, the active layer structure is made constant, and the sulfur concentration in the InP substrate and the short wavelength shift amount at which the emission wavelength in the active layer shifts to the short wavelength side in accordance with the heat treatment step. Based on the relationship, an InP substrate having a predetermined sulfur concentration may be selected.

さらに、半導体光素子の発光波長調整方法としては、InP基板のイオウ濃度を一定とし、このイオウ濃度と上記短波長シフト量との関係をもとに、活性層構造を決定してもよい。この活性層構造は、量子井戸層や障壁層の膜厚ならびに組成から規定される。また、熱処理工程としては、メサストライプ状のメサ構造の両側面に接して埋め込み層を再成長させる場合がある。このような熱処理工程に用いる温度の範囲は、600℃以上である場合は有機金属気相成長法における反応ガスの発生が良好となり、800℃以下であれば吸着元素の脱離などを起さずに結晶成長にとって良好な状態となる。したがって、熱処理工程に用いる温度の範囲としては、600℃〜800℃であることが好ましい。   Furthermore, as a method for adjusting the emission wavelength of the semiconductor optical device, the sulfur concentration of the InP substrate may be constant, and the active layer structure may be determined based on the relationship between the sulfur concentration and the short wavelength shift amount. This active layer structure is defined by the film thickness and composition of the quantum well layer and the barrier layer. In addition, as the heat treatment step, the buried layer may be regrown in contact with both side surfaces of the mesa stripe mesa structure. When the temperature range used for such a heat treatment step is 600 ° C. or higher, the generation of reaction gas in the metal organic vapor phase epitaxy is good, and if it is 800 ° C. or lower, desorption of adsorbed elements does not occur. This is a good condition for crystal growth. Therefore, the temperature range used for the heat treatment step is preferably 600 ° C to 800 ° C.

(半導体光素子の製造方法)
次に、上記の発光波長調整方法を用いた半導体光素子の製造方法について図面を参照して説明する。但し、図面は模式的なものであり、各層の厚みや厚みの比率などは現実のものとは異なることに留意すべきである。また、図面相互間においても互いの寸法の関係や比率が異なる部分が含まれている。したがって、具体的な寸法は以下の説明を参酌して判断すべきものである。
(Method for manufacturing semiconductor optical device)
Next, a method for manufacturing a semiconductor optical device using the above-described emission wavelength adjusting method will be described with reference to the drawings. However, it should be noted that the drawings are schematic, and the thicknesses and ratios of the layers are different from actual ones. Moreover, the part from which the relationship and ratio of a mutual dimension differ also in between drawings is contained. Therefore, specific dimensions should be determined in consideration of the following description.

(実施の形態1)
図1〜4は、本発明の実施の形態1に係る半導体光素子の製造方法の工程断面図ある。この実施の形態1に係る半導体光素子は、回折格子を有しない構造である。
(Embodiment 1)
1 to 4 are process cross-sectional views of the method for manufacturing a semiconductor optical device according to the first embodiment of the present invention. The semiconductor optical device according to the first embodiment has a structure having no diffraction grating.

本実施の形態1では、イオウ(S)の濃度が3×1018cm−3のn型InP基板1を用意する。図1に示すように、このn型InP基板1上に、基板温度580℃で、順次、n型InPクラッド層2、GaInAsP活性層3、p型InPクラッド層4、p型GaInAsPキャップ層11を成長させる。ここで、n型InPクラッド層2の膜厚は1μm、GaInAsP活性層3の膜厚は0.5μm、p型InPクラッド層4の膜厚は1.2μm、p型GaInAsPキャップ層11の膜厚を0.05μmとする。その後、図1に示すように、p型GaInAsPキャップ層11の上に、SiNx誘電体膜からなるエッチングマスク12をストライプ状にパターン形成する。そして、このエッチングマスク12をマスクとして、ウェットエッチング法またはドライエッチング法を用いて、図2に示すようなメサストライプを形成する。なお、エッチングマスク12としてSiOなどを用いてもよい。 In the first embodiment, an n-type InP substrate 1 having a sulfur (S) concentration of 3 × 10 18 cm −3 is prepared. As shown in FIG. 1, an n-type InP cladding layer 2, a GaInAsP active layer 3, a p-type InP cladding layer 4, and a p-type GaInAsP cap layer 11 are sequentially formed on the n-type InP substrate 1 at a substrate temperature of 580 ° C. Grow. Here, the thickness of the n-type InP cladding layer 2 is 1 μm, the thickness of the GaInAsP active layer 3 is 0.5 μm, the thickness of the p-type InP cladding layer 4 is 1.2 μm, and the thickness of the p-type GaInAsP cap layer 11. Is 0.05 μm. Thereafter, as shown in FIG. 1, an etching mask 12 made of a SiNx dielectric film is formed in a stripe pattern on the p-type GaInAsP cap layer 11. Then, using this etching mask 12 as a mask, a mesa stripe as shown in FIG. 2 is formed by wet etching or dry etching. Note that SiO 2 or the like may be used as the etching mask 12.

なお、GaInAsP活性層3は、格子不整合度1%程度の4層のGaInAsP圧縮歪量子井戸層(厚さ7nm)と組成波長が1.2μmであるGaInAsP障壁層(厚さ10nm)からなる多重量子井戸構造と、組成波長が0.95μmから1.2μmまで変化した各層の厚さが40nmである6層の多段光閉じ込め(SCH;Separate-Confinement Heterostructure)層で構成することができる。また、GaInAsP活性層3の格子不整合度を大きくする場合には、障壁層に引張り歪となる格子不整合度を有するGaInAsPを用いて、量子井戸層の正味の歪量を小さくした歪補償構造を用いることができる。   The GaInAsP active layer 3 is a multi-layer consisting of four GaInAsP compressive strain quantum well layers (thickness 7 nm) having a lattice mismatch of about 1% and a GaInAsP barrier layer (thickness 10 nm) having a composition wavelength of 1.2 μm. A quantum well structure and six multi-stage optical confinement (SCH) layers in which the thickness of each layer with a composition wavelength changed from 0.95 μm to 1.2 μm is 40 nm can be formed. Further, when the lattice mismatch degree of the GaInAsP active layer 3 is increased, a strain compensation structure in which the net strain amount of the quantum well layer is reduced by using GaInAsP having a lattice mismatch degree that causes tensile strain in the barrier layer. Can be used.

また、GaInAsP活性層3の発光波長は、フォトルミネッセンス(PL;Photo Luminescence)法を用いて測定することができる。GaInAsP活性層3の組成を決める際、使用するn型InP基板のS濃度(3×1018cm−3)と、後述する2回の再成長温度から、図5、図6を用いて再成長の際の短波長シフト量(20nm)を予想する。最終的に得たいGaInAsP活性層3のPL発光のピーク波長の値である1.48μmに、予想した短波長シフト量分を足した値1.50μmを求めておき、1.50μmのピーク波長が得られるようにGaInAsP活性層3の構造を設計しておく。すなわち、予め、GaInAsP活性層3の発光波長が長波長側になるようにGaInAsP活性層3の構造を設計しておけばよい。 Further, the emission wavelength of the GaInAsP active layer 3 can be measured using a photoluminescence (PL) method. When determining the composition of the GaInAsP active layer 3, the regrowth is performed from the S concentration (3 × 10 18 cm −3 ) of the n-type InP substrate to be used and two regrowth temperatures described later with reference to FIGS. 5 and 6. The short wavelength shift amount (20 nm) at this time is expected. The value 1.50 μm obtained by adding the predicted short wavelength shift amount to 1.48 μm which is the PL wavelength peak wavelength value of the GaInAsP active layer 3 to be finally obtained is obtained, and the peak wavelength of 1.50 μm is obtained. The structure of the GaInAsP active layer 3 is designed so as to be obtained. That is, the structure of the GaInAsP active layer 3 may be designed in advance so that the emission wavelength of the GaInAsP active layer 3 is on the long wavelength side.

図5および図6は、キャリア濃度(イオウ濃度)と短波長シフト量と熱処理温度との関係を示すものであり、キャリア濃度が増加すると短波長シフト量が増加し、キャリア濃度が一定でも熱処理温度が高くなると短波長シフト量が増加することが分かる。   5 and 6 show the relationship between the carrier concentration (sulfur concentration), the short wavelength shift amount, and the heat treatment temperature. As the carrier concentration increases, the short wavelength shift amount increases, and even if the carrier concentration is constant, the heat treatment temperature is increased. It can be seen that the short wavelength shift amount increases with increasing.

因みに、量子井戸層の膜厚は薄くなるほど、短波長シフト量が大きくなり、膜厚が厚くなるほど、短波長シフト量が小さくなる。そこで、量子井戸層の膜厚を予め所定量だけ厚く設定することで短波長化されたときに、所望の発光波長となるように制御することが可能となる。   Incidentally, as the film thickness of the quantum well layer decreases, the short wavelength shift amount increases, and as the film thickness increases, the short wavelength shift amount decreases. Therefore, by setting the thickness of the quantum well layer in advance by a predetermined amount, when the wavelength is shortened, the quantum well layer can be controlled to have a desired emission wavelength.

次に、図3に示すように、誘電体からなるエッチングマスク12上には結晶成長しないという有機金属気相成長法の特色を活かして、メサストライプの上面以外の領域にp型InP電流阻止層5およびn型InP電流阻止層6からなる電流阻止領域を形成し、メサストライプ側面部の電流阻止領域をエッチングマスク12にほぼ水平になるように成長させる。これを、1回目の再成長とし、その際の成長温度は670℃とする。   Next, as shown in FIG. 3, a p-type InP current blocking layer is formed in a region other than the upper surface of the mesa stripe by utilizing the feature of the metal organic chemical vapor deposition method that the crystal does not grow on the etching mask 12 made of a dielectric. A current blocking region composed of the 5 and n-type InP current blocking layer 6 is formed, and the current blocking region on the side surface of the mesa stripe is grown so as to be substantially horizontal to the etching mask 12. This is the first regrowth, and the growth temperature at that time is 670 ° C.

その後、エッチングマスク12およびp型GaInAsPキャップ層11をエッチングにより除去し、再び有機金属気相成長法を用いてp型InPクラッド層7、および組成波長が1.2μmであるp型GaInAsPコンタクト層8を約3μm成長させる。これを、2回目の再成長とし、その際の基板温度は、630℃とする。その後、基板の厚さ調整のため、n型InP基板1の下面(上述した各半導体層を形成した面とは反対側の面)を厚さ130μm程度になるまで研磨により薄膜化し、図4に示すように、n型InP基板1の下面にn側電極9、p型GaInAsPコンタクト層8の上面にp側電極10をそれぞれ形成する。なお、この工程での結晶成長方法として、分子線エピタキシー(MBE;Morecular Beam Epitaxy)法や化学線エピタキシー(CBE;Chemical Beam Epitaxy)法を用いてもよい。このようにして半導体光素子20の製造が終了する。   Thereafter, the etching mask 12 and the p-type GaInAsP cap layer 11 are removed by etching, and the p-type InP cladding layer 7 and the p-type GaInAsP contact layer 8 having a composition wavelength of 1.2 μm are again formed by metal organic chemical vapor deposition. For about 3 μm. This is the second regrowth, and the substrate temperature at that time is 630 ° C. Thereafter, in order to adjust the thickness of the substrate, the lower surface of the n-type InP substrate 1 (the surface opposite to the surface on which each of the semiconductor layers described above is formed) is thinned by polishing until it has a thickness of about 130 μm. As shown, an n-side electrode 9 is formed on the lower surface of the n-type InP substrate 1, and a p-side electrode 10 is formed on the upper surface of the p-type GaInAsP contact layer 8. As a crystal growth method in this step, a molecular beam epitaxy (MBE) method or an actinic beam epitaxy (CBE) method may be used. In this way, the manufacture of the semiconductor optical device 20 is completed.

上述したように製造した半導体光素子20は、2回の再成長でおこる、GaInAsP活性層3の短波長シフト分を予め加味して量子井戸層の設計を行っているため、従来のように短波長シフト量を予想しないで作製した半導体光素子に比べ、最終的に所望の発光波長の半導体光素子20が得られる確率が高くなり、歩留まりが向上する。   Since the semiconductor optical device 20 manufactured as described above is designed with the quantum well layer taking into account the short wavelength shift of the GaInAsP active layer 3 that occurs in two re-growths, it is as short as before. Compared to a semiconductor optical device manufactured without predicting the amount of wavelength shift, the probability of finally obtaining a semiconductor optical device 20 having a desired emission wavelength is increased, and the yield is improved.

なお、図5、図6のn型InP基板1のS濃度は、2次イオン質量分析(SIMS;Secondary Ion-microprobe Mass Spectrometer)で測定することができる。   The S concentration of the n-type InP substrate 1 in FIGS. 5 and 6 can be measured by secondary ion mass spectrometry (SIMS).

(実施の形態2)
図7〜14は、本発明の実施の形態2に係る半導体光素子の製造方法を示している。なお、図7〜9は、半導体光素子を光導波方向(メサストライプの延在方向)であるx方向に切断する断面工程図であり、図10〜13は、半導体光素子の光導波方向と直角をなすメサストライプの幅方向であるy方向に切断する断面工程図である。
(Embodiment 2)
7 to 14 show a method for manufacturing a semiconductor optical device according to the second embodiment of the present invention. 7 to 9 are cross-sectional process diagrams in which the semiconductor optical device is cut in the x direction which is the optical waveguide direction (extension direction of the mesa stripe). FIGS. 10 to 13 show the optical waveguide direction of the semiconductor optical device. It is sectional process drawing cut | disconnected in the y direction which is the width direction of the mesa stripe which makes a right angle.

先ず、本実施の形態2では、イオウ(S)のドーズ量が3.1×1018cm−3のn型InP基板31を用意する。 First, in the second embodiment, an n-type InP substrate 31 having a sulfur (S) dose of 3.1 × 10 18 cm −3 is prepared.

そして、図7に示すように、基板温度580℃で、n型InP基板31上に、有機金属気相成長法にて、順次、n型InPクラッド層32、多重量子井戸構造のGaInAsP活性層33、p型InPクラッド層34、p型GaInAsP回折層35、p型InPキャップ層36を順次成長させる。なお、n型InPクラッド層32の膜厚は1μm、GaInAsP活性層33は、量子井戸層厚3.9nmおよび10nm厚の障壁層で構成される多重量子井戸構造を含み、量子井戸構造を挟むGRIN−SCH(Graded-Index Separate-Confinement Heterostructure)層の層厚と合わせて、層厚は合計0.22μmである。p型InPクラッド層34の膜厚は150nm、p型GaInAsP回折層35の膜厚は20nm、p型InPキャップ層36の膜厚は10nmとした。GaInAsP活性層33は、後述する再成長に伴う短波長シフト分を予め加味して量子井戸層の設計を行っておく。   Then, as shown in FIG. 7, an n-type InP cladding layer 32 and a GaInAsP active layer 33 having a multiple quantum well structure are sequentially formed on the n-type InP substrate 31 at a substrate temperature of 580 ° C. by metal organic vapor phase epitaxy. Then, a p-type InP clad layer 34, a p-type GaInAsP diffraction layer 35, and a p-type InP cap layer 36 are sequentially grown. The n-type InP clad layer 32 has a thickness of 1 μm, and the GaInAsP active layer 33 includes a multiple quantum well structure including barrier layers having a quantum well layer thickness of 3.9 nm and a thickness of 10 nm, and GRIN sandwiching the quantum well structure -In total with the layer thickness of the SCH (Graded-Index Separate-Confinement Heterostructure) layer, the layer thickness is 0.22 μm. The thickness of the p-type InP clad layer 34 is 150 nm, the thickness of the p-type GaInAsP diffraction layer 35 is 20 nm, and the thickness of the p-type InP cap layer 36 is 10 nm. The GaInAsP active layer 33 is designed with a quantum well layer in consideration of a short wavelength shift accompanying regrowth described later.

次いで、光導波方向であるx方向に沿って所望の間隔の回折格子となるように、図示しないエッチングマスク層を形成して、このエッチングマスク層をマスクとして用いて、p型InPキャップ層36、およびp型GaInAsP回折層35をエッチングし、最終的にp型InPキャップ層36を除去して図8に示すような回折格子35Aを形成する。   Next, an etching mask layer (not shown) is formed so as to form a diffraction grating with a desired interval along the x direction which is the optical waveguide direction, and the p-type InP cap layer 36, using this etching mask layer as a mask, Then, the p-type GaInAsP diffraction layer 35 is etched, and finally the p-type InP cap layer 36 is removed to form a diffraction grating 35A as shown in FIG.

次に、図9に示すように、有機金属気相成長により、p型InPクラッド層37を成長させ、回折格子35Aを埋め込むと同時に、回折格子上に積層されたp型InPクラッド層37、p型GaInAsPキャップ層38を基板温度580℃で、成長させる。これを1回目の再成長とする。   Next, as shown in FIG. 9, the p-type InP clad layer 37 is grown by metal organic vapor phase epitaxy, and the diffraction grating 35A is embedded, and at the same time, the p-type InP clad layer 37 stacked on the diffraction grating, p The type GaInAsP cap layer 38 is grown at a substrate temperature of 580 ° C. This is the first regrowth.

さらに、p型GaInAsPキャップ層38上に、SiNx誘電体膜からなるエッチングマスク層39を、図9に示すように、x方向に伸びるストライプ状に形成する。このエッチングマスク層39は、図10に示すように、y方向に所定幅(メサストライプの幅寸法より所定長さだけ長い幅)形成される。そして、このエッチングマスク層39をマスクとして用いて、図10に示すように、ウェットエッチング法やドライエッチング法等を用いてメサストライプを形成した。   Further, on the p-type GaInAsP cap layer 38, an etching mask layer 39 made of a SiNx dielectric film is formed in a stripe shape extending in the x direction as shown in FIG. As shown in FIG. 10, this etching mask layer 39 is formed with a predetermined width in the y direction (a width longer than the mesa stripe width dimension by a predetermined length). Then, using this etching mask layer 39 as a mask, as shown in FIG. 10, a mesa stripe was formed by using a wet etching method, a dry etching method, or the like.

次に、図11に示すように、上記の実施の形態1と同様の方法で、誘電体からなるエッチングマスク層39上には結晶成長しないという有機金属気相成長法の特色を活かして、メサストライプの上面以外の領域にp型InP電流阻止層40およびn型InP電流阻止層41からなる電流阻止領域を形成し、メサストライプ側面部の電流阻止領域をエッチングマスク層39にほぼ水平になるように成長させる。これを、2回目の再成長とし、その際の成長温度は640℃とする。   Next, as shown in FIG. 11, by utilizing the feature of the metal organic chemical vapor deposition method in which no crystal is grown on the etching mask layer 39 made of a dielectric by the same method as in the first embodiment, the mesa is used. A current blocking region composed of a p-type InP current blocking layer 40 and an n-type InP current blocking layer 41 is formed in a region other than the upper surface of the stripe so that the current blocking region on the side surface of the mesa stripe is substantially horizontal to the etching mask layer 39. To grow. This is the second regrowth, and the growth temperature at that time is 640 ° C.

その後、図12に示すように、エッチングマスク層39及び、p型GaInAsPキャップ層38をエッチングにより除去する。そして、再び有機金属気相成長法を用いて、図13に示すように、p型InPクラッド層42及び組成波長が1.2μmであるp型GaInAsPコンタクト層43を約3μm成長させる。これを、3回目の再成長とし、その際の成長温度は、630℃とする。その後、基板の厚さ調整のため、n型InP基板31の下面(上述した各半導体層を形成した面とは反対側の面)を厚さ130μm程度にまで研磨により薄膜化し、図14に示すように、n型InP基板31の下面にn側電極44、p型GaInAsPコンタクト層43の上面にp側電極45をそれぞれ形成する。なお、この工程での結晶成長方法として、分子線エピタキシー法や化学線エピタキシー法を用いてもよい。このようにして、本実施の形態に係る半導体光素子50の製造が終了する。   Thereafter, as shown in FIG. 12, the etching mask layer 39 and the p-type GaInAsP cap layer 38 are removed by etching. Then, using the metal organic chemical vapor deposition method again, as shown in FIG. 13, a p-type InP cladding layer 42 and a p-type GaInAsP contact layer 43 having a composition wavelength of 1.2 μm are grown by about 3 μm. This is the third regrowth, and the growth temperature at that time is 630 ° C. Thereafter, in order to adjust the thickness of the substrate, the lower surface of the n-type InP substrate 31 (the surface opposite to the surface on which each semiconductor layer described above is formed) is thinned by polishing to a thickness of about 130 μm and shown in FIG. As described above, the n-side electrode 44 and the p-side electrode 45 are formed on the lower surface of the n-type InP substrate 31 and the upper surface of the p-type GaInAsP contact layer 43, respectively. As a crystal growth method in this step, a molecular beam epitaxy method or a chemical beam epitaxy method may be used. In this way, the manufacture of the semiconductor optical device 50 according to the present embodiment is completed.

上述したように作製した本実施の形態に係る半導体光素子50は、3回の再成長で起こる、GaInAsP活性層33の短波長シフト分を予め加味して量子井戸層の設計を行っているため、従来の短波長シフト量を予想しないで作製した半導体装置に比べ、最終的に所望の発光波長の半導体装置が得られる確率が高くなり、歩留まりが向上する。   Since the semiconductor optical device 50 according to the present embodiment manufactured as described above is designed with the quantum well layer in consideration of the short wavelength shift of the GaInAsP active layer 33 that occurs in three regrowths in advance. Compared to a conventional semiconductor device manufactured without expecting a short wavelength shift amount, the probability of finally obtaining a semiconductor device having a desired emission wavelength is increased, and the yield is improved.

また、GaInAsP活性層33の発光波長と、回折格子35Aの間隔で決定される発振波長の差であるデチューニング量は、しきい値電流の上昇や、光出力の低下を防止するために、0〜5meVであることが、望ましいとされているが、従来のように再成長時の短波長シフト量を予測しないで半導体光素子を作製すると、同じ製法でも、使用する基板のイオウ濃度により、デチューニング量が0〜数10meVにばらつくことになる。このため、予め短波長シフト量を予測し、その分だけGaInAsP活性層33のPL発光のピーク波長が長波長になるように、活性層の構造(組成、膜厚など)を設計しておけば、歩留まり低下を抑制できる。   The detuning amount, which is the difference between the emission wavelength of the GaInAsP active layer 33 and the oscillation wavelength determined by the interval between the diffraction gratings 35A, is 0 in order to prevent an increase in threshold current and a decrease in optical output. Although it is considered desirable to be ˜5 meV, when a semiconductor optical device is manufactured without predicting the short wavelength shift amount during regrowth as in the prior art, even if the same manufacturing method is used, the depletion depends on the sulfur concentration of the substrate used. The tuning amount varies from 0 to several tens meV. For this reason, if the short wavelength shift amount is predicted in advance, the structure (composition, film thickness, etc.) of the active layer should be designed so that the peak wavelength of PL emission of the GaInAsP active layer 33 becomes longer. , Yield reduction can be suppressed.

さらに、図7に示す段階で、作製したGaInAsP活性層33のPL発光のピーク波長をPL法により測定しておけば、仮にGaInAsP活性層33のPL発光のピーク波長と、上で設計した値に差があったとしても、その差を補正するように、作製する回折格子35Aの間隔を調整することにより、さらに歩留まり向上が期待できる。   Furthermore, if the peak wavelength of PL emission of the manufactured GaInAsP active layer 33 is measured by the PL method at the stage shown in FIG. 7, the peak wavelength of PL emission of the GaInAsP active layer 33 is assumed to be the value designed above. Even if there is a difference, a further improvement in yield can be expected by adjusting the interval of the diffraction grating 35A to be manufactured so as to correct the difference.

上述のように、本発明は、イオウ(S)を含む半導体基板(InP基板)の上に、活性層を形成する活性層形成工程と、この活性層を含む光導波路をメサ構造に形成する光導波路形成工程と、光導波路形成工程の後に行われる熱処理工程と、を備えた半導体光素子の製造方法に、上述の波長調整方法を適用したものである。すなわち、半導体基板のイオウ濃度と、活性層形成工程よりも後に施される熱処理工程に伴いこの活性層での発光波長が短波長側にシフトする短波長シフト量との関係を加味して、活性層が熱処理工程後に所望の発光波長となるように、予め、活性層の発光波長が長波長側になるようにイオウ濃度または活性層構造を決定しておくものである。   As described above, the present invention provides an active layer forming step for forming an active layer on a semiconductor substrate (InP substrate) containing sulfur (S), and an optical waveguide for forming an optical waveguide including the active layer in a mesa structure. The above-described wavelength adjustment method is applied to a method for manufacturing a semiconductor optical device including a waveguide forming step and a heat treatment step performed after the optical waveguide forming step. In other words, it takes into account the relationship between the sulfur concentration of the semiconductor substrate and the short wavelength shift amount at which the emission wavelength in this active layer shifts to the short wavelength side in accordance with the heat treatment step performed after the active layer formation step. The sulfur concentration or the active layer structure is determined in advance so that the emission wavelength of the active layer is on the long wavelength side so that the layer has a desired emission wavelength after the heat treatment step.

(その他の実施の形態)
以上、本発明の実施の形態について説明したが、上記の実施の形態の開示の一部をなす論述および図面はこの発明を限定するものであると理解するべきではない。この開示から当業者には様々な代替実施の形態、実施例および運用技術が明らかとなろう。
(Other embodiments)
Although the embodiment of the present invention has been described above, it should not be understood that the description and the drawings, which constitute a part of the disclosure of the above embodiment, limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

例えば、上記の実施の形態1、2では、イオウ濃度の決まっているn型InP基板1、31を用いて、活性層形成工程よりも後に施される熱処理工程に伴いこの活性層での発光波長が短波長側にシフトする短波長シフト量との関係を加味して、活性層が熱処理工程後に所望の発光波長となるように、予め、活性層の発光波長が長波長側になるように活性層構造を決定したが、活性層の構造を一定にしておき、熱処理工程に伴い活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味してn型InP基板1、31のイオウ濃度を決定してもよい。   For example, in the first and second embodiments described above, the emission wavelength in this active layer is accompanied by a heat treatment process performed after the active layer forming process using n-type InP substrates 1 and 31 having a predetermined sulfur concentration. In view of the relationship with the short wavelength shift amount that shifts to the short wavelength side, the active layer is activated in advance so that the active layer has a long emission wavelength so that the active layer has a desired emission wavelength after the heat treatment step. The layer structure has been determined, but the structure of the active layer is kept constant, and the n-type InP substrate is added in consideration of the relationship with the short wavelength shift amount at which the emission wavelength in the active layer shifts to the short wavelength side with the heat treatment step The sulfur concentration of 1, 31 may be determined.

例えば、1550nmで発光する量子井戸構造を有する実施の形態2に記載のDFBレーザを作製するに際し、三度の熱処理工程(最高640℃での熱処理)における短波長シフト量を5meV程度としたい場合には、図6のグラフより、3×1018cm−3程度のイオウ濃度を用いればよいことが判る。実際に、3.1×1018cm-3から5.3×1018cm-3の範囲で異なるイオウ濃度のn型InP基板を用いて、1550nmで発光する量子井戸構造を有する実施の形態2に記載のDFBレーザを作製し、PL発光波長と電流注入時のエレクトロルミネッセンス(EL)による自然放出光のピーク波長を比較した。得られたピーク波長の差が5meV(発光波長1550nmの場合における10nmの波長差相当)以内となる歩留まりを図15に記す。 For example, when the DFB laser described in Embodiment 2 having a quantum well structure that emits light at 1550 nm is manufactured, the short wavelength shift amount in three heat treatment steps (heat treatment at a maximum of 640 ° C.) is desired to be about 5 meV. From the graph of FIG. 6, it is understood that a sulfur concentration of about 3 × 10 18 cm −3 may be used. Actually, Embodiment 2 having a quantum well structure that emits light at 1550 nm using n-type InP substrates having different sulfur concentrations in the range of 3.1 × 10 18 cm −3 to 5.3 × 10 18 cm −3. The DFB laser described in 1) was fabricated, and the PL emission wavelength was compared with the peak wavelength of spontaneous emission light due to electroluminescence (EL) during current injection. FIG. 15 shows the yield in which the obtained peak wavelength difference is within 5 meV (corresponding to a wavelength difference of 10 nm when the emission wavelength is 1550 nm).

図15より、イオウ濃度を3.1×1018cm-3から3.5×1018cm-3の範囲に決定することで、DFBレーザの製造工程の中の複数の熱処理工程によらず、所望の量子井戸構造の発光波長が得られるのに対し、イオウ濃度が3.6×1018cm-3以上になると、本実施形態の熱処理温度に対する短波長シフト量が大きいため、所望の量子井戸構造の発光波長が実現できず、歩留まりがよくないことがわかる。なお、熱処理工程での温度の再現性も歩留まりを変動させる要因になりえるが、本実施形態の熱処理工程における温度に対する短波長シフト量が小さいような、より低いイオウ濃度のInP基板を用いることで、製造工程での温度ばらつきの影響を抑えること可能であることが図6の結果からもわかる。 From FIG. 15, by determining the sulfur concentration within the range of 3.1 × 10 18 cm −3 to 3.5 × 10 18 cm −3 , regardless of the plurality of heat treatment steps in the DFB laser manufacturing process, While the emission wavelength of the desired quantum well structure can be obtained, when the sulfur concentration is 3.6 × 10 18 cm −3 or more, the short wavelength shift amount with respect to the heat treatment temperature of this embodiment is large. It can be seen that the emission wavelength of the structure cannot be realized and the yield is not good. Although the temperature reproducibility in the heat treatment process can be a factor that fluctuates the yield, it is possible to use an InP substrate having a lower sulfur concentration so that the short wavelength shift amount with respect to the temperature in the heat treatment process of this embodiment is small. It can also be seen from the results of FIG. 6 that the influence of temperature variations in the manufacturing process can be suppressed.

特に、上記した活性層構造は、井戸層や障壁層の膜厚ならびに組成から条件設定することができる。   In particular, the above-described active layer structure can be set by the thickness and composition of the well layer and the barrier layer.

また、上記の実施の形態1、2では、熱処理工程が、光導波路の幅方向の両側面に接する埋め込み層を形成する工程であったが、他の熱処理工程である場合も本発明を適用できることは云うまでもない。   In the first and second embodiments, the heat treatment step is a step of forming buried layers in contact with both side surfaces in the width direction of the optical waveguide. However, the present invention can also be applied to other heat treatment steps. Needless to say.

1 n型InP基板
2 n型InPクラッド層
3 GaInAsP活性層
4 p型InPクラッド層
5 p型InP電流阻止層
6 n型InP電流阻止層
7 p型InPクラッド層
8 p型GaInAsPコンタクト層
9 n側電極
10 p側電極
11 p型GaInAsPキャップ層
20 半導体光素子
31 n型InP基板
32 n型InPクラッド層
33 GaInAsP活性層
34 p型InPクラッド層
35 p型GaInAsP回折層
35A 回折格子
36 p型InPキャップ層
37 p型InPクラッド層
38 p型GaInAsPキャップ層
39 エッチングマスク層
40 p型InP電流阻止層
41 n型InP電流阻止層
42 p型InPクラッド層
43 p型GaInAsPコンタクト層
44 n側電極
45 p側電極
50 半導体光素子
1 n-type InP substrate 2 n-type InP clad layer 3 GaInAsP active layer 4 p-type InP clad layer 5 p-type InP current blocking layer 6 n-type InP current blocking layer 7 p-type InP clad layer 8 p-type GaInAsP contact layer 9 n side Electrode 10 p-side electrode 11 p-type GaInAsP cap layer 20 semiconductor optical device 31 n-type InP substrate 32 n-type InP clad layer 33 GaInAsP active layer 34 p-type InP clad layer 35 p-type GaInAsP diffraction layer 35A diffraction grating 36 p-type InP cap Layer 37 p-type InP cladding layer 38 p-type GaInAsP cap layer 39 etching mask layer 40 p-type InP current blocking layer 41 n-type InP current blocking layer 42 p-type InP cladding layer 43 p-type GaInAsP contact layer 44 n-side electrode 45 p-side Electrode 50 Semiconductor photoelement

Claims (14)

イオウ(S)を含むInP半導体基板上に、活性層が形成され、前記活性層の形成後に熱処理工程を経て作製される半導体光素子の発光波長調整方法であって、
前記半導体基板のイオウ濃度と、前記熱処理工程に伴い前記活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味して、前記活性層が前記熱処理工程後に所望の発光波長となるように、前記イオウ濃度または活性層構造を決定することを特徴とする半導体光素子の発光波長調整方法。
A method for adjusting an emission wavelength of a semiconductor optical device, wherein an active layer is formed on an InP semiconductor substrate containing sulfur (S), and a heat treatment step is performed after the formation of the active layer,
In consideration of the relationship between the sulfur concentration of the semiconductor substrate and the short wavelength shift amount at which the emission wavelength of the active layer shifts to the short wavelength side in the heat treatment step, the active layer is desired after the heat treatment step. A method for adjusting an emission wavelength of a semiconductor optical device, wherein the sulfur concentration or the active layer structure is determined so as to obtain an emission wavelength.
前記活性層がGaInAsPを含むことを特徴とする請求項1に記載の半導体光素子の発光波長調整方法。   The method for adjusting the emission wavelength of a semiconductor optical device according to claim 1, wherein the active layer contains GaInAsP. 前記イオウ濃度は、1×1018〜1×1019cm−3であることを特徴とする請求項1または請求項2に記載の半導体光素子の発光波長調整方法。 The method for adjusting the emission wavelength of a semiconductor optical device according to claim 1, wherein the sulfur concentration is 1 × 10 18 to 1 × 10 19 cm −3 . 前記活性層構造を一定とし、前記イオウ濃度と前記短波長シフト量との関係をもとに、所定のイオウ濃度の前記半導体基板を選択することを特徴とする請求項1〜3のいずれか一つに記載の半導体光素子の発光波長調整方法。   4. The semiconductor substrate having a predetermined sulfur concentration is selected based on a relationship between the sulfur concentration and the short wavelength shift amount, wherein the active layer structure is constant. The light emission wavelength adjustment method of the semiconductor optical element as described in one. 前記半導体基板のイオウ濃度を一定とし、前記イオウ濃度と前記短波長シフト量との関係をもとに、前記活性層構造を決定することを特徴とする請求項1〜3のいずれか一つに記載の半導体光素子の発光波長調整方法。   The active layer structure is determined based on the relationship between the sulfur concentration and the short wavelength shift amount, with the sulfur concentration of the semiconductor substrate being constant. The light emission wavelength adjustment method of the semiconductor optical element of description. 前記活性層構造は、量子井戸層や障壁層の膜厚ならびに組成から規定されることを特徴とする請求項1〜5のいずれか一つに記載の半導体光素子の発光波長調整方法。   6. The method for adjusting the emission wavelength of a semiconductor optical device according to claim 1, wherein the active layer structure is defined by the film thickness and composition of a quantum well layer and a barrier layer. 前記熱処理工程に用いる温度の範囲が600℃〜800℃であることを特徴とする請求項1〜6のいずれか一つに記載の半導体光素子の発光波長調整方法。   The method for adjusting the emission wavelength of a semiconductor optical device according to any one of claims 1 to 6, wherein a temperature range used in the heat treatment step is 600 ° C to 800 ° C. イオウ(S)を含む半導体基板の上に、活性層を形成する活性層形成工程と、
前記活性層形成工程の後に行われる熱処理工程と、
を備えた半導体光素子の製造方法であって、
前記半導体基板のイオウ濃度と、前記熱処理工程に伴い前記活性層での発光波長が短波長側にシフトする短波長シフト量と、の関係を加味して、前記活性層が前記熱処理工程後に所望の発光波長となるように、予め、前記イオウ濃度または活性層構造を決定しておくことを特徴とする半導体光素子の製造方法。
An active layer forming step of forming an active layer on a semiconductor substrate containing sulfur (S);
A heat treatment step performed after the active layer forming step;
A method of manufacturing a semiconductor optical device comprising:
In consideration of the relationship between the sulfur concentration of the semiconductor substrate and the short wavelength shift amount at which the emission wavelength of the active layer shifts to the short wavelength side in the heat treatment step, the active layer is desired after the heat treatment step. A method for producing a semiconductor optical device, wherein the sulfur concentration or the active layer structure is determined in advance so as to obtain an emission wavelength.
前記半導体基板がInP基板であり、前記活性層がGaInAsPを含むことを特徴とする請求項8に記載の半導体光素子の製造方法。   9. The method of manufacturing a semiconductor optical device according to claim 8, wherein the semiconductor substrate is an InP substrate, and the active layer contains GaInAsP. 前記イオウ濃度は、1×1018〜1×1019cm−3であることを特徴とする請求項8または請求項9に記載の半導体光素子の製造方法。 The method for manufacturing a semiconductor optical device according to claim 8, wherein the sulfur concentration is 1 × 10 18 to 1 × 10 19 cm −3 . 前記活性層構造は、量子井戸層や障壁層の膜厚ならびに組成から規定されることを特徴とする請求項8〜10のいずれか一つに記載の半導体光素子の製造方法。   The method of manufacturing a semiconductor optical device according to claim 8, wherein the active layer structure is defined by a film thickness and a composition of a quantum well layer and a barrier layer. 前記活性層を含む光導波路をメサ構造に形成する光導波路形成工程を備え、
前記熱処理工程は、前記光導波路の幅方向の両側面に接する埋め込み層を形成する工程であることを特徴とする請求項8〜11のいずれか一つに記載の半導体光素子の製造方法。
An optical waveguide forming step of forming an optical waveguide including the active layer into a mesa structure;
12. The method of manufacturing a semiconductor optical device according to claim 8, wherein the heat treatment step is a step of forming buried layers in contact with both side surfaces in the width direction of the optical waveguide.
前記熱処理工程に用いる温度の範囲が600℃〜800℃であることを特徴とする請求項8〜12のいずれか一つに記載の半導体光素子の製造方法。   The method for manufacturing a semiconductor optical device according to any one of claims 8 to 12, wherein a temperature range used in the heat treatment step is 600 ° C to 800 ° C. 前記活性層の上に更に回折格子層を形成する工程を備えることを特徴とする請求項8〜13のいずれか一つに記載の半導体光集積素子の製造方法。   14. The method of manufacturing a semiconductor optical integrated device according to claim 8, further comprising a step of forming a diffraction grating layer on the active layer.
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