JP2012048401A - Image processing device and method for processing image - Google Patents

Abstract

An object of the present invention is to realize a low-cost image processing that reduces the memory capacity and the memory bandwidth and is independent of the resolution of input image data.
When image processing is sequentially performed for each of a plurality of band regions obtained by dividing image data, a pixel of interest is determined by scanning the band region in the short side direction. Then, the image processing unit performs an operation on the target pixel with reference to the operation result for the pixel in the vicinity region, and holds the operation result in the delay memory 214 provided inside. Further, the calculation result for the pixel referred to in the processing in the next band region is stored in the error buffer 238 provided outside the image processing unit. Access to the error buffer 238 is performed by burst transfer via transfer buffers 216 and 217 provided in the image processing unit. As a result, the memory bandwidth for accessing the error buffer 238 can be reduced while reducing the capacity of the delay memory 214, and the hardware implementation cost can be greatly reduced.
[Selection] Figure 2

Description

  The present invention relates to an image processing apparatus and an image processing method for performing local image processing with reference to a pixel in a predetermined neighborhood area on a target pixel in image data.

  Conventionally, various image processing such as halftone processing and encoding processing has been widely performed on digital image data. In particular, local (neighboring) image processing such as spatial filter processing is generally performed, and this local image processing is included in a spatial filter region including a pixel to be processed (hereinafter referred to as a target pixel). This is image processing for performing some kind of calculation using all pixels. For example, as a method used when a calculation result obtained when a certain pixel is processed is used to process a neighboring pixel, an error diffusion method in a halftone process, a predictive encoding process in an encoding process, or the like can be given.

  Here, an error diffusion method, which is a kind of pseudo intermediate color reproduction technique for expressing a continuous gradation image with a small gradation such as binary, will be briefly described. The error diffusion method is an image process characterized by sequentially performing a process of quantizing a pixel of interest into a quantized representative value using a threshold and diffusing the quantization error at that time to a neighboring pixel of the pixel of interest.

  Next, the predictive encoding process, which is an encoding method using the property that the correlation between adjacent pixels in an image is high, will be briefly described. Predictive coding processing is an image processing characterized in that a target pixel value is predicted from already processed values around the target pixel, and an information amount is reduced by encoding a difference between the predicted value and the target pixel. It is.

  When performing image processing having a dependency relationship with neighboring pixels as described above, the calculation result of the pixels is temporarily stored in a storage device (memory), and the memory is used when processing the subsequent pixel of interest. The processing result stored from is read, and the value is used to calculate the target pixel. When the error diffusion process is performed, the quantization error or the accumulated error is stored as a calculation result in the memory, and when the predictive encoding process is performed, the local decoded value is stored as a calculation result in the memory. Conventionally, various proposals have been made for the configuration of a memory for storing such calculation results.

Here, the configuration of the memory that stores the calculation results for the pixels will be described below using an image processing apparatus that performs error diffusion processing as an example.
First, as a first conventional technique, there is a method of mounting a memory for storing a calculation result (quantization error) in an image processing unit. FIG. 14A is a block diagram showing an example of the overall configuration of an image processing apparatus to which the first prior art is applied. FIG. 14A shows a configuration in which the image processing unit performs error diffusion processing on the digital image data input from the image input unit and outputs the result to the image output unit. In the figure, the error diffusion processing unit is internally provided with a delay memory for storing the quantization error. Therefore, the circuit scale increases.
In order to avoid such an increase in circuit scale, as a second conventional technique, there is a method of arranging a memory for storing a quantization error outside the image processing unit. FIG. 14B is a block diagram illustrating an example of the overall configuration of an image processing apparatus to which the second prior art is applied. According to FIG. 14B, the error diffusion processing unit in the image processing unit is not mounted with a delay memory for storing the quantization error, and an error buffer for storing the quantization error in the RAM in the central processing unit. Is provided. Therefore, according to the second prior art, there is no increase in the circuit scale for the delay memory as in the case of using the first prior art. However, instead, when performing error diffusion processing, the error diffusion processing unit needs to access an error buffer included in the RAM in the central processing unit, and a memory band for that purpose is required.

JP 11-058837 A

  As described above, according to the first prior art, since the delay memory that stores the calculation result is mounted in the image processing unit, the circuit scale increases. Here, the delay memory capacity when the error diffusion processing is performed by raster scanning will be described with reference to FIG.

  FIG. 15A is an example of an error diffusion coefficient, and FIG. 15B is a diagram for explaining error diffusion processing when the error diffusion coefficient shown in FIG. 15A is used. In FIG. 15B, a region 1510 surrounded by a dotted line indicates a pixel (filter shape) that is referred to when processing the target pixel e in the drawing. In FIG. 15B, when scanning is performed in the direction indicated by the arrow 1530, the capacity necessary as the delay memory is a capacity capable of storing the quantization error when the pixels included in the hatched area 1520 are processed. . From this, it can be seen that the delay memory capacity depends on the horizontal width (main scanning width) of the input image data. That is, the delay memory capacity is the number of pixels corresponding to the width of the input image data × 1 line × the size of the quantization error data size. For example, when the resolution is 600 ppi and the width of 60 inches is one line, the number of pixels in one line is 36000 pixels, and when the quantization error data size is 8 bits, the delay memory capacity is about 35 kilobytes.

  As described above, in the first conventional technique, the delay memory capacity depends on the horizontal width of the input image data. Therefore, there is a problem that the circuit must be designed according to the resolution of the input image data. Furthermore, as the horizontal width of the input image data is increased, a delay memory having a larger capacity is required. For example, there is a problem that the manufacturing cost of an image processing unit as an LSI increases.

  On the other hand, according to the second prior art, writing and reading into the error buffer of the main memory occur each time one pixel is processed, instead of having to mount a large capacity memory in the image processing unit. To do. Therefore, when the resolution of the input image data increases and the number of pixels that must be processed in a certain time increases, access to the external memory arranged outside the image processing unit increases, and a larger memory bandwidth is obtained. Necessary. Therefore, as a result of taking measures such as mounting a high-speed memory, there is a problem that the hardware mounting cost increases.

  As described above, according to the conventional technique, it is necessary to mount a larger delay memory or a high-speed memory in accordance with the increase in resolution of the input image data, and there is a problem that the cost is increased.

  SUMMARY An advantage of some aspects of the invention is to provide an image processing apparatus and an image processing method having the following functions. That is, low-cost image processing independent of the resolution and size of the input image data is realized while reducing the memory capacity and memory bandwidth related to image processing.

  As a means for achieving the above object, an image processing apparatus of the present invention comprises the following arrangement.

  That is, an image processing apparatus that sequentially performs image processing for each band area obtained by dividing image data in a certain direction, and scans the band area in the short side direction. A scanning unit that determines a target pixel, an image processing unit that performs a calculation on the target pixel with reference to a calculation result for a pixel that has already been processed in a predetermined neighborhood region, and An external storage unit that is provided outside and stores calculation results by the image processing unit for pixels located in a first boundary portion adjacent to a band region to be processed next in the band region; The image processing means includes an internal storage means for storing calculation results for pixels in the neighboring area with respect to the target pixel in the band area, and the first in the band area. First holding means for temporarily holding calculation results for pixels located in the boundary portion for burst transfer to the external storage means, and the first in the band area processed immediately before the band area And second holding means for temporarily holding the calculation result for the pixel located at the boundary portion by burst transfer from the external storage means.

  According to the present invention, it is possible to perform low-cost image processing independent of the resolution and size of input image data while reducing the memory capacity and the memory bandwidth related to image processing.

The figure explaining the band division | segmentation in 1st Embodiment, and the scanning method, FIG. 2 is a block diagram showing a configuration example of an image processing apparatus according to the first embodiment. The flowchart which shows the image processing in 1st Embodiment, The figure which shows the example of a filter in the error diffusion process of 1st Embodiment, The figure explaining the band processing operation in 1st Embodiment. The block diagram which shows the structural example of the error diffusion process part in 1st and 3rd embodiment, The flowchart which shows the image processing in 2nd Embodiment, The block diagram which shows the structural example of the image processing apparatus in 2nd Embodiment, The figure which shows the other filter example in the error diffusion process of 1st Embodiment, The figure explaining the band processing operation at the time of using the filter of FIG. The figure which shows the example of a filter at the time of the upward scanning in 3rd Embodiment. The figure explaining the band processing operation in 3rd Embodiment. The flowchart which shows the image processing in 3rd Embodiment, A block diagram showing a configuration example of a conventional image processing apparatus, It is a figure explaining the conventional error diffusion process.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The following embodiments do not limit the present invention related to the scope of claims, and all combinations of features described in the present embodiments are essential to the solution means of the present invention. Not necessarily.

<First Embodiment>
● Band processing For devices that must be provided at low cost, such as home printers, it is often impossible to mount a memory having a capacity sufficient to store one piece of digital image data in order to reduce hardware costs. For this reason, so-called band processing is performed in which one piece of digital image data is divided into a plurality of strip-shaped band regions, and only the band regions are sequentially developed in a memory (hereinafter referred to as band memory) to perform various image processing. Generally done.

  Here, the band processing method will be described with reference to FIG. FIG. 1A shows an example in which the image data 100 is divided in the sub-scanning direction at the time of reading (or outputting), and three band regions 110, 120, and 130 are obtained. In this case, the band area 110 is first developed in the band memory, and after this is processed, the band area 120 is newly overwritten in the band memory and processed. Finally, the band area 130 is expanded and processed in the band memory and processed. Note that the number of divisions of the band area is arbitrary, and the height of each band area does not need to be the same and may be different.

  In FIG. 1A, reference numeral 150 denotes a lower end 1 line in the band region 110. Reference numerals 160 and 170 denote one line at the upper end and the lower end of the band region 120, respectively. Similarly, 180 indicates one line at the upper end of the band region 130. Hereinafter, in the band region, a boundary portion (first boundary portion) adjacent to the band region to be processed next is referred to as a lower end portion, and a boundary portion adjacent to the band region processed immediately before (second boundary portion) ) Is referred to as the upper end. That is, 150 and 170 are lower end portions of the band regions 110 and 120, respectively, and 160 and 180 are upper end portions of the band regions 120 and 130, respectively.

  In the present embodiment, image processing is sequentially performed for each band region for a plurality of band regions obtained by dividing image data in a certain direction. In the present embodiment, the pixel scanning direction (in-band scanning direction) when processing the band region is relative to the main scanning direction at the time of reading the image data 100 as indicated by an arrow 140 in FIG. It is assumed that the vertical scanning direction is the vertical scanning direction. That is, the in-band scanning direction is a short side direction (hereinafter, height direction) perpendicular to the long side direction (hereinafter, width direction) of the band region. Such in-band scanning in a direction perpendicular to the main scanning direction at the time of reading the band region is hereinafter referred to as cross-band processing. According to FIG. 1B, scanning is started with the upper left pixel of the band area as a target pixel, and the target pixel is determined by scanning in the height direction of the band area. When the processing using the pixel at the lower end of the band area as the target pixel is completed, one pixel is shifted in the width direction of the band area, and scanning from the pixel at the upper end of the band area is started. This series of scanning is performed for all the pixels in the band area.

  In this embodiment, a case where error diffusion processing is performed by band processing will be described as an example. Here, the error diffusion processing in this embodiment will be described. FIG. 4A shows an example of the error diffusion coefficient used for the error diffusion processing of this embodiment. That is, FIG. 4A shows an error distribution in which the target pixel indicated by * diffuses to the pixels in the vicinity region. 4B is used to calculate an error diffused from a neighboring pixel with respect to the pixel of interest * when error diffusion processing is performed using the error diffusion coefficient shown in FIG. 4A. Indicates the filter to be used. The filter shown in FIG. 4B has a point-symmetric shape with respect to the error diffusion coefficient shown in FIG. FIG. 4 (c) shows the positional relationship of pixels referred to when executing error diffusion processing on the target pixel e with the symbols a to d, where e is the target pixel. In the processing of the target pixel e, it is indicated that the error of the pixels at the positions a to d that have already been processed is referred to.

  Although details will be described later, in the image processing apparatus according to the present embodiment, the quantization error obtained as the calculation result of the pixels at the positions a to d is a delay memory mounted in the image processing unit (FIG. 2 to be described later). (corresponding to 214 in (a)). Here, when the target pixel e is located at the upper end of the band area, the pixels at the positions a and d to be referred to belong to the previous band area, so the positions of the a and d Cannot be referred across the band region. Therefore, in the present embodiment, the calculation result when processing the pixel at the lower end of the previous band area is different from the delay memory as the internal storage means, and the error buffer as the external storage means (see FIG. corresponding to a) 238). As a result, even when image data is divided into a plurality of band areas and processing is performed sequentially for each band area, the calculation result can be referred to across the band areas.

  In this embodiment, when writing the calculation result when processing a pixel to the error buffer and reading from the error buffer, burst transfer is used to transfer a plurality of data continuously with one address designation. Access. Therefore, the number of accesses to the error buffer can be reduced from one access to one pixel to one access to a plurality of pixels corresponding to the burst length. In order to realize this burst transfer, there is a transfer buffer (corresponding to 216 and 217 in FIG. 2 (a) described later) for storing a calculation result when a pixel at the lower end of the band region is processed for a plurality of pixels. Implemented in the image processing unit.

Apparatus Configuration An example of the configuration of the image processing apparatus according to this embodiment will be described below with reference to FIG. In FIG. 2A, an image input unit 200 is an input device such as a scanner or a digital camera, and inputs digital image data to the image processing unit 210. The image processing unit 210 includes a portion (not shown) that performs input correction processing, various filter processing, and the like, and an error diffusion processing unit 212 that performs error diffusion processing. Further, the error diffusion processing unit 212 includes a delay memory 214 for storing the quantization error and transfer buffers 216 and 217 used at the time of burst transfer. The image processing unit 210 performs the various image processes described above, and sends, for example, binary data, which is the processing result of the error diffusion processing unit 212, to the image output unit 220. The image output unit 220 includes a print output unit such as an ink jet head, and records an image on a sheet based on binary data input from the image processing unit 210.

  The central processing unit 230 includes a CPU 232 for arithmetic control, a ROM 234 for storing data, programs, and the like, a RAM 236 used for primary storage of data, loading of programs, and the like. The image input unit 200, the image processing unit 210, and the like. The image output unit 220 is controlled. Note that the RAM 236 includes an error buffer 238 for storing a calculation result when the pixel at the lower end of the previous band region is processed as described above.

  In the configuration shown in FIG. 2A, a quantization error obtained as a calculation result when the pixel of interest is processed is sequentially stored in the delay memory 214 as an internal storage unit. In the transfer buffer 216 as the first holding means, a quantization error obtained as a result of processing when the pixel at the lower end of the band region (the reference pixel at the time of processing the upper end pixel of the next band) is processed for a plurality of pixels. Retained. Further, the transfer buffer 217 serving as the second holding unit holds a plurality of pixels of quantization errors of the reference pixel with respect to the upper end pixel of the band region. The error buffer 238 serving as an external storage unit stores all quantization errors when processing pixels for one line at the lower end of the band region (reference pixels when processing the upper end pixel of the next band).

  As described above, in the present embodiment, regarding the memory for storing the calculation result, the delay memory 214 inside the image processing unit, the transfer buffers 216 and 217, the storage device (error buffer 238) outside the image processing unit, It is characterized by having a configuration consisting of three parts.

  Hereinafter, the image processing (error diffusion processing) performed in the present embodiment and the operation of the memory composed of the three parts will be described in detail.

Delay Memory Operation in Error Diffusion Processing First, error diffusion processing and access to the delay memory 214 in this embodiment will be described with reference to the flowchart of FIG. 3B and FIGS. 4, 5, and 6. FIG. FIG. 6 is a diagram illustrating a detailed configuration example of the error diffusion processing unit 212 in FIG. 2A and the relationship with the error buffer 238. FIG. 5 is a diagram showing how the pixel of interest e is processed in the band region 120 in FIG. A region 510 surrounded by a dotted line in FIG. 5 indicates the position of the reference pixel and the target pixel of the quantization error necessary for processing the target pixel e, and a, b, c, and so on shown in FIG. It corresponds to d and e.

  First, in S401, a quantization error when processing the pixels a, b, c, and d required for processing the target pixel e (hereinafter, the quantization error when processing the pixel x is expressed as a quantization error x). That is, x indicates a relative position from the target pixel). The quantization errors a, b, and c are stored in the delay memory 620 (corresponding to the delay memory 214 in FIG. 2A), and the quantization error when the pixel d processed immediately before the input pixel e is processed. d is stored in the delay register 630. The quantization errors a, b, and c are extracted from the delay memory 620 via the delay circuit 640 and input to the product-sum operation unit 600. In addition, the quantization error d is also input from the delay register 630 to the product-sum calculator 600. On the other hand, the error diffusion coefficient is stored in the error diffusion coefficient register 610. When each quantization error is read, the four error diffusion coefficients stored in the registers 0 to 4 are input to the product-sum calculator 600. .

  In step S402, an error is propagated to the target pixel e. That is, the product-sum calculator 600 weights each of the quantization errors a, b, c, and d according to the error diffusion coefficient, and calculates the sum of the weighted value and the input pixel value e. To do. The product-sum operation result 602 that is the calculation result is output as a value after error propagation for the target pixel e.

  In step S <b> 403, the quantizer 650 quantizes the product-sum operation result 602 output from the product-sum operator 600 to a predetermined quantization representative value using a predetermined threshold, and outputs a quantization result 604.

  In step S <b> 404, the inverse quantizer 670 performs inverse quantization using the quantization result 604 output from the quantizer 650 as a quantization representative value, and outputs the inverse quantization result 606. In step S405, the subtractor 660 calculates a difference between the product-sum operation result 602 output from the product-sum operation unit 600 and the inverse quantization result 606 output from the inverse quantizer 670, and quantizes the difference. The error 607 is output.

  In step S406, the quantization error is written into the delay register 630 and the delay memory 620. That is, by storing the quantization error 607 output from the subtractor 660 in the delay register 630, the quantization error 607 is used as the quantization error d when the next pixel is processed. The quantization error d used for processing the target pixel e is stored in the delay memory 620 via the delay circuit 640 and used when processing the pixels in the next column in the width direction of the band region. .

  Here, the capacity of the delay memory 620 will be described. In this embodiment, the shape of the reference pixel position (filter shape) used for calculating the error diffused from the neighboring pixels with respect to the target pixel is the shape shown in FIG. 4B (that is, the shape of the region 510 in FIG. 5). ). Therefore, if the delay memory 620 stores the quantization error of the pixels in the hatched area 520 in FIG. 5, error diffusion processing can be performed. Therefore, the minimum capacity necessary for the delay memory 620 is a capacity capable of storing a quantization error for one row of pixels corresponding to the height of the band region, and is represented by the following equation (1). In equation (1), BDh is the height of the band region, and pix is the data size of the quantization error per pixel.

Delay memory capacity Dbub = BDh × pix (1)
As can be seen from the equation (1), in this embodiment, the minimum capacity (hereinafter referred to as delay memory capacity) required for the delay memory 620 for storing the calculation result necessary for processing subsequent pixels is the band. Depends on the height of the area. In this embodiment, since the number of divided bands is arbitrary, if the height of one page is the same, if the number of divisions is increased, the height of the band area becomes very small, and the delay memory capacity is greatly reduced. be able to.

  Here, the first prior art is compared with the present embodiment. For example, consider input image data having a resolution of 600 ppi and a width of 60 inches. Then, the number of pixels per line in the input image data is 36000 pixels, and if the data size of the quantization error is 8 bits, the delay memory capacity in the first conventional technique is about 35 kilobytes. On the other hand, in the present embodiment, when the number of pixels in the height direction of the band region is 360 pixels, the delay memory capacity is 360 bytes, which can be reduced to 1/100 that in the case of applying the first conventional technique.

  The delay memory capacity varies depending on the filter shape used for error diffusion processing. The variation of the delay memory capacity will be described with reference to FIG. FIG. 9 shows an example of a filter shape different from that of FIG. In FIG. 9A, a to g, and a to l in FIG. 9B indicate the positional relationship of the pixels referred to when processing the target pixel at the position indicated by *, respectively. This corresponds to a region 1010 surrounded by a dotted line in 10 (a) and a region 1030 surrounded by a dotted line in FIG. 10 (b). The delay memory capacity required in such a case can store the quantization error for the pixels included in the hatched area 1000 in FIG. 10A when the filter shape is the shape of FIG. It becomes capacity. Further, when the filter shape is the shape of FIG. 9B, the delay memory capacity is a capacity capable of storing the quantization error for the pixels included in the hatched area 1020 in FIG. 10B. That is, as the delay memory capacity, the number of scanning lines scanned before the scanning line of the target pixel in the error diffusion filter shape (the neighboring region shown in FIG. It is only necessary to store the calculation results for the number of pixels multiplied by the number of pixels. Even in the case of the filter shape shown in FIGS. 9A and 9B, the delay memory capacity depends on the number of pixels in the height direction of the band region. The capacity can be greatly reduced.

Transfer Buffer and Error Buffer Operation Next, access to the transfer buffer and the error buffer will be described with reference to the flowchart of FIG. Here, a case where the band region 120 in FIG. 1A is processed is taken as an example.

  First, in S300, it is determined whether or not the target pixel e is a pixel at the upper end of the band region 120. If the target pixel e is a pixel at the upper end of the band region 120 (state in FIG. 5B), band upper end processing (second boundary processing) is performed in S301 to S303. That is, in S301, it is determined whether or not there is data necessary for processing the target pixel e in the transfer buffer A690. The necessary data in this case is the quantization error a when the pixels a and d which are pixels at the lower end of the previous band region (the region 150 in the band region 110 in FIG. 1A) are processed. , D. If necessary data is present, the quantization errors a and d are read from the transfer buffer A 690 (S303), and error diffusion processing is performed using them together with the quantization errors b and c stored in the delay memory 620. Perform (S304). On the other hand, if the necessary data does not exist in the transfer buffer A 690, the quantization error for a plurality of pixels including necessary data is read out from the error buffer 680 to the transfer buffer A 690 by burst transfer (S302). Then, an error diffusion process is performed using the quantization errors a and d included in the burst read data and the quantization errors b and c stored in the delay memory 620 (S304).

  On the other hand, when the target pixel e is not the upper end portion of the band region 120 in S300 (the state of FIG. 5A), the quantization errors a, b, and c stored in the delay memory 620 and the delay register 630 are stored. Error diffusion processing is performed using the stored quantization error d (S304). Here, when the pixel of interest is at the lower end, the quantization error c is obtained at the time of processing the next band region, and it is assumed that error diffusion processing is performed without referring to this. Note that the details of the error diffusion processing in S304 correspond to the flowchart shown in FIG.

  In step S <b> 305, it is determined whether the target pixel e is the lower end portion of the band region 120. When the target pixel e is the lower end portion of the band region 120 (state in FIG. 5C), band lower end processing (first boundary processing) is performed in S306 to S308. That is, the quantization error e at the time of performing the error diffusion processing in S306 is written in the transfer buffer B695, and then it is determined whether or not a predetermined pixel is written in the transfer buffer B695 (S307). When a predetermined number of pixels are written, the quantization errors for a plurality of pixels stored in the transfer buffer B 695 are collected and written to the error buffer 680 by burst transfer (S 308), and then quantized to the image output unit 220. The result is output (S309). On the other hand, if the target pixel e is not the lower end portion of the band area 120 in S305 (the state shown in FIG. 5A), or if a predetermined pixel is not written in the transfer buffer B695 in S307, the process proceeds to S309. Then, the quantization result is output to the image output unit 220.

  When processing the upper end of the uppermost band area (first band of the page) in the input image data (the upper end of the band area 110 in FIG. 1A), the error buffer 680 is accessed. Not performed. Similarly, the error buffer 680 is accessed when the lower end of the lowermost band area (the last band of the page) of the input image data (the lower end of the band area 130 in FIG. 1A) is processed. Do not do.

  Here, the capacity of the error buffer 680 will be described. In the error buffer 680, when the target pixel is at the upper end portion of the band area, the calculation result for the neighboring pixels that cannot be referred to in the band area is held. In the present embodiment, among the plurality of pixel positions referred to when processing the target pixel, the pixels above the target pixel are pixels on one line indicated by a and d in FIG. 4C. is there. Therefore, the error buffer 680 may store the quantization error when the pixels corresponding to one line at the lower end of the previously processed band region are processed. For example, when the band area 120 in FIG. 1A is processed, the error buffer 680 records the quantization error when the lower end area 150 of the previous band area is processed. Therefore, the minimum capacity required for the error buffer 680 is a capacity capable of storing a quantization error for one line of pixels corresponding to the width of the band region, and is expressed by the following equation (2). In equation (2), BDl is the width of the band region, and pix is the data size of the quantization error per pixel.

Error buffer capacity Ebub = BD1 × pix (2)
The error buffer capacity also varies depending on the filter shape used for the error diffusion process. For example, consider the case where the filter shape is the shape shown in FIG. In FIG. 9A, among the pixels referred to when processing the target pixel indicated by *, pixels whose position is above the target pixel are pixels on one line indicated by b and g, and f It is a pixel on two lines shown. Therefore, as the error buffer capacity, it is possible to store the quantization error of pixels for a total of two lines on the lower end line of the previously processed band region and one line. That is, as the error buffer capacity, the number of lines in the long side direction of the band area processed before the target pixel in the filter shape of error diffusion (the neighboring area shown in FIG. 4C), the band area It is only necessary to store the calculation results for the number of pixels obtained by multiplying the number of pixels for the long side direction.

  Next, the capacity of the transfer buffers 216 and 217 (hereinafter simply referred to as transfer buffers) will be described. Since the transfer buffer update interval has a processing time corresponding to the height of one band area, it is not necessary to adopt a double buffer configuration. Therefore, it is sufficient that the capacity of the transfer buffer is equal to or larger than the burst access unit, that is, the capacity of the data size transferred by one burst transfer. For example, if the burst transfer size is 32 bytes, the minimum required capacity for the transfer buffer is 32 bytes. That is, if the data size of the quantization error per pixel is 1 byte, it is for 32 pixels. Since the burst transfer sizes for reading and writing are usually the same, the transfer buffer of this embodiment is also composed of two 32-byte buffers (216 and 217).

  Since the interval for accessing the transfer buffer is the processing time for one row, it is possible to share the transfer buffer for reading and writing if overlapping reading is allowed. For example, when the reference pixel position at the time of error diffusion is the region shown in FIG. 4C, if the capacity of the transfer buffer is the burst transfer size + 2 pixels, the reference pixels (2 pixels) in the next row are While being held, the burst write can be secured in the transfer buffer. However, in this case, since burst reading must be performed again after burst writing is completed, the number of accesses to the error buffer 680 is 1.5 times. When the reading start position of the burst access unit can be shifted, if the capacity of the transfer buffer is set to the burst transfer size + 3 pixels, the number of accesses to the error buffer 680 is not shared between reading and writing. Can be almost the same.

  Here, the second prior art and the present embodiment are compared with respect to the memory bandwidth when accessing the error buffer 680. In the second prior art, since quantization errors of neighboring pixels necessary for processing the target pixel are all stored in the error buffer, reading / writing to the error buffer occurs for each pixel. On the other hand, in the present embodiment, reading and writing to the error buffer 680 occurs only when pixels at the upper end and lower end of the band region are processed. This is because in this embodiment, quantization errors for a plurality of pixels are stored in the transfer buffer, and are collectively read from and written to the error buffer 680 by burst transfer. That is, the number of accesses to the error buffer 680 can be reduced to 1 / (the height of the band area × the number of burst transfer pixels) as compared with the second conventional technique, and the memory bandwidth is greatly reduced.

  As described above, according to the present embodiment, a memory that performs cross-band scanning of pixels in the short side direction of the band region and holds a calculation result referred to in subsequent pixel processing is referred to as a delay memory in the image processing unit. The three-part configuration includes an error buffer outside the image processing unit and a transfer buffer. In other words, the calculation result referred to in the subsequent pixel processing is stored in the delay memory, and the calculation result referred to in the next band region processing is stored in the error buffer by burst transfer temporarily using the transfer buffer. To do. As a result, the capacity of the delay memory depends on the size (height) in the short side direction of the band area, so that the capacity can be greatly reduced, and the circuit is independent of the resolution and size of the input image data. Can be configured.

  When this embodiment is compared with the first prior art described above, access to the error buffer outside the image processing unit occurs, but the memory bandwidth accompanying access to the error buffer is obtained by utilizing the transfer buffer. It will be very small. Accordingly, it is possible to significantly reduce the capacity of the delay memory in the image processing unit, suppress the circuit scale as a whole, and reduce the mounting cost.

  Further, when this embodiment is compared with the second prior art, a delay memory is mounted in the image processing unit, but its capacity is very small, and the memory bandwidth when accessing the error buffer is small. Significantly reduced.

  Furthermore, since the height of the band region is arbitrary, the designer can control the capacity of the delay buffer depending on the band height. In addition, the number of accesses to the error buffer when processing the entire input image data depends on the height of the band area. Therefore, the access frequency decreases as the band area height increases, and the access frequency increases as the band area height decreases, so there is a trade-off between the capacity of the delay memory and the memory bandwidth when accessing the error buffer. It becomes a relationship. Therefore, the designer can procure circuit resources such as a memory capacity, a memory band, and a circuit scale flexibly according to the purpose.

Second Embodiment
Hereinafter, a second embodiment according to the present invention will be described. In the first embodiment described above, an example in which the error diffusion process is performed in the image processing unit has been described, but in the second embodiment, an example in which the predictive encoding process is performed in the image processing unit is illustrated.

Predictive Encoding Process A reference data access method will be described below in the case of performing plane prediction (two-dimensional prediction) as the predictive encoding process in the second embodiment.

  Also in the planar prediction of the second embodiment, the pixel position shown in FIG. That is, if the pixel e is the target pixel in FIG. 4C, the prediction value of the pixel e is calculated using the calculation results (local decoded values) of the pixels at the positions indicated by a, b, c, and d. Predictive encoding processing is performed. The local decoded value obtained as the calculation result of the pixels at the respective positions a, b, c, and d is stored in a delay memory (corresponding to 214 in FIG. 2B described later) mounted in the image processing unit.

  Here, when the target pixel e is located at the upper end of the band area, the pixels at the positions a and d to be referred to belong to the previous band area, so the positions of the a and d Cannot be referred across the band region. Therefore, in the second embodiment as well, as in the first embodiment described above, a decoded value buffer different from the delay memory for the local decoded value corresponding to one line when the pixel at the lower end of the previous band region is processed. (Corresponding to 239 in FIG. 2B described later). As a result, even when image data is divided into a plurality of band areas and processing is performed sequentially for each band area, it is possible to refer to local decoded values across the band areas. As for the writing and reading of the local decoded value to and from the decoded value buffer in the second embodiment, a plurality of pixels of the local decoded value are stored in the transfer buffer in the same manner as in the first embodiment described above, and collectively. The number of accesses is reduced by burst transfer.

Device Configuration Hereinafter, a configuration example of the image processing device according to the second embodiment will be described with reference to FIG. In FIG. 2 (b), the same components as those in FIG. 2 (a) shown in the first embodiment are denoted by the same reference numerals, and description thereof is omitted. That is, in FIG. 2B, a predictive coding processing unit 213 is provided instead of the error diffusion processing unit 212 of FIG. 2A, and a decoded value buffer 239 is replaced with the error buffer 238 of FIG. It is characterized by providing. That is, the predictive coding processing unit 213 performs predictive coding processing on the image data, and the delay memory 214 and the transfer buffer 216 are mounted therein. Further, the RAM 236 in the central processing unit 230 is provided with a decoded value buffer 239.

  In the configuration shown in FIG. 2B, local decoding values when the target pixel is processed are sequentially stored in the delay memory 214. The transfer buffer 216 stores a local decoded value for a plurality of pixels when the pixel at the lower end of the band area (the reference pixel at the time of processing the upper end pixel of the next band) is processed. The transfer buffer 217 stores the local decoded values of the reference pixels of the upper end pixel of the band area for a plurality of pixels. The decoded value buffer 239 stores all local decoded values when the lower end pixel of the band area (the reference pixel at the time of processing the upper end pixel of the next band) is processed.

Delay Memory Operation First, the predictive encoding process and access to the delay memory 214 in the second embodiment will be described using the flowchart of FIG. 7B and FIGS. 4, 5, and 8. FIG. FIG. 8 is a diagram illustrating a detailed configuration example of the predictive coding processing unit 213 in FIG. 2B and the relationship with the decoded value buffer 239. FIG. 5 is a diagram showing how the pixel of interest e is processed in the band region 120 in FIG. A region 510 surrounded by a dotted line in FIG. 5 indicates the position of a reference pixel having a local decoded value necessary for processing the target pixel e as a calculation result, and a, b, c shown in FIG. , D, e.

  First, in S801, the local decoded value when the pixels a, b, c, and d are processed, which is necessary for processing the target pixel e (hereinafter, the local decoded value when the pixel x is processed is set as the decoded value x. That is, x indicates a relative position from the pixel of interest). The decoded values a, b, and c are stored in the delay memory 870 (corresponding to the delay memory 214 in FIG. 2B), and the decoded value d when the pixel d processed immediately before the input pixel e is processed is Are stored in the delay register 850. The decoded values a, b, and c are extracted from the delay memory 870 through the delay circuit 860 and input to the predictor 800. In addition, the decoded value d is also input from the delay register 850 to the predictor 800.

  In step S802, the predictor 800 calculates and outputs a predicted value 801 using the decoded values a, b, c, and d.

  In step S803, the predicted value 801 is decoded. That is, first, the subtractor 810 calculates and outputs a difference value 802 between the input pixel e and the predicted value 801 output from the predictor 800. Next, the quantizer 820 quantizes the difference value 802 output from the subtractor 810 into a quantized representative value, and outputs the quantized value 803. Next, the inverse quantizer 830 inversely quantizes the encoded value 803 output from the quantizer 820 into a quantized representative value, and outputs a quantized representative value 804. Next, the adder 840 adds the predicted value 801 output from the predictor 800 and the quantized representative value 804 output from the inverse quantizer 830, and outputs the addition result as a decoded value 805.

  In step S804, the decoded value 805 output from the adder 840 is stored in the delay register 850 and used when processing the next pixel. The decoded value d used to process the target pixel e is stored in the delay memory 870 via the delay circuit 860, and is used when processing the next column of pixels in the width direction of the band region.

  In the second embodiment, as in the first embodiment described above, the minimum required capacity (delay memory capacity) of the delay memory 870 depends on the number of pixels in the height direction of the band area, and thus depends on the image size. Can be arbitrarily set. Therefore, when the height of one page is the same, the band area height becomes very small if the number of divisions is increased, and the delay memory capacity can be greatly reduced.

Transfer Buffer and Error Buffer Operation Next, access to the transfer buffer and the decoded value buffer will be described with reference to the flowchart of FIG. Here, as in the first embodiment described above, the case of processing the band region 120 in FIG. 1A is taken as an example.

  First, in S700, it is determined whether or not the target pixel e is a pixel at the upper end of the band region 120. If the pixel of interest e is the pixel at the upper end of the band area 120 (state shown in FIG. 5B), in S701, it is determined whether or not data necessary for processing of the pixel of interest e exists in the transfer buffer A890. Do. The necessary data in this case are the decoded values a, d when the pixels a, d, which are pixels at the lower end of the previous band region (the region 150 in the band region 110 in FIG. 1A) are processed. d. If the necessary data exists, the decoded values a and d are read from the transfer buffer A 890 and are used together with the decoded values b and c stored in the delay memory 870 to perform an encoding process (S704). On the other hand, if the necessary data does not exist in the transfer buffer A 890, the decoded values for a plurality of pixels including necessary data are read from the decoded value buffer 880 to the transfer buffer A 890 by burst transfer (S 702). Then, the decoding process is performed using the decoded values a and d included in the burst read data and the decoded values b and c stored in the delay memory 870 (S704).

  On the other hand, if the target pixel e is not the upper end portion of the band region 120 in S700 (state of FIG. 5A), the decoded values a, b, and c stored in the delay memory 870 and the delay register 850 are stored. Encoding processing is performed using the decoded value d (S704).

  In step S <b> 705, it is determined whether the target pixel e is the lower end portion of the band region 120. When the target pixel e is the lower end of the band area 120 (state in FIG. 5C), the decoded value e when the encoding process is performed is written in the transfer buffer B895 (S706). Subsequently, in S707, it is determined whether or not predetermined pixels have been written in the transfer buffer B895. When predetermined pixels are written, the decoded values for a plurality of pixels stored in the transfer buffer B 895 are collected and written to the decoded value buffer 880 by burst transfer (S708), and then encoded to the image output unit 220. Output the result. On the other hand, if the target pixel e is not the lower end portion of the band area 120 in S705 (the state shown in FIG. 5A), or if a predetermined pixel is not written in the transfer buffer B895 in S707, the process proceeds to S709. Then, the encoding result is output to the image output unit 220.

  When processing the upper end of the uppermost band area (first band of the page) in the input image data (the upper end of the band area 110 in FIG. 1A), reading from the decoded value buffer 880 is performed. Do not do. Similarly, when processing the lower end portion of the lowermost band region (the last band of the page) of the input image data (the lower end portion of the band region 130 in FIG. 1A), the decoded value buffer 880 is also read. Do not write.

  Here, the capacity of the decoded value buffer 880 will be described. The minimum capacity necessary for the decoded value buffer 880 in the second embodiment is a capacity capable of storing decoded values for one line of pixels corresponding to the width of the band region, and is expressed by the following equation (3). . In equation (3), BDl is the width of the band region, and pix is the data size of the decoded value per pixel.

Decoded value buffer capacity DEbuf = BD1 × pix (3)
Note that the decoded value buffer capacity varies depending on the position of the pixel referred to for calculating the predicted value.

  The capacity of the transfer buffer in the second embodiment is the same as that in the first embodiment described above, and a description thereof will be omitted.

  Here, with respect to the memory bandwidth for accessing the decoded value buffer 880, the second prior art is compared with the second embodiment. In the second prior art, since all the decoded values of the neighboring pixels necessary for processing the target pixel are stored in the decoded value buffer, reading / writing to the decoded value buffer occurs for each pixel. On the other hand, in the second embodiment, reading / writing to the decoded value buffer 880 occurs only when pixels at the upper end and lower end of the band region are processed. This is because in the second embodiment, the decoded values for a plurality of pixels are stored in the transfer buffer, and are collectively read from and written to the decoded value buffer 880 by burst transfer. That is, the number of accesses to the decoded value buffer 880 can be reduced to 1 / (the height of the band area × the number of burst transfer pixels) as compared with the second conventional technique, and the memory bandwidth is greatly reduced. .

  As described above, according to the second embodiment, even when predictive encoding processing for image data is performed by band processing, the same effects as those of the first embodiment described above can be obtained. That is, while reducing the capacity of the delay memory, the memory bandwidth when accessing the decoded value buffer can be reduced, and the hardware implementation cost can be greatly reduced.

<Third Embodiment>
The third embodiment according to the present invention will be described below. In the first and second embodiments described above, an example of performing band processing by unidirectional scanning shown in FIG. 1B has been shown, but in the third embodiment, an example of performing this by bidirectional scanning is shown.

Bidirectional Scan In the third embodiment, an example will be described in which error diffusion processing is performed by performing bidirectional scan within a band, as indicated by an arrow 190 in FIG. Note that the configuration of the image processing apparatus according to the third embodiment is the same as that of FIG. 2A and FIG.

  According to FIG. 1B, scanning is started from the upper left pixel of the band area, and the height direction of the band area is scanned downward (downward scanning). When the processing of the pixels at the lower end of the band region is completed, one pixel is shifted in the width direction of the band region, and scanning (upward scanning) is started upward from the pixels at the lower end of the band region. This series of scanning is performed for all the pixels in the band area.

  When error diffusion processing is performed by such bidirectional scanning, deviation in the error diffusion direction is reduced and the uniformity of the dot interval is improved, so that the graininess can be improved. Therefore, according to the third embodiment, the image quality in the band region can be improved as compared with the first embodiment described above.

  Here, if FIG. 4A is used as the error diffusion coefficient in the case of performing the downward scanning, the error diffusion coefficient in the case of performing the upward scanning is obtained by inverting FIG. 4A in the vertical direction. 11 (a). In this case, as shown in FIG. 11B, the filter used for calculating the error diffused from the neighboring pixels with respect to the target pixel * has a point-symmetric shape with respect to the error diffusion coefficient in FIG. It becomes. FIG. 11 (c) shows the positional relationship of pixels referred to when executing error diffusion processing on the target pixel e with the symbols a to d, where e is the target pixel. That is, when processing the target pixel e, it is necessary to refer to the error of the pixels at positions a to d. Note that the quantization error of the pixels at the positions a to d is stored in a delay memory mounted in the image processing unit.

Transfer Buffer and Error Buffer Operation Next, access to the transfer buffer and error buffer will be described with reference to the flowchart of FIG. 13 and FIG. FIG. 5 shows a downward scanning state in the band region, whereas FIG. 12 shows an upward scanning state.

  First, in S900, it is determined whether or not the current in-band scanning is a downward scanning. In the case of downward scanning, the operations of the transfer buffer and the error buffer are the same as those in the first embodiment described above. That is, in this case, since the same processing as S300 to S309 described in FIG. 3A is performed, detailed description is omitted here.

  On the other hand, if the intra-band scanning is upward scanning, the process advances to step S901 to determine whether or not the target pixel e is a pixel at the lower end of the band region 120. If the pixel of interest e is a pixel at the lower end of the band region 120 (state in FIG. 12C), error diffusion processing is performed using the quantization errors a and b stored in the delay register 630 (S902). . At this time, it should be noted that the pixels at the positions c and d cannot be referred to because they belong to an unprocessed band region.

  Subsequently, the quantization error e when the error diffusion processing is performed is written in the transfer buffer B 695 (S903). Subsequently, in S904, it is determined whether or not predetermined pixels have been written in the transfer buffer B695. When predetermined pixels are written, the quantization errors for a plurality of pixels stored in the transfer buffer B 695 are collected and written to the error buffer 680 by burst transfer (S 905), and then quantized to the image output unit 220. The result is output (S911).

  On the other hand, if it is determined in S901 that the pixel of interest e is not a pixel at the lower end of the band region 120, it is determined whether or not the pixel of interest e is a pixel at the upper end of the band region 120 in S906. If the target pixel e is a pixel at the upper end of the band area 120 (state in FIG. 12B), it is determined in S907 whether or not the data necessary for the processing of the target pixel e exists in the transfer buffer A690. Do. The necessary data in this case is a quantization error a when the pixel a which is a pixel at the lower end of the previous band region (the region 150 in the band region 110 in FIG. 1A) is processed. . If necessary data is present, the quantization error a is read from the transfer buffer A 690 (S909). Then, an error diffusion process is performed using the quantization error a, the quantization errors b and c stored in the delay memory 620, and the quantization error d stored in the delay register 630 (S910). . On the other hand, if the necessary data does not exist in the transfer buffer A 690, the quantization error for a plurality of pixels including necessary data is read out from the error buffer 680 to the transfer buffer A 690 by burst transfer (S908). Then, the quantization error a included in the burst read data is read from the transfer buffer A 690 (S909). Then, an error diffusion process is performed using the quantization error a, the quantization errors b and c stored in the delay memory 620, and the quantization error d stored in the delay register 630 (S910). .

  If it is determined in S906 that the target pixel e is not the pixel at the upper end of the band region 120 (the state shown in FIG. 12A), the quantization errors a, b, and c in the delay memory 620 and the delay register 630 are displayed. An error diffusion process is performed using the quantization error d (S910). As described above, after the error diffusion process is performed in S910, the quantization result is output to the image output unit 220 (S911).

  Note that the error buffer 680 is not accessed when processing the upper end of the upper end band area of the input image data (the upper end of the band area 110 in FIG. 1A). Similarly, the error buffer 680 is not accessed when the lower end portion of the lower end band region of the input image data (the lower end portion of the band region 130 in FIG. 1A) is processed.

  In this way, when error diffusion processing is performed by bidirectional scanning within a band, errors can be continuously diffused across band regions in the case of downward scanning. However, in the case of upward scanning, since an error cannot be diffused from an unprocessed band area, continuous processing cannot be performed across the band area. Therefore, it is possible to control to diffuse the error across the band regions only when performing the downward scanning, that is, to control to access the error buffer 680 (burst transfer). In this case, when considered in the width direction of the band region, error diffusion across the band region occurs once per two pixels, and the capacity of the error buffer 680 is ½ compared to the first embodiment described above. Can be reduced. Furthermore, the number of accesses to the error buffer 680 can also be reduced to ½.

  As described above, according to the third embodiment, the same effects as those of the first and second embodiments described above can be obtained by performing bidirectional scanning within a band. Furthermore, it is possible to further reduce the circuit scale by controlling whether or not to perform processing across the band region in accordance with the scanning direction.

  In each of the above-described embodiments, calculation results when a certain pixel is processed, such as error diffusion processing and predictive coding processing, are described as an example of image processing used when processing subsequent pixels. However, the present invention is not limited to such processing, and can be effectively applied to local image processing such as general filter processing.

  That is, the present invention is characterized in that the delay memory and the error buffer are hierarchically configured in consideration of the contents of the image processing and the band processing restrictions. As a result, the delay memory installed near the image processing unit has a small capacity, and the number of times of reading and writing to the error buffer installed far from the image processing unit can be reduced.

<Other embodiments>
The present invention can also be realized by executing the following processing. That is, software (program) that realizes the functions of the above-described embodiments is supplied to a system or apparatus via a network or various storage media, and a computer (or CPU, MPU, or the like) of the system or apparatus reads the program. It is a process to be executed.

  For example, the delay memory is a primary cache memory that can be read / written at high speed from an image processor at a high speed, and the error buffer is a secondary cache memory that can perform a large-capacity temporary storage even when read / write from the processor is slow. Configuration is also conceivable. Even with such a configuration, the same effects as those of the above embodiments can be obtained.

Claims (11)

An image processing apparatus that sequentially performs image processing for each band region for a plurality of band regions obtained by dividing image data in a certain direction,
Scanning means for scanning the band region in the short side direction to determine a pixel of interest;
Image processing means for performing an operation referring to an operation result for a pixel that has already been processed in a predetermined neighborhood region with respect to the target pixel;
An external storage unit that is provided outside the image processing unit and stores a calculation result by the image processing unit for a pixel located in a first boundary portion adjacent to a band region to be processed next in the band region; Have
The image processing means includes
Internal storage means for storing calculation results for pixels in the neighboring area with respect to the target pixel in the band area;
First holding means for temporarily holding calculation results for pixels located at the first boundary in the band region for burst transfer to the external storage means;
Second holding means for temporarily holding a calculation result for pixels located at the first boundary in the band area processed immediately before the band area by burst transfer from the external storage means; An image processing apparatus.   When the pixel of interest is a pixel located in a second boundary portion adjacent to the band region processed immediately before in the band region, the image processing unit stores the external storage unit in the second holding unit. 2. The image processing apparatus according to claim 1, wherein a calculation is performed on the pixel of interest using a calculation result for a pixel burst-transferred from the pixel and a calculation result for a pixel stored in the internal storage unit. .   When the target pixel is a pixel located at the first boundary in the band region, the image processing unit uses the calculation result for the pixel stored in the internal storage unit to generate an image for the target pixel. 3. The image processing apparatus according to claim 1, wherein the image processing apparatus performs processing, and burst-transfers the calculation result for the target pixel to the external storage unit using the first holding unit.   The external storage means multiplies the number of lines in the long side direction of the band region and the number of pixels for the long side direction of the band region, which are processed before the target pixel in the neighboring region. The image processing apparatus according to claim 1, wherein the image processing apparatus has at least a capacity capable of storing an operation result of minutes.   5. Each of the first holding unit and the second holding unit has at least a capacity for a data size transferred by one burst transfer to the external storage unit. The image processing apparatus according to item 1.   The internal storage means calculates the calculation result for the number of pixels obtained by multiplying the number of scanning lines scanned before the scanning line of the target pixel in the neighboring region by the number of pixels corresponding to the short side direction of the band region. 6. The image processing apparatus according to claim 1, wherein the image processing apparatus has at least a storage capacity. The image processing means performs error diffusion processing on the target pixel,
The image processing according to claim 1, wherein a quantization error for each pixel is stored in the internal storage unit and the external storage unit as a calculation result by the image processing unit. apparatus. The image processing means performs a predictive coding process on the target pixel,
The image processing apparatus according to claim 1, wherein the internal storage unit and the external storage unit store a decoded value for each pixel as a calculation result by the image processing unit. . The scanning unit performs bi-directional scanning in the short side direction of the band region to determine a target pixel,
9. The image processing unit according to claim 1, wherein the image processing unit performs the burst transfer to the external storage unit when scanning the first boundary in the short side direction of the band region. The image processing apparatus according to any one of the above. Inside the image processing means, an internal storage means, a first holding means used at the time of burst transfer to an external storage means provided outside the image processing means, and used at the time of burst transfer from the external storage means An image processing method for sequentially performing image processing for each band area on a plurality of band areas obtained by dividing image data in a certain direction in an image processing apparatus having a second holding means Because
A scanning step of determining the pixel of interest by scanning the band region in the short side direction;
An image processing step of performing an operation referring to a calculation result for a pixel that has already been processed in a predetermined neighborhood region with respect to the target pixel, and storing the calculation result for the target pixel in the internal storage unit; Have
In the image processing step,
When the target pixel is a pixel located in the first boundary portion adjacent to the band region to be processed next in the band region, the calculation result for the pixel stored in the internal storage unit is used. A first boundary processing step of performing an operation on the target pixel, and burst-transferring the operation result on the target pixel to the external storage unit using the first holding unit;
When the target pixel is a pixel located at a second boundary adjacent to the band region processed immediately before in the band region, the pixel is burst transferred from the external storage unit to the second holding unit A second boundary processing step for performing an operation on the target pixel using an operation result on the pixel and an operation result on the pixel stored in the internal storage unit;
An image processing method comprising:   The program for making the computer with which an image processing apparatus is provided perform each step of the image processing method of Claim 10.

Images