JP2012044284A - Correction value acquisition device, correction value acquisition method, jitter generation device, and jitter generation method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To acquire a correction value required for applying a sine wave jitter with accuracy at a higher speed.SOLUTION: An orthogonal modulator 11 modulates a reference clock with a modulation amount that is variably set for each carrier frequency. A phase comparator 13 compares phases of signals before and after the modulation of the reference clock with each other. An A/D converter 14 outputs a voltage depending on a phase difference from the phase comparator 13. A controller 16 calculates an ideal straight line from two voltage values in the voltage from the A/D converter 14, whose phase difference between phases before and after the modulation of the reference clock becomes 360°, and acquires a correction value, based on a difference between a voltage outputted from the A/D converter 14 when the modulation amount is set while being changed in a predetermined step every for a carrier frequency and a corresponding voltage on the ideal straight line. A storage part 15 stores the correction value acquired by a controller 16.

Description

  The present invention uses a correction value acquisition device and a correction value acquisition method that can acquire a correction value necessary for accurately applying sine wave jitter at a higher speed, and uses the correction value acquisition device and the correction value acquisition method. The present invention relates to a jitter generation apparatus and a jitter generation method capable of generating desired sine wave jitter.

  In a digital transmission system, if a data signal phase jitter (phase fluctuation) or a signal time shift increases, the data signal cannot be transmitted normally. For this reason, the electronic devices used in this type of system and the components used in these systems must satisfy the jitter tolerance (strength) standard defined by ITU-T (International Telecommunication Union-Telecommunication Standardization Sector). . This jitter tolerance standard represents how much a device suppresses and outputs jitter of an input signal when a signal having a predetermined amount of jitter is input to the device under measurement.

  Here, a jitter signal, which is a jitter-modulated signal for measuring the jitter tolerance, will be described with reference to FIG. As shown in FIG. 6, the jitter signal b is a signal whose phase changes at a predetermined fluctuation speed and within a predetermined fluctuation range with respect to a reference rectangular wave signal a as a reference signal to be transmitted. A fluctuation range, that is, a phase fluctuation amount is defined as a jitter amount, and a phase fluctuation speed is defined as a modulation frequency.

  The unit of the jitter amount (hereinafter also referred to as “phase modulation amount”) is indicated by a multiple of the period (unit interval: UI) of the reference rectangular wave signal a. For example, the 90 ° phase modulation amount is 0.25 UI, and the jitter amount in one cycle is 1 UI.

  By the way, in order to test whether or not a jitter amount satisfying the above-mentioned jitter tolerance standard can be obtained, a jitter generator capable of generating a fixed jitter is indispensable. The jitter generator applies electrical noise to data by applying a desired delay to a reference clock.

  As an example of this type of jitter generation apparatus, an apparatus using a quadrature modulator is disclosed in Patent Document 1 below. As shown in FIG. 7, a jitter generator 51 disclosed in Patent Document 1 includes a carrier signal generator 52 that outputs a carrier signal having a frequency ω, and a modulation signal that outputs a modulation signal P = m · sin (pt). A generator 53, a quadrature modulator 54, a DC power supply 55 that applies a DC voltage to the quadrature modulator 54, and a limiter amplifier 56 that amplifies the output signal of the quadrature modulator 54 and keeps the amplitude constant. The carrier signal from the carrier signal generator 52 is input to the RF input terminal of the quadrature modulator 54, the modulation signal from the modulation signal generator 53 is input to the Q terminal of the quadrature modulator 54, and the DC voltage from the DC power supply 55 is input. Is input to the I terminal of the quadrature modulator 54.

  However, in the jitter generation apparatus using the above-described quadrature modulator, the generated jitter also changes with the sensitivity and aging of the quadrature modulator itself used. For this reason, in order to accurately apply sine wave jitter to a carrier signal (reference clock signal) of a predetermined frequency, correction according to the carrier frequency of the carrier signal is required in addition to the modulation frequency and modulation amount that are setting parameters. become.

  Therefore, conventionally, the carrier frequency, modulation frequency, and modulation amount, which are parameters necessary for jitter generation, are set, the spectrum component of the output of the quadrature modulator is extracted using a spectrum analyzer, and based on the extracted spectrum component, The voltage applied to the Q terminal and I terminal required for the set carrier frequency, modulation frequency, and modulation amount is calculated as a correction value. The correction value is calculated by fixing one carrier frequency, changing the modulation amount for one modulation frequency in a predetermined step, and performing the correction value for every modulation frequency for each carrier frequency. Was stored in a table.

  Another method is to use a digital oscilloscope equipped with analysis software that analyzes the distribution of jitter based on the spectrum component of the output of the quadrature modulator, and is necessary for the set carrier frequency, modulation frequency, and modulation amount. The applied voltage to the Q terminal and the I terminal was analyzed, and correction values obtained by this analysis were tabulated and stored in the apparatus.

JP 2008-98892 A

  Conventionally, however, a dedicated external measuring instrument such as a spectrum analyzer or a digital oscilloscope has been indispensable for obtaining a correction value. In addition, the amount of correction value information that is tabulated increases as the resolution of the carrier frequency, modulation frequency, and modulation amount, which are parameters necessary for generating jitter, increases not only the cost, but also the trouble of acquiring the correction value. There was a problem that it took time.

  Accordingly, the present invention has been made in view of the above problems, and a correction value acquisition apparatus and a correction value acquisition method capable of acquiring a correction value necessary for accurately applying sine wave jitter at a higher speed. Another object of the present invention is to provide a jitter generation apparatus and a jitter generation method capable of generating a desired sine wave jitter using the correction value acquisition apparatus and the correction value acquisition method.

In order to achieve the above object, a correction value acquisition apparatus according to claim 1 of the present invention includes a quadrature modulator 11 that modulates a reference clock,
A phase comparator 13 for comparing the phases of signals before and after modulation of the reference clock;
When an ideal straight line when the phase changes by one period is calculated from two voltage values at which the phase difference before and after modulation of the reference clock is 360 °, and the modulation amount is variably set in predetermined steps for each carrier frequency And a control unit 16 that obtains a correction value based on a difference between the voltage and the corresponding voltage on the ideal straight line.

The correction value acquisition method according to claim 2 compares the phase of the signal before and after the modulation of the reference clock, and obtains an ideal straight line when the phase changes by one cycle from two voltage values where the phase difference is 360 °. A calculating step;
And a step of acquiring a correction value based on a difference between a voltage when the modulation amount is variably set for each carrier frequency by a predetermined step and a corresponding voltage on the ideal straight line.

The jitter generator according to claim 3 is a jitter generator using the correction value acquisition device according to claim 1,
A reference clock generator 2 for generating the reference clock;
An operation unit 3 for instructing generation of a jitter signal,
The control unit 16 generates a jitter signal by correcting a modulation amount with a correction value acquired by the correction value acquisition device when generation of a jitter signal is instructed by the operation unit.

The jitter generation method according to claim 4 is a jitter generation method using the correction value acquisition method according to claim 2,
The method includes the step of generating a jitter signal by correcting the modulation amount using the correction value acquired by the correction value acquisition method.

  According to the present invention, it is possible to obtain a correction value necessary for accurately applying sine wave jitter at a higher speed than in the prior art. In addition, a dedicated external measuring instrument such as a spectrum analyzer or a digital oscilloscope is not required, the cost for acquiring the correction value can be reduced, and the correction value can be acquired without taking time and effort.

  Further, according to the jitter generation apparatus using the correction value acquisition apparatus, it is possible to generate the jitter while acquiring the correction value and correcting with the acquired correction value by instructing the generation of the jitter signal.

It is a block diagram of a jitter generation device including a correction value acquisition device according to the present invention. It is a flowchart which shows the procedure of a correction value acquisition process. It is a figure which shows an example of the parameter graph prescribed | regulated by a jitter tolerance standard. It is explanatory drawing regarding the calculation method of the correction value by a ratio. It is explanatory drawing which shows the specific example regarding the calculation method of the correction value by a ratio. It is a figure which shows the relationship between a reference | standard rectangular wave and a jitter signal. It is a figure which shows an example of the conventional jitter generator.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be specifically described with reference to the drawings. FIG. 1 is a block diagram of a jitter generation apparatus including a correction value acquisition apparatus according to the present invention, FIG. 2 is a flowchart showing a procedure of correction value acquisition processing, and FIG. 3 is a diagram showing an example of a parameter graph defined by the jitter tolerance standard. 4 is an explanatory diagram regarding a method for calculating a correction value based on a ratio, and FIG. 5 is an explanatory diagram illustrating a specific example regarding a method for calculating a correction value based on a ratio.

  As shown in FIG. 1, a jitter generator 1 generates a desired sine wave jitter based on a jitter tolerance standard, for example, to perform a performance test of a device under test (DUT). Unit 2, operation unit 3, display unit 4, and correction value acquisition device 5 are schematically configured.

  The reference clock generator 2 generates a reference clock CLK (a sine wave with no jitter) as a carrier signal having a predetermined frequency set by an input from the operation unit 3 based on the jitter tolerance standard.

  In FIG. 1, the reference clock generator 2 is illustrated as a configuration built in the jitter generator 1, but a configuration built in the correction value acquisition device 5 and a configuration provided externally so as to be connectable to the jitter generator 1. It can also be.

  The operation unit 3 performs various operations and settings according to user input. For example, a pointing device such as a mouse, an operation panel on which switches and keys are arranged, a soft key arranged on the display screen of the display unit 4, and the like. Consists of input devices. Various operations and settings by the input of the operation unit 3 include an operation of selecting a “correction mode” instructing execution of a correction value acquisition process described later, and “jitter generation instructing generation of jitter by executing the correction value acquisition process” There are operations for selecting “mode”, setting various parameters (carrier frequency, modulation amount), switching operation of setting screens, and the like.

  The display unit 4 is composed of, for example, a liquid crystal display, and displays various setting screens, input screens, monitor waveforms of generated sine wave jitter, and the like under the control of the control unit 16 described later based on the input of the operation unit 3. Yes.

  As shown in FIG. 1, the correction value acquisition device 5 has a quadrature modulator 11, as shown in FIG. 1, to realize a correction value acquisition function for acquiring a correction value necessary for accurately applying sine wave jitter at a higher speed. A frequency divider 12, a phase comparator 13, an A / D conversion unit 14, a storage unit 15, a control unit 16, and a D / A conversion unit 17 are provided.

  The quadrature modulator 11 has an RF input terminal connected to the reference clock generator 2 and a Q terminal and an I terminal connected to the D / A converter 14. The quadrature modulator 11 modulates the reference clock CLK from the reference clock generator 2 with a modulation amount variably set for each carrier frequency within a range based on the jitter tolerance standard, and outputs a sine wave jitter (jitter signal). .

  The frequency divider 12 includes a first frequency divider 12a and a second frequency divider 12b. The first frequency divider 12a divides the modulated sine wave jitter (jitter signal) from the quadrature modulator 11 by a predetermined frequency division ratio. The second frequency divider 12b divides the reference clock CLK before modulation from the reference clock generator 2 at the same frequency division ratio as that of the first frequency divider 12a.

  The phase comparator 13 is a state in which the origin position of the 0 deg point of the quadrature modulator 11 is set, and the modulated sine wave jitter (jitter signal) divided by the first frequency divider 12a and the second frequency division. An exclusive OR with the reference clock CLK before modulation, which is divided by the unit 12b, is taken and a phase difference signal of both signals is output. Further, the phase comparator 13 divides the modulated sine wave jitter (jitter signal) divided by the first divider 12a and the second divider 12b at the 360 deg point of the quadrature modulator 11. The exclusive OR with the reference clock CLK before modulation is taken, and a phase difference signal of both signals is output.

  In this example, in order to obtain an ideal straight line connecting a voltage value at a 0 deg point and a voltage value at a 360 deg point, which will be described later, a frequency divider 12 is provided before the phase comparator 13, and the voltage value of the A / D converter 14 is A position that falls within a predetermined voltage range, that is, a position corresponding to a phase (modulation amount) 1 UI with good linearity is used as the origin position of the 0 deg point of the quadrature modulator 11.

  Note that the configuration of the frequency divider 12 can be omitted if the phase comparator 13 that can provide an output with excellent linearity at a position corresponding to the phase (modulation amount) 1 UI can be used.

  The A / D converter 14 outputs a voltage value (digital value) corresponding to the phase difference signal from the phase comparator 13.

  The storage unit 15 uses, as a correction table in which modulation amounts (for example, 0.1 UI steps) that are variable with a predetermined step resolution based on the jitter tolerance standard are associated with addresses, for each carrier frequency (for example, 12.5 GHz to 0). .8 GHz: 100 MHz step). In this correction table, correction values calculated by a correction value acquisition process described later are written and stored at corresponding addresses. Further, the storage unit 15 stores the voltage values of the A / D conversion unit 14 at the 0 deg point and the 360 deg point of the quadrature modulator 11.

  The control unit 16 performs overall control of each unit related to jitter generation and correction value acquisition based on the operation of the operation unit 3, and performs correction value acquisition processing (determination of the origin position of the 0 deg point, quadrature modulator 11) shown in FIG. IQ voltage control, reading of voltage values at 0 deg point and 360 deg point, calculation of ideal line when phase (modulation amount) changes by 1 period (1 UI), difference between acquired voltage and ideal voltage on ideal line Based on the calculation of the correction value, interpolation calculation processing of the area where the correction value is not acquired, variable control of the carrier frequency and modulation amount, etc.), display control of the display unit 4 and the like are performed.

  The D / A converter 17 includes a Q-side D / A converter 17a and an I-side D / A converter 17b. The Q terminal of the quadrature modulator 11 is controlled by the control unit 16 based on the setting input of the operation unit 3. The voltage of the Q signal input to the I terminal and the voltage of the I signal input to the I terminal, that is, the IQ voltage are varied from 0 deg to 360 deg in a predetermined step (for example, 100 mUI).

  Next, correction value acquisition processing executed by the correction value acquisition device 5 of the jitter generating apparatus 1 configured as described above will be described with reference to FIG.

  In the following description, the “correction value acquisition mode” is selected by the initial setting of the operation unit 3, the IQ voltage of the quadrature modulator 11 is set to the voltage value of the 0 deg point, and the carrier frequency is set to the upper limit value. Suppose that the modulation frequency is set to zero. Further, a position where the voltage value of the A / D converter 14 falls within a predetermined voltage range, that is, a position corresponding to a phase (modulation amount) 1 UI with good linearity is set as the origin position of the 0 deg point of the quadrature modulator 11. It shall be.

  In this correction value acquisition process, the voltage value at the 0 deg point (set origin position) of the quadrature modulator 11 is read from the A / D conversion unit 14 and the read voltage value at the 0 deg point is stored in the storage unit 15 ( ST1). Subsequently, the IQ voltage of the quadrature modulator 11 is varied from the 0 deg point to the 360 deg point by a predetermined step (for example, 100 mUI) (ST2). Then, the voltage value at the 360 deg point of the quadrature modulator 11 is read from the A / D conversion unit 14, and the read voltage value at the 360 deg point is stored in the storage unit 15 (ST3). Then, the voltage value at the 0 deg point and the voltage value at the 360 deg point are connected by a straight line by interpolation processing, and an ideal straight line when the phase (modulation amount) changes by one period (1 UI) is calculated (ST4).

  When the ideal straight line is calculated, the phase (modulation amount) of the quadrature modulator 11 is varied from 0.1 UI to 1 UI in 0.1 UI steps, the voltage value is acquired from the A / D converter 14, and the acquired voltage value The difference between the acquired voltage value and the ideal voltage on the corresponding ideal straight line is calculated as a correction value (ST5). For example, if 100% is not corrected, the correction value S is obtained by the acquired voltage value / ideal voltage × 100%. The calculated correction value is written and stored at the corresponding address in the correction table of the storage unit 15.

  Then, the phase (modulation amount) of the quadrature modulator 11 is varied in a predetermined step (for example, 0.1 UI step), and the phase (modulation amount) of the quadrature modulator 11 is varied to 1 UI to determine whether or not all measurements have been made. (ST6). If it is determined that the phase (modulation amount) of the quadrature modulator 11 has been varied up to 1 UI and all measurements have not been made, the phase (modulation amount) of the quadrature modulator 11 is varied in a predetermined step (eg, 0.1 UI step) (ST7). ). On the other hand, if it is determined that the phase (modulation amount) of the quadrature modulator 11 has been varied to 1 UI and all measurements have been made, it is determined whether or not all carrier frequencies have been measured (ST8).

  If it is determined that all the carrier frequencies are not measured, the carrier frequency is switched to the next carrier frequency (ST9). In this example, the carrier frequency is set to the upper limit by the setting based on the input of the operation unit 3 before starting the correction value acquisition process, and is switched to the next carrier frequency according to the resolution.

  If it is determined that all carrier frequencies have been measured, a correction table based on parameters (carrier frequency, modulation amount) defined by the jitter tolerance standard is completed and stored in the storage unit 15, and the correction value acquisition process is terminated.

  Here, FIG. 3 shows an example of a parameter graph defined by the jitter tolerance standard. When correction value acquisition processing based on the parameter graph of FIG. 3 is performed, correction value acquisition is performed based on the procedure of the flowchart of FIG. 2 described above divided into three regions of frequencies 10 Hz to 1 MHz, 1 MHz to 10 MHz, and 10 MHz to 250 MHz. Processing is executed.

  Here, the correction value calculation method in ST5 of FIG. 2 will be briefly described with reference to FIG.

  In FIG. 4, the correction value S is calculated from four correction value points A, B, C, and D close to the modulation frequency and modulation amount set by the input of the operation unit 3.

  (1) When the set modulation frequency matches the modulation frequency of the correction value point, the correction value S = AC (AH−AS) / (AH−AL) + BD (AS−AL) / (AH−AL) ).

  (2) If the set modulation amount and the modulation amount at the correction value point match, the correction value S = AB (FH−FS) / (FH−FL) + CD (FS−FL) / (FH−FL) ).

  (3) When the set modulation frequency and the modulation frequency of the correction value point match, and when the set modulation amount and the modulation amount of the correction value point match, the correction value S = 0.

  (4) If the set modulation frequency does not match the modulation frequency of the correction value point, and the set modulation amount does not match the modulation value of the correction value point, the correction value S is calculated by the following procedure.

First, AC and BD are calculated from the following formulas (A) and (B).
AC = A (FH−FS) / (FH−FL) + C (FS−FL) / (FH−FL)... (A)
BD = B (FH−FS) / (FH−FL) + D (FS−FL) / (FH−FL)... (B)
The correction value S is calculated from the following equation (C) using the AC and BD.
Correction value S = AC (AH−AS) / (AH−AL) + BD (AS−AL) / (AH−AL) (C)

  Further, a specific example of the correction value calculation method in the case (4) will be described with reference to FIG.

First, AC and BD are calculated from the above formulas (A) and (B).
AC = 900 (100k-15k) / (100k-1k) +1050 (15k-1k) / (100k-1k) = 921
BD = 950 (100k-15k) / (100k-1k) +1100 (15k-1k) / (100k-1k) = 971
The correction value S is calculated from the above formula (C) using the AC and BD.
Correction value S = 921 (12.8-8) / (12.8-6.4) +971 (8-6.4) / (12.8-6.4) = 934

When the carrier frequency is set and changed by the input of the operation unit 3, the correction values S1 and S2 at the carrier frequencies Fc1 and Fc2 obtained by the correction value are obtained from the above calculation formula, and the set carrier frequency is set. The correction value S in Fcs is calculated from the following equation (d).
Correction value S = S1− (Fc1−Fcs) / (Fc1−Fc2) (S1−S2) Expression (d)

  In the above description, the correction value S is calculated as a ratio to the ideal voltage. However, the correction value S is calculated as an absolute amount, or the correction value S is calculated as a difference from the ideal voltage as described in ST5 of FIG. May be calculated.

  Further, since the configuration using the quadrature modulator 11, in principle, correction of a phase (modulation amount) of 1 UI or more is not necessary, and correction values of up to 1 UI can be used for 1 UI or more.

  As described above, according to the jitter generation apparatus 1 of the present example, when the “correction value acquisition mode” is selected after the initial setting by the correction value acquisition function provided in the correction value acquisition apparatus 5, the sine wave jitter is accurately applied. The correction value necessary for this can be automatically acquired at a higher speed than in the past.

  In addition, a dedicated external measuring instrument such as a spectrum analyzer or a digital oscilloscope is not required, the cost for acquiring the correction value can be reduced, and the correction value can be acquired without taking time and effort.

  Furthermore, if the correction value acquisition function of the correction value acquisition device 5 is used, calibration by the user who uses this device is possible, not only at the time of factory shipment by a contractor but also periodic maintenance and inspection.

  Since the correction value acquisition device 5 is built in the jitter generation device 1, the correction value can be obtained by selecting the “jitter generation mode” for instructing the generation of jitter by executing the correction value acquisition processing by selecting the mode of the operation unit 3. Jitter generation can be performed while correcting with the acquired correction value.

  By the way, in the above-described embodiment, the ideal straight line is calculated by acquiring the voltage values of the 0 deg point and the 360 deg point of the quadrature modulator 11, but the present invention is not limited to this. That is, it is sufficient that the IQ voltage of the quadrature modulator 11 is the same voltage, and the voltage value is two points at which the phase difference before and after modulation of the reference clock CLK is 360 degrees.

  Further, the correction value acquisition device 5 is not limited to the configuration built in the jitter generation device 1 as shown in FIG. 1 and can be configured separately, for example, the IQ voltage of the quadrature modulator 11 is set. It can also be used in an apparatus that performs skew setting when controlling and delay-outputting a signal.

DESCRIPTION OF SYMBOLS 1 Jitter generator 2 Reference clock generator 3 Operation part 4 Display part 5 Correction value acquisition apparatus 11 Quadrature modulator 12 Divider 12a 1st divider 12b 2nd divider 13 Phase comparator 14 A / D converter DESCRIPTION OF SYMBOLS 15 Memory | storage part 16 Control part 17 D / A conversion part 17a Q side D / A conversion part 17b I side D / A conversion part

Claims (4)

A quadrature modulator (11) for modulating a reference clock;
A phase comparator (13) for comparing the phases of signals before and after modulation of the reference clock;
When an ideal straight line when the phase changes by one period is calculated from two voltage values at which the phase difference before and after modulation of the reference clock is 360 °, and the modulation amount is variably set in predetermined steps for each carrier frequency And a control unit (16) for acquiring a correction value based on a difference between the voltage of and a corresponding voltage on the ideal straight line. Comparing the phase of the signal before and after modulation of the reference clock and calculating an ideal straight line when the phase changes by one period from two voltage values where the phase difference is 360 °;
A correction value acquisition method comprising: acquiring a correction value based on a difference between a voltage when a modulation amount is variably set for each carrier frequency by a predetermined step and a corresponding voltage on the ideal straight line. A jitter generation apparatus using the correction value acquisition apparatus according to claim 1,
A reference clock generator (2) for generating the reference clock;
An operation unit (3) for instructing generation of a jitter signal,
The control unit (16) generates a jitter signal by correcting a modulation amount with a correction value acquired by the correction value acquisition device when generation of a jitter signal is instructed by the operation unit. Jitter generator. A jitter generation method using the correction value acquisition method of claim 2,
A jitter generation method, comprising: generating a jitter signal by correcting a modulation amount with a correction value acquired by the correction value acquisition method.

Images