JP2011238755A - Semiconductor device manufacturing method - Google Patents

Abstract

A method of manufacturing a semiconductor device, which is excellent in productivity, easy to manufacture, and capable of obtaining a high yield.
A step of mounting a plurality of semiconductor chips on a support plate; and a step of forming a composite plate by facing and integrating surfaces of two support plates on which no semiconductor chip is mounted; A step of forming insulating layers and wirings on both sides of the composite plate, and two chip array substrates in which the composite plate is separated and a semiconductor chip 2, an insulating layer and wirings are provided on the separated support plate 1 When the composite plate is formed, the mounting position of the corresponding semiconductor chip 2 on the other support plate 1 is shifted with respect to the mounting position of the semiconductor chip 2 on one support plate 1. A method for manufacturing a semiconductor device, in which a semiconductor chip 2 is mounted on each support plate 1.
[Selection] Figure 8

Description

  The present invention relates to a method of manufacturing a semiconductor device in which a semiconductor chip is mounted on a support plate, the semiconductor chip is embedded in an insulating material, and wiring is formed.

  In recent years, a semiconductor device called a “chip-embedded substrate” in which an individual semiconductor chip is embedded in an insulating layer and wiring is formed on the insulating layer has attracted attention.

  Such a semiconductor device is manufactured, for example, as follows.

  First, a group of chips formed on the wafer at a time is separated into pieces by dicing or the like. Next, the singulated chip is mounted on the support substrate. Next, an insulating layer is formed so as to fill the chip. Next, an external lead wiring is formed on the insulating layer.

  As such a semiconductor device, in Patent Document 1, an IC chip is fixed on a metal heat dissipation plate, and an insulating resin layer is formed around and above the IC chip. A ball grid array package is disclosed in which a BGA mounting pad connected to the pad via a wiring is formed, and a BGA solder bump is formed on the BGA mounting pad.

Japanese Patent Laid-Open No. 2001-15650

  However, the related art has the following problems.

  In the technique disclosed in Patent Document 1, an IC chip is mounted on a metal plate such as a copper plate, and the wiring is formed after the IC chip is filled with a resin. However, the thermal expansion coefficients of the metal and the resin are different. In addition, since the resin shrinks at the time of curing, warping occurs after the resin is cured (cured). Although this warpage is a problem in individual semiconductor devices (packages), a large support substrate is used in the manufacturing process of the semiconductor device, and a large number of IC chips are mounted on a single support substrate so that a large number of semiconductor devices can be simultaneously mounted. This is particularly a problem in manufacturing. That is, in the manufacture of a semiconductor device using such a large support substrate, the warpage of the entire substrate before singulation into each semiconductor device becomes very large, and it is possible to move to the stage in the manufacturing process such as the exposure process and the transport process. There is a problem in that it is difficult to attract the semiconductor device, high-precision exposure is difficult, or the semiconductor device does not fit in a predetermined position of the transfer jig. This causes problems such as generation of defective products in the manufacturing process and a decrease in yield. Further, the characteristics of the semiconductor chip may change due to warping.

  In addition, the technique disclosed in Patent Document 1 has a problem that the productivity is not sufficiently high because the resin layer and the wiring are formed on only one side for each heat dissipation substrate by a sequential process.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method of manufacturing a semiconductor device that is excellent in productivity, easy to manufacture, and capable of obtaining a high yield.

According to one aspect of the invention,
A step of mounting a plurality of semiconductor chips on a support plate;
A step of forming a composite plate by facing and integrating the surfaces of the two support plates on which the semiconductor chip is not mounted; and
Forming an insulating layer and wiring on both sides of the composite plate,
Separating the composite plate, and obtaining two chip array substrates provided with a semiconductor chip, an insulating layer and wiring on the separated support plate,
When the composite plate is formed, the semiconductor chip is placed on each support plate so that the mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate. A method of manufacturing a semiconductor device to be mounted is provided.

According to another aspect of the invention,
A process of superimposing and integrating two support plates to form a composite plate;
A step of mounting a plurality of semiconductor chips on both sides of the composite plate,
Forming an insulating layer and wiring on both sides of the composite plate;
Separating the composite plate and obtaining two chip array substrates provided with a semiconductor chip, an insulating layer and wiring on the separated support plate,
Manufacture of a semiconductor device in which semiconductor chips are mounted on both sides of the composite plate so that the mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate A method is provided.

  According to the present invention, it is possible to provide a method for manufacturing a semiconductor device that is excellent in productivity, small in warpage, easy to manufacture, and capable of obtaining a high yield. Further, according to the present invention, since the warpage of the semiconductor device is small, there is no influence on the built-in semiconductor chip, and the characteristic variation of the semiconductor chip can be suppressed to a small value.

It is a figure for demonstrating the manufacturing method of the semiconductor device by embodiment of this invention. It is a figure for demonstrating the manufacturing method of the semiconductor device by embodiment of this invention. It is a figure for demonstrating an example of the semiconductor device obtained with the manufacturing method of this embodiment. It is a figure for demonstrating the other example of the semiconductor device obtained with the manufacturing method of this embodiment. It is a figure for demonstrating the subject of this invention. It is a figure for demonstrating the subject of this invention. It is a figure for demonstrating the subject of this invention. It is a figure for demonstrating the manufacturing method of the semiconductor device by embodiment of this invention. It is a figure for demonstrating the subject of this invention. It is a figure for demonstrating the manufacturing method of the semiconductor device by embodiment of this invention. It is a figure for demonstrating the manufacturing method of the semiconductor device by embodiment of this invention.

  A preferred embodiment of the present invention will be described below.

  In this embodiment, first, the semiconductor chip 2 is mounted on the support plate 1 as shown in FIG. Normally, a plurality of semiconductor chips are mounted on a single support plate. However, in FIG. 1 and the drawings used for the following description, only one semiconductor chip is shown for simplification of description.

  Next, as shown in FIG. 2, the two support plates 1 on which the semiconductor chips 2 are mounted are integrated with the surfaces on which the semiconductor chips are not mounted facing each other to form a composite plate. In FIG. 2, the two support plates are fixed and integrated using the integration jig 5, but the integration method is not limited to such a jig.

  Next, insulating layers covering the semiconductor chip are formed on both surfaces of the composite substrate, and wirings electrically connected to the semiconductor chip are formed.

  Thereafter, the composite substrate is separated to obtain two chip array substrates in which a semiconductor chip, an insulating layer, and wiring are provided on the separated support plate.

  Each of these chip array substrates is singulated to obtain a plurality of chip-embedded substrates including at least one semiconductor chip from one chip array substrate.

  After separating the composite plate, the support plate may be removed. This makes it possible to manufacture a chip-embedded substrate having wiring and terminals provided on the lower surface side.

  A metal plate can be used as the support plate. A resin layer can be used as the insulating layer.

  Examples of the semiconductor device (chip built-in substrate) obtained in this way are shown in FIGS.

  A semiconductor chip 2 is mounted on the separated support plate 1, and the semiconductor chip is embedded in the insulating layer 3. On the upper surface of the insulating layer 3, external terminals that are electrically connected to the terminals of the semiconductor chip via the wiring 4 are formed. FIG. 3 shows a semiconductor device having a single-layer wiring, and FIG. 4 shows a semiconductor device having a multilayer wiring structure (including two-layer wiring in this example) in which upper and lower wirings are connected by interlayer vias.

  In the present embodiment, since the two support plates are overlapped for manufacturing, the formation of the insulating layer and the formation of the wiring by plating can be simultaneously formed on both sides, so that there is an advantage that the productivity is improved nearly twice.

  Further, if the support plate on which the chip is mounted is thin, handling such as warping and undulation may be difficult, but in the present embodiment, since the two support plates are integrated, such a problem can be solved. There is an advantage. Further, as a result, a thin support plate can be used, and there is an advantage that the cost can be reduced.

  If the thermal expansion coefficient of the insulating layer made of resin that fills the chip and the thermal expansion coefficient of the support plate made of metal, etc. are significantly different, the insulating layer is made of a thermosetting resin, etc. In some cases, the shrinkage causes warpage in only one support plate as shown in FIG. 5, and in the manufacturing process, defects due to the warp, such as poor exposure accuracy and poor transport, occur. On the other hand, in the present embodiment, since the two support plates are overlapped and integrated to flow the process, the problem due to the warp does not occur, and the warp also occurs in the subsequent resin layer formation and wiring formation. There is an advantage that it is difficult to occur and the subsequent steps can be flowed well.

  In the example shown in FIG. 2, two support plates not provided with an insulating layer are integrated, but before the two support plates are integrated, an insulating layer is provided on each support plate, and then two support plates are provided. May be integrated to form a composite plate. A desired chip-embedded substrate can be obtained by providing wirings and insulating layers on both sides of the composite plate.

  In the manufacturing method of the present embodiment, when two support plates are integrated with their back surfaces (surfaces on which chips are not mounted) facing each other (when a composite substrate is formed), the semiconductor on one support plate The semiconductor chip is mounted on each support plate so that the corresponding semiconductor chip mounting position on the other support plate is shifted with respect to the chip mounting position. Semiconductor chips can be arranged in a matrix at equal intervals.

  As described above, it is possible to suppress warpage of the entire support plate by integrating the two support plates with their back surfaces facing each other, and then forming an insulating layer and wiring. It is possible to deal with local warping of the support plate.

  FIG. 6 shows the warpage of the support plate after mounting the chip in more detail. Since the thermal expansion coefficient of the semiconductor chip is smaller than the thermal expansion coefficient of the support plate made of metal or the like, the chip mounting portion tends to be warped (curved upward) as shown in FIG. When two such support plates are integrated, a space is formed in the center as shown in FIG. Since this space is caused by local warping, it is difficult to eliminate this space only by strongly tightening the two support plates with integrated jigs provided at both ends or around.

  When such a space is formed between the support plates, a chemical solution such as a plating solution or an etching solution penetrates and remains in this space in the subsequent process. Thereby, in the subsequent process, there is a risk that contamination due to the residue or various problems due to the residue may occur. In addition, when the two support plates are integrated with an adhesive or the like instead of the integration jig, a problem such as a decrease in bonding force may occur due to this space.

  In contrast, when two support plates are overlaid, the semiconductor is previously arranged in such a manner that the mounting position is shifted between the semiconductor chip on one support substrate and the corresponding semiconductor chip on the other support substrate. By mounting the chip (for example, FIG. 8), a space enough to cause such a defect can be prevented or made extremely small. As a result, it is possible to prevent the chemical solution from penetrating and remaining between the supporting substrates, and to secure a good bonding force even when an adhesive is used for integration.

  In particular, when the mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate by approximately ½ of the semiconductor chip size in the shift direction, When the mounting position of the corresponding semiconductor chip on the other support plate is deviated from the mounting position of the semiconductor chip on the support plate by approximately ½ of the mounting interval of the semiconductor chips, this space is reduced. A better improvement effect can be obtained. When the chip mounting interval is larger than the chip size in the mounting direction (chip arrangement direction), the chip size may be shifted by a half or more of the chip size in the mounting direction within a shift of 1/2 of the mounting interval. For example, as shown in FIG. 8, it is preferable that the mounting interval is sufficiently wide and the semiconductor chip on one support plate and the semiconductor chip on the other support plate are shifted so as not to overlap.

  When two support plates on which a semiconductor chip is mounted and an insulating layer is formed are integrated, the space tends to be further increased. FIG. 9 shows the state of warping of the support plate on which the semiconductor chip is mounted and the insulating layer is formed. The entire support plate is warped downward due to the difference in thermal expansion coefficient between the support plate made of metal or the like and the insulating layer made of resin or the like, and the resin is cured and contracted. The difference in thermal expansion coefficient between the chip having a large rate and the support plate becomes dominant and warps upward, and two opposite warpages coexist. As a result, for example, as shown in FIG. 10, when the two support plates are overlapped and firmly pressed at both ends, the central space tends to become larger. In such a case, when two support plates are overlaid, the semiconductor chip is arranged so that the mounting position is shifted between the semiconductor chip on one support substrate and the corresponding semiconductor chip on the other support substrate. In particular, the mounting position of the semiconductor chip is shifted by approximately 1/2 of the size of the semiconductor chip, or the mounting position of the semiconductor chip is shifted by approximately 1/2 of the mounting interval of the semiconductor chips. (See FIG. 11), a great improvement effect can be obtained. When the chip mounting interval is larger than the chip size in the mounting direction (chip arrangement direction), the chip size may be shifted by a half or more of the chip size in the mounting direction within a shift of 1/2 of the mounting interval. For example, as shown in FIG. 11, it is preferable that the mounting interval is sufficiently wide and the semiconductor chip on one support plate and the semiconductor chip on the other support plate are shifted so as not to overlap.

  In the present embodiment, two support plates that can be overlapped with the mounting position of the corresponding semiconductor chip on the other support plate aligned with the mounting position of the semiconductor chip on one support plate are prepared, These support plates are integrated in a state in which the mounting positions of the semiconductor chips on the two support plates are coincident with each other and the other support plate is rotated 180 degrees or 90 degrees with respect to one support plate. Thus, the mounting position of the corresponding semiconductor chip on the other support plate can be shifted from the mounting position of the semiconductor chip on one support plate. The rotation for changing the direction of the support plate means a rotation parallel to the overlapping surface. The support plate may be a rectangular (rectangular) or polygonal shape such as a square, but is preferably a regular polygon such as a square when rotated 90 degrees. The position of the semiconductor chip group is changed from the arrangement in which the distance between the outer edge (the outermost arranged chip) of the mounted semiconductor chip group (for example, matrix arrangement) and the outer edge (outer periphery) of the support plate is uniform to the non-uniform arrangement. By preparing an appropriately shifted support substrate, it is possible to cause a desired shift of the mounting position of the semiconductor chip when the two support plates are integrated (shift after rotation of one support plate).

  If the mounting position of the chip on the two support plates is changed to shift the mounting position of the semiconductor chip, the subsequent exposure process and individualization process are performed separately. However, when the semiconductor chips are arranged in the same arrangement and the arrangement differs only in the direction between the two support plates, a similar exposure process, singulation process, or the like can be used. It is possible to shift the chip position at the time of integration by changing the direction when the support plates are overlapped by 180 degrees or 90 degrees from the direction in which the chip arrangement is coincident.

  A manufacturing method according to another embodiment of the present invention includes a composite plate formed by superimposing two support plates on top of each other, a semiconductor chip mounted on each side of the composite plate, an insulating layer covering the semiconductor chip, and Wiring is formed, and then the composite plate is separated. Thereby, the problem of the curvature at the time of manufacture can be prevented and productivity can be raised.

  In this manufacturing method, the semiconductor chip is mounted on both surfaces of the composite plate so that the mounting position of the corresponding semiconductor chip on the other support plate is deviated from the mounting position of the semiconductor chip on one support plate. . A chip arrangement similar to that of the previous embodiment can be employed. Thereby, the malfunction by the above-mentioned local curvature can be prevented.

  In this manufacturing method, it is desirable that the semiconductor chip is not mounted on each side of the support plate. When semiconductor chips are mounted one side at a time, local warping tends to occur in the mounted parts, especially when the support plate is integrated by bonding, it is difficult to mount the chip on the opposite surface, or the mounting accuracy decreases. There is a fear. This problem can be avoided by not mounting chips one by one. Therefore, it is desirable to alternately mount one or a plurality of semiconductor chips on one surface and the other surface of the composite plate. At that time, it is more desirable to mount semiconductor chips at substantially the same time at corresponding positions on both sides of the composite plate. This makes it possible to further suppress local warping.

  Hereinafter, the method for manufacturing a semiconductor device of the present invention will be described in more detail.

  The semiconductor chip of the present invention is one in which a semiconductor element such as a transistor is built in, and various IC chips such as an LSI chip can be used, and the number of mounted chips is not limited.

  As the support plate used in the present invention, a metal plate, a ceramic plate, a resin plate, or the like can be used.

  The support plate in the present invention refers to a plate-like body having a small thickness in the vertical or horizontal direction, and this support plate is a surface whose upper and lower surfaces (first surface side and second surface side) are made of the same material. For example, the upper and lower surfaces may be formed of different materials such as a structure in which a resin layer is formed on a metal plate.

  The present invention is effective when the thermal expansion coefficients of the support plate and the insulating layer provided thereon are greatly different. This is particularly effective when the support plate is a metal plate, and is effective when the insulating layer provided on the support plate is a layer made of an organic material such as a resin. Examples of such metal plates include copper plates, aluminum plates, SUS plates, and alloy plates such as 42 alloy.

  Further, the support substrate itself may be made of an insulating material including a wiring layer. As a result, a conductive line can be formed on both sides of the support substrate.

  In addition, the support plate used in the present invention can be removed after separating the composite plate. When the composite plate is removed, for example, an insulating layer containing a chip and a chip built-in substrate including a wiring are formed. Such a chip-embedded substrate can be electrically connected from the side where the support substrate was present, and as a result, a semiconductor device that can be connected from the upper and lower surfaces of the plate-like semiconductor device is obtained.

  The removal of the support substrate means that the support substrate is removed from the structure on which the semiconductor chip is mounted and the insulating layer and the wiring are provided. This removal method includes removal by etching, removal by a solvent, and removal by peeling. Is mentioned.

  The term “integration” in the present invention refers to temporary integration, which is ultimately separable. As such a method, a method of pressing both ends or the periphery of the overlapped support plate with a jig, a method of bonding two support plates, a method of integrating the periphery of the two support plates by welding or the like, However, the method is not limited to this.

  The insulating layer in the present invention embeds a semiconductor chip or insulates the periphery of the wiring, and any of organic materials and inorganic materials can be used. Different materials can be suitably used. An example of the organic material is a resin material. The present invention is particularly effective when the insulating layer is a resin layer because warpage, which is a factor of the present invention, easily occurs due to a difference in thermal expansion coefficient from the support substrate and shrinkage during curing.

  As the resin material, either a non-photosensitive resin or a photosensitive resin can be used. The resin material includes both a thermosetting resin and a thermoplastic resin, but the present invention is particularly effective when a thermosetting resin that causes curing shrinkage is used. Moreover, the resin material may contain inorganic fillers and organic fillers, such as a silica filler other than what consists of 100% resin.

  When a thermosetting resin is used for the insulating layer, it is easy to embed a chip. Examples of such a thermosetting resin include an epoxy resin and a polyimide resin. When a thermosetting resin is used for the insulating layer, the thermosetting resin can be completely cured by embedding the chip in an uncured or semi-cured state of the thermosetting resin and then performing a heat treatment or the like. On the other hand, when a thermoplastic resin is used for the insulating layer, the chip can be embedded by softening the thermoplastic resin in a heated state.

  The wiring formation in the present invention can be formed by using a plating method after forming a pattern with a plating resist, for example. When the wiring extends over a plurality of layers, the wirings are connected to each other by vias. Further, a resin layer such as a solder resist may be formed on the uppermost layer so as to cover at least a part of the wiring. The wiring can also be formed by a method of printing a metal paste. The via can be formed by an exposure method for a photosensitive resin and by using a laser or the like for a non-photosensitive resin.

  In the present invention, the mounting of the semiconductor chip can be fixed to the support substrate using, for example, an adhesive film such as a die attachment film or a chip bonding film or a silver paste, but is not limited thereto.

  The semiconductor device obtained by the manufacturing method of the present invention may have one mounted chip or two or more mounted chips. When two or more semiconductor chips are mounted, a case where two or more semiconductor chips are included in one semiconductor device is included, but one chip is included in each semiconductor device. However, a case where a plurality of semiconductor devices are included as a plate-like body, such as a plate-like body in a manufacturing process before the semiconductor device is separated, is also included.

  The semiconductor chip in the present invention has a terminal for connecting to the outside, and can be connected to any one of a power source, a ground, a signal, and the like. This connection includes those that exchange signals and the like wirelessly.

  In the manufacturing method of the present invention, the semiconductor chip is mounted on the support plate before integration or the composite substrate after integration. At that time, the semiconductor chip is arranged with the active surface (LSI element surface) facing upward. Also included is a case where semiconductor chips are arranged on a previously prepared insulating layer with the chip active surface facing downward.

  In the present invention, the semiconductor chip may be completely embedded in the insulating layer, but it is not necessary to be completely embedded, and it is sufficient that at least the outer peripheral side surface is covered with the insulating layer. For example, a part of the back surface or top surface of the semiconductor chip may be exposed.

  The manufacturing method of the present invention is effective when a large number of semiconductor chips are arranged on a support plate, and a support substrate on which a large number of semiconductor devices (chip-embedded substrates) on which one or a plurality of semiconductor chips are mounted is formed. It is particularly effective in manufacturing.

  In the present invention, the mounting position of the semiconductor chip being shifted means that the mounting position of the corresponding semiconductor chip is not completely overlapped between the two integrated support plates.

  In the present invention, the mounting interval of semiconductor chips refers to the interval (pitch) when chips are arranged and mounted at approximately equal intervals. The deviation of approximately ½ means that the deviation is about half of the interval, but it is not necessarily exactly ½, and the deviation according to the mounting accuracy is within the range where the desired effect can be obtained. Can be tolerated.

  Next, a method for manufacturing a semiconductor device of the present invention will be described in detail with reference to examples. The present invention is not limited to the following examples, and various modifications and changes can be made within the scope of the technical idea of the present invention.

Example 1
A 200 mm square copper plate (thickness 0.5 mm) was prepared as a support plate.

  A large number of individual semiconductor chips (chip size: 14 mm, chip thickness: 50 μm) were mounted on the copper plate at a pitch of 30 mm (a large number of semiconductor devices can be obtained by dividing the copper plate into individual pieces later). At that time, the semiconductor chip was mounted so that the position of the chip was shifted by 15 mm by rotating one copper plate by 180 degrees from the state where the copper plates were overlapped so that the positions of the chips coincided. The semiconductor chip was bonded to the copper plate via a die bonding tape.

  A (semi-cured) thermosetting epoxy resin film (thickness 90 μm) was laminated on the support substrate. The semiconductor chip mounted on the copper plate was buried with this epoxy resin film. When this epoxy resin film was heat-cured, the entire copper plate warped in a direction in which the back side of the copper plate (side on which the chip was not mounted) was convex, but only the chip mounting portion of the copper plate was warped with the back side being concave. (See FIG. 9).

  Two copper plates were stacked with their backs facing each other, rotated 180 degrees, and the corresponding chip positions were shifted between the copper plates (15 mm shift), and the periphery was screwed with an integrated jig and integrated. .

  An insulating layer and wiring were formed a plurality of times on both surfaces of the composite plate obtained by integration.

  Thereafter, the composite plate was separated into two, and when the back surface of the copper plate was observed, there was no evidence of chemicals or the like entering.

(Reference Example 1)
Production was carried out in the same manner as in Example 1 except that two superimposed copper plates were integrated without rotating one copper plate (that is, the rotation angle was 0 degree). At that time, the positions of the corresponding chips match between the two copper plates when the two copper plates are integrated.

  Insulation layers and wiring layers could be formed on both sides of the composite plate obtained by integration without problems, but then the plating solution and etching solution entered when the composite plate was separated into two and the back side of the copper plate was observed. The trace that seems to have remained.

(Comparative Example 1)
Without integrating the two copper plates, a semiconductor chip was mounted on each support plate, and an insulating layer and wiring were formed. However, since the warp of the entire copper plate was large, the copper plate was not sufficiently adsorbed during exposure, and an exposure shift caused by the warp occurred. In addition, there was a problem that the throttle could not be entered well during transportation.

  As an application example of the present invention described above, there is a semiconductor device in which a semiconductor chip used in a mobile phone, an electric device or the like is built in a substrate.

DESCRIPTION OF SYMBOLS 1 Support plate 2 Semiconductor chip 3 Insulating layer 4 Wiring 5 Integration jig

Claims (10)

A step of mounting a plurality of semiconductor chips on a support plate;
A step of forming a composite plate by facing and integrating the surfaces of the two support plates on which the semiconductor chip is not mounted; and
Forming an insulating layer and wiring on both sides of the composite plate,
Separating the composite plate, and obtaining two chip array substrates provided with a semiconductor chip, an insulating layer and wiring on the separated support plate,
When the composite plate is formed, the semiconductor chip is placed on each support plate so that the mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate. A method of manufacturing a semiconductor device to be mounted.   2. The semiconductor device according to claim 1, wherein an insulating layer is formed on the support plate so as to cover at least the periphery of the side surface of the mounted semiconductor chip, and then the two support plates are integrated to form a composite plate. Manufacturing method. Prepare two support plates that can be overlapped with the mounting position of the corresponding semiconductor chip on the other support plate with the mounting position of the semiconductor chip on one support plate,
These support plates are integrated in a state in which the mounting positions of the semiconductor chips on the two support plates are coincident with each other and the other support plate is rotated 180 degrees or 90 degrees with respect to one support plate. The method for manufacturing a semiconductor device according to claim 1, wherein the mounting position of the corresponding semiconductor chip on the other support plate is shifted with respect to the mounting position of the semiconductor chip on one support plate. A process of superimposing and integrating two support plates to form a composite plate;
A step of mounting a plurality of semiconductor chips on both sides of the composite plate,
Forming an insulating layer and wiring on both sides of the composite plate;
Separating the composite plate and obtaining two chip array substrates provided with a semiconductor chip, an insulating layer and wiring on the separated support plate,
Manufacture of a semiconductor device in which semiconductor chips are mounted on both sides of the composite plate so that the mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate Method.   The method for manufacturing a semiconductor device according to claim 4, wherein one or a plurality of semiconductor chips are alternately mounted on one surface and the other surface of the composite plate.   6. The method of manufacturing a semiconductor device according to claim 5, wherein semiconductor chips are mounted at substantially the same time at corresponding positions on both sides of the composite plate.   The mounting position of the corresponding semiconductor chip on the other support plate is shifted from the mounting position of the semiconductor chip on one support plate by approximately ½ of the size of the semiconductor chip in the shift direction, or The method for manufacturing a semiconductor device according to claim 1, wherein the mounting interval is shifted by approximately ½.   8. The method of manufacturing a semiconductor device according to claim 1, wherein the chip array substrate is singulated to obtain a plurality of chip-embedded substrates including at least one semiconductor chip from one chip array substrate. 9. .   The method for manufacturing a semiconductor device according to claim 1, wherein the support plate is removed after separating the composite plate.   The method for manufacturing a semiconductor device according to claim 1, wherein the support plate is a metal plate and the insulating layer is a resin layer.

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