JP2011211499A - Frame rate conversion circuit and display device mounting the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technology for improving image quality of an interpolation frame.SOLUTION: In a frame rate conversion circuit, an interpolation frame-generating unit 10 refers to at least one of first and second frames to generate an interpolation frame between these frames. A marginal region detector 20 detects that a marginal region is present if pixel values of a plurality of pixels at an edge of the first frame or the second frame fall within a predetermined range. If it is detected by the marginal region detector 20 that the marginal region is present, the interpolation frame-generating unit 10 refers to at least either pixels in the first frame or pixels in the second frame corresponding to positions of pixels within the marginal region in the interpolation frame to generate pixels within the marginal region in the interpolation frame.

Description

  The present invention relates to a frame rate conversion circuit that increases the number of frames of an input moving image and outputs the same, and a display device equipped with the frame rate conversion circuit.

  In recent years, a technique for increasing the number of frames of a moving image using a frame interpolation technique and generating a moving image that is smoother and has less afterimages has been put into practical use. For example, a technique of converting a moving image of 60 frames (60 Hz) per second to a moving image of 120 Hz or 240 Hz at a double speed or a quadruple speed and displaying it has been put into practical use. As a method for generating an interpolated frame, a method that uses a motion vector between consecutive frames has attracted attention (see, for example, Patent Documents 1 and 2).

  In Japan, 1Seg broadcasting has started in April 2006. One-segment broadcasting is a broadcast that uses a narrow band mainly for portable devices such as mobile phones. In one-segment broadcasting, since video is normally transmitted at 15 frames per second (15 Hz), it is highly necessary to increase the number of frames.

JP 2009-71842 A JP 2009-21868 A

  One of the interpolation frame generation algorithms using motion vectors is to specify a motion vector between a continuous first frame and a second frame in units of blocks or pixels, and the pixels in the first frame are generated by a constant linear motion. Some determine the pixels of an interpolated frame assuming they move to two frames. In this algorithm, for example, the motion vector for generating the target pixel of the interpolation frame is specified, and the pixel in the first frame and the pixel in the second frame corresponding to the start point and the end point of the motion vector are interpolated. The weighted average pixel according to the position in the time direction of the frame is assigned to the target pixel of the interpolation frame.

  Here, the video transmitted from the broadcast station may include black bands in several pixels at the left and right ends in the screen. Since the color of the black belt region does not change and its outline is clear, if noise occurs in the black belt region by the interpolation frame generation process, the noise may be noticeable. Then, it is unclear on the receiver side whether the video including the black band is sent from the broadcasting station side or the video not including the black band is sent. Furthermore, the receiver side could not easily determine which video is being sent. In addition, when a 4: 3 video is displayed on a 16: 9 screen, black bands are displayed on the left and right sides of the screen, and the same problem may occur.

  The present invention has been made in view of such circumstances, and an object thereof is to provide a technique for improving the image quality of an interpolation frame.

  In order to solve the above problems, a frame rate conversion circuit according to an aspect of the present invention is a frame rate conversion circuit that generates an interpolation frame between a first frame and a second frame included in an input moving image. Then, referring to at least one of the first frame and the second frame, an interpolation frame generation unit that generates an interpolation frame between these frames, and pixel values of a plurality of pixels at the edge of the first frame or the second frame Includes a blank area detection unit that detects the presence of a blank area when the pixel value is within a predetermined range. The interpolation frame generation unit detects a pixel in the first frame and a second frame corresponding to the position of the pixel in the blank region in the interpolation frame when the blank region detection unit detects the presence of the blank region. A pixel in a blank area in the interpolation frame is generated with reference to at least one of the pixels in the interpolation frame.

  Another embodiment of the present invention is also a frame rate conversion circuit. This apparatus is a frame rate conversion circuit that generates an interpolation frame between a first frame and a second frame included in an input moving image, and is a block unit between the first frame and the second frame. Alternatively, a motion vector detection unit that detects a motion vector in units of pixels, and determines a motion vector, and at least one of a pixel in the first frame and a pixel in the second frame corresponding to the start point and end point of the motion vector is determined. And an interpolation frame calculation unit that generates each pixel in the interpolation frame. The interpolated frame calculation unit includes an end region in which at least one of a pixel in the first frame and a pixel in the second frame corresponding to a start point and an end point of a motion vector includes at least a blank region that may exist at an edge of the frame. When the pixel is located at the position, the pixel in the interpolation frame is generated using one of the pixels in the first frame and the pixels in the second frame corresponding to the start and end points of the motion vector, which is close to the center vertical line of the frame. To do.

  Yet another embodiment of the present invention is a display device. This apparatus includes a frame rate conversion circuit and a display unit that displays an image in which an interpolation frame generated by the frame rate conversion circuit is inserted.

  It should be noted that any combination of the above-described constituent elements and a conversion of the expression of the present invention between a method, an apparatus, a system, a recording medium, a computer program, and the like are also effective as an aspect of the present invention.

  According to the present invention, the image quality of an interpolation frame can be improved.

It is a figure which shows the function structure of the display apparatus which concerns on embodiment. It is a figure which shows the structure of the frame rate conversion circuit which concerns on embodiment. It is a figure which shows the production | generation principle (double speed conversion) of an interpolation frame. It is a figure which shows the production | generation principle (4 time speed conversion) of an interpolation frame. It is a figure which shows the screen containing a black belt area | region.

  FIG. 1 shows a functional configuration of a display device 500 according to the embodiment. The display device 500 is a device equipped with a function of receiving a television broadcast such as a one-segment broadcast and displaying and reproducing it. For example, it may be a one-seg broadcast reception / playback machine, or may be a mobile phone, PDA, portable music player, electronic dictionary, car navigation device, or the like equipped with the function. The display device 500 is not limited to a device that receives a television broadcast, and may be a device that displays and reproduces a moving image.

  The display device 500 includes an antenna 200, an image processing circuit 300, a frame rate conversion circuit 100, and a display unit 400. The image processing circuit 300 includes a receiving unit 310, a decoding unit 320, and a video output unit 330. The receiving unit 310 receives the one-segment broadcast via the antenna 200, demodulates the signal of the selected channel, and outputs the demodulated signal to the decoding unit 320.

  The decoding unit 320 decodes the encoded data input from the receiving unit 310. For encoding one-segment broadcasting images, AVC / H. H.264 standard is adopted. The decoding unit 320 outputs the decoded frame to the video output unit 330. Note that resolution conversion by a scaler (not shown) is performed before the decoded frame is input to the video output unit 330.

  The video output unit 330 outputs the video decoded by the decoding unit 320 in a format that can be displayed on the display unit 400. For example, a 15 Hz moving image is converted into a 60 Hz moving image that can be displayed on the display unit 400.

  The frame rate conversion circuit 100 performs double speed conversion or quadruple speed conversion based on the moving picture received from the video output unit 330 and outputs the converted moving picture. Specifically, an interpolation frame between two continuous original frames included in the moving image is generated by the interpolation frame generation unit 10, inserted between the two original frames, and output. A specific conversion method will be described later. The display unit 400 displays the moving image that has been double-speed converted by the frame rate conversion circuit 100.

  FIG. 2 is a diagram illustrating a configuration of the frame rate conversion circuit 100 according to the embodiment. The frame rate conversion circuit 100 generates an interpolation frame between the first frame and the second frame included in the input moving image, and outputs the moving image with the interpolation frame added. For example, an interpolation frame between two adjacent frames included in the moving image is generated.

  The frame rate conversion circuit 100 includes an input unit 5, an interpolation frame generation unit 10, a blank area detection unit 20, a frame storage unit 30, and an output unit 50. These configurations can be realized by an arbitrary processor, memory, or other LSI in terms of hardware, and are realized by a program loaded in the memory in terms of software, but here, functions realized by their cooperation. Draw a block. Therefore, those skilled in the art will understand that these functional blocks can be realized in various forms by hardware only, software only, or a combination thereof.

  The input unit 5 writes the moving image output from the image processing circuit 300 to the frame storage unit 30 and outputs it to the blank area detection unit 20. The frame storage unit 30 temporarily stores the original frame included in the moving image output from the input unit 5 and the interpolation frame generated by the interpolation frame generation unit 10.

  The interpolation frame generation unit 10 generates an interpolation frame between the first frame and the second frame included in the moving image. The interpolation frame generation unit 10 basically refers to both the first frame and the second frame, generates an interpolation frame between these frames, and exceptionally refers to one of the first frame and the second frame. Then, an interpolated frame between these frames is generated. More specific description will be given below.

  The interpolation frame generation unit 10 includes a motion vector detection unit 12 and an interpolation frame calculation unit 14. The motion vector detection unit 12 detects a motion vector in block units or pixel units between the first frame and the second frame. For example, pixel-by-pixel motion vectors are detected by two-stage block matching.

  In the first stage of the two-stage block matching, the first frame is divided into a plurality of blocks (for example, 8 × 8 or 16 × 16 macroblocks), and is matched with the respective blocks in the second frame or Search for the block with the smallest error.

  For example, between the target block in the first frame and the candidate block in the second frame, a difference absolute value sum or a sum of squared differences of pixels at corresponding positions included in both is obtained, and a candidate block having the smallest value is obtained. The optimal prediction block in the second frame. In addition, the candidate block having the largest number of pixels corresponding to the corresponding positions included in both the target block in the first frame and the candidate block in the second frame is determined as the optimum in the second frame. It is good also as a prediction block. Then, a motion vector between each block in the first frame and each optimum prediction block in the second frame is calculated. Thereby, the motion vector of a block unit can be detected.

  In the second stage of the two-stage block matching, motion vectors of pixels whose pixel values do not substantially match between each block in the first frame and each optimum prediction block in the second frame are obtained. Ask. For example, by using a method similar to the above-described method, a region having the same or minimum error as the pixel region in which the pixel value in each block in the first frame does not substantially match is determined in the second frame. Explore. Thereby, the motion vector of a pixel unit can be detected between the first frame and the second frame.

  The interpolation frame calculation unit 14 determines the motion vector for generating each pixel in the interpolation frame, and the pixel in the first frame and the pixel in the second frame corresponding to the start point and the end point of the motion vector. Each pixel in the interpolation frame is generated with reference to at least one of the above. For example, both pixels may be combined and generated, or one of the pixels may be copied and generated. In the following, a method for generating a pixel in an interpolation frame by combining both pixels will be described with reference to FIGS.

  FIG. 3 is a diagram showing the principle of interpolation frame generation (double speed conversion). In the double speed conversion, it is necessary to insert one interpolation frame Fi between the first original frame Fo1 and the second original frame Fo2. The interpolation frame Fi is inserted at a time position obtained by dividing the time interval between the first original frame Fo1 and the second original frame Fo2.

  The pixel Pi of the interpolation frame Fi is generated by combining the pixel Po1 of the first original frame Fo1 and the pixel Po2 of the second original frame Fo2 corresponding to the start point and end point of the motion vector mv passing through the pixel Pi. . For example, the pixel values of both pixels may be averaged to calculate the pixel value of the pixel Pi in the interpolation frame Fi.

  Here, if the motion vector mv passing through the pixel Pi of the interpolation frame Fi can always be accurately obtained, the pixel Po1 of the first original frame Fo1 corresponding to the start point of the motion vector mv is directly used as the pixel Pi of the interpolation frame Fi. May be assigned. However, when the motion vector mv is erroneously detected, only one pixel Po1 is referred to, so that large noise is likely to occur. Therefore, in the present embodiment, both the pixel Po1 of the first original frame Fo1 and the pixel Po2 of the second original frame Fo2 are referred to.

  If there is no motion vector that passes through the target pixel of the interpolation frame Fi, for example, the following processing is performed. That is, a pixel spatially interpolated from surrounding pixels in the interpolation frame Fi is assigned to the target pixel, or a pixel of the first original frame Fo1 and a pixel of the second original frame Fo2 at the same position as the target pixel of the interpolation frame Fi Is assigned to the target pixel.

  FIG. 4 is a diagram showing the principle of interpolation frame generation (quadruple speed conversion). In the quadruple speed conversion, it is necessary to insert three interpolation frames (a first interpolation frame Fi1, a second interpolation frame Fi2, and a third interpolation frame Fi3) between the first original frame Fo1 and the second original frame Fo2. is there. The first interpolation frame Fi1, the second interpolation frame Fi2, and the third interpolation frame Fi3 are respectively inserted at time positions obtained by dividing the time interval between the first original frame Fo1 and the second original frame Fo2.

  The pixel Pi1 of the first interpolation frame Fi1 is generated by combining the pixel Po1 of the first original frame Fo1 and the pixel Po2 of the second original frame Fo2 corresponding to the start point and end point of the motion vector mv passing through the pixel Pi1. Is done. For example, the pixel value of the pixel Pi1 of the first interpolation frame Fi1 may be calculated by weighted averaging of both pixel values. That is, the former pixel value is 3/4, the latter pixel value is 1/4, and both are added.

  The pixel Pi2 of the second interpolation frame Fi2 can be generated in the same manner as the pixel Pi of the interpolation frame Fi shown in FIG. The pixel Pi3 of the third interpolation frame Fi3 is also generated by combining the pixel Po1 of the first original frame Fo1 and the pixel Po2 of the second original frame Fo2. For example, the pixel value of the pixel Pi3 of the third interpolation frame Fi3 may be calculated by weighted averaging of both pixel values. That is, the former pixel value is ¼, the latter pixel value is ¾, and both are added.

  Returning to FIG. 2, the output unit 50 reads out the frames constituting the moving image including the interpolation frame from the frame storage unit 30 in the display order, and outputs them to the outside.

  When a broadcasting station adds a black belt in one-segment broadcasting, a black pixel row having a width of 4 to 6 pixels may be added to the left and right ends of the frame. Since the margin area remains stationary, the color does not change, and the outline is clear, noise may be noticeable if noise occurs in the margin area of the interpolation frame. The black band is sometimes added on the broadcast station side in order to ensure compatibility of videos with different aspect ratios, and it is unclear whether the black band is added to the received moving image on the receiver side. Further, the size of the blank area may vary depending on the broadcasting station, and the size of the blank area is unknown on the receiver side.

  Depending on the motion vector, the pixels in the blank area in the interpolation frame are generated with reference to the pixels in the effective video area, and the video in the effective video area may be displayed as noise in the blank area. Conversely, the pixels in the effective video area are generated by referring to the pixels in the blank area, and the pixels in the blank area may be displayed as noise in the video in the effective video area.

  Therefore, the blank area detection unit 20 according to the embodiment detects whether a blank area exists in the first frame or the second frame. When the interpolation frame calculation unit 14 detects the presence of a blank area, it generates a blank area in the interpolation frame by setting the motion vector to zero or the like, and noise enters the blank area during interpolation. Suppress. This interpolation method will be specifically described with reference to FIG.

  FIG. 5 shows a screen 33 including a margin area. A screen 33 shown in FIG. 5 is a screen including a black band. The screen 33 includes an effective video area 38 on which an image is displayed, a black band area 34a on the left end side and a black band area 34b on the right end side which are blank areas. (If not particularly distinguished, it is referred to as “black belt region 34”) is displayed.

  The blank area detection unit 20 indicates that the black belt area 34 exists when the pixel values of a plurality of pixels at the edge of the first frame and the second frame are pixel values within a predetermined setting range. Is detected. Thereby, it is possible to detect whether or not the black belt region 34 exists at the edge of the first frame and the second frame. Even if the blank area detection unit 20 detects that the black band area 34 exists, the actual size of the black band area 34 may be unknown. That is, the blank area detection unit 20 detects that the black belt area 34 exists in a range assumed in advance.

  Here, since the pixel value of the black band area 34 added by the broadcasting station is not necessarily RGB (0, 0, 0), the pixel value of the black band area 34 added by the broadcasting station is encoded and decoded. A possible range is predetermined as a setting range. This setting range is determined by experiments so that erroneous detection is reduced.

  The edges of the frame are, for example, a right edge 36b and a left edge 36a displayed in FIG. The right edge portion 36b is a range from the right edge of the screen 33 to the dotted line 37b, and the width from the right edge of the screen 33 to the dotted line 37b in one-segment broadcasting can be about 3 pixels. Similarly, the width of the left edge portion 36a from the left edge of the screen 33 to the dotted line 37a can be about 3 pixels.

  When the pixel values of the vertical pixel columns 35 at the left and right edges of the first frame and the second frame are pixel values within a predetermined range, the blank area detection unit 20 Detect that exists. The position information of the pixel row 35 to be detected is held in the register, and the blank area detection unit 20 monitors the pixel value of the pixel row 35 to be detected based on the position information. By detecting the black band region 34 using the pixel values of all the pixels included in the pixel row 35, the erroneous detection of the black band region 34 can be reduced. Further, in the detection of the black belt region 34, the processing load can be reduced by limiting the detection target pixels to the left and right columns.

  Note that a pixel located at the boundary with the effective image area 38 in the black belt area 34 may be changed from black by processing such as encoding and decoding, and a pixel value within a predetermined setting range. It may not be. Therefore, in order to reduce the frequency of erroneous detection, the blank area detection unit 20 preferably uses a vertical pixel row located outside the dotted line 37 as a detection target, and is positioned at the outermost right end and left end in the screen 33. It is more preferable that the vertical pixel row located as a detection target.

  Returning to FIG. 2, when the blank area detection unit 20 detects that a blank area exists from the moving image, the blank area detection unit 20 outputs information indicating that the blank area exists to the interpolation frame calculation unit 14. Then, the interpolation frame calculation unit 14 sets the motion vector for generating pixels in the blank area in the interpolation frame to zero, and generates pixels in the blank area in the interpolation frame.

  In FIG. 5, the case a is that the target pixel Pia in the interpolation frame is present at the right edge 36b, the pixel Po1a of the first frame is outside the right edge 36b, and the pixel Po2a of the second frame is the right edge. This is the case that exists in 36b. In this case, the interpolation frame calculation unit 14 sets the motion vector for generating the pixel Pia in the interpolation frame to zero, and uses the pixel values corresponding to the pixels Pia in the first frame and the second frame, A pixel Pia is generated. Note that the pixel Pia may duplicate a pixel at the same position in the first frame or the second frame.

  When the interpolation frame calculation unit 14 receives information indicating that a blank area exists from the blank region detection unit 20, the interpolation frame calculation unit 14 sets a predetermined range in the interpolation frame as a blank region before generating the interpolation frame. The predetermined range is set in the register, and the interpolation frame calculation unit 14 reads the predetermined range from the register and sets it as a blank area.

  This predetermined range is determined based on the expected size of the margin area when the broadcasting station adds a margin area having a width of 4 to 6 pixels in one-segment broadcasting. Since the size of the margin area may change depending on the scaler of the image processing circuit 300, the predetermined range of the margin area to be set may be changed according to the adjustment of the scaler.

  After setting the blank area, the interpolation frame calculation unit 14 sets the motion vector for generating pixels in the blank area in the interpolation frame to zero, and generates pixels in the blank area in the interpolation frame. For example, both pixels may be combined (for example, averaged) or may be generated by duplicating one of the pixels.

  When the interpolation frame calculation unit 14 detects that there is no blank area, the interpolation frame calculation unit 14 does not set the blank area and refers to all the pixels in the first frame and all the pixels in the second frame. Generate. Accordingly, when the moving image is a full video image that does not include a blank area, an interpolation frame can be generated with reference to the entire first frame and the second frame, and the image quality can be improved.

  As described above, the frame rate conversion circuit 100 detects the presence or absence of a blank area from a moving image, and generates a blank area in an interpolation frame by interpolating with a motion vector set to zero, thereby generating a blank area in the interpolation frame. The possibility of entering noise can be reduced, and the image quality of the interpolation frame can be improved. Specifically, the frame rate conversion circuit 100 can reduce the possibility that the pixels in the blank area are generated with reference to the pixels in the effective video area, and the video in the effective video area is displayed as noise in the blank area. .

  Next, the interpolation frame calculation unit 14 may generate the pixels in the effective video area by referring to the pixels in the blank area by the motion vector, and display the pixels in the blank area as noise in the video in the effective video area. Interpolate to reduce performance. This interpolation method will be specifically described with reference to FIG.

  FIG. 5 shows a left end side end region 40a including a left end side black belt region 34a (a region from the left end to the two-dot chain line 42a) and a right end side end region 40b including a right end side black belt region 34b. (A region from the right end to the two-dot chain line 42b) and the central vertical line 44 are shown. When the end region 40a on the left end side and the end region 40b on the right end side are not particularly distinguished, they are referred to as “end regions 40”.

  When the interpolation frame calculation unit 14 is located in the end region 40 including at least the black belt region 34, one of the pixel in the first frame and the pixel in the second frame corresponding to the start point and end point of the motion vector The pixels in the interpolation frame are generated by duplicating the pixels close to the central vertical line 44 of the frame among the pixels in the first frame and the pixels in the second frame corresponding to the start and end points of the motion vector. Thus, when at least one of the pixels to be referred to when generating the interpolation frame is located in the end region 40, the pixel may be located in the black belt region 34. A pixel in the interpolation frame is generated with reference to only the pixel located. As a result, the pixels in the effective image area 38 are generated by referring to the pixels in the black band area 34 according to the motion vector, and the pixels in the black band area 34 may be displayed as noise in the image of the effective image area 38. Can be reduced and the image quality can be improved.

  The end region 40 includes a black belt region 34 and is set to a range larger by a predetermined number of pixels than the expected horizontal width of the black belt region 34. The interpolation frame calculation unit 14 sets a predetermined range as the end region 40 before generating the interpolation frame. The range set as the end region 40 is preset in the register. The range set as the end area 40 is set to a horizontal width of 10 pixels to several tens of pixels from the left and right ends of the frame when the horizontal width of the black belt area 34 is expected to be 4 to 6 pixels in one-segment broadcasting, for example. The FIG. 5 shows two cases b and c of this interpolation method.

  In the case b, the target pixel Pib in the interpolation frame exists outside the end region 40, one of the pixel Po1b in the first frame and the pixel Po2b in the second frame exists in the end region 40, and the other This is a case that exists outside the end region 40. In this case, the interpolation frame calculation unit 14 determines whether one of the pixel Po1b in the first frame and the pixel Po2b in the second frame corresponding to the start point and the end point of the motion vector for generating the pixel Pib in the interpolation frame is the end. When it exists in the partial area 40, the pixel near the center vertical line 44 is duplicated to generate the pixel Pib in the interpolation frame.

  Case c is a case where the target pixel Pic in the interpolation frame, the pixel Po1c in the first frame, and the pixel Po2c in the second frame are all within the end region 40 and outside the right edge portion 36b. is there. In this case, the interpolation frame calculation unit 14 determines whether one of the pixel Po1c in the first frame and the pixel Po2c in the second frame corresponding to the start point and the end point of the motion vector for generating the pixel Pic in the interpolation frame is the end. When it exists in the partial area 40, a pixel near the central vertical line 44 is duplicated to generate a pixel Pic in the interpolation frame.

  In this way, even if the pixels corresponding to the start point and the end point of the motion vector are both located in the end region 40, the pixel in the interpolation frame can be generated with reference to one pixel, The image quality is improved as compared with the case where both are referred to.

  Note that the interpolation frame calculation unit 14 may execute the interpolation methods of cases a to c described with reference to FIG. 5 when the blank region detection unit 20 detects the presence of the blank region. By combining these three interpolation methods, in addition to the case where some of the pixels in the margin area are displayed in the effective image area, this is also effective when some of the pixels in the effective image area are displayed in the margin area. Therefore, the possibility of noise generation based on the blank area can be extremely reduced.

  The present invention has been described based on some embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are also within the scope of the present invention. is there.

  For example, in the above embodiment, a method for detecting a pixel-based motion vector by two-stage block matching has been described. However, each block in an interpolation frame is detected using a block-based motion vector obtained by one block matching. A motion vector passing through the pixel may be obtained. Further, instead of block matching, a motion vector for each pixel may be detected using a gradient method.

  In the above embodiment, an example in which a one-segment broadcast moving image is converted at double speed has been described. However, the frame rate conversion circuit 100 including the frame rate conversion circuit 100 according to the present invention is not limited to the application. It can be applied to frame rate conversion of various moving images. In particular, it is effective for application to moving images with a low frame rate, such as moving images taken with a low-spec camera. For example, it can also be applied to frame rate conversion of moving images of less than 15 Hz.

  5 input section, 10 interpolation frame generation section, 12 motion vector detection section, 14 interpolation frame calculation section, 20 blank area detection section, 30 frame storage section, 33 screen, 34 black belt area, 38 effective video area, 40 edge area 50 output unit, 100 frame rate conversion circuit, 200 antenna, 300 image processing circuit, 310 reception unit, 320 decoding unit, 330 video output unit, 400 display unit, 500 display device.

Claims (6)

A frame rate conversion circuit for generating an interpolation frame between a first frame and a second frame included in an input moving image,
An interpolation frame generation unit that generates at least one of the first frame and the second frame and generates the interpolation frame between the frames;
A blank area detection unit for detecting the presence of a blank area when pixel values of a plurality of pixels at an edge of the first frame or the second frame are pixel values within a predetermined range; With
The interpolation frame generation unit corresponds to a position of a pixel in the blank area in the interpolation frame when the blank area detection unit detects that the blank area exists. A frame rate conversion circuit, wherein a pixel in the blank area in the interpolation frame is generated with reference to at least one of the pixel and the pixel in the second frame.   The blank area detection unit includes the blank area when the pixel values of the vertical pixel columns on the left and right of the first frame or the second frame are pixel values within a predetermined range. The frame rate conversion circuit according to claim 1, wherein the frame rate conversion circuit is detected.   The interpolation frame generation unit generates the interpolation frame by setting a motion vector for generating pixels in the blank area of the interpolation frame to zero when the blank area is detected by the blank area detection unit. The frame rate conversion circuit according to claim 2, wherein: The interpolation frame generation unit
A motion vector detection unit that detects a motion vector in units of blocks or pixels between the first frame and the second frame;
An interpolation frame calculation unit that generates each pixel in the interpolation frame with reference to at least one of the pixel in the first frame and the pixel in the second frame corresponding to the start point and the end point of the motion vector; With
When the blank area detection unit detects the presence of the blank area, the interpolation frame calculation unit includes the pixels in the first frame and the second frame corresponding to the start and end points of the motion vector. When at least one of the pixels is located in the end region including at least the margin region, the pixel in the first frame and the pixel in the second frame corresponding to the start point and end point of the motion vector 4. The frame rate conversion circuit according to claim 1, wherein a pixel in an area other than the blank area in the interpolation frame is generated using one pixel close to a central vertical line. 5. A frame rate conversion circuit for generating an interpolation frame between a first frame and a second frame included in an input moving image,
A motion vector detection unit that detects a motion vector in units of blocks or pixels between the first frame and the second frame;
An interpolation frame calculation unit that generates each pixel in the interpolation frame with reference to at least one of the pixel in the first frame and the pixel in the second frame corresponding to the start point and the end point of the motion vector; With
In the interpolation frame calculation unit, at least one of a pixel in the first frame and a pixel in the second frame corresponding to a start point and an end point of the motion vector is located in an end region existing at an edge of the frame. A pixel in the interpolated frame using one of the pixels in the first frame and the pixel in the second frame corresponding to the start and end points of the motion vector, which is close to the central vertical line of the frame. A frame rate conversion circuit characterized by generating the frame rate. A frame rate conversion circuit according to any one of claims 1 to 5;
And a display unit that displays an image into which the interpolation frame generated by the frame rate conversion circuit is inserted.

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