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JP2011108699A - Mold for manufacturing semiconductor device, method of manufacturing semiconductor device, and the semiconductor device - Google Patents

Mold for manufacturing semiconductor device, method of manufacturing semiconductor device, and the semiconductor device Download PDF

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JP2011108699A
JP2011108699A JP2009259407A JP2009259407A JP2011108699A JP 2011108699 A JP2011108699 A JP 2011108699A JP 2009259407 A JP2009259407 A JP 2009259407A JP 2009259407 A JP2009259407 A JP 2009259407A JP 2011108699 A JP2011108699 A JP 2011108699A
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mold
semiconductor device
manufacturing
resin
semiconductor
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JP5189062B2 (en
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Toshiyuki Tamate
登志幸 玉手
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Shindengen Electric Manufacturing Co Ltd
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Shindengen Electric Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a mold for manufacturing a semiconductor device preventing the back of a package from being warped by solving a problem of generation of a gap when packaging to a heat sink and a decrease on heat radiation properties caused by warpage generated in the package by shrinkage of resin occurring in curing of the sealing resin, and to provide a manufacturing method. <P>SOLUTION: In the mold for manufacturing a semiconductor device, the semiconductor package is formed by clamping a lead frame while being localized to the side of a second mold from the center in a thickness direction of a cavity and injecting the sealing resin into the cavity formed by putting together both of a first die for forming the front side of the semiconductor device and a second die for forming the rear side. In the mold for manufacturing the semiconductor device, a raised part is provided at an arbitrary position on a surface for forming the rear of the semiconductor device on an inner surface of the second die. The height is set according to the distance between a surface for forming the rear and the lead frame, and a rate of shrinkage in the resin. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、放熱のためのヒートシンクと共に使用されるフルモールドタイプの半導体装置の製造用金型、その製造方法並びに当該製造方法で製造される半導体装置に関する。 The present invention relates to a mold for manufacturing a full mold type semiconductor device used together with a heat sink for heat dissipation, a manufacturing method thereof, and a semiconductor device manufactured by the manufacturing method.

自立型の半導体装置は、それ自体が発生する熱を効率よく放熱させるために、ヒートシンクに取り付けられることが、一般的に行われている。 In general, a self-supporting semiconductor device is attached to a heat sink in order to efficiently dissipate heat generated by itself.

そのような半導体装置について、機器製造時の取り扱い上の簡便さから、ヒートシンクに取り付ける際に絶縁シート等を必要としない、フルモールドタイプの絶縁型半導体パッケージを持った半導体装置(例えば特許文献1)が使用されるケースが近年は増加している。 With respect to such a semiconductor device, a semiconductor device having a full mold type insulating semiconductor package that does not require an insulating sheet or the like when attached to a heat sink because of ease of handling at the time of device manufacture (for example, Patent Document 1) The number of cases where is used has increased in recent years.

特開2002−151632JP 2002-151632 A

ヒートシンクに取り付けた半導体装置の放熱効率は、使用されるヒートシンクの大きさ等によって決定されるが、同時に半導体装置とヒートシンクとの間の接触面の平坦度もまた大きく関係している。それ故にヒートシンクには通常、凹凸やねじれ、反りなどが無い平坦なものが用意される。 The heat dissipation efficiency of the semiconductor device attached to the heat sink is determined by the size of the heat sink to be used, and at the same time, the flatness of the contact surface between the semiconductor device and the heat sink is also greatly related. Therefore, a flat heat sink with no irregularities, twists, and warpage is usually prepared.

ヒートシンクの形状が平坦なものであることは、それに取り付ける半導体装置も同時に実装面と接する面が平坦であることが前提となっているが、実際にはこれらフルモールドタイプの絶縁型パッケージには、パッケージ裏面に反りがこれまで多く発生していた。 The flat shape of the heat sink is based on the premise that the surface of the semiconductor device attached to the mounting surface is in contact with the mounting surface at the same time. Many warpages have occurred on the back of the package.

フルモールドタイプの絶縁型パッケージを持つ半導体装置は一般的に、半導体チップを実装したリードフレームを、パッケージの厚み方向において裏面側に偏在させると同時に、パッケージの外に導出されるリード部が、同厚み方向表面側に立ち上がっている(特許文献1の図4(b)参照)。これにより、特にこの半導体パッケージをヒートシンクに取り付けた際に、リードフレームの位置がヒートシンクに近接するため、放熱がスムーズに行われ、尚かつリード部とヒートシンクとの間の絶縁距離を稼ぐことができる。 In general, a semiconductor device having a full mold type insulated package has a lead frame on which a semiconductor chip is mounted unevenly distributed on the back side in the thickness direction of the package, and at the same time, the lead portion led out of the package has the same It stands up on the surface side in the thickness direction (see FIG. 4B of Patent Document 1). Thereby, especially when this semiconductor package is attached to the heat sink, the position of the lead frame is close to the heat sink, so that the heat can be radiated smoothly and the insulation distance between the lead portion and the heat sink can be earned. .

その一方で、リードフレームが裏面側に偏在していることで、リードフレームを間に挟み、パッケージ表面側と裏面側とで樹脂厚に差が生じることとなる。同様に従来から図6のような半導体装置が有るが、封止樹脂の硬化時には同樹脂の収縮が発生し、この樹脂厚の差が収縮量の差をもたらすことで、パッケージが反ってしまう原因となる。そのため、図7のようにフルモールドタイプの絶縁型半導体パッケージを持った半導体装置をヒートシンクに取り付けた際には、パッケージ裏面の反りのために間に隙間が生じてしまい、この隙間による放熱性の低下が問題となっていた。 On the other hand, since the lead frame is unevenly distributed on the back surface side, the lead frame is sandwiched therebetween, and a difference in resin thickness occurs between the package surface side and the back surface side. Similarly, there is a conventional semiconductor device as shown in FIG. 6. However, when the sealing resin is cured, the resin shrinks, and the difference in the resin thickness causes a difference in the amount of shrinkage, causing the package to warp. It becomes. Therefore, when a semiconductor device having a full mold type insulating semiconductor package as shown in FIG. 7 is attached to a heat sink, a gap is generated due to warpage of the back surface of the package, and heat dissipation due to this gap is generated. The decline was a problem.

以上の問題に鑑み、本発明の目的はパッケージ裏面に反りが生じにくい半導体装置の製造用金型ならびに製造方法を提供することにある。 In view of the above problems, an object of the present invention is to provide a mold for manufacturing a semiconductor device and a manufacturing method thereof, in which the back surface of the package is less likely to warp.

本発明の半導体装置製造用金型は、製造される半導体装置の表面側を形成する第一の型と裏面側を形成する第二の型の二つを合わせることで形成されるキャビティの内部に、半導体チップを実装したリードフレームをキャビティの厚み方向の中心から第二の型側に偏在するように挾持し、封止樹脂を注入することで半導体パッケージを形成する半導体装置製造用金型であって、前記第二の型の内面において、製造される半導体装置の裏面を形成する面の任意の位置に、前記挾持されたリードフレームと前記半導体装置の裏面を形成する面との間の距離並びに、前記封止樹脂の硬化時の収縮率に応じて設定される高さの隆起部を設けたことを特徴とする。 The mold for manufacturing a semiconductor device of the present invention has a cavity formed by combining two of a first mold that forms the front side of the semiconductor device to be manufactured and a second mold that forms the back side. This is a mold for manufacturing a semiconductor device in which a semiconductor chip is formed by holding a lead frame mounted with a semiconductor chip so as to be unevenly distributed from the center in the thickness direction of the cavity to the second mold side and injecting a sealing resin. The distance between the sandwiched lead frame and the surface forming the back surface of the semiconductor device at an arbitrary position of the surface forming the back surface of the semiconductor device to be manufactured on the inner surface of the second mold A raised portion having a height set according to a shrinkage rate when the sealing resin is cured is provided.

前記任意の位置から前記第二の型内の外周部に向けて放射状に線を引くことで、前記隆起部を多面型に形成したことを特徴とする。 The raised portion is formed into a multi-faced shape by drawing a line radially from the arbitrary position toward the outer peripheral portion in the second mold.

前記第二の型の内面外周部の各頂点から、各辺の中間点に向けて、前記隆起部より低い高さまで勾配が設けられていることを特徴とする。 A gradient is provided from each vertex of the inner peripheral surface of the second mold toward a middle point of each side to a height lower than the raised portion.

前記隆起部の中心にはフラット部が形成されており、前記放射状の線は、前記フラット部周縁の所定の位置から引かれていることを特徴とする。 A flat portion is formed at the center of the raised portion, and the radial line is drawn from a predetermined position on the periphery of the flat portion.

前記フラット部は多角形であり、前記フラット部周縁の所定の位置が、前記多角形のそれぞれの頂点であることを特徴とする。 The flat part is a polygon, and a predetermined position of the flat part peripheral edge is each vertex of the polygon.

本発明の半導体装置の製造方法は、半導体装置の裏面側を形成する第二の型の内面の任意の位置を隆起させ、前記任意の位置から前記第二の型内の外周部に向けて放射状に線を引くことで、多面型の形状を持った隆起部を設けた樹脂封止用金型を用意する工程と、製造される半導体装置の表面側を形成する第一の型と裏面側を形成する第二の型を合わせて形成するキャビティの、厚み方向の中心から第二の型側に偏在するように半導体チップが実装されているリードフレームを挾持する工程と、溶融した封止樹脂を前記キャビティ内に注入する工程とを有し、製造される半導体装置のボディの裏面に反り対策形状を持たせることを特徴とする。 In the method for manufacturing a semiconductor device of the present invention, an arbitrary position of the inner surface of the second mold that forms the back surface side of the semiconductor device is raised, and a radial shape is formed from the arbitrary position toward the outer peripheral portion in the second mold. The step of preparing a resin sealing mold provided with a raised portion having a multi-faced shape by drawing a line, and the first mold and the back surface forming the front side of the semiconductor device to be manufactured The step of holding the lead frame on which the semiconductor chip is mounted so as to be unevenly distributed from the center in the thickness direction of the cavity formed by combining the second mold to be formed to the second mold side, and the molten sealing resin And a step of injecting into the cavity, and the back surface of the body of the semiconductor device to be manufactured has a warping countermeasure shape.

前記第二の型の内面外周部の各頂点から、各辺の中間点に向けて、前記隆起部より低い高さまで勾配が設けられている樹脂封止用金型を用いることを特徴とする。 A resin sealing mold is used in which a gradient is provided from each apex of the inner peripheral portion of the second mold toward a middle point of each side to a height lower than the raised portion.

前記隆起部の中心にはフラット部が形成されており、前記フラット部周縁の所定の位置から、前記放射状の線が引かれている樹脂封止用金型を用いることを特徴とする。 A flat portion is formed at the center of the raised portion, and a resin sealing mold in which the radial line is drawn from a predetermined position on the periphery of the flat portion is used.

前記フラット部は多角形であり、前記フラット部周縁の所定の位置を、前記多角形のそれぞれの頂点とした樹脂封止用金型を用いることを特徴とする。 The flat portion is polygonal, and a resin sealing mold having a predetermined position on the periphery of the flat portion as a vertex of each of the polygons is used.

前記した製造方法で製造されることを特徴とする半導体装置。 A semiconductor device manufactured by the manufacturing method described above.

本発明によれば、半導体装置製造用の金型の、製造される半導体装置の裏面を形成する面の任意の位置に、前記挾持されたリードフレームと前記半導体装置の裏面を形成する面との間の距離並びに、前記封止樹脂の硬化時の収縮率に応じて設定される高さの隆起部を設けることによって、パッケージ裏面には前記隆起部に対応する多面型の凹部が形成される。この凹部は成型収縮を考慮したものであり、収縮後には平坦な裏面を得ることが出来るため、この半導体装置をヒートシンクに取り付けた際に、隙間が生じることが無く、効率的に放熱することが可能となる。 According to the present invention, between the held lead frame and the surface forming the back surface of the semiconductor device at an arbitrary position of the surface forming the back surface of the manufactured semiconductor device of the mold for manufacturing the semiconductor device. By providing a raised portion having a height that is set according to the distance between them and the shrinkage rate when the sealing resin is cured, a multi-sided concave portion corresponding to the raised portion is formed on the back surface of the package. This recess takes into account molding shrinkage, and a flat back surface can be obtained after shrinkage. Therefore, when this semiconductor device is attached to a heat sink, there is no gap and heat can be radiated efficiently. It becomes possible.

本発明の一実施形態に係る半導体装置製造用金型(第二の型)を示す概略平面図である。1 is a schematic plan view showing a mold for manufacturing a semiconductor device (second mold) according to an embodiment of the present invention. 図1のA−A’矢視図(図2a)と、キャビティ部分の拡大図(図2b)である。FIG. 2 is an A-A ′ arrow view (FIG. 2 a) of FIG. 1 and an enlarged view (FIG. 2 b) of a cavity portion. 本発明の一実施形態の変形例に係る半導体装置製造用金型を示す概略平面図である。It is a schematic plan view which shows the metal mold | die for semiconductor device manufacture which concerns on the modification of one Embodiment of this invention. 本発明の一実施形態に係る半導体装置を示す斜視図である。It is a perspective view showing a semiconductor device concerning one embodiment of the present invention. 本発明の一実施形態に係る半導体装置を示す裏面図である。It is a back view which shows the semiconductor device which concerns on one Embodiment of this invention. その他の従来の半導体装置の一例を示す三角図である。It is a triangular figure which shows an example of the other conventional semiconductor device. 図6の半導体装置を放熱フィンに取り付けた状態を示す概略断面図である。It is a schematic sectional drawing which shows the state which attached the semiconductor device of FIG. 6 to the radiation fin.

以下、図1から図2を参照して、本発明の一実施形態に係る半導体装置製造用金型について説明する。図1、2に示すように、この実施形態に係る半導体装置製造用金型1は、上型(第一の型)10、下型(第二の型)20、そしてこれら二つの型を合わせることで形成されるキャビティ21によって大略構成されており、このキャビティ21の中に半導体チップ53を実装したリードフレーム51を配置し、樹脂封止することで半導体装置5を製造する。 Hereinafter, a semiconductor device manufacturing mold according to an embodiment of the present invention will be described with reference to FIGS. 1 to 2. As shown in FIGS. 1 and 2, a semiconductor device manufacturing mold 1 according to this embodiment includes an upper mold (first mold) 10, a lower mold (second mold) 20, and these two molds. The semiconductor device 5 is manufactured by placing a lead frame 51 mounted with a semiconductor chip 53 in the cavity 21 and sealing with resin.

図1に示す下型20は、キャビティ21の片半分を成す凹部21bをその中心に持ち、凹部21bの一方側には、アウターリード位置合わせ部22が形成されている。これは、この半導体装置製造用金型1を用いて製造する半導体装置5の、リードフレーム51本体の平面視矩形板状の部位であるチップ搭載部51aの一方側から立ち上がる、リード部51bの根元で位置合わせをすることが出来る溝状の窪みで、リード部51bはその大部分が下型20から突出した形でセッティングされる。 The lower mold 20 shown in FIG. 1 has a recess 21b that forms one half of the cavity 21 at the center, and an outer lead alignment portion 22 is formed on one side of the recess 21b. This is because the root of the lead portion 51b rises from one side of the chip mounting portion 51a which is a rectangular plate-like portion of the lead frame 51 main body of the semiconductor device 5 manufactured using the semiconductor device manufacturing die 1. The lead portion 51b is set so that most of the lead portion 51b protrudes from the lower die 20.

また、凹部21bの他方側にはゲート29が設けられており、封止樹脂はここから注入され、それまでキャビティ21内に有ったエアーは、リード部51bの1本1本に合わせて形成された、前述のアウターリード位置合わせ部22の溝の周囲に設けられたエアーベント28から排出される。尚、ゲート29とエアーベント28の位置関係は、必ずしも本実施形態と同じである必要は無いが、キャビティ21内部のエアーを好適に排出するために、それぞれを対向する位置に設けるのが望ましい。 Further, a gate 29 is provided on the other side of the recess 21b, and sealing resin is injected from here, and the air that has been in the cavity 21 until then is formed in accordance with each one of the lead portions 51b. The air vent 28 provided around the groove of the outer lead alignment portion 22 is discharged. Note that the positional relationship between the gate 29 and the air vent 28 is not necessarily the same as that in the present embodiment, but it is desirable that they are provided at positions facing each other in order to suitably discharge the air inside the cavity 21.

凹部21bの中央には隆起部25が設けられており、該隆起部25は中心から凹部21bの周縁に向かう、なだらかな傾斜を成している。また、隆起部25の中心から凹部21bの周縁に向かって、放射状に引かれる放射状線27が形成されている。これらは、凹部21bの周縁の四辺それぞれの中央に周縁隆起部24が形成され、四つの周縁隆起部24から凹部21bの四隅に向かってなだらかに傾斜していることと合わせて、放射状線27は隆起部25を多面型にする。 A raised portion 25 is provided at the center of the recessed portion 21b, and the raised portion 25 has a gentle inclination from the center toward the periphery of the recessed portion 21b. In addition, radial lines 27 are formed that are drawn radially from the center of the raised portion 25 toward the periphery of the concave portion 21b. In combination with the fact that the peripheral ridges 24 are formed at the centers of the four sides of the peripheral edge of the recess 21b and are gently inclined from the four peripheral ridges 24 toward the four corners of the recess 21b, the radial line 27 is The raised portion 25 is made multi-faceted.

製造されるフルモールドタイプの半導体装置5にはヒートシンクに実装する際に使用する取付孔54が、半導体パッケージ50の厚み方向を貫くような形で設けられていることが多いが、この取付孔54を形成するための取付孔形成凸部23が、隆起部25から更に突出するような形で下型20に設けられる。隆起部25から凹部21bの周縁への傾斜は、この取付孔形成凸部23によって遮られる形となるが、取付孔54の形状に合わせて円柱状に形成される取付孔形成凸部23の、隆起部25の中心から見て裏側から前記傾斜は再び凹部21bの周縁まで続けて形成される。 The full mold type semiconductor device 5 to be manufactured is often provided with a mounting hole 54 used for mounting on the heat sink so as to penetrate the thickness direction of the semiconductor package 50. The lower mold 20 is provided with a mounting hole forming convex portion 23 for further forming the protrusion. The inclination from the raised portion 25 to the periphery of the concave portion 21b is blocked by the mounting hole forming convex portion 23, but the mounting hole forming convex portion 23 formed in a columnar shape in accordance with the shape of the mounting hole 54, The inclination is formed again from the back side as viewed from the center of the raised portion 25 to the periphery of the recess 21b.

半導体装置製造用金型1に設けられる隆起部25によって、この半導体装置製造用金型1を用いることで樹脂成形される半導体パッケージ50には、一時的に陥没部55が形成される。しかしながら、半導体装置製造用金型1に樹脂を注入し熱硬化させる過程において、実際には陥没部55は樹脂の収縮に伴ってフラットな状態となる。これは、実装時にヒートシンクと接触する半導体パッケージ50の裏面側にリードフレーム51が偏在しているために、このリードフレーム51を間に挟み、半導体パッケージ50の表面側と裏面側とで樹脂量が大きく異なっていることが、半導体パッケージ50を変形させる作用を逆に利用したものである。即ち、樹脂量の多い表面側でより大きな収縮が発生し、この収縮作用によって半導体パッケージ50の裏面の外周部は表面側に引っ張られ、裏面がフラットな状態となる。これによってヒートシンクとの密着性を高めることが出来る。 Due to the raised portion 25 provided in the semiconductor device manufacturing mold 1, a depressed portion 55 is temporarily formed in the semiconductor package 50 that is resin-molded by using the semiconductor device manufacturing mold 1. However, in the process of injecting resin into the semiconductor device manufacturing die 1 and thermosetting, the depressed portion 55 actually becomes flat as the resin contracts. This is because the lead frame 51 is unevenly distributed on the back surface side of the semiconductor package 50 that comes into contact with the heat sink during mounting, and the lead frame 51 is sandwiched therebetween, and the amount of resin between the front surface side and the back surface side of the semiconductor package 50 is The great difference is that the action of deforming the semiconductor package 50 is reversed. That is, a larger shrinkage occurs on the front surface side where the amount of resin is large, and the outer peripheral portion of the back surface of the semiconductor package 50 is pulled to the front surface side by this shrinking action, and the back surface becomes flat. As a result, the adhesion to the heat sink can be enhanced.

下型20に隆起部25を設けるのは、前述したように最終的に半導体パッケージ50の裏面をフラットな状態にするためであるため、隆起部25の高さ、即ち半導体パッケージ50の陥没部55の深さは、裏面外周部が表面側に引っ張られる力との兼ね合いとなる。つまり、その表面側に引っ張られる力に影響を及ぼす、リードフレーム51の裏面側への偏在の程度と、使用される樹脂の硬化時の収縮率とによって、隆起部25の高さは規定される。 The reason why the raised portion 25 is provided on the lower mold 20 is that the back surface of the semiconductor package 50 is finally flattened as described above, and therefore the height of the raised portion 25, that is, the depressed portion 55 of the semiconductor package 50. This depth balances with the force with which the outer peripheral portion of the back surface is pulled to the front surface side. That is, the height of the raised portion 25 is defined by the degree of uneven distribution on the back surface side of the lead frame 51 that affects the pulling force on the front surface side and the shrinkage rate when the resin used is cured. .

また、隆起部25の中心から凹部21bの周縁に向けて、放射状線27が引かれることについては前述したが、図3に示すように、該中心に多角形のフラット部26を形成し、放射状線27を該多角形のそれぞれの頂点から引くようにしても良い。隆起部25の中心点を放射状線27が全て通るようにした場合、その一点に応力が集中するため、樹脂成形後に収縮するときにストレスが発生しやすいという問題が有るが、このようにフラット部26を設けるようにすると、このストレスを分散させることが出来る。 Further, as described above, the radial line 27 is drawn from the center of the raised portion 25 toward the periphery of the concave portion 21b. However, as shown in FIG. 3, a polygonal flat portion 26 is formed at the center to form a radial shape. A line 27 may be drawn from each vertex of the polygon. When all the radial lines 27 pass through the center point of the raised portion 25, the stress is concentrated at one point. Therefore, there is a problem that the stress is likely to occur when shrinking after resin molding. If 26 is provided, this stress can be dispersed.

フラット部26を成す多角形の頂点の数が増え、放射状線27の本数が増えることで隆起部25に形成される面の数も増加することになるが、この面の数が多ければ多いほど、応力はより一層分散される。 The number of polygonal vertices forming the flat portion 26 increases, and the number of radial lines 27 increases, so that the number of surfaces formed on the raised portions 25 also increases. The stress is further distributed.

次に、前記半導体装置製造用金型1を用いて半導体装置5を製造する方法を説明する。ここで説明する製造方法は、上型10と下型20からなる半導体装置製造用金型1を用意する工程と、これら上型10並びに下型20を合わせることで形成されるキャビティ21に半導体チップ53を実装したリードフレーム51を挾持する工程と、溶融した封止樹脂をキャビティ21内に注入し、熱硬化させることで半導体パッケージ50樹脂成形する工程と、半導体装置製造用金型1から離型させた半導体パッケージ50のポストキュアを行う工程とを有する。 Next, a method for manufacturing the semiconductor device 5 using the semiconductor device manufacturing mold 1 will be described. In the manufacturing method described here, a semiconductor chip is formed in a cavity 21 formed by combining a step of preparing a semiconductor device manufacturing mold 1 including an upper mold 10 and a lower mold 20 and combining the upper mold 10 and the lower mold 20. 53, a step of holding the lead frame 51 on which the semiconductor chip 53 is mounted, a step of injecting a molten sealing resin into the cavity 21 and thermosetting it, and molding the semiconductor package 50 resin, and releasing from the mold 1 for manufacturing a semiconductor device And post-curing the semiconductor package 50.

半導体装置製造用金型1を用意する工程では、既述のようにキャビティ21の片半分を成す凹部21bをその中心に持ち、溝状のアウターリード位置合わせ部22とゲート29とが、例えばそれぞれ対向する位置に設けられており、前述のアウターリード位置合わせ部22の溝の周囲にはキャビティ21内部のエアーを排出するためのエアーベント28が形成された下型20を、上型10と共に用意する。 In the step of preparing the semiconductor device manufacturing mold 1, as described above, the recess 21 b that forms one half of the cavity 21 is provided at the center, and the groove-shaped outer lead alignment portion 22 and the gate 29 are respectively provided, for example, Prepared together with the upper mold 10 is a lower mold 20 provided with air vents 28 for discharging the air inside the cavity 21 around the groove of the outer lead alignment portion 22 described above. To do.

本製造方法においては、下型20の中央に凹部21bの周縁に向かうなだらかな傾斜を有する隆起部25を設け、隆起部25の中心から凹部21bの周縁に向かって放射状に放射状線27が引かれるように加工する。さらに、凹部21bの周縁の四辺それぞれの中央に周縁隆起部24が形成し、四つの周縁隆起部24から凹部21bの四隅に向かってなだらかに傾斜させることと合わせて、隆起部25を多面型となるように加工する。このように半導体パッケージ50の裏面を形成することとなる下型20の凹部21bを加工することで、半導体パッケージ50の裏面に反り対策形状を持たせることが出来る(詳細は後述)。 In this manufacturing method, a raised portion 25 having a gentle slope toward the periphery of the recess 21b is provided at the center of the lower mold 20, and a radial line 27 is drawn radially from the center of the raised portion 25 toward the periphery of the recess 21b. To be processed. Furthermore, a peripheral ridge 24 is formed at the center of each of the four sides of the recess 21b, and the ridge 25 is made to be a multi-faced type in combination with the four peripheral protrusions 24 being gently inclined toward the four corners of the recess 21b. Process to be. Thus, by processing the recess 21b of the lower mold 20 that forms the back surface of the semiconductor package 50, the back surface of the semiconductor package 50 can have a warp countermeasure shape (details will be described later).

このように加工した半導体装置製造用金型1を用いて半導体装置を製造する場合、まず切断金型を使用して打ち抜いたリードフレーム51本体である平面視矩形板状のチップ搭載部51aに、半田等を介して半導体チップ53を接合することで半導体チップ53とチップ搭載部51aを電気的に接続し、さらに接続子等を用いてリード部51bと半導体チップ53とを電気的に接続させたものを用意する。 When a semiconductor device is manufactured using the semiconductor device manufacturing die 1 processed in this way, first, the chip mounting portion 51a having a rectangular plate shape in plan view, which is the main body of the lead frame 51 punched using a cutting die, The semiconductor chip 53 and the chip mounting portion 51a are electrically connected by bonding the semiconductor chip 53 via solder or the like, and the lead portion 51b and the semiconductor chip 53 are electrically connected using a connector or the like. Prepare things.

この状態のリードフレーム51を、アウターリード位置合わせ部22にリード部51bの根元を合わせ、同時にリード部51bと半導体チップ53を挟んだ他方側から立ち上がるフィン部51c先端の切り欠き部分(図示せず)を、取付孔形成凸部23と嵌合させるような形でセッティングする。ここで、リードフレーム51の形状は半導体チップ53を搭載する前記矩形板状の部位の一方側に位置するリード部51bと、他方側に位置するフィン部51cとが立ち上がっていることから、アウターリード位置合わせ部22にリード部51bをセットすると、半導体チップ53の搭載部位は下型20の凹部21bの深い位置で、底面にかなり近い場所に偏在することとなる。 The lead frame 51 in this state is aligned with the outer lead alignment portion 22 at the base of the lead portion 51b, and at the same time, a notch portion (not shown) at the tip of the fin portion 51c rising from the other side sandwiching the lead portion 51b and the semiconductor chip 53. ) Is set so as to be fitted to the mounting hole forming convex portion 23. Here, the shape of the lead frame 51 is such that the lead portion 51b located on one side of the rectangular plate-like portion on which the semiconductor chip 53 is mounted and the fin portion 51c located on the other side rise, so that the outer lead When the lead part 51b is set in the alignment part 22, the mounting part of the semiconductor chip 53 is unevenly distributed at a position deep in the recess 21b of the lower mold 20 and very close to the bottom surface.

尚、実際の製造時においてリードフレーム51は、リード部51bをタイバー(図示せず)によって連結することで、10片〜30片程度の多連形状を成すものが一般的に用いられる。同様に、半導体装置製造用金型1も多連形状となっている。 In the actual manufacturing process, the lead frame 51 generally has a multiple shape of about 10 to 30 pieces by connecting the lead portions 51b with tie bars (not shown). Similarly, the mold 1 for manufacturing a semiconductor device has a multiple shape.

リードフレーム51のセッティングを行った後に上型10をその上に被せ、下型20と上型10とを合わせることで形成されるキャビティ21内に、溶融した封止樹脂を注入する。この工程によって、凹部21bを持つ下型20が半導体パッケージ50の裏面側を、凹部21aを持つ上型10が同表面側を成形することとなる。 After the lead frame 51 is set, the upper mold 10 is placed thereon, and the molten sealing resin is injected into the cavity 21 formed by combining the lower mold 20 and the upper mold 10. By this step, the lower mold 20 having the recess 21b molds the back surface side of the semiconductor package 50, and the upper mold 10 having the recess 21a molds the front surface side.

樹脂は、ゲート29から注入する。このゲート29は、下型20と上型10との合わせ目に形成されることが多く、ここからタブレット状のエポキシ樹脂等に熱を与えることで溶融した封止樹脂は、ランナーと呼ばれる樹脂の通り道を経由し、半導体装置製造金型1内に注入される。 Resin is injected from the gate 29. The gate 29 is often formed at the joint of the lower mold 20 and the upper mold 10, and the sealing resin melted by applying heat to the tablet-like epoxy resin or the like is a resin called a runner. It is injected into the semiconductor device manufacturing mold 1 via the passage.

半導体装置製造金型1内に樹脂が注入されると、それまでキャビティ21内に有ったエアーは、リード部51bがセットされるアウターリード位置合わせ部22の溝の周囲に設けられたエアーベント28から排出される。尚、ゲート29とエアーベント28の位置関係は、必ずしも本実施形態と同じである必要は無い。しかしながら、このゲート29とエアーベント28の位置設定、またキャビティ21内部に挾持されているリードフレーム51の形状によっては、キャビティ21内の樹脂流動性に問題が生じることで、残存したエアーによりボイド等が発生する虞がある。キャビティ21内部のエアーを好適に排出することを考慮すると、ゲート29とエアーベント28とを対向する位置に設けるのが望ましい。 When the resin is injected into the semiconductor device manufacturing die 1, the air that has been in the cavity 21 until then is an air vent provided around the groove of the outer lead alignment portion 22 in which the lead portion 51b is set. 28 is discharged. The positional relationship between the gate 29 and the air vent 28 is not necessarily the same as in the present embodiment. However, depending on the position setting of the gate 29 and the air vent 28 and the shape of the lead frame 51 held inside the cavity 21, a problem may occur in the resin fluidity in the cavity 21, so that voids or the like may be caused by the remaining air. May occur. Considering that the air inside the cavity 21 is preferably discharged, it is desirable to provide the gate 29 and the air vent 28 at positions facing each other.

注入された樹脂は、さらに高い温度を与えられることで、一転硬化することとなる。エポキシ樹脂等の熱硬化性樹脂と呼ばれる封止部材は、ある一定の温度に達した後には不可逆の状態となり、形状が固定される。しかしながら、半導体装置製造金型1の温度が低下するに従って、キャビティ21内で早くも成形された半導体パッケージ50は収縮を開始する。この収縮時において、前述のようにリードフレーム51を下型20の凹部21bの底面近くに偏在させたことにより、リードフレーム51を挟んで半導体パッケージ50の表面側と裏面側とで、このリードフレーム51を間に挟み、半導体パッケージ50の表面側と裏面側とで樹脂量が大きく異なる状態を出来させ、これが表面側と裏面側の収縮量に差異をもたらすこととなる。 The injected resin is hardened by one turn by being given a higher temperature. A sealing member called a thermosetting resin such as an epoxy resin becomes an irreversible state after reaching a certain temperature, and its shape is fixed. However, as the temperature of the semiconductor device manufacturing mold 1 decreases, the semiconductor package 50 molded in the cavity 21 starts to shrink. At the time of contraction, the lead frame 51 is unevenly distributed near the bottom surface of the recess 21b of the lower mold 20 as described above, so that the lead frame 51 is placed on the front surface side and the back surface side of the semiconductor package 50 with the lead frame 51 interposed therebetween. A state in which the amount of resin is greatly different between the front surface side and the back surface side of the semiconductor package 50 is created with the 51 interposed therebetween, and this causes a difference in the shrinkage amount between the front surface side and the back surface side.

即ち、樹脂量の多い表面側でより大きな収縮が発生し、この収縮作用によって半導体パッケージ50の裏面の外周部は表面側に引っ張られ、凹部21bに設けられた隆起部25や周縁隆起部24の形状に合わせて形成される陥没部55は最終的にフラットな状態となる。 That is, a larger shrinkage occurs on the surface side with a large amount of resin, and the outer peripheral portion of the back surface of the semiconductor package 50 is pulled to the front surface side by this shrinking action, and the raised portions 25 and the peripheral raised portions 24 provided in the recessed portions 21b The depressed portion 55 formed in accordance with the shape finally becomes a flat state.

収縮が完了した時点で、半導体装置製造用金型1から半導体装置5を図示しないイジェクターピンを用いて離型させ、その後で前記タイバーを切断することで、それぞれの半導体装置5を個片化し、さらにポストキュア(応力緩和により材料を安定化させるための加熱エージング)を行う。このポストキュア工程において、完全に収縮した半導体パッケージ50が固定化される。 When the shrinkage is completed, the semiconductor device 5 is separated from the semiconductor device manufacturing die 1 by using an unillustrated ejector pin, and then the tie bar is cut, so that each semiconductor device 5 is separated into pieces. Further, post-cure (heat aging for stabilizing the material by stress relaxation) is performed. In this post-cure process, the completely shrunk semiconductor package 50 is fixed.

本製造方法によって製造された半導体装置5は、樹脂の収縮後には平坦な裏面を得ることが出来るため、この半導体装置5をヒートシンクに取り付けた際に、隙間が生じることが無く、効率的に放熱することが可能となる。 Since the semiconductor device 5 manufactured by this manufacturing method can obtain a flat back surface after shrinkage of the resin, there is no gap when the semiconductor device 5 is attached to a heat sink, and heat is efficiently radiated. It becomes possible to do.

以上、本発明の実施形態について図面を参照して詳述したが、具体的な構成はこの実施形態に限られるものではなく、本発明の陽子を逸脱しない範囲の設計変更等も含まれる。 As mentioned above, although embodiment of this invention was explained in full detail with reference to drawings, the specific structure is not restricted to this embodiment, The design change etc. of the range which does not deviate from the proton of this invention are included.

1 半導体装置製造用金型
5 半導体装置
10 上型(第一の型)
20 下型(第二の型)
21 キャビティ
22 アウターリード位置合わせ部
23 取付孔形成凸部
24 周縁隆起部
25 隆起部
26 フラット部
27 放射状線
28 エアーベント
29 ゲート
50 半導体パッケージ
51 リードフレーム
51a チップ搭載部
51b リード部
51c フィン部
54 取付孔
55 陥没部
DESCRIPTION OF SYMBOLS 1 Semiconductor device manufacturing die 5 Semiconductor device 10 Upper mold (first mold)
20 Lower mold (second mold)
21 Cavity 22 Outer lead alignment part 23 Mounting hole forming convex part 24 Periphery raised part 25 Raised part 26 Flat part 27 Radial wire 28 Air vent 29 Gate 50 Semiconductor package 51 Lead frame 51a Chip mounting part 51b Lead part 51c Fin part 54 Attachment Hole 55 depression

Claims (10)

製造される半導体装置の表面側を形成する第一の型と裏面側を形成する第二の型の二つを合わせることで形成されるキャビティの内部に、半導体チップを実装したリードフレームをキャビティの厚み方向の中心から第二の型側に偏在するように挾持し、封止樹脂を注入することで半導体パッケージを形成する半導体装置製造用金型であって、
前記第二の型の内面において、製造される半導体装置の裏面を形成する面の任意の位置に、前記挾持されたリードフレームと前記半導体装置の裏面を形成する面との間の距離並びに、前記封止樹脂の硬化時の収縮率に応じて設定される高さの隆起部を設けたことを特徴とする半導体装置製造用金型。
A lead frame mounted with a semiconductor chip is placed inside the cavity formed by combining the first mold that forms the front side of the semiconductor device to be manufactured and the second mold that forms the back side. A mold for manufacturing a semiconductor device, which is held so as to be unevenly distributed from the center in the thickness direction to the second mold side, and a semiconductor package is formed by injecting a sealing resin,
The distance between the sandwiched lead frame and the surface forming the back surface of the semiconductor device at an arbitrary position of the surface forming the back surface of the manufactured semiconductor device on the inner surface of the second mold, and A mold for manufacturing a semiconductor device, comprising a raised portion having a height set in accordance with a shrinkage rate when the sealing resin is cured.
前記任意の位置から前記第二の型内の外周部に向けて放射状に線を引くことで、前記隆起部を多面型に形成したことを特徴とする請求項1に記載の半導体装置製造用金型。 2. The gold for manufacturing a semiconductor device according to claim 1, wherein the raised portion is formed into a multifaceted shape by drawing a line radially from the arbitrary position toward an outer peripheral portion in the second mold. Type. 前記第二の型の内面外周部の各頂点から、各辺の中間点に向けて、前記隆起部より低い高さまで勾配が設けられていることを特徴とする、請求項1又は2記載の半導体装置製造用金型。 3. The semiconductor according to claim 1, wherein a gradient is provided from each vertex of the inner peripheral portion of the second mold toward a middle point of each side to a height lower than the raised portion. Mold for device manufacturing. 前記隆起部の中心にはフラット部が形成されており、前記放射状の線は、前記フラット部周縁の所定の位置から引かれていることを特徴とする、請求項2又は3記載の半導体装置製造用金型。 4. The semiconductor device manufacturing according to claim 2, wherein a flat portion is formed at the center of the raised portion, and the radial line is drawn from a predetermined position on the periphery of the flat portion. 5. Mold. 前記フラット部は多角形であり、前記フラット部周縁の所定の位置が、前記多角形のそれぞれの頂点であることを特徴とする請求項4記載の半導体装置製造用金型。 5. The mold for manufacturing a semiconductor device according to claim 4, wherein the flat part is a polygon, and a predetermined position of the periphery of the flat part is a vertex of each of the polygons. 半導体装置の裏面側を形成する第二の型の内面の任意の位置を隆起させ、前記任意の位置から前記第二の型内の外周部に向けて放射状に線を引くことで、多面型の形状を持った隆起部を設けた樹脂封止用金型を用意する工程と、製造される半導体装置の表面側を形成する第一の型と裏面側を形成する第二の型を合わせて形成するキャビティの、厚み方向の中心から第二の型側に偏在するように半導体チップが実装されているリードフレームを挾持する工程と、溶融した封止樹脂を前記キャビティ内に注入する工程とを有することを特徴とする半導体装置の製造方法。 By raising an arbitrary position of the inner surface of the second mold that forms the back surface side of the semiconductor device and drawing a line radially from the arbitrary position toward the outer peripheral portion in the second mold, Formed by combining a process for preparing a mold for resin sealing provided with a raised portion having a shape, and a first mold for forming the front side of the semiconductor device to be manufactured and a second mold for forming the back side Holding the lead frame on which the semiconductor chip is mounted so as to be unevenly distributed from the center in the thickness direction to the second mold side, and injecting molten sealing resin into the cavity A method for manufacturing a semiconductor device. 前記第二の型の内面外周部の各頂点から、各辺の中間点に向けて、前記隆起部より低い高さまで勾配が設けられている樹脂封止用金型を用いることを特徴とする請求項6記載の半導体装置の製造方法。 A resin sealing mold is used in which a gradient is provided from each apex of the inner peripheral portion of the second mold toward a middle point of each side to a height lower than the raised portion. Item 7. A method for manufacturing a semiconductor device according to Item 6. 前記隆起部の中心にはフラット部が形成されており、前記フラット部周縁の所定の位置から、前記放射状の線が引かれている樹脂封止用金型を用いることを特徴とする請求項6又は7記載の半導体装置の製造方法。 7. A resin sealing mold in which a flat portion is formed at the center of the raised portion and the radial line is drawn from a predetermined position on the periphery of the flat portion is used. Or a method of manufacturing a semiconductor device according to 7; 前記フラット部は多角形であり、前記フラット部周縁の所定の位置を、前記多角形のそれぞれの頂点とした樹脂封止用金型を用いることを特徴とする請求項8に記載の半導体装置の製造方法。 9. The semiconductor device according to claim 8, wherein the flat portion is a polygon, and a resin sealing mold is used in which a predetermined position of the periphery of the flat portion is a vertex of each of the polygons. Production method. 請求項6から9の製造方法で製造されることを特徴とする半導体装置。 A semiconductor device manufactured by the manufacturing method according to claim 6.
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CN115084059A (en) * 2022-08-16 2022-09-20 杭州飞仕得科技有限公司 Preparation method of insulating substrate and power device packaging method

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CN115084059B (en) * 2022-08-16 2022-12-02 杭州飞仕得科技有限公司 Preparation method of insulating substrate and power device packaging method

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