JP2011142115A - Method of manufacturing semiconductor device - Google Patents

Abstract

Provided is a semiconductor device manufacturing method that suppresses blade deterioration and reduces the occurrence of burrs on metal electrodes, chip cracks, and the like without adding new complicated processes.
A method of manufacturing a semiconductor device having a metal electrode 5 on the back surface includes a step of preparing a semiconductor substrate 1 having a front surface and a back surface, a plurality of device regions on the front surface side of the semiconductor substrate, and a device region. When the sandwiched dicing region is formed and the dicing tape 3 having a plurality of openings 4 is attached to the back side of the semiconductor substrate 1 and viewed from the normal direction of the semiconductor substrate 1, the openings 4 are not formed. A step of arranging so as to coincide with or be included in the device region, an electrode forming step of forming the metal electrode 5 on the back surface of the semiconductor substrate 1 in the opening of the dicing tape 3, and a surface of the semiconductor substrate 1 Cutting the dicing region of the semiconductor substrate 1 so as to reach the dicing tape 3 and cutting the semiconductor device 10 from the semiconductor substrate 1.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which a semiconductor substrate on which metal electrodes are formed is diced into chips.

  A power semiconductor device (for example, IGBT, MOSFET, Diode) is a device having a vertical structure in which a current flows between the front surface and the back surface of a wafer. In a general manufacturing method, after forming a device structure such as a PN junction, an insulating film, and a metal electrode on the front side of the wafer, the wafer is ground to a predetermined thickness, and a metal electrode is formed on the back side of the wafer. The wafer is cut into chips by dicing. In such a method, since a dicing blade (hereinafter simply referred to as “blade”) must cut both the wafer and the metal electrode during dicing, the blade is clogged with metal, and the cutting performance of the blade is degraded. There have been problems such as chip cracks due to cavities, cracks at the chip edges, and burrs on metal electrodes.

  On the other hand, in order to avoid cutting of the metal electrode by the blade, a method of patterning the metal electrode on the back surface so as not to form the metal electrode on the dicing region has been proposed. In such a method, the back electrode is formed in a state where the dicing region is masked with a resist film in a grid pattern so that the back electrode is not formed in the dicing region (see, for example, Patent Document 1).

JP-A-8-88200

  However, the method of forming a resist film as in Patent Document 1 requires a step of forming a resist film, a step of patterning the resist film in a grid pattern, and a step of removing the resist film, and the number of steps increases. There are problems that the manufacturing method becomes complicated and the manufacturing cost increases.

  Therefore, the present invention has been made to solve such a problem, and without increasing the number of complicated processes, the deterioration of the blade is suppressed, the occurrence of burrs in the metal electrode, chip cracking, etc. It is an object of the present invention to provide a method for manufacturing a semiconductor device that is reduced.

  The present invention relates to a method of manufacturing a semiconductor device having a metal electrode on the back surface, a step of preparing a semiconductor substrate having a front surface and a back surface, a plurality of device regions on the front surface side of the semiconductor substrate, and a device region The step of forming the sandwiched dicing region and a dicing tape having a plurality of openings are attached to the back side of the semiconductor substrate, and the opening matches the device region when viewed from the normal direction of the semiconductor substrate. Or a step of arranging to be included in the inner side, an electrode forming step of forming a metal electrode on the back surface of the semiconductor substrate in the opening of the dicing tape, and a semiconductor so as to reach the dicing tape from the surface of the semiconductor substrate And a step of cutting the dicing region of the substrate to cut out the semiconductor device from the semiconductor substrate.

  In the manufacturing method according to the present invention, it is possible to prevent the deterioration of the blade, suppress the generation of chip cracks and foreign matters, and reduce the manufacturing cost of the semiconductor device without increasing the number of manufacturing steps.

It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 1 of this invention. It is a top view of the wafer concerning Embodiment 1 of the present invention. It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 2 of this invention. It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 3 of this invention. It is sectional drawing of the manufacturing process of the other semiconductor device concerning Embodiment 3 of this invention. It is sectional drawing of the manufacturing process of the semiconductor device concerning Embodiment 4 of this invention.

Embodiment 1 FIG.
FIG. 1 is a cross-sectional view of the manufacturing process of the semiconductor device according to the first embodiment of the present invention. FIG. 2 is a plan view of the semiconductor wafer (semiconductor substrate) of FIG. The upper side of FIG. 1 is the wafer surface (front surface) (hereinafter referred to as “front surface”), and the lower side is referred to as the wafer back surface (hereinafter referred to as “back surface”).

  The manufacturing method according to the first embodiment includes the following steps 1 to 5.

  Step 1: A device structure such as a PN junction, an insulating film, and a metal electrode is formed on the surface side of the semiconductor wafer 1. The semiconductor wafer 1 is made of, for example, Si, GaN, SiC, or the like. A region in which the device structure is manufactured becomes a device region, and a space between the device region and the device region becomes a dicing region used for dicing. Normally, rectangular device regions are arranged in a matrix, and a space between them is a grid-like dicing region.

  Step 2: As shown in FIG. 1A, a base metal electrode 2 is formed on the back side of the semiconductor wafer 1 by using, for example, a sputtering method. The base metal electrode 2 becomes a seed layer in the plating step (step 3) of the metal electrode 5, and is made of, for example, Zn or Cu. Moreover, you may form from Al etc. which can form the metal electrode 5 by the plating method by adding pre-processing before a plating process.

  Subsequently, the dicing tape 3 provided with the opening 4 is affixed on the back surface (underlying metal electrode 2) of the semiconductor wafer 1. The dicing tape 3 is made of, for example, PV or PET, and the film thickness is, for example, about 0.1 mm. The opening 4 of the dicing tape 3 is provided at a position on the back surface of the device region where the metal electrode 5 is formed in the step 3 (see FIG. 1B) and is smaller than the outer dimension of the semiconductor chip 10, It should not be on the dicing line 7.

  When the dicing tape 3 is affixed to the semiconductor wafer 1, the dicing tape 3 is affixed so that the positions of the openings 4 are aligned with the front surface pattern (device region) using cameras installed on the front surface side and the back surface side of the semiconductor wafer 1. . The dicing tape 3 may be attached by aligning with the orientation flat or notch of the semiconductor wafer 1.

  FIG. 2 is a plan view of the semiconductor wafer 1 to which the dicing tape 3 is attached as seen from the back side. The openings 4 of the dicing tape 3 are provided in a matrix corresponding to the device region on the surface, and the base metal electrode 2 is exposed from the openings 4.

  Step 3: As shown in FIG. 1B, a metal electrode 5 is formed on the base metal electrode 2 using an electrolytic plating method using the base metal electrode 2 as a seed layer. The metal electrode 5 is formed by, for example, solder plating, Cu plating, Ni / Au plating, or the like.

  When the electrolytic plating method is used, the metal electrode 5 is formed only on the base metal electrode 2 in the opening 4 of the dicing tape 3. The thickness of the metal electrode 5 should not exceed the thickness of the dicing tape 3. This is because when the metal electrode 5 becomes thicker than the dicing tape 3, the metal electrode 5 wraps around the dicing tape 3 and the metal electrodes 5 of the adjacent semiconductor chips 10 are connected to each other. As a result, when the semiconductor chip 10 is removed from the dicing tape 3, the metal electrode 5 is caught by the dicing tape 3, which causes the metal electrode 5 to peel off or chip.

  Process 4: As shown in FIG.1 (c), the semiconductor wafer 1 is cut | disconnected from the surface to a chip | tip state using a blade. The width of the dicing tape 3 between the openings 4 is sufficiently larger than the thickness of the blade so that the blade passes over the dicing tape 3 between the openings 4. In step 2, the dicing tape 3 is attached so that the position of the opening 4 is aligned with the device region on the surface. It will surely exist.

As described above, since the metal electrode 5 does not exist in the region cut by the blade, the blade is not clogged by the metal electrode 5, and deterioration due to the blade can be suppressed. Further, it is possible to prevent the semiconductor chip 10 from being cracked due to blade deterioration. Furthermore, burrs of the metal electrode 5 generated at the end of the chip can be eliminated.
Although the base metal electrode 2 is cut with a blade, it is very thin as compared with the metal electrode 5 and therefore hardly affects the deterioration of the blade.

  Step 5: As shown in FIG. 1D, the semiconductor chip 10 is peeled from the dicing tape 3 to complete the method for manufacturing the semiconductor device.

  In this manner, the metal electrode 5 is formed by the plating method with the dicing tape 3 having the opening 4 attached, so that the metal electrode can be formed in a predetermined region excluding the dicing region without increasing the number of steps. 5 can be formed. As a result, it is no longer necessary to cut the metal electrode 5 with a blade in the dicing process, preventing the blade from being deteriorated due to clogging of the metal of the metal electrode 5, and generating foreign matter due to chip cracking or peeling of the metal electrode 5. Can be suppressed.

Embodiment 2. FIG.
FIG. 3 is a cross-sectional view of the manufacturing process of the semiconductor device according to the second embodiment of the present invention. 3, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. 3A to 3D corresponds to the steps shown in FIGS. 1A to 1D.

  In the manufacturing method according to the second embodiment, after the device structure is formed in the device region on the front surface side of the semiconductor wafer 1, the base metal electrode 2 is formed on the back surface side of the semiconductor wafer 1 and the dicing provided with the opening 4. The tape 3 is affixed on the back surface (underlying metal electrode 2) of the semiconductor wafer 1.

  As shown in FIG. 3A, in the cross section in the vertical direction of the semiconductor wafer 1, the opening 4 of the dicing tape 3 is closer to the semiconductor wafer 1 (upward in FIG. 3A), and the opening width is larger. It has a reverse taper shape that increases. When the dicing tape 3 is cut out to form the opening 4, the reverse tapered opening 4 can be formed by setting the cutting direction to an oblique direction.

  Subsequently, as in the first embodiment, after forming the metal electrode 5 in the opening 4 (FIG. 3B), the semiconductor wafer 1 is cut into a chip state from the surface using a blade (FIG. 3). (C)) Finally, the semiconductor chip 10 is peeled off from the dicing tape 3 (FIG. 3D), and the semiconductor device manufacturing method is completed.

  In the manufacturing process according to the second embodiment, since the opening 4 of the dicing tape 3 has a reverse taper shape, the metal electrode 5 is removed in the process of peeling the semiconductor chip 10 from the dicing tape 3 (FIG. 3D). However, it becomes difficult to catch on the dicing tape 3, and chip cracks can be further reduced.

Embodiment 3 FIG.
FIG. 4 is a cross-sectional view of the manufacturing process of the semiconductor device according to the third embodiment of the present invention. 4, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. The manufacturing method according to the third embodiment includes the following steps 1 to 6.

  Step 1: A device structure such as a PN junction, an insulating film, and a metal electrode is formed in a device region on the surface side of the semiconductor wafer 1 made of, for example, Si, GaN, SiC, or the like.

  Step 2: As shown in FIG. 4A, first, a dicing tape (lower layer) 3 having an opening 4 is attached to the back surface of the semiconductor wafer 1. Subsequently, a mask tape (upper layer) 8 having the same opening 4 is stuck on the dicing tape 3 so that the opening 4 overlaps. The mask tape 8 may be pasted on the dicing tape 3 in advance, and this may be pasted on the back surface of the semiconductor wafer 1.

  The mask tape 8 is made of PV or PET, for example, and has a thickness of about 0.1 mm. The dicing tape 3 may be used as the mask tape 8. However, the adhesive strength of the adhesive of the mask tape 8 is preferably weaker than the adhesive strength of the adhesive of the dicing tape 3 so that the mask tape 8 can be easily peeled off from the dicing tape 3.

  Subsequently, the base metal electrode 2 is formed by using, for example, a sputtering method. The base metal electrode 2 is formed on the semiconductor wafer 1 in the opening 4 and on the mask tape 8.

  Step 3: As shown in FIG. 4B, the base metal electrode 2 on the mask tape 8 is removed by peeling the mask tape 8. As a result, the base metal electrode 2 is formed only on the semiconductor wafer 1 in the opening 4 of the dicing tape 3.

  Process 4: As shown in FIG.4 (c), the metal electrode 5 which consists of solder plating etc. is formed on the base metal electrode 2 using the electroplating method which used the base metal electrode 2 for the seed layer. The thickness of the metal electrode 5 should not exceed the thickness of the dicing tape 3.

  Step 5: As shown in FIG. 4D, the semiconductor wafer 1 is cut into a chip state from the surface by using a blade. In this case, the blade passes over the dicing tape 3 between the openings 4.

  Process 6: As shown in FIG.4 (e), the semiconductor chip 10 is peeled from the dicing tape 3, and the manufacturing method of a semiconductor device is completed.

  In the manufacturing method according to the third embodiment, since the blade does not cut both the base metal electrode 2 and the metal electrode 5, the blade is not deteriorated due to clogging of the metal, and the chip is broken or the metal electrode 5 is peeled off. The generation of foreign matter due to can be suppressed.

  FIG. 5 is a sectional view of another semiconductor device manufacturing process according to the third embodiment of the present invention. 5, the same reference numerals as those in FIG. 4 indicate the same or corresponding parts.

  In such a manufacturing method, as shown in FIG. 5A, after the dicing tape 3 and the mask tape 8 are attached to the back surface of the semiconductor wafer 1, the base metal electrode 2 is formed by sputtering or the like, Metal electrode 5 is formed by electrolytic plating.

  Subsequently, as shown in FIG. 5B, the base metal electrode 2 and the metal electrode 5 on the mask tape 8 are removed by peeling off the mask tape 8.

  Thereafter, as in FIGS. 4D and 4E, the semiconductor wafer 1 is cut into a chip state from the surface using a blade as shown in FIG. 5C, and then as shown in FIG. Then, the semiconductor chip 10 is peeled from the dicing tape 3 to complete the semiconductor device manufacturing method.

  Even in this manufacturing method, since the blade does not cut both the base metal electrode 2 and the metal electrode 5, the blade is not deteriorated due to clogging of the metal, and the generation of foreign matter due to chip cracking or peeling of the metal electrode 5 is suppressed. can do.

  In the manufacturing method according to the third embodiment, the metal electrode 5 is formed by an electrolytic plating method, but an electroless plating method can also be used.

Embodiment 4 FIG.
FIG. 6 is a cross-sectional view of the manufacturing process of the semiconductor device manufacturing method according to the fourth embodiment. In FIG. 6, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.

  In the fourth embodiment, when the position information recognition pattern 9 is formed on the surface of the semiconductor wafer 1 and the dicing tape 3 is affixed, the position of the dicing tape 3 corresponding to this position (the semiconductor wafer 1 across the semiconductor wafer 1 is opposed). The alignment pattern 6 is formed at the position to be processed.

  As a result, when the dicing tape 3 is attached to the semiconductor wafer 1, the position information recognition pattern 9 of the semiconductor wafer 1 and the alignment pattern of the dicing tape 3 are used using cameras installed on the front surface side and the back surface side of the semiconductor wafer 1. 6 is recognized, the position information of the semiconductor wafer 1 and the dicing tape 3 is accurately grasped, and the dicing tape 3 can be attached to the semiconductor wafer 1 in an alignment process.

  With such a configuration, the dicing tape 3 can be attached so that the device structure (device region) formed on the surface of the semiconductor wafer 1 and the opening 4 of the dicing tape 3 accurately correspond to each other. The pattern shift of the thin film 5 can be suppressed, and the risk of cutting the metal electrode 5 during dicing can be reduced. Moreover, since the positional accuracy of the attachment is improved, the interval between the openings 4 of the dicing tape 3 can be narrowed.

  The method according to the fourth embodiment can be applied to the other manufacturing methods described in the first to third embodiments.

  DESCRIPTION OF SYMBOLS 1 Semiconductor wafer, 2 ground metal electrode, 3 dicing tape, 4 opening part, 5 metal electrode, 6 alignment pattern, 7 dicing line, 8 mask tape, 9 position information recognition pattern, 10 semiconductor chip.

Claims (7)

A method of manufacturing a semiconductor device having a metal electrode on the back surface,
Preparing a semiconductor substrate having a front surface and a back surface;
Forming a plurality of device regions and a dicing region sandwiched between the device regions on the surface side of the semiconductor substrate;
When a dicing tape having a plurality of openings is affixed to the back side of the semiconductor substrate and viewed from the normal direction of the semiconductor substrate, the openings are aligned with or included in the device region. A process of arranging in
An electrode forming step of forming a metal electrode on the back surface of the semiconductor substrate in the opening of the dicing tape;
Cutting the dicing region of the semiconductor substrate so as to reach the dicing tape from the surface of the semiconductor substrate, and cutting the semiconductor device from the semiconductor substrate.   2. The manufacturing method according to claim 1, wherein a base metal electrode is formed on a back surface of the semiconductor substrate, and the metal electrode is formed by electrolytic plating using the base metal electrode as a seed layer. The dicing tape has a two-layer structure of an upper layer and a lower layer,
The electrode forming step is a step of forming the metal electrode both on the back surface of the semiconductor substrate and on the dicing tape in the opening of the dicing tape,
2. The manufacturing method according to claim 1, further comprising a step of removing the metal electrode on the dicing tape by peeling off an upper layer of the dicing tape following the electrode forming step.   The said dicing tape has a some rectangular opening part arrange | positioned at matrix form, The manufacturing method in any one of Claims 1-3 characterized by the above-mentioned.   The manufacturing method according to claim 1, wherein the opening of the dicing tape has a reverse taper structure in which a side surface is inclined outwardly from the surface of the dicing tape toward the semiconductor substrate.   2. The manufacturing method according to claim 1, wherein the surface of the metal electrode in the opening of the dicing tape is disposed in the same plane as the surface of the dicing tape or on the semiconductor substrate side. A position information recognition pattern is provided on the surface of the semiconductor substrate, and an alignment pattern is provided on the dicing tape,
2. The opening of the dicing tape is arranged so as to coincide with or be included in the device area by aligning the position information recognition pattern and the alignment pattern. The manufacturing method as described in.

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