JP2011034370A - Memory controller - Google Patents

Abstract

A memory controller having a function suitable for use in a moving image decoding / encoding process or a three-dimensional graphics drawing process is provided.
Input image data is subjected to compression processing. If the amount of data decreases as a result of the compression process, the compressed data is stored in the memory. If not, the uncompressed data is stored in the memory. If the data is not compressed, an area block is provided in the memory to divide and store the data by a predetermined size. If the data is compressed or not, the data is stored at the start address of the area block. Store from. The storage start address of data, the amount of data, and information indicating whether the data is compressed data or non-compressed data are stored separately as map information.
[Selection] Figure 1

Description

  The present invention relates to a memory controller that controls access to a memory.

  A frame memory of an MPEG encoder / decoder is generally realized by an SDRAM / DDR-SDRAM or the like externally attached to an LSI having a decoding / encoding processing function or enclosed in the same package.

  With the widespread use of high-definition broadcasting, large-capacity optical discs, etc., it has become common to handle HDTV images (High Definition TV: 1920x1080) in encoding and decoding of moving images. In the future, the use of UHDTV images with a larger screen (Ultra High Definition TV: 7680x4320, 3840x2160) is being studied, and further improvement in the processing performance of the MPEG decoder / encoder is desired. Similarly, in 3D graphics drawing processing, high-quality drawing processing is required due to higher resolution of display devices and higher quality of drawn images. This tendency means that the bandwidth required between the LSI having the decoder / encoder function or the three-dimensional graphics drawing function and the external SDRAM is also increased. As means for increasing this bandwidth, an increase in the number of SDRAM elements, an increase in the bit width (number of LSI pins) of the adopted SDRAM, an improvement in clock frequency, etc. can be considered. Therefore, a technique for reducing the required bandwidth for SDRAM by some means is required. As a method for coping with this problem, it is conceivable to store the compressed image data in the SDRAM separately from the encoding / decoding of the image such as MPEG. If the image data is compressed and stored, the amount of data transferred when the image data is read from the SDRAM or stored in the SDRAM decreases, so the amount of data transferred in one access can be reduced. The required bandwidth for the SDRAM can be reduced.

  As the prior art, there are the following techniques. For example, there are a technique for compressing a decoding result image by irreversible means (for example, thinning), a technique for performing compression / decompression for a frame memory using a reversible compression method, and the like.

Furthermore, lossless compression is used, and for an I / P picture to be referred to, there is provided a means capable of accessing an arbitrary block.
Therefore, it is desirable that a memory controller used in an LSI that performs moving image decoding / encoding processing or three-dimensional graphics rendering processing has the following functions.
-Memory data compression method has reversibility-Data access has random accessibility-Storage-Management information required other than main data to be compressed is as small as possible-Memory for any data and access The usage amount and the memory bandwidth can be kept lower than the uncompressed state.

JP 2007-266970 A JP 2008-227888 A JP-A-10-224805 Japanese Patent Laid-Open No. 11-234492 Japanese Patent Laid-Open No. 10-136179

  An object of the present invention is to provide a memory controller capable of reducing a bandwidth required for a memory.

  The memory controller according to the present invention is a memory controller that controls access to a memory. The memory controller divides input data into blocks and compresses the compressed data, and the compressed data is compared with the case where the compressed data is not compressed. If the amount decreases, the compressed data block is divided into blocks, and if not, the uncompressed data block is divided into area blocks so that the uncompressed data block can be stored. Information indicating the amount of data and whether the data is compressed or uncompressed data in the storage unit to be stored in the memory and the storage area corresponding to the block of data stored in the memory from the start address of the storage area of the recorded memory A map information storage unit for separately storing map information consisting of

  According to the disclosed apparatus, it is possible to provide a memory controller capable of reducing the bandwidth required for the memory.

It is a block diagram which shows the memory controller according to this embodiment. It is a flow of processing of one write request by the write control unit. It is a processing flow of one read request by the read control unit. It is a figure which shows the example which applied the memory controller by this embodiment as a memory controller of the decoder of H.264. It is FIG. (1) explaining operation | movement of the write-in process according to this embodiment, and a read-out process. It is FIG. (2) explaining operation | movement of the write-in process according to this embodiment, and a read-out process. It is FIG. (3) explaining operation | movement of the write-in process according to this embodiment, and a read-out process. FIG. 3 is a diagram (part 1) illustrating a data structure of map information of the map information memory and the SDRAM of the embodiment. FIG. 6 is a diagram (part 2) illustrating a data structure of map information of the map information memory and the SDRAM of the embodiment. FIG. 6 is a third diagram illustrating the data structure of map information in the map information memory and the SDRAM according to the embodiment.

A memory controller according to an embodiment of the present invention has the following configuration.
・ Whether each area block reserved in the memory is stored by which method (two or more can be selected, one of which is uncompressed, the other is lossless compression), and how much data size can be compressed A function that holds map information. Here, it is assumed that the memory is divided into area blocks for storing blocks of data obtained by dividing data by a predetermined data size. The data size indicates the number of access units (units) in memory access at the time of writing to and reading from the memory. Here, the compression method of the data stored in the memory is not limited. There are two types of data stored in each area block: uncompressed and lossless compression. Depending on the data compression method, the amount of data may not be compressed and may increase instead. It depends. Compress data and store data in a compressed state only when the amount of data is actually compressed, and store uncompressed data when the amount of data is not compressed Is intended to be

・ When writing, compress each block of data with the lossless compression method to determine whether the amount of data will be smaller than when uncompressed. For data blocks that are written to a specified position in the area block and the amount of data is large, uncompressed data is written to the area block as it is, the method selection result for each block (which method was used) and after compression Write function that sends the data size of the map to the map information holding function. Here, when the divided data (block of data) is compressed, the compressed data is stored from the head of the area block in the memory. Since the compressed data has a smaller data amount than the non-compressed data, the area block includes a part where the compressed data is stored and a part which is a free area. When storing the next divided data, the data is not stored in the empty area of the previous area block but stored from the head of the next area block. Therefore, in the memory, when compressed data is stored, a portion where the compressed data is stored and a portion which is an empty area are alternately generated. Note that the map information may have a large data amount depending on the content of the map information. In the map information, it is assumed that the data area is divided corresponding to the area block of the memory. Corresponding to which area block data in the memory is read, it is made to know from which data area the map information should be read. As described above, the map information only needs to be information on the data amount, whether it is compression or non-compression, and the data amount of the map information can be reduced.

-When reading, the map information of the block including the area to be accessed is extracted from the map information holding function. The uncompressed area block retains all the data in the block as it is, and the compressed block is defined in the block (compressed when writing). Read function that reads only the data of the specified position) and the specified size and restores the original data from the compressed data.

The above lossless compression method uses a compression method that uses only the information in the divided data (the compression ratio is reduced by not using the information of adjacent data, but the random accessibility when reading after storage is excellent) .

-Prepare the following conditions (conditions for consuming no bandwidth from uncompressed for any access)
..A data block is composed of a plurality of minimum access units (hereinafter referred to as units) of a memory to be controlled by the memory controller (this is a bit width × minimum burst length. For example, in a 16-bit DDR2-SDRAM 16 × 4 = 64bit).
A single read / write request to this memory controller is an access to one or more area blocks, and an access to each area block is an access to one or more units. When the data stored in all units is uncompressed, the minimum value in all access requests for the number of units accessed by accessing the area block is m (here, the size of one block is constant) The minimum value m is the number of units of the smallest block.If the number of units constituting one block is constant, the minimum value m is described. If the number of units in a block is m) and the number of bits in a unit is n bits, the compression result of the block is m × n bits or less (the data size at the time of non-compression). This meaning is as follows. The unit of the read / write request is called a unit, and the number of units when reading data in the area block in the case of no compression is m, and the number of bits of the unit is n bits. Then, the amount of area data in the case of no compression is m × n bits. When the amount of compressed data is mxn bits or less, it means that the compressed data is smaller in data amount than in the case of no compression. Since m and n are determined at the time of designing the memory controller, m × n bits is an amount that can be understood in advance. Accordingly, when the compression result is smaller than m × n bits that can be understood in advance, the data amount can be reduced, and the data of the compression result is stored in the memory. Satisfying this condition has the effect of ensuring that the bandwidth for accessing the memory never increases.

  According to the above configuration, it is possible to select either lossless compression or non-compression for each block of data to be stored. That is, it is possible to provide a memory controller that performs compression with reversibility and reduces the memory bandwidth. Further, the management information (map information) required other than the main data uses only one lossless compression method, and when the compressed data size information is not used, the compressed data size is constant. Therefore, it is not necessary to have information on the data size, and it becomes 1 bit indicating whether compression or non-compression. Therefore, the amount of data required for one picture is equal to the number of blocks in one picture. This is smaller than the additional information (pointer table) required in the prior art.

  Further, at the time of compression, the data amount of each block occupying the memory in any case is equal to or less than that at the time of non-compression, so that the memory usage amount can be kept lower than the uncompressed state in any data and access.

  In addition, since each block of the divided data is compressed without using information of other blocks, there is no need to access other blocks when accessing one block. Can access any position in the image.

  Further, whenever a block of data is uncompressed, access to k units constituting one block occurs. Further, when compressed, access is made to k or less units (whether access to fewer than k units is possible depends on the compression method or the usage of map information). In other words, since any data and access has a smaller amount of data than when uncompressed, the amount of data transferred during access is reduced, and the memory bandwidth can be kept lower than in the uncompressed state.

  FIG. 1 is a block diagram showing a memory controller according to the present embodiment. FIG. 2 is a processing flow of one write request by the write control unit, and FIG. 3 is a processing flow of one read request by the read control unit.

  In this embodiment, the number of units in the block of divided data is compressed to a unit smaller than the number of units in the original block, and when the block data is compressed, it is always recorded from the head unit in the block. .

  In addition, the map information is placed in an independent memory (map information memory) in the memory controller, but the area targeted for “compression for each block” is a part of the memory to be controlled by the memory controller, It is also possible to place the map information itself on the memory.

  Further, as map information, in this embodiment, the number of units after compression is also held in addition to the compression and non-compression information, but only the compression and non-compression information is held to reduce the map information. Is also possible.

  In this embodiment, the lossless compression method used is not defined. Any reversible compression method can be used as long as it is reversible and compression is performed without referring to data other than its own block.

  In FIG. 1, data input from another processing block of the LSI is sent to the memory via the writing unit 11 of the memory controller 10. In the writing unit 11, the input data is compressed in the compression processing unit 13. Uncompressed data and compressed data are input to the selector 14. Information indicating how much data amount has been obtained as a result of compression by the compression processing unit 13 is input to the write control unit 15. When the amount of data decreases as a result of compression, the write control unit 15 instructs the selector 14 to output the compressed data from the selector 14 and sends it to the memory. If the amount of data does not decrease as a result of compression, uncompressed data is output from the selector 14 and sent to the memory. An instruction for the amount of data (number of units) is transmitted by a write control signal output from the write control unit 15 to the memory. The write control unit 15 stores the data size, information on whether the data is compressed data or non-compressed data, and the like in the map information memory 19.

  When data is read from the memory, the data is read via the reading unit 12 of the memory controller 10. The reading unit 12 reads the data amount and the like from the map information memory, and performs reading by designating the head address and the data amount (number of units) of the data to be read by a read control signal. Then, the data read from the memory is expanded by the expansion processing unit 17. The expanded data and the read data are input to the selector 18. The read control unit 16 acquires data indicating whether the read data is compressed or uncompressed from the map information memory. If the read data is compressed, the selector 18 outputs the decompressed data. If the read data is non-compressed data, non-decompressed data is output from the selector 18. The data output from the selector 18 is sent to other processing blocks in the LSI.

  In the map information memory, a map information storage area is predetermined for each area block, and only the data amount and the compressed / uncompressed information are stored in the corresponding storage area. In such a case, there is a one-to-one correspondence between which area of the map information memory the map information is read and which area block of the memory is accessed. Then, the start address of the area block of the memory is made known from the area of the map information memory.

  In the write request process of FIG. 2, the process target data is divided into blocks in step S10. Here, the block size is assumed to be an integral multiple of a unit which is a unit for accessing the memory. The loop of step S11 is repeated until the processing is completed for all blocks. In step S12, it is determined whether the block can be compressed, that is, whether the data amount is reduced by the compression process. If the determination in step S12 is yes, in step S13, the block compression result is stored in the memory from the head unit in the block. The address of the memory to which the head unit of the block is written is the head address of an area obtained by dividing the memory storage area so that it can be stored when the block is uncompressed. In step S14, a bit indicating that the data is compressed (for example, 1 is compressed and 0 is uncompressed) and the number of units after compression are written in the area for the written block in the map information memory. Here, the bit of the map information memory, for example, 01 is compressed to 1 unit, 10 is compressed to 1 unit, and 00 is uncompressed, so that the number of units after compression and non-compression Can be expressed together.

  If the determination in step S12 is No, in step S15, the block of uncompressed data is written in all areas of the area block that is a divided area of the memory. In step S16, 0 (bit indicating non-compression) is written in the area for the written block in the map information memory.

  In the read request process of FIG. 3, in step S20, the position of the area block corresponding to the data to be read is acquired. Then, the loop of step S21 is repeated until all the area blocks have been processed. In step S22, it is determined whether or not the value of the bit corresponding to the area of the block to be read in the map information memory is 1, that is, whether or not the data of the area block is compressed. If the determination in step S22 is Yes, the number of units after compression is read from the map information memory in step S23. Here, the bit of the map information memory, for example, 01 is compressed to 1 unit, 10 is compressed to 2 units, and 00 is uncompressed. In step S24, the compression results are sequentially read from the head unit of the area block by the number of units after compression. This is controlled by a read control signal from the read control unit. In step S25, the compression result is expanded and the block information is reproduced. If the determination in step S22 is No, in step S26, uncompressed data is read from all areas of the memory area block.

FIG. 4 is a diagram showing an example in which the memory controller according to the present embodiment is applied as a memory controller of an H.264 decoder.
The basic configuration does not change even when applied to other moving image coding systems, encoders, or three-dimensional graphics drawing circuits.

4, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.
The moving image decoding unit 22 writes data obtained by decoding the moving image to the SDRAM 21 via the writing unit 11 of the memory controller 10, and reads a reference image necessary for moving image decoding from the SDRAM 21 via the reading unit 12. Or Further, the output of the reading unit 12 may be sent to the image output unit 23 to be an output image.

  The map information management unit 20 includes a writing map information memory, a reference map information memory, and an output map information memory. The write map information memory writes the data amount of data to be written into the frame memory and information indicating whether the data is compressed data or non-compressed data into the map information of the SDRAM 21. In some cases, only some map information of the written data is stored and transferred to the output map information memory or the reference map information memory. The reference map information memory specifies image data to be referred to in the moving picture decoding, and the data amount or the data in which the data is compressed from the map information of the corresponding block received from the SDRAM 21 or the map information memory for writing. Acquires information indicating whether the data is uncompressed or uncompressed. The output map information memory specifies data for obtaining an output image, and information indicating whether the data is compressed data or non-compressed data from the map information received from the SDRAM 21 or from the write map information memory. To get. In encoders and decoders corresponding to moving picture coding systems such as H.264 and MPEG-2, the data written in the frame memory is not always used for reference and display immediately afterwards, so the writing map information memory is a buffer. The contents of the memory are discarded after being written in the SDRAM 21. On the other hand, in the 3D graphics drawing circuit, since the written data is used immediately after display and in some cases for reference, the contents of the writing map information are the output map information memory and, if necessary, the reference map information memory. Passed to. Further, it may be implemented as a cache memory having two functions of a write map information memory and a reference map information memory, or a cache memory having three memory functions. The reference map information memory and the output map information memory pass the data amount (number of units) obtained by referring to the map information and information indicating whether the data is compressed data or non-compressed data to the read control unit 16. It is.

  In FIG. 4, the area to be subjected to “compression for each block” according to the present embodiment is a part of the SDRAM 21 to be controlled by the memory controller (the side on which the frame memory below the dotted line is placed), and the map Information itself is placed on the SDRAM 21. In this case, since the map information is sufficiently smaller than the decoding result image data to be compressed, the map information of the corresponding part is not exchanged with the SDRAM 21 for each request, but is collected into a certain amount of data. It is desirable to communicate. This requirement can be realized as follows.

  In the decoder / encoder function, the generation and reference of map information at the time of decoding result writing and image output is performed in a regular order from the top of the screen. Therefore, map information is generated and referenced while being buffered by a small-capacity writing map information memory and output map information memory.

On the other hand, since the image reference access and 3D graphics drawing in the decoder / encoder function have random accessibility, the following method can be considered as a method of extracting map information to be used from the SDRAM.
1. When the number of reference images is fixed to a relatively small number by an MPEG-2, VC-1, etc. or H.264 encoder, etc., it is a reference for holding map information of all blocks of that number of images. It has a map information memory, and the contents of this reference map information memory are rewritten every one picture process.
2. If there are many images that can be used as reference images by an H.264 decoder or the like, and if the amount of memory increases when map information for the number of all images is stored, there is a high possibility that reference will be made every time one picture is processed. Only the map information of the (small) image is extracted, and the other is extracted from the SDRAM for each image reference request.
3. In H.264, it is possible to switch the reference index list during one picture processing. Therefore, the processing of the contents of the reference map information memory described in 1 and 2 is performed for each slice processing.
4). If the horizontal size of the vector is limited by the standard, encoder specification, or operation rule, the map information capacity held in 1 and 2 is the map information of the block that can be referred to from the currently processed macroblock. Any size can be used as long as it can be held. In this case, the map information of the block that can be newly referred to every macro block line processing is taken out from the SDRAM and overwritten at the place where the map information of the block that cannot be referred to is placed.
5). In 3D graphics drawing, since the access target is the entire drawing area, there is a map area that holds the map information of all blocks in the drawing area, or the map information of all the drawing areas is held in the SDRAM, and the map in the SDRAM The area holds only a part of the drawing area as a cache.

  In order to implement these methods, the map information management unit 20 manages map information corresponding to the same number of pictures as the number of frame memories placed on the SDRAM. For this management, in the decoder / encoder function, information on which picture in the frame memory each of the image currently being processed by the moving image decoding unit, the image to be referred to, and the image being output by the output unit is. Need. This information is given from the moving picture decoding unit. In the three-dimensional graphics drawing process, all the processing is for the frame being drawn, and therefore information for distinguishing the frames is not necessary.

5 to 7 are diagrams for explaining the operation of the writing process and the reading process according to the present embodiment.
FIG. 6 is a diagram for explaining the writing process, and FIG. 7 is a diagram for explaining the reading process. As shown in FIG. 5, in FIGS. 6 and 7, it is assumed that a box surrounded by a dotted line is a unit, and one unit is composed of n bits unique to memory access. A solid line box indicates a block, and here, it is assumed that the unit is composed of four units. In addition, the area indicated by the slanting line at the lower right indicates the compressed data, and the area indicated by the crossing oblique line indicates the non-compressed data.

6 and 7 and the following description, it is assumed that the following holds.
-For any request, access to at least two units in one block occurs in an uncompressed state (m = 2). In the uncompressed state, one block is composed of four units.
・ All the compressed data is within 2 units.

  When the data for 4 units in the uncompressed state becomes 2 units or less as a result of compression, the amount of data is less than half, so the data transfer required for reading 1 block of data The amount is reduced and the memory bandwidth is reduced.

  FIG. 6 shows how one write request is processed and how the memory contents are rewritten by the writing unit. Similarly, FIG. 7 shows a state of processing one read request by the reading unit.

The write request process in FIG. 6 will be described.
A thick frame in (1) indicates a unit area that is rewritten when all the requests are written without compression.
(2) In the upper leftmost block, the block is compressed, and the compressed data is written in the area of 2 units from the beginning.
(3) Next, uncompressed data is written to all units in the upper middle block.
(4) In the upper right block, the block is compressed, and the compressed data is written in an area of one unit from the top.
(5) Similarly, the writing process is performed on the remaining blocks.

  As described above, the area block that is the writing area of the memory is obtained by dividing the storage area of the memory so that the data can be divided and stored when the data is not compressed. When the block into which the data is divided is compressed, it is stored from the head of the corresponding area block, and only the compressed data is written into the area block. Since the block is compressed data, even if it is stored in the area block, the entire area is not occupied, and a part where data is stored and a part which is a free area are generated. When the next block is stored, it is stored from the head address of the next area block regardless of whether the block is compressed or not.

The read request process in FIG. 7 will be described.
A thick frame in (1) indicates a unit area to be read when all data read by this request is uncompressed.
(2) In the upper left block in the thick frame of (1), it is known from the map information that there is no compression, and only necessary units a and b are read out.
(3) Next, it can be seen that the upper right block in the thick frame in (1) is a block compressed to one unit from the map information. Therefore, the data of the unit c is read and expanded, and only the data corresponding to the units c-1 and c-2 necessary for this read request is taken out from the data.
As for (4) and (5), similarly to (1) and (2), read processing is performed for each block.

That is, in (4), since the block at the lower left in the thick frame shows that the data is compressed into 2 units from the map information, the data corresponding to the units d and e are taken out after being expanded.
In (5), since the block at the lower left in the thick frame indicates that the data is uncompressed from the map information, the units f and g are directly read out.

With the above operation, all the data within the thick frame subject to the read request is read.
Writing and reading are performed as described above.

8 to 10 are diagrams for explaining the data structure of the map information of the map information memory and SDRAM of the above embodiment. In FIG. 9, only the reference map information memory is shown, but the write map information memory and the output map information memory have the same configuration and are not particularly shown.
• One block is composed of 4 units. • In an uncompressed state, no access to one block can be less than 2 units.
-The compression result of the block is to fit in 2 units. (If it does not fit in 2 units, write in uncompressed)
This corresponds to the embodiment described above.

Data written to a block on the memory can take the following states.
Compressed into 1 unit that is compressed into 2 uncompressed units.

  Therefore, the map information corresponding to each block is composed of 2 bits that can express the above three states. In the case of FIG. 1, if there are n blocks on the memory, the data configuration in the map information memory is as shown in FIG.

  Data to be written in the memory is divided into blocks, and the memory area for storing this block is also divided into area blocks. In the map information memory, as shown in FIG. 8, the map information storage area is divided into blocks, and as many blocks of the map information storage area as the number n of area blocks on the memory are prepared. Depending on which area block on the memory the data has been written to or from which area block the data is read, which block information should be accessed is associated. The map information of one block is 2 bits, and indicates that, for example, 00 is uncompressed, 01 is compressed to 1 unit, and 10 is data compressed to 2 units.

  Next, the data structure of the map information memory and the operation of the map information management unit in the case of application to the H.264 decoder of FIG. 4 are shown below. Also in this example, it is assumed that one block is composed of 4 units, and in the uncompressed state, any access to one block does not become 2 units or less, and the compression result fits in 2 units.

  Assume that the frame memory on the SDRAM holds the number of images (hereinafter referred to as j) defined by the encoder / decoder operation. Further, it is assumed that one image is composed of n blocks. As described above, one block is 4 units, and one block of map information is 2 bits. Therefore, the map information for one image is n × 2 bit data composed of n pieces of map information.

  The map information memory for writing is a FIFO in which one entry is one block of map information (2 bits), and the amount of information sufficient to hold an amount of data that is considered efficient from the viewpoint of SDRAM access, x Suppose you are buffering map information for a block. This x is generally much smaller than n. Each time the encoding / decoding process proceeds in the map information memory for writing, the map information is accumulated in the FIFO and transferred to the SDRAM when a certain threshold value is exceeded.

  Similarly, it is assumed that the map information memory for image output is a FIFO in which one entry is one block of map information, and y pieces of map information are buffered. This y is also generally much smaller than n.

The reference map information memory holds map information corresponding to two reference images that are particularly likely to be referenced. Therefore, as shown in the following figure, a capacity of 2 × n × 2 bits sufficient to hold map information for two screens is held.
Since the map information on the SDRAM holds j pieces of map information held in the frame memory, it is j × n × 2 bits.

  As shown in FIG. 9, the map information includes reference image 1 map information and reference image 2 map information. Each map information divides one screen into blocks corresponding to the area blocks on the memory. In FIG. 9, one screen is divided into n blocks. Similarly, the reference image 2 map information is divided into n blocks. Each block of the map information corresponds to each area block on the memory, and which block of the map information should be accessed is specified according to which area block on the memory is accessed.

  This H. The H.264 decoder selects the two images most likely to be referenced in the image before starting the decoding process for one image, reads out these 2 × n × 2 bit information from the SDRAM, and reads the reference map. Write to information memory. Thereafter, the decoding process is started.

  The read control unit of the read unit of the memory controller tries to acquire necessary map information in response to a request from the moving image decoding unit. If the necessary map information exists in the reference map information memory (the image that the moving image decoding unit is to refer to was one of the two images of the map information read earlier), that data is used. . If it does not exist, necessary map information is read from the SDRAM and referenced.

  As shown in FIG. 10, the SDRAM holds j pieces of map information corresponding to j images stored in the frame memory. Here, map information for image bank j is provided from map information for image bank 1. Each map information is divided into the same number of blocks corresponding to how many area blocks the data in the memory of one screen is divided into. Here, the number of area blocks and map information blocks for one screen is n. Depending on which area block on the memory is accessed, which block of the map information should be accessed is specified.

  In the above embodiment, the case where the data amount after compression is 2 units or less has been described as the data amount being reduced. However, the present invention is not necessarily limited to this, and the data amount after compression can be reduced even by 1 bit. For example, the compressed data may be stored in the area block.

DESCRIPTION OF SYMBOLS 10 Memory controller 11 Write part 12 Read part 13 Compression process part 14, 18 Selector 15 Write control part 16 Read control part 17 Expansion | development process part 20 Map information management part 21 SDRAM
22 Video decoding unit 23 Image output unit

Claims (5)

In the memory controller that controls access to the memory,
A compression unit that divides input data into blocks and compresses them;
When the data amount of the compressed data block is smaller than that of the non-compressed case, the compressed data block is reduced. When the compressed data block is not reduced, the uncompressed data block is changed. A storage unit for storing in the memory from the start address of the storage area of the memory divided into each area block so that the block of uncompressed data can be stored;
A map information storage unit that separately stores map information including information indicating whether the data amount is compressed data or non-compressed data in a storage area corresponding to a block of data stored in the memory;
A memory controller comprising: A decompression unit for decompressing the block of data read from the memory;
If the block of data read from the memory with reference to the map information is compressed data, the data expanded by the expansion unit is used. If the block is uncompressed data, the read data is left as it is. An output section to select and output;
The memory controller according to claim 1, further comprising:   The memory controller according to claim 1, wherein the compression unit compresses a block of data using a reversible compression method that refers to only the block of data.   2. The memory controller according to claim 1, wherein the block of data has a size that is an integral multiple of a minimum access unit to the memory.   One read / write access request to the memory consists of access to one or more blocks of data, access to each block of data becomes access to one or more of the minimum access units, and all the minimum access units M is the minimum value in all access requests of the minimum number of access units accessed by accessing the block of data when the data stored in is uncompressed, and the number of bits of the minimum access unit 5. The memory controller according to claim 4, wherein when n is n bits, it is determined that the amount of data has been reduced by compression when the compression result of the block of data is not more than m × n bits.