JP2011009490A - Thin film transistor and method of manufacturing the same, and electro-optical device and electronic apparatus - Google Patents

Abstract

For example, when used in an electro-optical device such as a liquid crystal device, high-quality image display is achieved by effectively suppressing the occurrence of flicker in a display image.
A thin film transistor (30) has a source region (1s), a channel region (1c), a drain region (1d), a first LDD region (1sc), and a second LDD region (1cd) on a substrate (10). A semiconductor layer (1a) and a gate electrode (2a) disposed opposite to the channel region are provided. One of the first LDD region and the second LDD region has a stepwise change in the concentration of the doped impurity along the channel length direction of the semiconductor layer, and the other has a stepwise concentration in the doped impurity compared to the one. Does not change.
[Selection] Figure 6

Description

  The present invention relates to a switching thin film transistor (hereinafter referred to as a TFT as appropriate) arranged for each pixel on an element substrate in an electro-optical device such as a liquid crystal device, a manufacturing method thereof, and an electro-optical device including the thin film transistor. The present invention relates to an apparatus and an electronic device.

  A pixel switching TFT, which is an example of this type of thin film transistor, is used in an electro-optical device such as a direct-view display or a light valve. Thin film transistors used for such applications are required to suppress the occurrence of leakage current in order to improve the retention characteristics of the pixels.

  For example, Patent Documents 1 to 3 disclose techniques for reducing the occurrence of leakage current by providing LDD (Lightly doped drain) regions between a source region and a channel region, and between a channel region and a drain region. . In particular, Patent Document 1 discloses a technique for forming an LDD region by injecting impurities through a contact hole opened in an insulating film formed on a semiconductor layer. Patent Document 2 discloses a technique for reducing leakage current by forming a plurality of regions having different impurity concentrations between the divided channel regions. Patent Document 3 discloses a technique for forming LDD regions so that the concentration varies stepwise between the source region and the channel region, and between the channel region and the drain region.

JP 2003-115498 A JP 2000-286422 A JP 2002-353239 A

  However, in Patent Document 1, since the position of the LDD region is defined by the position of the contact hole opened in the insulating film, the design freedom of the thin film transistor is significantly limited. For this reason, there is a technical problem that it is difficult to perform a fine adjustment for reducing the leakage current. In Patent Document 2, it is necessary to divide the channel region and to form a plurality of impurity regions between the divided channel regions, so that the structure of the thin film transistor becomes very complicated. For this reason, adjustment for reducing the leakage current is also difficult, and the characteristic variation due to individual differences is increased. Therefore, when used for pixel switching that requires uniform quality, the display image is uneven. It will cause to occur. In Patent Document 3, it is necessary to change the impurity concentration in the LDD regions on both sides in a stepwise manner. For this reason, there exists a problem that a manufacturing process will become complicated.

  The present invention has been made in view of the above-described problems. For example, when used in an electro-optical device such as a liquid crystal device, the occurrence of flicker in a display image can be effectively suppressed, and a high-quality image can be obtained. It is an object to provide a thin film transistor capable of display, a manufacturing method thereof, and an electro-optical device and an electronic apparatus including the thin film transistor.

  In order to solve the above problems, a thin film transistor according to the present invention is a thin film transistor formed on a substrate, and includes a source region, a channel region, a drain region, a first LDD region formed between the source region and the channel region, And a semiconductor layer having a second LDD region formed between the channel region and the drain region, and a gate electrode disposed to face the channel region with a gate insulating film interposed therebetween, the first LDD region, In one of the second LDD regions, the concentration of the doped impurity is changed stepwise along the channel length direction of the semiconductor layer, and the concentration of the doped impurity in the other is compared with the one in the semiconductor layer. It does not change stepwise along the channel length direction.

  The thin film transistor according to the present invention is formed on a substrate and includes a semiconductor layer and a gate electrode. The substrate on which the thin film transistor is formed may be formed of a transparent material such as quartz or glass, or may be a non-transparent material such as silicon, and may be appropriately selected according to the use of the thin film transistor. .

  The semiconductor layer has a source region, a channel region, a drain region, a first LDD region, and a second LDD region. The first LDD region is disposed between the source region and the channel region, and the second LDD region is disposed between the channel region and the drain region. Each of these regions in the semiconductor layer can be formed by doping impurities such as ion implantation, for example. The first LDD region and the second LDD region are formed by doping impurities at a lower concentration than the source region and the drain region.

  The gate electrode is disposed so as to face the channel region with a gate insulating film interposed therebetween. The thin film transistor according to the present invention may be a top gate type in which the gate electrode is disposed on the upper layer side of the semiconductor layer with respect to the substrate surface, or a bottom gate in which the gate electrode is disposed on the lower layer side of the semiconductor layer. A mold may be used, and a double gate type may be used. When the thin film transistor is used as a pixel switching transistor of a liquid crystal device or the like, the gate electrode is electrically connected to the scanning line, for example, according to a scanning signal supplied to control on / off driving of the pixel electrode. Realize switching control of transistors. The gate electrode can be formed from a conductive material such as polysilicon.

  Particularly in the thin film transistor according to the present invention, one of the first LDD region and the second LDD region is formed so that the concentration of the doped impurity changes stepwise along the channel length direction of the semiconductor layer. The other of the first LDD region and the second LDD region is formed so that the concentration of the doped impurity does not change stepwise along the channel length direction of the semiconductor layer as compared to the one, but is distributed almost uniformly. . Even if it changes somewhat due to the diffusion effect, the distribution changes smoothly instead of stepwise.

  In an electro-optical device such as a liquid crystal device, it is formed on a pixel electrode formed on a substrate on which a thin film transistor is formed (hereinafter referred to as an element substrate as appropriate) and a substrate (hereinafter referred to as an opposite substrate as appropriate) disposed opposite the element substrate. By applying a predetermined potential difference corresponding to the image signal between the counter electrode and the counter electrode, the orientation state of the electro-optical material such as liquid crystal disposed so as to be sandwiched between the element substrate and the counter substrate is controlled, Realize image display. This predetermined potential difference is applied at a suitable timing in accordance with the on / off control of the thin film transistor. Here, when the thin film transistor is in an OFF state, it is optimal that the potential of the pixel electrode is kept constant. However, in reality, the potential of the pixel electrode changes due to generation of a leakage current of the thin film transistor.

  According to the research of the present inventor, the degree of ease of occurrence of this leakage current is determined when the potential of the pixel electrode is higher than the potential of the counter electrode (that is, in the case of the plus field) and when the potential of the pixel electrode is It has been found that there is a difference between the case where the potential is lower than the potential (ie, the case of the minus field). That is, if potentials having the same absolute value but different polarities are applied in the plus field and the minus field, the magnitudes of leak currents generated in the thin film transistors are different from each other. As described above, the occurrence of a leak current causes a change in the potential of the pixel electrode, and thus occurs depending on the voltage application condition between the pixel electrode and the counter electrode (that is, depending on whether the field is a plus field or a minus field). If the magnitude of the leak current changes, the potential of the pixel electrode becomes unstable, which causes the display image quality to deteriorate due to the occurrence of flicker.

  According to the research of the present inventor, it has been found that the magnitude of the leakage current can be adjusted by changing the impurity concentration in the first LDD region and the second LDD region. According to this study, it has been found that the magnitude of the leakage current in the plus field depends on the concentration of the impurity doped in the second LDD region. In particular, as the impurity concentration in the second LDD region is lowered, the magnitude of the leak current in the plus field is supposed to be reduced. On the other hand, it has been found that the magnitude of the leakage current in the minus field depends on the concentration of impurities doped in the first LDD region. Particularly, as the impurity concentration of the first LDD region is lowered, the magnitude of the leakage current in the minus field is supposed to be reduced.

  The thin film transistor according to the present invention is formed such that the impurity concentration changes stepwise in one of the first LDD region and the second LDD region so that the difference in leakage current between the plus field and the minus field is reduced. ing. For example, when the leak current in the plus field is too large, the leak current in the plus field can be adjusted to be low by additionally forming a region having a low impurity concentration in the second LDD region. That is, by forming a region having a low impurity concentration, the average concentration of impurities in the entire second LDD region is reduced, and the leakage current in the plus field is reduced, thereby reducing the difference from the leakage current in the minus field. Can do.

  On the other hand, when the leak current in the minus field is too small, the leak current in the minus field can be adjusted to be large by additionally forming a region having a high impurity concentration in the first LDD region. That is, by forming a region having a high impurity concentration in the first LDD region, the average impurity concentration in the entire first LDD region is increased, and the leakage current in the minus field is increased, so that the difference from the leakage current in the plus field is increased. Can be reduced.

  Here, “formed so as to change stepwise” means that a plurality of regions having different impurity concentrations exist. That is, it is sufficient that one of the first LDD region and the second LDD region is formed of a plurality of regions having different impurity concentrations so that the difference in leakage current between the plus field and the minus field is reduced. Meaning. It should be noted that the impurity concentration is not necessarily strictly different in the vicinity of the boundary between a plurality of regions having different impurity concentrations. For example, when these regions are formed in the semiconductor layer by impurity implantation such as an ion plantation method, the impurity implanted in the semiconductor layer diffuses not less than the periphery of the implanted portion. Therefore, in the vicinity of the boundaries between the plurality of regions, the concentration may change not a little continuously (that is, so as to have a concentration gradient).

  Conversely, “formed so as to change smoothly rather than stepwise” means that the impurity concentration is formed to continuously change with a predetermined concentration gradient. Strictly speaking, it is not necessary to change completely smoothly along the channel length direction, but it changes smoothly when compared with one.

  As described above, according to the thin film transistor of the present invention, the difference in leakage current between the plus field and the minus field can be reduced by gradually changing the impurity concentration in one of the first LDD region and the second LDD region. It becomes possible to reduce. As a result, when applied to an electro-optical device such as a liquid crystal device, the occurrence of flicker in the display image can be effectively suppressed, and high-quality image display becomes possible.

  In one aspect of the thin film transistor of the present invention, the average concentration of the impurity in the first LDD region is higher than the average concentration of the impurity in the second LDD region.

  According to this aspect, the impurity concentration in one of the first LDD region and the second LDD region is stepwise so that the average concentration of the impurity in the first LDD region is higher than the average concentration of the impurity in the second LDD region. It is formed to change. According to the research of the present inventor, for example, a thin film transistor used in an electro-optical device such as a liquid crystal device has a larger leakage current in the plus field than in the minus field. Therefore, by changing the concentration stepwise so that the impurity concentration increases in one region of the first LDD region, or by changing the concentration stepwise so that the impurity concentration decreases in one region of the second LDD region, By setting the average concentration of impurities in the 1LDD region to be higher than the average concentration of impurities in the second LDD region, the leakage current in the minus field can be increased (in other words, the impurity concentration in the second LDD region is increased). The leakage current in the plus field can be reduced by setting the average concentration of the first layer relatively low with respect to the first LDD region.

  As a result, the difference in leakage current between the plus field and the minus field can be reduced, and when applied to an electro-optical device such as a liquid crystal device, a thin film transistor capable of effectively suppressing the occurrence of flicker in a display image Can be realized.

  In another aspect of the thin film transistor of the present invention, the first LDD region has a length along the channel length direction of the semiconductor layer larger than that of the second LDD region.

  According to this aspect, the difference in leakage current between the plus field and the minus field can be reduced by forming the semiconductor layer of the first LDD region so that the length along the channel length direction is large. According to the research of the present inventor, as the length of the first LDD region becomes relatively larger than that of the second LDD region, the value of the leakage current in the minus field can be adjusted to be larger, and the difference from the leakage current in the plus field Can be reduced.

  As described above, in one of the first LDD region and the second LDD region, the difference in leakage current in the plus field and the minus field can be reduced by changing the impurity concentration stepwise. Nevertheless, when the difference in leak current is large, in this embodiment, the difference in leak current can be more suitably reduced by adjusting the length of the LDD region.

  In another aspect of the thin film transistor of the present invention, the thin film transistor includes a light shielding layer formed so as to at least partially surround the second LDD region.

  According to this aspect, the second LDD region is at least partially surrounded by the light shielding layer in order to prevent light irradiation to the second LDD region, which is one of the factors that increase the leakage current. As described above, since the leakage current in the plus field tends to be larger than the leakage current in the minus field, if the light shielding property of the second LDD region is not sufficient, the leakage current in each of the plus field and the minus field is not sufficient. There is a risk that the difference will widen. Therefore, in this aspect, the second LDD region is shielded by the light shielding layer, so that the difference between the leak currents in the plus field and the minus field can be reduced, and flicker in the display image can be effectively suppressed.

  Here, “formed so as to at least partially surround” means a light shielding layer having a certain shape to such an extent that a light shielding effect can be obtained so that irradiation light is reduced compared to a case where no light shielding measures are taken. Is sufficient, and does not require that the light shielding layer be formed so that the second LDD region is completely surrounded when viewed from all angles. In particular, when light is likely to enter from a specific direction, it is preferable to take a light shielding measure intensively, such as providing a light shielding film having a planar structure so as to face the direction.

  In order to solve the above-described problem, a method of manufacturing a thin film transistor (including various aspects thereof) of the present invention provides the impurity in the first region of the semiconductor layer excluding the source region and the drain region on the substrate. A second step of doping the impurity into a second region narrower than the first region, and a third step of doping the impurity into a third region narrower than the second region. .

  According to the present invention, the thin film transistor according to the above-described various aspects can be suitably formed.

  In order to solve the above problems, an electro-optical device according to the present invention includes the above-described thin film transistor (including various aspects thereof) according to the present invention, the substrate, and the other substrate disposed to face the substrate. And an electro-optic material sandwiched between the substrate and the other substrate.

  According to the electro-optical device of the present invention, for example, a pixel electrode formed on an element substrate which is a substrate on which a thin film transistor is formed, and a counter electrode formed on a counter substrate which is a substrate disposed to face the element substrate. By controlling the orientation state of the electro-optical material such as liquid crystal sealed so as to be sandwiched between the element substrate and the counter substrate by applying a predetermined potential difference between them, image display can be performed. Is possible. By providing the thin film transistor including the above-described various aspects on the element substrate, an electro-optical device capable of displaying a high-quality image with less flicker can be realized.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device capable of displaying a high-quality image, a television, a mobile phone, an electronic notebook, Various electronic devices such as a word processor, a viewfinder type or a monitor direct-view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  The effect | action and other gain of this invention are clarified from the form for implementing invention demonstrated below.

It is a top view which shows the whole structure of the liquid crystal device which concerns on 1st Embodiment. It is HH 'sectional drawing of FIG. It is a block diagram which shows the structure of the principal part of the liquid crystal device which concerns on 1st Embodiment. 3 is an equivalent circuit diagram of a plurality of pixel units of the liquid crystal device according to the first embodiment. FIG. FIG. 3 is a plan view of a plurality of adjacent pixel units in the liquid crystal device according to the first embodiment. It is AA 'sectional drawing of FIG. It is a schematic diagram showing the planar structure of the semiconductor layer in 1st Embodiment and a comparative example. It is a graph showing the electrical property of TFT in the plus field of 1st Embodiment and a comparative example. FIG. 3 is a cross-sectional view illustrating a driving circuit TFT of the liquid crystal device according to the first embodiment together with a pixel switching TFT. It is a schematic diagram showing the planar structure of the semiconductor layer in 2nd Embodiment and a comparative example. It is a graph showing the electrical property of TFT in the plus field of 2nd Embodiment and a comparative example. It is process sectional drawing which shows a series of manufacturing processes which manufacture TFT in the liquid crystal device which concerns on 1st Embodiment. It is process sectional drawing which shows a series of manufacturing processes which manufacture TFT in the liquid crystal device which concerns on 2nd Embodiment. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, a TFT active matrix driving liquid crystal device with a built-in driving circuit, which is an example of an electro-optical device including the thin film transistor of the present invention, is taken as an example.

<1. Liquid crystal device>
<1-1. First Embodiment>
First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the liquid crystal device according to the present embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the liquid crystal device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided around the image display region 10a. ing.

  In FIG. 1, a light-shielding frame light-shielding film 53 is provided on the counter substrate 20 side in parallel with the inside of the sealing material 52. A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing material 52 in the periphery of the image display region 10a. The sampling circuit 7 is provided inside the sealing material 52 along the one side so as to be covered with the frame light shielding film 53. Further, the scanning line driving circuit 104 is provided inside the sealing material 52 along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line drive circuits 104 provided on both sides of the image display region 10a in this way, the TFT array substrate 10 is covered with the frame light shielding film 53 along the remaining side. A plurality of wirings 105 are provided. On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are disposed at positions facing the four corner portions of the counter substrate 20. As a result, the TFT array substrate 10 and the counter substrate 20 can be electrically connected.

  On the TFT array substrate 10, a lead wiring 90 is formed for electrically connecting the external circuit connection terminal 102 to the data line driving circuit 101, the scanning line driving circuit 104, the vertical conduction terminal 106, and the like. .

  In FIG. 2, in the image display region 10a on the TFT array substrate 10, a laminated structure is formed in which wiring for TFTs for pixel switching, scanning lines, data lines, and the like is made. In addition, a laminated structure in which TFTs for driving circuits, routing wirings 90, and the like constituting the data line driving circuit 101, the scanning line driving circuit 104, and the sampling circuit 7 are formed around the image display area 10a. Is done.

  On the pixel electrode 9a formed on the TFT array substrate 10, an alignment film (not shown) is formed. On the other hand, a black matrix 23 made of a light shielding material is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. A counter electrode 21 made of a transparent material such as ITO is formed on the black matrix 23 so as to face the plurality of pixel electrodes 9a. An alignment film (not shown) is formed on the counter electrode 21. Further, the liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  Although not shown here, on the TFT array substrate 10, in addition to the data line driving circuit 101 and the scanning line driving circuit 104, the quality, defects, etc. of the liquid crystal device during manufacturing or at the time of shipment are displayed. An inspection circuit for inspection, an inspection pattern, or the like may be formed.

  Next, a main configuration of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 3 is a block diagram illustrating a configuration of a main part of the liquid crystal device according to the present embodiment.

  3, in the liquid crystal device according to the present embodiment, drive circuits such as a data line drive circuit 101, a scan line drive circuit 104, and a sampling circuit 7 are formed around the image display region 10a on the TFT array substrate 10. Has been.

  The scanning line driving circuit 104 is supplied with various control signals such as a Y clock signal (and an inverted Y clock signal) and a Y start pulse signal from an external circuit via the external circuit connection terminal 102. Based on these signals, the scanning line driving circuit 104 sequentially generates scanning signals G1,... Gm in this order and outputs them to the scanning line 3a. Further, the power supply VDDY and VSSY for driving the scanning line driving circuit 104 and various control signals are supplied to the scanning line driving circuit 104 via the external circuit connection terminal 102.

  The data line driving circuit 101 is supplied with an X clock signal and an X start pulse signal from an external circuit via the external circuit connection terminal 102. When the X start pulse is input, the data line driving circuit 101 sequentially generates and outputs sampling signals S1,..., Sn at a timing based on the X clock signal. The data line driving circuit 101 is supplied with power supplies VDDX and VSSX and various control signals for driving the data line driving circuit 101 via the external circuit connection terminal 102. The sampling circuit 7 includes a plurality of sampling switches 7s made of N-channel TFTs.

  In FIG. 3, the liquid crystal device according to the present embodiment is further provided with a plurality of pixel units 700 arranged in a matrix in an image display region 10 a occupying the center of the TFT array substrate 10.

  Here, the configuration of the pixel unit 700 of the liquid crystal device according to the present embodiment will be described with reference to FIG. 4 in addition to FIG. 3. FIG. 4 is an equivalent circuit diagram of various elements, wirings, and the like in the plurality of pixel units 700 of the liquid crystal device according to the present embodiment.

  Each of the plurality of pixel portions 700 is formed with a pixel electrode 9a and a TFT 30 for switching control of the pixel electrode 9a, and a data line 6a to which image signals VS1, VS2,. The TFT 30 is electrically connected to the source. The TFT 30 is an example of a TFT for pixel switching, that is, an example of a “thin film transistor” according to the present invention, and is configured as an N-type TFT.

  Further, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulse-sequential manner in this order at a predetermined timing. It is configured as follows. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal VS1, VS2,... Supplied from the data line 6a is closed by closing the TFT 30 as a switching element for a certain period. VSn is written at a predetermined timing.

  Image signals VS1, VS2,..., VSn written to the liquid crystal via the pixel electrode 9a are held for a certain period with the counter electrode 21 (see FIG. 2) formed on the counter substrate. . The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9 a and the counter electrode 21. The storage capacitor 70 is provided side by side with the scanning line 3a, and includes a capacitor line 300 including a fixed potential side capacitor electrode and a predetermined potential. By providing the storage capacitor 70 in this way, the charge retention characteristics of each pixel electrode 9a are improved. Note that the potential of the capacitor line 300 may be constantly fixed to one voltage value, or may be fixed while being swung to a plurality of voltage values at a predetermined period.

  In the liquid crystal device according to the present embodiment, the pixel unit 700 as described above is arranged in a matrix in the image display region 10a, so that active matrix driving is possible.

  As shown in FIG. 3, the image signal is supplied for each group to a set of six data lines 6a corresponding to each of the image signals VID1 to VID6 which are serially and parallelly developed in six phases. It is configured. Note that the number of phase development of the image signal (that is, the number of series of image signals that are serial-parallel-developed) is not limited to six phases, and may be, for example, a plurality of phases such as nine phases, twelve phases, and twenty-four phases. The developed image signal may be supplied to a set of data lines 6a in which the number corresponding to the number of development is set as one set. Alternatively, the data lines 6a may be supplied line-sequentially without being serial-parallel developed.

  Next, a specific configuration of the pixel portion of the liquid crystal device according to the present embodiment will be described with reference to FIGS. FIG. 5 is a plan view of a plurality of adjacent pixel units 700 in the liquid crystal device according to the present embodiment, and FIG. 6 is a cross-sectional view taken along line AA ′ of FIG. In FIG. 5, for the sake of convenience, illustration of some wirings and laminated structures is omitted as appropriate in order to clearly show the arrangement of the TFTs 30 in the pixel portion 700.

  As shown in FIG. 5, the pixel electrodes 9a are arranged in a matrix on the TFT array substrate 10 (the outline is indicated by a dotted line portion 9a ′), and are respectively along the vertical and horizontal boundaries of the pixel electrode 9a. A data line 6a and a scanning line 3a are provided. The data line 6a is made of, for example, a metal film such as an aluminum film or an alloy film, and the scanning line 3a is made of, for example, a conductive polysilicon film.

  The pixel switching TFT 30 is an example of a thin film transistor according to the present invention, and is arranged corresponding to the intersection of the TFT scanning line 3a and the data line 6a. The TFT 30 is arranged so that its channel length direction is along the Y direction, and is formed so as to overlap the data line 6 a when viewed in plan on the TFT array substrate 10. Since the data line 6a at least partially configures a non-opening region (that is, a region in the image display region 10a through which the light source light does not pass), the semiconductor layer is irradiated with light by arranging the TFT 30a in this way. As a result, an increase in leakage current can be suppressed.

  As shown in FIG. 6, the liquid crystal device according to this embodiment includes a transparent TFT array substrate 10 and a transparent counter substrate 20 disposed to face the TFT array substrate 10. The TFT array substrate 10 and the counter substrate 20 are each made of, for example, a glass substrate or a quartz substrate.

  On the TFT array substrate 10, a light shielding film 11a for at least partially defining a non-opening region is formed. The light shielding film 11a may be formed so as to function as a part of the scanning line 3a by being formed of a conductive non-transparent metal such as tungsten or aluminum.

  A base insulating film 12 is formed on the light shielding film 11a. The TFT 30 is formed on the base insulating film 12, and includes a gate electrode 3a disposed to face the semiconductor layer 1a via the semiconductor layer 1a and the gate insulating film 2a.

  Here, the planar structure of the semiconductor layer 1a of the TFT 30 will be described in detail with reference to FIG. FIG. 7 is a schematic diagram showing a planar structure of the semiconductor layer 1a of the TFT.

  As shown in FIG. 7A, the semiconductor layer 1a in this embodiment includes a source region 1s, a channel region 1c, a drain region 1d, a source side LDD region 1sc, and a drain side LDD region 1cd. Here, the source-side LDD region 1sc is an example of the “first LDD region” in the present invention, and is disposed so as to be sandwiched between the source region 1s and the channel region 1c. The drain-side LDD region 1cd is an example of the “second LDD region” in the present invention, and is disposed so as to be sandwiched between the channel region 1c and the drain region 1d. Each of these regions in the semiconductor layer 1a is formed by doping impurities into the semiconductor layer 1a, for example, by implanting impurities by an ion implantation method. In the present embodiment, for example, the source region 1s, the drain region 1d, the first LDD region, and the second LDD region have N-type impurity ions such as phosphorus (P) ions in the respective regions, and the channel region 1c has the channel region 1c. P-type impurity ions such as boron (B) ions are doped, and the TFT 30 is formed as an N-type TFT.

  Particularly in the present embodiment, the drain side LDD region 1cd is composed of a high concentration region 1cd1 and a low concentration region 1cd2 having different impurity concentrations. That is, the drain side LDD region 1cd is formed such that the impurity concentration changes stepwise along the channel length direction (that is, the Y direction) of the semiconductor layer 1a. On the other hand, in the source side LDD region 1sc, the impurity concentration does not change stepwise. Particularly in the present embodiment, the high concentration region 1cd1 of the drain side LDD region 1cd is formed to have the same impurity concentration as that of the source side LDD region 1sc. The low concentration region 1cd2 is set so that the impurity concentration is lower than that of the high concentration region 1cd1 and the source side LDD region 1sc.

  As described above, the drain side LDD region 1cd is composed of two regions having different concentrations (ie, the high concentration region 1cd1 and the low concentration region 1cd2), so that the drain side LDD region 1cd is the source as shown in FIG. Compared with the comparative example configured by a single region having the same impurity concentration as that of the side LDD region 1sc, the difference in leakage current between the plus field and the minus field can be reduced.

  Here, the characteristics of the TFT 30 will be described in detail with reference to FIG. FIG. 8 is a graph showing the electrical characteristics of the TFT. In FIG. 8, the horizontal axis represents the potential difference Vgs applied between the gate electrode 2a and the source region 1s, and the vertical axis represents the current value Ids flowing between the source region 1s and the drain region 1d. In FIG. 8, the vertical axis is logarithmic so that the Ids characteristics can be easily understood. FIG. 8A shows the characteristics of the TFT 30 according to this embodiment, and FIG. 8B shows a comparison in which the drain side LDD region 1cd is composed of a single region having the same impurity concentration as the source side LDD region 1sc. The characteristic of the TFT which concerns on an example is shown.

  In both FIGS. 8A and 8B, when Vgs is in the positive region (that is, when the TFT is in the on state), the value of Ids increases rapidly as Vgs increases. When Vgs is further increased, the rate of change of Ids with respect to Vgs decreases. On the other hand, when Vgs is in the negative region (that is, when the TFT is in the off state), even if Vgs is changed, there is almost no change compared to when Vgs is in the positive region. However, since the leak current is generated even when the TFT is in the OFF state as described above, Ids increases not less as Vgs decreases.

  Here, paying attention to the characteristics of the TFT 30 according to the present embodiment shown in FIG. 8A, the increase in Ids in the negative region is smaller than the characteristics of the TFT according to the comparative example shown in FIG. ing. That is, the TFT 30 according to the present embodiment has a characteristic that a leak current is less likely to occur than the TFT according to the comparative example.

  As described above, in this embodiment, the drain side LDD region 1cd is composed of two regions having different concentrations (that is, the high concentration region 1cd1 and the low concentration region 1cd2), thereby reducing the light leakage current in the plus field. Is possible. On the other hand, the light leakage current in the minus field mainly depends on the impurity concentration in the source-side LDD region 1cd, but as shown in FIGS. 7A and 7B, the source leaks between this embodiment and the comparative example. Since there is no difference in the impurity concentration of the side LDD region 1cd, a similar leakage current is generated in the minus field. Therefore, in the TFT 30 according to this embodiment, the difference in the leakage current between the plus field and the minus field is reduced as compared with the comparative example because the leakage current in the plus field is reduced. As a result, it is possible to effectively suppress the occurrence of flicker in the display image.

  In the present embodiment, the drain side LDD region 1cd is composed of a high concentration region 1cd1 and a low concentration region 1cd2, so that the impurity concentration is changed stepwise. However, when each region is formed by actually implanting an impurity into the semiconductor layer, the implanted impurity diffuses not a little inside the semiconductor layer, and therefore, as shown in FIGS. The boundary between the concentration region 1cd1 and the low concentration region 1cd2 may not be clearly defined.

  In the present embodiment, the drain side LDD region 1cd is composed of two regions of the high concentration region 1cd1 and the low concentration region 1cd2. However, as long as the impurity concentration changes stepwise, the drain side LDD region 1cd You may be comprised from the several area | region which has 3 or more different density | concentrations.

  As shown in FIGS. 6 and 7A, the source side LDD region 1sc of the semiconductor layer 1a in the present embodiment is formed to have a length in the Y direction larger than that of the drain side LDD region 1cd. ing. According to the research of the present inventor, it has been found that if the source side LDD region 1sc is designed to be long, the difference between the leak currents in the plus field and the minus field is reduced and flicker is improved. As described above, by forming the drain-side LDD region 1cd so that the concentration changes stepwise, the difference in magnitude of the leakage current between the plus field and the minus field can be reduced to some extent. As far as the researchers of the present application have done, there may still be cases where the difference in leakage current does not become sufficiently small. In such a case, in addition to stepwise changing the impurity concentration in the LDD region, the difference in the leakage current can be further suppressed by adjusting the length of the source side LDD region 1sc in the Y direction. It becomes. Conversely, the same effect can be obtained by adjusting the length of the drain side LDD region 1cd in the Y direction to be relatively short with respect to the source side LDD region 1sc.

  Referring back to FIGS. 5 and 6 again, on the TFT 30 as a pixel potential side capacitor electrode electrically connected to the drain region 1d of the TFT 30 and the pixel electrode 9a on the upper layer side via the first interlayer insulating film 41. A storage capacitor 70 is formed by disposing the relay layer 71 and a part of the capacitor line 300 serving as a fixed potential side capacitor electrode through the dielectric film 75. The capacitor line 300 includes, for example, at least one of refractory metals such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), and Mo (molybdenum). It consists of silicide, polysilicide, or a laminate of these. Alternatively, it can be formed from an Al (aluminum) film.

  The relay layer 71 is made of, for example, a conductive polysilicon film and functions as a pixel potential side capacitor electrode of the storage capacitor 70. However, the relay layer 71 may be composed of a single layer film or a multilayer film containing a metal or an alloy, like the capacitor line 300. The relay layer 71 has a function of relaying and connecting the pixel electrode 9a and the drain region 1d of the TFT 30 via the contact holes 83 and 85, in addition to the function as a pixel potential side capacitor electrode.

  A data line 6 a is formed on the storage capacitor 70 via the second interlayer insulating film 42. The data line 6a is electrically connected to the source region 1s of the semiconductor layer 1a through a contact hole 81 opened in the first interlayer insulating film 41 and the second interlayer insulating film.

  A pixel electrode 9 a is formed on the data line 6 a on the upper layer side with the third interlayer insulating film 43 interposed therebetween. The pixel electrode 9a is electrically connected to the drain region 1d of the semiconductor layer 1a by being connected to the relay layer 71 through the contact hole 85 opened in the second interlayer insulating film 42 and the third interlayer insulating film 43. It is connected. The pixel electrode 9a is formed of a transparent conductive film such as an ITO (Indium Tin Oxide) film, for example, and an alignment film 16 subjected to a predetermined alignment process such as a rubbing process is provided on the upper layer side. It has been. The alignment film 16 is made of a transparent organic film such as a polyimide film.

  On the other hand, a counter electrode 21 is provided over the entire surface of the counter substrate 20, and an alignment subjected to a predetermined alignment process such as a rubbing process is performed on the counter electrode 21 (the lower side in FIG. 6). A membrane 22 is provided. The counter electrode 21 is made of a transparent conductive film such as an ITO film, for example, like the pixel electrode 9a described above. The alignment film 22 is also made of a transparent organic film such as a polyimide film, for example, like the alignment film 16 described above.

  The liquid crystal layer 50 encapsulated so as to be sandwiched between the alignment films 16 and 22 formed on the TFT array substrate 10 and the counter substrate 20 respectively has the alignment film 16 and the liquid crystal layer 50 in a state where an electric field from the pixel electrode 9a is not applied. A predetermined alignment state is taken by 22 and the alignment state is appropriately changed by applying an electric field from the pixel electrode 9a.

  Next, the TFT 400 for the drive circuit of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 9 is a cross-sectional view of a driving circuit TFT 400 formed on the TFT array substrate 10 of the liquid crystal device according to the present embodiment. Compared with the pixel switching TFT 30 also formed on the TFT array substrate 10. FIG.

  As described above, driving circuits such as the data line driving circuit 101, the scanning line driving circuit 104, and the sampling circuit 7 are formed in the peripheral area located around the image display area 10a on the TFT array substrate 10 (see FIG. (See FIG. 3). These drive circuits are configured to include a TFT 400 for the drive circuit.

  The driving circuit TFT 400 includes a gate electrode 430, a semiconductor layer 410 made of a polysilicon film, and a gate insulating film 2 b that insulates the gate electrode 430 from the semiconductor layer 410. The semiconductor layer 410 includes a channel region 410c, a source region 410s, a drain region 410d, a source side LDD region 410sc, and a drain side LDD region 410cd.

  The semiconductor layer 410 of the driving circuit TFT 400 is formed as an N-type TFT by implanting N-type impurity ions such as phosphorus (P) ions, for example, in the same manner as the pixel switching TFT 30 described above. Yes. That is, the driving circuit TFT 400 described here is formed as a transistor having the same conductivity type as the pixel switching TFT 30.

  Further, a first interlayer insulating film 41 and a second interlayer insulating film 42 are formed on the gate electrode 430. A source electrode 450 s and a drain electrode 450 d are disposed on the second interlayer insulating film 42.

  The source electrode 450s is electrically connected to the source region 410s through a contact hole 491 that is opened through the first interlayer insulating film 41, the second interlayer insulating film 42, and the gate insulating film 2b. . The drain electrode 450d is electrically connected to the drain region 410d through a contact hole 492 opened through the first interlayer insulating film 41, the second interlayer insulating film 42, and the gate insulating film 2b. A third interlayer insulating film 43 is stacked on the source electrode 450s and the drain electrode 450d.

  In this embodiment, the pixel switching TFT 30 formed on the TFT array substrate 10 and the driving circuit TFT 400 described here are formed to have the same conductivity type. Even if transistors of the same conductivity type are used, the LDD concentration may be optimized in the drive circuit TFT and the pixel switching TFT respectively. However, if each optimized process is used, this process can be achieved without increasing the number of processes. Inventive stepwise LDD regions can be formed. The manufacturing process will be described in detail later.

  As described above, according to the liquid crystal device according to the present embodiment, the drain side LDD region 1cd of the semiconductor layer 1a is composed of the high concentration region 1cd1 and the low concentration region 1cd2 having different impurity concentrations. It is possible to reduce the difference in leakage current between the field and the minus field. As a result, the occurrence of flicker in the display image can be effectively suppressed, and a liquid crystal device capable of displaying a high-quality image can be realized.

<1-2. Second Embodiment>
Next, the liquid crystal device according to the second embodiment will be described with reference to FIGS. The second embodiment differs from the first embodiment in that the impurity concentration in the source-side LDD region 1sc is changed stepwise. That is, in the first embodiment, the example in which the impurity concentration in the drain side LDD region 1cd is changed stepwise has been described, but here, the impurity concentration in the source side LDD region 1sc is changed stepwise. Examples formed in the following will be described.

  Here, FIG. 10 is a schematic diagram showing a planar structure of the semiconductor layer 1a of the TFT according to this embodiment. As shown in FIG. 10A, the semiconductor layer 1a in this embodiment includes a source region 1s, a channel region 1c, a drain region 1d, a source-side LDD region 1sc, and a drain-side LDD region 1cd, as in the first embodiment. These regions are formed by doping N-type impurity ions such as phosphorus (P) ions and P-type impurity ions such as boron (B) ions.

  Particularly in the present embodiment, the source-side LDD region 1sc is composed of a high concentration region 1sc1 and a low concentration region 1sc2 having different impurity concentrations. That is, the source side LDD region sc is formed so that the impurity concentration changes stepwise along the channel length direction (that is, the Y direction) of the semiconductor layer 1a. On the other hand, in the drain side LDD region 1cd, the impurity concentration does not change stepwise. In the source side LDD region 1sc, the low concentration region 1sc2 is formed by implanting impurities at the same concentration as the drain side LDD region 1cd. In the high-concentration region 1sc1 of the source-side LDD region 1sc, impurities are implanted at a higher concentration than the low-concentration region 1sc2 and the drain-side LDD region 1cd, but the impurity concentration depends on the source region 1s and the drain region. It is set to be lower than 1d. Thus, the source-side LDD region 1sc is formed of two regions having different concentrations (that is, the high concentration region 1sc1 and the low concentration region 1sc2). In the present embodiment, as in the first embodiment, the average impurity concentration in the entire source-side LDD region 1sc is set to be higher than the average impurity concentration in the entire drain region 1cd.

  By setting the impurity concentration in the source-side LDD region 1sc and the drain-side LDD region 1cd in this way, the source-side LDD region 1sc is made to have the same impurity concentration as the drain-side LDD region 1cd as shown in FIG. Compared with the case of forming in one region, the difference in leak current between the plus field and the minus field can be reduced.

  Here, the characteristics of the TFT 30 in the minus field will be specifically described with reference to FIG. FIG. 11 is a graph showing the electrical characteristics of the TFT. In FIG. 11, the horizontal axis represents the potential difference Vgs between the gate electrode 2a and the source region 1s, and the vertical axis represents the current value Ids flowing through the source region 1s and the drain region 1d. In FIG. 11, the vertical axis indicates logarithm so that the characteristics of the current value Ids can be easily understood. FIG. 11A shows the characteristics of the TFT 30 according to the present embodiment, and FIG. 11B shows a comparison in which the source side LDD region 1sc is composed of a single region having the same impurity concentration as the drain side LDD region 1cd. The characteristic of the TFT which concerns on an example is shown. However, in order to see the holding characteristics of the minus field, the characteristics are measured by applying a voltage so that the source region 1s is positive (drain in terms of a transistor) and the drain region 1d is negative (source in terms of a transistor). Yes.

  In both FIGS. 11A and 11B, when Vgs is in the positive region (that is, when the TFT is in the on state), the value of Ids increases rapidly as Vgs increases. When Vgs is further increased, the rate of change of Ids with respect to Vgs decreases. On the other hand, when Vgs is in the negative region (that is, when the TFT is in the OFF state), even if Vgs is changed, there is almost no change compared to when Vgs is in the positive region. However, even when the TFT is in the off state as described above, Ids increases not less than a little as Vgs is decreased even when Vgs is in a negative region due to the generation of leakage current.

  Here, paying attention to the characteristics of the TFT 30 according to the present embodiment shown in FIG. 11A, the degree of increase in Ids in the negative region is larger than the characteristics of the TFT according to the comparative example shown in FIG. ing. That is, the TFT 30 according to this embodiment is more likely to generate a leakage current than the TFT according to the comparative example.

  As described above, in this embodiment, the source side LDD region 1sc is composed of two regions having different concentrations (that is, the high concentration region 1sc1 and the low concentration region 1sc2), thereby increasing the leakage current in the minus field. it can. On the other hand, the leakage current in the plus field mainly depends on the impurity concentration in the drain side LDD region 1cd, but as shown in FIGS. 10A and 10B, between this embodiment and the comparative example, the drain side Since there is no difference in the impurity concentration of the LDD region 1cd, the magnitude of the leakage current in the plus field is about the same. Therefore, in the TFT 30 according to the present embodiment, the difference in leakage current between the plus field and the minus field becomes smaller than the comparative example because the leakage current in the minus field increases. As a result, it is possible to effectively suppress the occurrence of flicker in the display image.

  Also in the present embodiment, as in the first embodiment, the boundary between the high concentration region 1sc1 and the low concentration region 1sc2 may not be clearly defined. In the present embodiment, the source side LDD region 1sc is composed of two regions of the high concentration region 1sc1 and the low concentration region 1sc2. However, as long as the impurity concentration changes stepwise, the source side LDD region 1sc You may be comprised from the several area | region which has 3 or more different density | concentrations. Further, in addition to gradually changing the impurity concentration in the LDD region, the difference in leakage current can be suppressed by adjusting the lengths in the Y direction of the source side LDD region 1sc and the drain side LDD region 1cd. Good.

  As described above, according to the liquid crystal device according to the present embodiment, the source-side LDD region 1sc in the semiconductor layer 1a is formed by the high-concentration region 1sc1 and the low-concentration region 1sc2 having different impurity concentrations. It is possible to reduce the difference in leakage current between the field and the minus field. As a result, the occurrence of flicker in the display image can be effectively suppressed, and a liquid crystal device capable of displaying a high-quality image can be realized.

<2. Manufacturing method>
Next, a manufacturing method of the liquid crystal device according to this embodiment described above will be described with reference to FIGS. 12 and 13 are process cross-sectional views showing a series of manufacturing steps for manufacturing TFTs 30 and 400 on a substrate in the liquid crystal devices according to the first and second embodiments described above, respectively.

  First, a manufacturing method of the TFTs 30 and 400 in the liquid crystal device according to the first embodiment will be described with reference to FIG.

  As shown in FIG. 12A, a TFT array substrate 10 made of, for example, a quartz substrate or a glass substrate is prepared. Here, annealing is preferably performed in an inert gas atmosphere such as N 2 (nitrogen) and at a high temperature of about 850 to 1300 ° C., and pre-processing is performed so as to reduce distortion generated in the TFT array substrate 10 in a high-temperature process performed later. Keep it. On the TFT array substrate 10, a light shielding film having a thickness of about 100 to 500 nm is formed by sputtering a metal alloy film such as a metal such as Ti, Cr, W, Ta, Mo and Pb or a metal silicide, and then etching. Then, patterning is performed to form a light shielding film 11a, and a base insulating film 12 is formed on the entire surface of the TFT array substrate 10.

  Next, as shown in FIG. 12B, a polysilicon film is formed on the base insulating layer 12 by solid phase growth of amorphous silicon formed by a low pressure CVD method or the like or a low pressure CVD method. Subsequently, the polysilicon film is subjected to, for example, a photolithography method and an etching process, thereby forming semiconductor layers 1a and 410 having a predetermined pattern in the image display region 10a and the surrounding peripheral region, respectively. On the semiconductor layers 1a and 410, gate electrodes 3a and 430 are formed via gate insulating films 2a and 2b, respectively.

  Subsequently, as shown in FIGS. 12C to 12E, N-type impurities such as phosphorus (P) ions, for example, with respect to the semiconductor layers 1a and 410 as indicated by a downward arrow N− in the figure. Ions are implanted in multiple stages.

  First, as shown in FIG. 12C, the semiconductor excluding the region corresponding to the low concentration region 1cd1 in the channel region 1c and the drain side LDD region 1cd, and the semiconductor excluding the region corresponding to the channel region 410c. A resist film 500 is formed over the layer 410a. Then, N-type impurities such as phosphorus (P) ions are doped from above the semiconductor layers 1a and 410.

  Next, as shown in FIG. 12 (d), after removing the resist film 500, impurities are further doped from above the semiconductor layers 1 a and 410. At this time, since the gate electrodes 3a and 430 are formed on the regions corresponding to the channel regions 1c and 410c, impurities are not doped in these regions.

  Subsequently, as shown in FIG. 12E, a resist film 510 is formed on the semiconductor layer 1a excluding the source region 1s and the drain region 1d and on the semiconductor layer 410 excluding the source region 410s and the drain region 410d. Then, impurities are further doped from above into the source region 1 s and drain region 1 d of the semiconductor layer 1 a and the source region and drain region of the semiconductor layer 410.

  As a result, the drain side LDD region 1cd includes the high concentration region 1cd1 and the low concentration region 1cd2, and is formed so that the impurity concentration changes stepwise. In this manner, the TFT 30 and the driving circuit TFT 400 in the first embodiment can be formed.

  Note that the stepwise change in the impurity concentration may be smoothed somewhat after the annealing process or the heat treatment process after the impurity doping. However, even in that case, in the drain side LDD region 1cd after completion, an impurity concentration that clearly changes in a step as compared with the source side LDD region 1sc is observed. In other words, in the source side LDD region 1sc after completion, an impurity concentration that is clearly and continuously changed as compared with the drain side LDD region 1cd is observed.

  Next, a manufacturing method of the TFTs 30 and 400 in the liquid crystal device according to the second embodiment will be described with reference to FIG. As in the case of FIG. 12, the light shielding film 11a and the base insulating film 12 are formed on the TFT array substrate 10, and the TFTs 30 and 400 are formed thereon. When the liquid crystal device according to the second embodiment is manufactured, as shown in FIGS. 13A to 13C, the semiconductor layers 1a and 410 are, for example, phosphorous as shown by a downward arrow N− in the drawing. (P) N-type impurity ions such as ions are implanted in a plurality of stages.

  First, as shown in FIG. 13A, a resist film 520 is formed on the semiconductor layer 1a in regions corresponding to the channel region 1c, the source side LDD region 1sc, and the drain side LDD region 1cd. Then, N-type impurities such as phosphorus (P) ions are doped from above the semiconductor layers 1a and 410.

  Next, as shown in FIG. 13B, after removing the resist film 520, impurities are further doped from above the semiconductor layers 1 a and 410. At this time, since the gate electrodes 3a and 430 are formed on the regions corresponding to the channel regions 1c and 410c, impurities are not doped in these regions.

  Subsequently, as shown in FIG. 13C, the semiconductor excluding the high concentration region 1sc1 and the drain region 1d in the source region 1s and the source side LDD region 1sc, and the semiconductor excluding the source region 410s and the drain region 410d. A resist film 530 is formed over the layer 410. Then, impurities are further doped from above into the source region 1 s and drain region 1 d of the semiconductor layer 1 a and the source region and drain region of the semiconductor layer 410.

  As a result, the source-side LDD region 1sc includes the high concentration region 1sc1 and the low concentration region 1sc2, and is formed so that the impurity concentration changes stepwise. In this manner, the TFT 30 and the driving circuit TFT 400 in the second embodiment can be formed.

  As described above, when the LDD concentrations of the pixel switching TFT 30 and the driving circuit TFT 400 are different from each other on the TFT array substrate 10, the number of processes is not increased as compared with the prior art. It can be manufactured. That is, since each region can be formed by the resist pattern in each step, it is not necessary to change the manufacturing process. As a result, it is possible to contribute to the improvement of the yield and display characteristics by the same manufacturing flow as the number of processes.

<3. Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. Hereinafter, a projector using a liquid crystal device as a light valve will be described. FIG. 14 is a plan view showing a configuration example of the projector.

  As shown in FIG. 14, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R, 1110B.

  Since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 14, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, and an electronic notebook , Calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal device described in the above embodiment, the present invention also includes a reflective liquid crystal device (LCOS) in which elements are formed on a silicon substrate, a plasma display (PDP), a field emission display (FED, SED), The present invention can also be applied to an organic EL display, a digital micromirror device (DMD), an electrophoresis apparatus, and the like.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification. The manufacturing method, the electro-optical device, the manufacturing method thereof, and the electronic apparatus including the electro-optical device are also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 1a ... Semiconductor layer, 1a '... Channel region, 1s ... Source region, 1d ... Drain region, 1sc ... Source side LDD region, 1cd ... Drain side LDD region, 2a, 2b ... Gate insulating film, 3a ... Scan line, 6a ... Data line, 7 ... Sampling circuit, 9a ... Pixel electrode, 10 ... TFT array substrate, 10a ... Image display area, 11a ... Light-shielding film, 20 ... Counter substrate, 21 ... Counter electrode, 30 ... TFT, 41, 42, 43 ... Interlayer insulating film, 50 ... Liquid crystal layer, 101 ... Data line driving circuit, 102 ... External circuit connection terminal, 104 ... Scanning line driving circuit, 400 ... TFT, 410 ... Semiconductor layer, 410c ... Channel region, 410s ... Source region, 410d ... Drain region

Claims (7)

A thin film transistor formed on a substrate,
A semiconductor layer having a source region, a channel region, a drain region, a first LDD region formed between the source region and the channel region, and a second LDD region formed between the channel region and the drain region;
A gate electrode disposed to face the channel region with a gate insulating film interposed therebetween,
The concentration of the doped impurity in one of the first LDD region and the second LDD region changes stepwise along the channel length direction of the semiconductor layer, and the concentration of the doped impurity in the other is higher than that of the one. A thin film transistor which does not change stepwise along a channel length direction of the semiconductor layer.   2. The thin film transistor according to claim 1, wherein an average concentration of the impurity in the first LDD region is higher than an average concentration of the impurity in the second LDD region.   3. The thin film transistor according to claim 1, wherein the first LDD region has a length along the channel length direction of the semiconductor layer larger than that of the second LDD region.   4. The thin film transistor according to claim 1, further comprising a light shielding layer formed so as to at least partially surround the second LDD region. A method for producing a thin film transistor according to any one of claims 1 to 5,
On the substrate,
A first step of doping the impurity into a first region of the semiconductor layer excluding the source region and the drain region;
A second step of doping the impurity into a second region narrower than the first region;
And a third step of doping the impurity in a third region that is narrower than the second region. The thin film transistor according to any one of claims 1 to 4,
The substrate;
The other substrate disposed to face the substrate;
And an electro-optical material sandwiched between the substrate and the other substrate.   An electronic apparatus comprising the electro-optical device according to claim 6.

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