JP2011080911A - Frequency measurement device and electronic apparatus equipped with the frequency measurement device - Google Patents

Abstract

For example, a frequency measuring device with a reduced circuit scale is provided.
A frequency measurement device according to an aspect of the present invention includes a first count obtained by counting the number of changes in a first signal (measured signal) 61a included in a predetermined period determined based on a reference signal 40. A first counter unit (short gate counter unit) 20a that outputs a value 63a and a second count value 63d that counts the number of changes in the second signal (compensation signal) 80 included in the predetermined period are output. A second counter unit (short gate counter unit) 20d, and an arithmetic unit (subtractor) 50a that outputs a difference value 65a corresponding to the difference between the first count value 63a and the second count value 63d, A low-pass filter 30a that removes a high-frequency component contained in the difference value 65a, and the difference value 65a includes a bit width that can represent the first count value 63a and the second count value. 3d consists of smaller bit width than representable bit width.
[Selection] Figure 16

Description

The present invention relates to frequency measurement, and more particularly to a measurement method and apparatus capable of detecting slight frequency changes.

  The frequency measurement method includes a direct counting method (see, for example, Patent Document 1) that counts pulses that pass within a predetermined gate time (gate time), and a pulse period that is accurately measured and the frequency is calculated from the reciprocal of that time. A desired reciprocal system (see, for example, Patent Document 2) is known. Although the above direct count method can be realized with a relatively small circuit, it is necessary to take a long gate time in order to increase the frequency resolution (for example, a gate time necessary to obtain a resolution of 0.1 Hz). Is 10 seconds). In addition, the reciprocal method can overcome this drawback, but the circuit for accurately measuring the pulse interval becomes larger than the direct count method.

JP 2001-119291 A JP-A-5-172861

  By the way, by using a QCM (Quartz Crystal Microbalance) method using a crystal resonator, a minute mass change on the surface of the resonator substrate can be converted into a frequency change. For example, various odor sensors can be formed by providing a material to which the odor component adheres on the surface of the vibrator substrate. The odor component is composed of a single substance or a plurality of substances. When the sample gas is applied to the odor sensor to attach an odor component and the mass of the vibrator surface is changed, the frequency changes. Estimating the presence of a specific odor component by preparing one or a plurality of types of sensors and observing this change. There are about 350 types of olfactory cells in the human nose, and it is said that there are about 1000 types in the case of the dog's nose, and the brain recognizes the pattern of the proportion of odorous components attached to each olfactory cell. Identifying odors. When learning from the olfactory sense of living organisms, in order to detect and identify odor components, it is necessary to use numerous odor sensors (sensor arrays) and analyze the output patterns of each sensor with a computer to identify the odor component patterns. is necessary.

  Here, in order to detect the frequency change of each odor sensor, a counter and a signal processing circuit for detecting the frequency change must be provided at the output of each sensor. Furthermore, even if the frequency (for example, 30 MHz) of the crystal resonator changes depending on the adhered substance, the change is only about several Hz to several hundred Hz, and may be a change of 1 Hz or less. As described above, in the direct count method, the frequency resolution is low, and it is necessary to take a considerably long gate time in order to increase the frequency resolution. In addition to the plus / minus 1 count error and the error due to the fluctuation of the trigger level, the error due to the oscillation stability of the crystal resonator is superimposed when the gate time is increased. . Such a drawback can be compensated for by using a reciprocal counter, but the circuit of one counter is large, so that it is not suitable for a sensor array having a large number of sensors.

  Therefore, an object of one embodiment of the present invention is to provide a frequency change measurement method and measurement apparatus with improved frequency measurement resolution without using a complicated circuit, and in particular, frequency measurement capable of reducing the circuit scale. Provide devices etc.

  In order to solve such a problem, the frequency measurement device of one embodiment of the present invention outputs a first count value obtained by counting the number of changes of the first signal included in a predetermined period determined based on the reference signal. A second counter unit that outputs a second count value obtained by counting the number of changes in the second signal included in the predetermined period, the first count value, and the second count value. An arithmetic unit that outputs a difference value corresponding to the difference between the first count value and a low-pass filter that removes a high-frequency component included in the difference value, wherein the difference value can represent the first count value And a bit width smaller than a bit width capable of expressing the second count value.

  According to such a configuration, the difference value is configured with a bit width that can represent the first count value and a bit width that is smaller than the bit width that can represent the second count value. Can be reduced. As a result, the circuit scale of the frequency measuring device can be reduced.

  Moreover, it is preferable that the said difference value is comprised by the bit width which can represent the said difference decided beforehand.

  According to the frequency measuring apparatus having the above configuration, the circuit scale of the frequency measuring apparatus can be further reduced.

  The difference value is more preferably configured with a minimum bit width capable of expressing the predetermined difference. According to this, it becomes possible to further reduce the circuit scale of the frequency measuring device.

  The arithmetic unit further includes a first offset unit that outputs a value obtained by adding or subtracting a first value to the difference as the difference value, and the difference value is a predetermined variation of the difference. The bit width is preferably configured to represent a minute.

  According to the frequency measurement device having the above configuration, by providing the first offset unit, it is possible to output a difference value with a bit width that can represent a variation of the difference. As a result, the bit widths of various signals in the configuration subsequent to the first offset portion can be reduced, and the circuit scale can be further reduced.

  The first counter unit may further include a second offset unit that outputs, as the first count value, a value obtained by adding or subtracting a second value to the result of counting the number of changes in the first signal. The second counter unit further includes a third offset unit that outputs a value obtained by adding or subtracting a third value to the result of counting the number of changes of the second signal as the second count value. The first count value is smaller than a bit width that can represent the result of counting the number of changes in the first signal, and can represent a predetermined variation of the first count value. The second count value is smaller than a bit width that can represent the result of counting the number of changes in the second signal, and is a predetermined value of the second count value. The bit width can represent the variation. Is the, it is preferable.

  According to the frequency measurement device having such a configuration, the circuit scale in the configuration subsequent to the first counter unit and the second counter unit can be reduced. In addition, since the first counter unit and the second counter unit are arranged on the upstream side of the calculation unit in the frequency measurement device, the circuit scale can be reduced more effectively.

  Moreover, it is preferable that the said calculating part outputs the said difference value as a pulse signal from which a pulse width changes according to a value.

  According to the frequency measuring apparatus having such a configuration, the path from the arithmetic unit to the low-pass filter can be serially configured with a 1-bit signal line. As a result, the circuit scale of the frequency measuring device can be further reduced.

  The frequency measuring device includes a first vibrator, and generates the first signal having a frequency that changes when a peripheral medium of the first vibrator adheres to the first vibrator. A first signal generation unit, and a second signal generation unit that includes a second transducer and generates the second signal having a predetermined frequency regardless of the peripheral medium of the second transducer. It is preferable to have a configuration provided.

  Moreover, this invention includes the electronic device provided with one of the said frequency measurement apparatuses.

  According to the electronic apparatus having such a configuration, it is possible to configure an electronic apparatus having a small circuit scale.

The figure which shows the structural example of a frequency measurement apparatus. The 1st figure which shows an example of the count value counted by the short gate counter part. The 2nd figure which shows the example which removed the high frequency component from the signal sequence of count value. The figure which compares a short gate time count system with a direct count system. An enlarged view comparing the short gate time counting method with the direct counting method. The figure which shows the frequency resolution in each count system. The figure which shows the output of a low-pass filter when the count of a to-be-measured signal interrupts. The figure which shows the specific structural example of a short gate counter part. The figure which comprised the low-pass filter by the moving average filter. Schematic of the output of a low-pass filter. The figure which shows the impulse response of a three-stage moving average filter. The figure which shows the example of an output of a three-stage moving average filter. The figure which shows an example of a structure of the frequency measurement apparatus in a comparative example. The graph which shows the time change of the frequency which is an output value of the low-pass filter in a comparative example. The graph which shows the time change of the frequency which is an output value of the subtractor in a comparative example. 1 is a diagram illustrating a configuration of a frequency measurement device according to Embodiment 1. FIG. The table | surface which shows an example of the value of each part in the operation | movement of the frequency measurement apparatus of Embodiment 1. FIG. The figure which shows the structure of the frequency measurement apparatus in Embodiment 2. FIG. The table | surface which shows an example of the value of each part in the operation | movement of the frequency measurement apparatus of Embodiment 2. FIG. FIG. 5 is a diagram illustrating a configuration of a frequency measurement device according to a third embodiment. The table | surface which shows an example of the value of each part in the operation | movement of the frequency measurement apparatus of Embodiment 3. FIG. The figure which shows the structure of the frequency measurement apparatus in Embodiment 4. 10 is a table showing an example of values of respective parts during operation of the frequency measurement device according to the fifth embodiment.

An embodiment according to the present invention will be specifically described according to the following configuration with reference to the drawings. However, the embodiment described below is merely an example of the present invention, and does not limit the technical scope of the present invention. In addition, in each drawing, the same code | symbol is attached | subjected to the same component and the description may be abbreviate | omitted.
1. Definition 2. 2. Outline of Frequency Measuring Device in Embodiment (1) Outline of Configuration of Frequency Measuring Device (2) Outline of Operation of Frequency Measuring Device (3) Configuration Example of Short Gate Counter Unit (4) Configuration Example of Low-Pass Filter Comparative Example 4 Example 1
5). Example 2
6). Example 3
7). Example 4
8). Supplement

<1. Definition>
First, terms used in this specification are defined as follows.

“XX part” or “XX circuit” (XX is an arbitrary word): includes, but is not limited to, a circuit composed of an electrical circuit such as a semiconductor circuit. It also includes physical means for fulfilling or functional means realized by software. Further, even if the functions of one component or circuit are realized by two or more physical or functional means, the functions of two or more components or circuits are realized by one physical or functional means. May be.
“Int (x)”: indicates an integer part of x.

<2. Overview of Frequency Measuring Device in Embodiment>
Hereinafter, the outline of the frequency measuring apparatus according to the present invention will be described in detail with reference to FIGS.

<(1) Configuration overview of frequency measuring device>
FIG. 1 is a diagram illustrating a configuration example of a frequency measurement device. As shown in FIG. 1, the frequency measuring device includes a signal source 10 to be measured, a reference frequency signal source 40, a short gate counter unit (sometimes referred to as a “short gate time counter unit”) 20, and a low-pass filter (LPF). 30 is comprised. Each configuration will be specifically described below.

(Measurement signal source 10)
The signal under measurement 10 is configured to generate a signal under measurement 61 that is a pulse train signal. For example, the signal source under measurement 10 is a crystal oscillator including a crystal resonator having an oscillation frequency f ₀ of 30 MHz, and corresponds to a detection unit in an odor sensor, a gas sensor, a biosensor, or the like. When an odor substance or the like adheres to a crystal resonator included in the crystal oscillator, the oscillation frequency of the crystal oscillator decreases according to the amount of adhesion. The signal under measurement 61 is supplied to the short gate counter unit 20.

(Reference frequency signal source 40)
The reference frequency signal source 40 is configured to generate a reference frequency signal 62 that is a pulse train-like signal having a lower frequency than the signal under measurement 61. That is, the reference frequency signal 62 changes with a longer period than the signal under measurement 61. Hereinafter, one period of the reference frequency signal 62 may be referred to as “gate time” or “gate time”. For example, the reference frequency signal source 40 divides a signal of a crystal oscillator including a crystal resonator different from that used in the signal source 10 to be measured by a predetermined frequency division ratio. For example, it is configured to generate a reference frequency signal 62 of 100 Hz.

(Short gate counter unit 20)
The short gate counter unit 20 is configured to count the supplied pulse sequence of the signal under measurement 61 without interruption in a relatively short gate time. Specifically, the short gate counter unit 20 counts the number of changes in the signal under measurement 61 included in the gate time. For example, the short gate counter unit 20 counts the rising edge of the signal under measurement 61 that occurs in one cycle from the rising edge of the reference frequency signal 62 to the next rising edge. The count value 63 counted here is sequentially supplied to the low-pass filter 30.

(Low-pass filter 30)
The low pass filter 30 is configured to remove a high frequency component included in the input count value 63 and output only the low frequency component.

<(2) Operational overview of frequency measuring device>
FIG. 2 shows an example of the passage of time of the frequency calculated based on the count value 63 counted by the short gate counter unit 20. In this example, the frequency of the reference frequency signal 62 (hereinafter also referred to as “reference frequency”) is 100 Hz (gate time is 0.01 seconds), and the number of changes in the signal under measurement 61 is counted. When the reference frequency is 100 Hz, the frequency resolution is also reduced to 100 Hz, so that information of 100 Hz or less in the signal under measurement 61 cannot be detected from only one count value 63, but on the other hand, 100 count values per second. 63 will be obtained. As shown in FIG. 2, the frequency represented by 100 times the count value 63 is distributed in a pulse shape on the time axis between 30,072,300 Hz and 30,072,400 Hz, which are 100 Hz different from each other, for example. ing.

  Here, a quantization error (± 1 count error) in sampling will be described. For example, a case where a pulse train signal that is stable at 123.34 Hz is measured using a direct count counter will be considered.

  (A) When the gate time is 10 seconds: 1233 counts or 1234 counts every 10 seconds

  The measured value is displayed at 123.3 Hz or 123.4 Hz (every 10 seconds), which is 1/10 times the measured value. (Measurement error is 0.1Hz)

  (B) When the gate time is 1 second: 123 or 124 counts per second

  The measured value is displayed at 123 Hz or 124 Hz (every second). (Measurement error is 1 Hz)

  (C) When the gate time is 0.1 second: 12 or 13 counts every 0.1 second

  The measured value becomes a display of 120 Hz or 130 Hz (every 0.1 second) obtained by multiplying this by ten. (Measurement error is 10Hz)

  (D) When the gate time is 0.01 seconds: 1 count or 0 count every 0.01 seconds

  The measured value is displayed by 100 times or 100 Hz or 200 Hz (every 0.01 seconds). (Measurement error is 100Hz)

  As in the examples (A) to (D), when the signal under measurement 61 that is stable at a certain frequency is counted, the count value 63 is a pulse train whose amplitude is the difference between the two values determined by the gate time. Distributed. On the other hand, even when the frequency of the signal under measurement 61 to be counted varies, the counted values are still distributed in a pulse train having the amplitude of the difference between the two values as long as the variation is within the measurement error. For example, when the (D) gate time is 0.01 seconds and the measurement error is 100 Hz, a display of 100 Hz or 200 Hz is obtained as long as the variation in the frequency of the pulse train signal to be counted is within 100 to 200 Hz. It is done.

  As shown in FIG. 2, in the method of sampling with a short gate time of less than 1 second (hereinafter referred to as “short gate time count method”), the count value 63 changes in a pulse train, and the frequency of the signal under measurement 61 The appearance frequency of the value changes according to the change of. If the frequency in the signal under measurement 61 is high, the frequency of occurrence of the pulse train showing a high value is high. Conversely, if the frequency of the signal under measurement 61 is low, the frequency of appearance of the pulse train showing a low value is high. Information on the frequency of the signal under measurement 61 to be counted exists in the low frequency component of the frequency spectrum of the count value that behaves as a pulse train. Therefore, the low-pass component is extracted from the count value 63 by the low-pass filter (the high-frequency component caused by the quantization error is removed), and the information on the variation of the frequency of the signal under measurement 61 to be counted is demodulated. Can do.

  FIG. 3 shows an example in which the signal sequence having the count value 63 in FIG. 2 described above is applied to the low-pass filter 30 having 512 taps to remove high frequency components. As shown in FIG. 3, the change in frequency of the supplied signal 61 to be measured is output as a continuous (analog) curve. It can be seen that by using the low-pass filter 30, it is possible to detect up to an area where measurement is impossible due to quantization error, particularly up to a frequency change of 1 Hz or less, with counting at a sampling period of 100 Hz.

  Next, a comparison between the short gate time counting method in this embodiment and a general direct counting method will be described with reference to FIGS.

  In the graph shown in FIG. 4, the vertical axis represents frequency and the horizontal axis represents time. A curve A in FIG. 4 shows a case where sampling is performed by setting the gate time to 1 second by the direct count method. A curve B shows a case where sampling is performed by setting the gate time to 0.1 second by the direct count method. A curve C shows a case where sampling is performed by setting the gate time to 0.01 seconds by the direct counting method. Curve C is displayed separately below because the unit (digit) of the time axis is different and a waveform cannot be represented on the same graph. A curve D shows a case where sampling is performed by setting the gate time to 0.01 seconds + low-pass filter by the short gate time count method, that is, the direct count method.

  5 compares the curve A and the curve D by enlarging the frequency axis range of FIG. It can be seen that the curve D indicating the sampling by the short gate time count method can be read up to the order of several tens of mHz.

  From FIG. 4, it can be seen that when the gate time is less than 1 second, the frequency change of the signal under measurement 61 to be counted falls within the measurement error, so that the count value 63 becomes one of the binary values and forms a pulse train. The pulse train changes depending on the frequency. That is, the count value 63 that behaves like a pulse train includes not only the instantaneous value but also the frequency information of the pulse train signal counted in the time axis direction. Therefore, although the measurement error included in one count value (instantaneous value) is enlarged by shortening the gate time, the miscalculation can be ignored by using the low-pass filter 30. When the gate time is 1 second, the curve becomes zigzag and the frequency of 1 Hz or less is not known. However, if the processing is performed to remove high frequency components by the low-pass filter 30, smooth characteristics similar to those of the present application will be obtained. Can be obtained as well. Therefore, even if the gate time is 1 Hz, this method can be applied when the frequency change band is slowly changed to be lower than 1 Hz.

  As described above, in the short gate time counting method, when the gate time is shortened (the reference frequency is increased), the measurement error in each count value 63 becomes large, while a plurality of measurement value columns are obtained. The frequency measurement resolution is improved by removing high frequency components from the plurality of measurement values by the low-pass filter 30. FIG. 6 is a diagram showing the relationship between the gate time (gate time) and the frequency resolution in the direct count method, the reciprocal method, and the proposed method (short gate time count method) of the present embodiment. As shown in FIG. 6, in the direct count method and the reciprocal method, the frequency resolution is lowered when the gate time is shortened, whereas in the short gate time count method, the frequency resolution is increased when the gate time is shortened. That is, in the short gate time count method employing the low-pass filter 30, high frequency resolution can be obtained with a short gate time. In addition, since the circuit scale can be kept small in the short gate time count method, it is easy to have a configuration having a plurality of signals to be measured 61 by multi-channeling. In the above example, the digital low-pass filter has been described as an example. However, if an analog low-pass filter is used, an analog output can be handled.

  FIG. 7 shows an example of the frequency output of the low-pass filter 30 when the count of the signal under measurement 61 in the short gate counter unit 20 is interrupted (when the count value sequence to the low-pass filter 30 is missing). As shown by the dotted circle in FIG. 7, it can be seen that when the measurement of the signal under measurement 61 in the short gate counter unit 20 is interrupted, a disturbance is observed.

<(3) Configuration example of the short gate counter unit>
Here, an example of a specific configuration of the short gate counter unit 20 will be described with reference to FIG. As shown in FIG. 8, the short gate counter unit 20 includes an up counter 21, a latch unit 22, a register 23, and an arithmetic circuit 24. As shown in FIG. 1, the signal under measurement 61 and the reference frequency signal 62 are input to the short gate counter unit 20, and the short gate counter unit 20 outputs a count value 63. The signal under measurement 61 is supplied to the up counter 21, and the reference frequency signal 62 is supplied to the latch unit 22 and the register 23. Hereinafter, the function of each component will be described in detail.

(Up counter 21)
The up-counter 21 is configured to cumulatively count changes in the signal under measurement 61 supplied as a pulse train and to output a cumulative count value 71. More specifically, when the up counter 21 observes the rising edge of the signal under measurement 61, the up counter 21 adds 1 to the accumulated count value 71 and outputs it. Although an example in which the rising edge of the signal under measurement 61 is observed will be described here, this may be a falling edge and can be arbitrarily selected. Furthermore, both the rising edge and the falling edge may be observed as necessary, but it is more preferable to observe either the rising edge or the falling edge from the viewpoint of synchronous design. The accumulated count value 71 is output as a 14-bit signal, for example.

(Latch part 22)
The latch unit 22 is configured to latch the accumulated count value 71 supplied from the up counter 21 based on the reference frequency signal 62 and output the latched value as a latch count value 72. More specifically, the accumulated count value 71 continuously input from the up counter 21 is latched and output at either the rising edge or the falling edge of the reference frequency signal 62. Here, an example of latching at the timing of either the rising edge or the falling edge of the reference frequency signal 62 is given, but for example, latching is performed at the timing of both the rising edge and the falling edge of the reference frequency signal 62. Other methods may also be used. Note that the latch count value 72 is output as a 14-bit signal, for example.

(Register 23)
The register 23 is configured to temporarily hold the latch count value 72 supplied from the latch unit 22 based on the reference frequency signal 62. The output of the register 23 is output as a 14-bit digital signal, for example.

  Note that the register 23 may be configured by a storage element such as a memory, or may be configured by a latch or a flip-flop. In other words, as will be described in detail below, as long as the arithmetic circuit 24 is configured to be able to acquire the count value 63 from the difference between the current latch count value 72 and the previous latch count value 73, any It may be a configuration. However, it is preferable to use a latch because the configuration can be facilitated.

(Calculation circuit 24)
The arithmetic circuit 24 is configured to acquire a difference based on the current cumulative count value 72 supplied from the latch unit 22 and the previous cumulative count value 73 supplied from the register 23 and output the difference as the count value 63. The That is, by subtracting the current cumulative count value 72 from the previous cumulative count value 73, the count value 63 included in the period from the previous latch timing to the current latch timing can be obtained. Here, the previous latch timing and the current latch timing are determined by the reference frequency signal 62. In the example of this embodiment, the latch timing is determined by either the rising edge or the falling edge of the reference frequency signal 62. Therefore, the arithmetic circuit 24 outputs, for example, a count value 63 that is a value obtained by counting the number of changes in the signal under measurement 61 included in a period from the previous rising edge to the current rising edge in the reference frequency signal 62. . The output signal of the arithmetic circuit 24 is output as a 14-bit digital signal, for example.

<(4) Configuration Example of Low-Pass Filter 30>
FIG. 9 shows an example in which the low-pass filter 30 shown in FIG. 1 is configured by a moving average filter. In FIG. 9, the low pass filter 30 includes an adder 31, a shift register 32, a subtractor 33, an inverter 34, a control unit 35 that supplies an operation timing clock to each unit, and a divider 36.

  The count value 63 output from the short gate counter unit 20 is given to both the adder 31 and the shift register 32 having a storage area corresponding to the number of taps. N data to be subjected to moving average value calculation sequentially move in the shift register 32 in synchronization with the other. One of the adders 31 is supplied with the count value 63, and the other is supplied with the total value of the previous calculation. The adder 31 adds the new count value and the previous total value. From this added value, the count value 63 of the first (old) data is subtracted by the subtracter 33 by the shift register 32, and this is used as the new total value. The new total value is returned to the adder 31 as the previous total value, and the new total value is divided by the target data number N in the divider 36. A moving average value is obtained by performing such calculation for all data. Here, the divider 36 has a function of scaling the output value, but can be omitted if the scaling need not be taken care of. Further, when the moving average filter has a multistage configuration as the low-pass filter 30, the divider 36 may be disposed only in the final stage.

  FIG. 10 is a diagram schematically illustrating the output of the low-pass filter 30. In this example, as shown in FIG. 10, it is assumed that the frequency of the signal under measurement 61 to be measured gradually changes from 123.8 Hz to 124.7 Hz. First, when sampling is performed at a gate time of 0.1 seconds, the count value of 12 or 13 is sent from the short gate counter unit 20 at a certain ratio. The total three sets of 10 data are 124, 123, 125, and the value moves in the direction of 124.7 Hz. Here, 10 of the count values of 12 or 13 (number of taps 10) are subject to moving average calculation (first stage moving average). From the moving average value in the first stage, it can be seen that the appearance of large numerical data increases as it moves to the right. Furthermore, when the moving average value of the first stage is used as an input to calculate the moving average of the second stage (10 taps), this tendency is strengthened and the accuracy is improved. Using multiple stages of moving average filters is equivalent to making the attenuation slope, which is a characteristic of the low-pass filter, steep, and at the same time, removing high-frequency components from the frequency spectrum of the pulse train consisting of 12 or 13.

  As an example, FIG. 11 shows an impulse response of a three-stage moving average filter. In the three-stage moving average filter (low-pass filter), three stages of moving average filters are connected in series (total number of taps 4096, number of taps 818 (one stage), 1640 (two stages), and 1640 (three stages). Step moving average filter).

  FIG. 12 shows an output example of the three-stage moving average filter. By setting it as the structure like this embodiment, as shown in FIG. 12, the frequency change of 1 Hz or less can be measured.

<3. Comparative Example>
A frequency measurement device including an oscillation circuit including a vibrator (for example, a crystal vibrator) used for a sensor or the like measures the frequency of an output signal of the oscillation circuit that varies depending on a substance attached to the vibrator. However, the frequency of the output signal also changes when the ambient temperature of the vibrator other than the substance to be adhered changes, for example. This is observed as a drift in the frequency of the output signal. When a plurality of vibrators are provided in the frequency measuring device, there is a correlation between drifts in the plurality of vibrators, so that it is possible to cancel the drift by appropriate signal processing and to appropriately detect the substance to be attached. Become.

  For example, a vibrator that is insensitive to the peripheral substance is provided as a compensation vibrator, and the compensation vibrator is disposed in the vicinity of the detection vibrator that adheres the peripheral substance. By measuring the ratio or difference of the frequencies of the output signals output from the oscillation circuit provided with each of the plurality of vibrators, it becomes possible to detect the substance to be adhered without being affected by the drift.

  Here, as a method of using the ratio between the frequency of the output signal of the compensation oscillation circuit including the compensation oscillator and the frequency of the output signal of the detection oscillation circuit including the detection oscillator, a compensation oscillation circuit is used. There is a method of measuring the frequency of the output signal of the oscillation circuit for detection based on the frequency of the reference frequency signal generated based on the output signal. However, since it is assumed that the frequency of the reference frequency signal changes, the present invention is applicable to the case where the fluctuation of the output timing of the frequency measurement result is allowed.

  On the other hand, in the method using the difference between the frequency of the output signal of the compensation oscillation circuit and the frequency of the output signal of the detection oscillation circuit, it is necessary to separately generate a reference frequency signal as a measurement reference. Since the frequency of the signal is stable, fluctuation in the output timing of the frequency measurement result can be suppressed. However, the circuit scale of a filter or the like for calculating the frequencies of the compensation oscillation circuit and the detection oscillation circuit may increase.

  Therefore, in one embodiment of the present invention, attention has been paid to reducing the circuit scale while adopting a method that uses a difference from the frequency of the output signal of the detection oscillation circuit.

  Hereinafter, the above will be described as a comparative example which is a premise of the embodiment of the present invention with reference to FIGS. In the following description, the output signal of the detection oscillation circuit corresponds to the signal under measurement, and the output signal of the compensation oscillation circuit corresponds to the compensation signal.

  FIG. 13 is a diagram illustrating an example of the configuration of the frequency measurement device according to this comparative example. As shown in FIG. 13, the frequency measurement device includes short gate counter units 20 a to 20 d, low pass filters 30 a to 30 d, subtracters 50 a to 50 c, and a reference frequency signal source 40. One of the short gate counter units 20a to 20c, one of the low-pass filters 30a to 30c, and one of the subtractors 50a to 50c are set, and the reference frequency signal source 40, the short gate counter The unit 20d and the low-pass filter 30d have a common configuration in each set. The measured signals 61a to 61c are input to the short gate counter units 20a to 20c, respectively, and the compensation signal 80 is input to the short gate counter unit 20d.

  The configurations and functions of the short gate counter units 20a to 20d and the low-pass filters 30a to 30d are as already described.

(Subtracters 50a-50c)
The subtractor 50a is a compensation low pass filter output value 64a that is a value obtained by removing a high frequency component from the count value 63a of the signal under measurement 61a, and a compensation value that is a value obtained by removing the high frequency component from the count value 63d of the compensation signal 80. The low-pass filter output value 64d is input. The subtractor 50a subtracts the compensation low-pass filter output value 64d from the measured low-pass filter output value 64a, and outputs a difference value. The subtracters 50b and 50c have the same configuration and function as the subtractor 50a except that one input is different as shown in FIG.

  FIG. 14 is a graph showing the time change of the frequency which is the output value of the low-pass filters 30a to 30d. In order from the top of the graph, a measured low pass filter output value 64a, a measured low pass filter output value 64b, a measured low pass filter output value 64c, and a compensating low pass filter output value 64d are shown.

  FIG. 15 is a graph showing the time change of the frequency which is the output value of the subtracters 50a to 50c. Difference values output from the subtracters 50a, 50b, and 50c are shown in order from the top of the graph.

  As can be seen from the graphs of FIGS. 14 and 15, noise due to the influence of drift is superimposed on the measured low-pass filter output value 64a output from the low-pass filter 30a, but the difference value output from the subtractor 50a. Then noise is removed.

  As described above, according to the frequency measuring device using the signal under measurement and the compensation signal, it is possible to cancel a drift due to, for example, a temperature change. However, as shown in FIG. 13, the circuits subsequent to the short gate counter units 20a to 20d all handle signals having a bit width of 14 bits, and the circuit scale is relatively large.

<4. Example 1>
Here, an embodiment of the present invention will be described with reference to FIGS.

  FIG. 16 is a diagram illustrating a configuration of a frequency measurement device according to the present embodiment. Compared with the frequency measuring apparatus shown in FIG. 13, the arrangement of the subtracters 50a is different between the short gate counter unit 20a and the low-pass filter 30a. For simplicity of explanation, only one signal under measurement input to the frequency measuring device is shown. As in the comparative example shown in FIG. 13, a plurality of sets of the short gate counter unit 20a, the subtractor 50a, and the low-pass filter 30a may be provided. Hereinafter, the present embodiment will be specifically described. Among the components in the frequency measurement device, the description of the same components as those described in the comparative example is omitted.

(Subtractor 50a)
The subtractor 50a is configured to subtract the count value 63d output from the short gate counter unit 20d from the count value 63a output from the short gate counter unit 20a to output a subtraction value 65a. The subtractor 50a may be referred to as an “arithmetic unit”.

(Low-pass filter 30a)
The subtraction value 65a is input to the low pass filter 30a as a difference value corresponding to the difference between the count value 63a and the count value 63d.

  FIG. 17 is a table showing an example of the value of each part during the operation of the frequency measuring device. As shown in FIG. 17, the count value 63a obtained by counting the signal under measurement 61a shows a value of 14981 to 14982, and the count value 63d obtained by counting the compensation signal 80 shows 15048 to 15049. At this time, the subtraction value 65a output from the subtracter 50a is a value between −66 and −68. This subtraction value 65a indicates a frequency component that has fluctuated due to the substance attached to the vibrator included in the signal source (not shown) that generates the signal 61a to be measured. If the high-frequency component is removed from the subtraction value 65a through the low-pass filter 30a and then scaled as necessary, an accurate frequency can be derived.

Here, in order to express the count values 63a and 63d, a signal having a bit width of 14 bits may be used. This is because 2 ¹⁴ = 16384 and 0 to 16383 can be expressed by a 14-bit signal. Further, in order to express the subtraction value 65a, a signal having a bit width of 8 bits may be used after displaying by two's complement. This is because if 2 ⁷ = 128 and an 8-bit signal, −128 to 127 can be expressed.

  That is, according to the frequency measuring apparatus configured as described above, the subtraction value 65a output from the subtractor 50a can be configured with a bit width of 8 bits instead of 14 bits. Further, the value output from the low-pass filter 30a at the subsequent stage can also be configured with a bit width smaller than that of the above-described comparative example. That is, the scale of the circuit subsequent to the subtracter 50a can be reduced as compared with the case where the difference value, which is the input of the low-pass filter 30a, is configured with a bit width of 14 bits.

  These bit widths are merely examples, and the bit width of the subtraction value 65a output from the subtractor 50a is smaller than the bit widths of the count values 63a and 63d input to the subtractor 50a and is determined in advance. The difference is that the difference between the counted value 63a and the counted value 63d is configured with a bit width that can be expressed sufficiently. That is, the bit width of each part of the frequency measuring device is not limited to the above example, and can be flexibly designed within a range that can be understood by those skilled in the art.

<5. Example 2>
Next, another embodiment of the present invention will be described with reference to FIGS.

  FIG. 18 is a diagram illustrating a configuration of a frequency measurement device according to the present embodiment. Compared with the frequency measurement apparatus in the first embodiment shown in FIG. 16, the frequency measurement apparatus in the present embodiment is different in that an offset adder 52a and an offset value storage unit 53a are added. As in the first embodiment, a plurality of sets of the short gate counter unit 20a, the subtracter 50a, the offset adder 52a, the offset value storage unit 53a, and the low-pass filter 30a may be provided. A portion including the offset adder 52a and the offset value storage unit 53a may be referred to as an “offset unit”. In addition, a part including the subtracter 50a, the offset adder 52a, and the offset value storage unit 53a may be referred to as an “arithmetic unit 55a”. Hereinafter, the present embodiment will be described in detail, but the description of the components of the frequency measurement apparatus that are the same as those described in the comparative example and the first embodiment is omitted.

(Offset unit: offset adder 52a and offset value storage unit 53a)
The offset value storage unit 53a is configured to previously store a value to be added to the subtraction value 65a indicating the difference between the count value 63a and the count value 63d in the offset adder 52a. The offset adder 52a is configured to add the offset value 66a to the subtracted value 65a output from the subtractor 50a and output the result as an offset added value 67a.

(Low-pass filter 30a)
The low-pass filter 30a receives the offset addition value 67a as a difference value obtained by adding the offset value to the difference between the count value 63a and the count value 63d.

  FIG. 19 is a table showing an example of values of each part during the operation of the frequency measuring device. As shown in FIG. 19, the count value 63a obtained by counting the signal to be measured 61a shows a value of 14981 to 14982, and the count value 63d obtained by counting the compensation signal 80 shows 15048 to 15049, as in the example of the first embodiment. ing. At this time, the subtraction value 65a output from the subtracter 50a is a value between −66 and −68. Then, the offset unit including the offset adder 52a and the offset value storage unit 53a adds the offset value 66a to the subtraction value 65a, and outputs an offset addition value 67a. The offset addition value 67a is a value between 0 and 2. The offset addition value 67a indicates a frequency component that has fluctuated due to a substance attached to a vibrator included in a signal source (not shown) that generates the signal 61a to be measured.

Here, in order to express the offset addition value 67a, a signal having a bit width of 2 bits may be used. This is because 2 ² = 4 and 0 to 3 can be expressed by a 2-bit signal.

  That is, according to the frequency measuring apparatus configured as described above, the subtraction value 65a output from the subtractor 50a can be configured with a bit width of 8 bits, and the offset addition value 67a is 2 bits. It is possible to configure with a bit width of. Further, the output of the low-pass filter 30a can also be configured with a bit width smaller than that of the first embodiment. That is, it is possible to reduce the bit width of the signal in the configuration subsequent to the offset unit, and it is possible to further reduce the circuit scale of the frequency measuring device as compared with the first embodiment.

  Note that these bit widths are merely examples, and the bit width of the offset addition value 67a output from the offset adder 52a is smaller than the bit width of the subtraction value 65a input to the offset adder 52a. The difference is that the difference between the determined count value 63a and the count value 63d is configured with a bit width that can be expressed sufficiently. That is, the bit width of each part of the frequency measuring device is not limited to the above example, and can be flexibly designed within a range that can be understood by those skilled in the art.

<6. Example 3>
Next, another embodiment of the present invention will be described with reference to FIGS.

  FIG. 20 is a diagram illustrating a configuration of a frequency measurement device according to the present embodiment. Compared with the frequency measurement device in the second embodiment shown in FIG. 18, the frequency measurement device in the present embodiment is different in that a pulse generation unit 54a is added. Further, as in the first and second embodiments, a plurality of sets of the short gate counter unit 20a, the subtracter 50a, the offset adder 52a, the offset value storage unit 53a, the pulse generation unit 54a, and the low pass filter 30a may be provided. Note that a portion including the subtractor 50a, the offset adder 52a, the offset value storage unit 53a, and the pulse generation unit 54a may be referred to as an “arithmetic unit 55a”. Hereinafter, the present embodiment will be described in detail, but the description of the same components as those already described among the components in the frequency measurement device is omitted.

(Pulse generator 54a)
The pulse generation unit 54a is configured to output a pulse signal 68a whose pulse width changes according to the offset addition value 67a. For example, the pulse signal has a predetermined period, and if the value of the offset addition value 67a is high, the signal indicating Hi (1) becomes longer. As a more specific example, the pulse signal 68a has a cycle of 2 unit clocks, and when the offset addition value 67a is 0, 0-0, 1 is 1-0 or 0-1, In the case of 2, it may be a signal indicating 1-1.

(Low-pass filter 30a)
The pulse signal 68a is input as a difference value to the low-pass filter 30a.

  FIG. 21 is a table showing an example of values of each part during the operation of the frequency measuring device. As shown in FIG. 21, as in the first and second embodiments, the count value 63a obtained by counting the signal to be measured 61a shows a value of 14981 to 14982, and the count value 63d obtained by counting the compensation signal 80 is 15048 to 15049. Is shown. At this time, the subtraction value 65a output from the subtracter 50a is a value between −66 and −68. Then, the offset unit including the offset adder 52a and the offset value storage unit 53a adds the offset value 66a to the subtraction value 65a, and outputs an offset addition value 67a. The offset addition value 67a is a value between 0 and 2. The pulse generator 54a generates a pulse signal 68a based on the offset addition value 67a. The pulse signal 68a is a signal indicating 0-0, 1-0, or 1-1 at a cycle of 2 unit clocks. In this embodiment, the pulse signal 68a indicates a frequency component that has fluctuated due to a substance attached to a vibrator included in a signal source to be measured (not shown) that generates the signal to be measured 61a. The pulse signal 68a is a 1-bit signal.

  According to the frequency measuring device configured as described above, the pulse signal 68a (difference value) input to the low-pass filter 30a can be serially input as a 1-bit signal. As a result, the circuit scale of the frequency measuring device can be further reduced as compared with the second embodiment. Note that the bit widths of signals other than the pulse signal 68a are merely examples, and can be flexibly designed within a range that can be understood by those skilled in the art as described in the second embodiment.

<7. Example 4>
Next, another embodiment of the present invention will be described with reference to FIGS.

  FIG. 22 is a diagram illustrating the configuration of the frequency measurement device according to the present embodiment. Compared with the frequency measuring apparatus in the first embodiment shown in FIG. 16, the frequency measuring apparatus of the present embodiment is different in that offset subtracters 25a and 25d and offset value storage units 26a and 26d are added. Similarly to the first embodiment, a plurality of sets of the short gate counter unit 20a, the offset subtracter 25a, the offset value storage unit 26a, the subtractor 50a, and the low pass filter 30a may be provided. The offset subtracter 25a and the offset value storage unit 26a may be configured to be included in the short gate counter unit 20a. Hereinafter, the present embodiment will be described in detail, but the description of the configurations of the frequency measurement apparatus that are the same as those described in the comparative example and the first and second embodiments is omitted.

(Offset value storage units 26a and 26d)
The offset value storage units 26a and 26d are configured to previously store values to be subtracted from the count value 63a and the count value 63d in the offset subtracters 25a and 25d, respectively.

(Offset subtracters 25a and 25d)
The offset subtracter 25a is configured to subtract the offset value 66a obtained from the offset value storage unit 26a from the count value 63a and output the result as an offset subtraction value 69a. The offset subtracter 25d is configured to subtract the offset value 66d obtained from the offset value storage unit 26d from the count value 63d and output the result as an offset subtraction value 69d.

  FIG. 23 is a table showing an example of values of each part during the operation of the frequency measuring device. As shown in FIG. 23, as in the example of the second embodiment, the count value 63a obtained by counting the signal to be measured 61a shows a value of 14981 to 14982, and the count value 63d obtained by counting the compensation signal 80 shows 15048 to 15049. ing. Then, the offset subtractor 25a subtracts 14980 from the count value 63a that is the output of the short gate counter unit 20a, and outputs a value of 1 to 2 as the offset subtraction value 69a. The offset subtracter 25d subtracts 15048 from the count value 63d, which is the output of the short gate counter unit 20d, and outputs a value of 0 to 1 as the offset subtraction value 69d. At this time, the subtraction value 65a output from the subtractor 50a is a value between 0 and 2. This subtraction value 65a indicates a frequency component that has fluctuated due to the substance attached to the vibrator included in the signal source (not shown) that generates the signal 61a to be measured.

  A signal having a bit width of 2 bits may be used to express the offset subtraction value 69a, and a signal having a bit width of 1 bit may be used to express the offset subtraction value 69d.

  That is, according to the frequency measuring apparatus configured as described above, it is possible to configure the bit width of the signal in the configuration subsequent to the offset subtracters 25a and 25d with a bit width smaller than that of the second embodiment. Note that these bit widths are merely examples, and if the offset subtraction values 69a and 69d are configured with bit widths smaller than the bit widths of the count values 63a and 63d, frequency measurement is possible even when compared with the second embodiment. The apparatus can be configured with a small circuit scale. That is, the bit width of each part of the frequency measurement device is not limited to the above example, and can be designed flexibly within a range that can be understood by those skilled in the art.

<6. Supplement>
In the description of the above embodiments and the like, specific count values and bit widths are described, but the present invention is not limited to this. The count value and the bit width of each signal vary depending on the signal under measurement 61a, the reference frequency signal 62, the compensation signal 80, and the like.

  Further, in the example of adding the offset value in the above-described embodiment, the offset value may be subtracted, and in the example of subtracting the offset value, the offset value may be added. An appropriate value can be determined for the offset value to be added or subtracted.

  Further, when the above-described embodiment or the like is used for various resonance frequency change type sensors, it is possible to reduce the size, the weight, the resolution, and the cost. Moreover, it is suitable for integration and platformization of various sensors. It is also suitable for use in odor sensors, gas sensors, biosensor transducer arrays, QCM devices, pressure sensors, acceleration sensors, and the like.

  In addition, the embodiments and the like described in the present specification can be combined and configured within a range that does not contradict each other as long as those skilled in the art can think. Furthermore, the present invention is not limited to a sensor array having a large number of sensors, and the same effect can be obtained even when applied to a single sensor.

10: Signal source to be measured, 20 / 20a to 20d ... Short gate counter unit, 21 ... Up counter, 22 ... Latch unit, 23 ... Register, 24 ... Arithmetic circuit, 25a / 25d ... Offset subtraction 26a · 26d ··· offset value storage unit, 30 · 30a to 30c ··· low pass filter, 31 · · · adder, 32 · · · shift register, 33 · · · subtractor, 34 · · · inverter, 35 · · · control unit , 36... Divider, 40... Reference frequency signal source, 50a to 50c... Subtractor, 52a... Offset adder, 53a... Offset value storage unit, 54a. 61 · 61a to 61c... Signal under measurement, 62... Reference frequency signal, 63. 63a to 63d... Count value, 64a to 64d. a ... subtraction value, 66a ... offset value, 67a ... offset addition value, 68a ... pulse signal, 69a ... offset subtraction value, 69d ... offset subtraction value, 71 ... cumulative count value, 72 ... latch Count value, 73 ... Latch count value, 80 ... Compensation signal

Claims (7)

A first counter unit that outputs a first count value obtained by counting the number of changes of the first signal included in a predetermined period determined based on the reference signal;
A second counter unit that outputs a second count value obtained by counting the number of changes in the second signal included in the predetermined period;
An arithmetic unit that outputs a difference value corresponding to a difference between the first count value and the second count value;
A low pass filter for removing high frequency components included in the difference value,
The difference value is configured with a bit width capable of expressing the first count value and a bit width smaller than a bit width capable of expressing the second count value. The frequency measurement device according to claim 1, wherein the difference value is configured with a predetermined bit width capable of expressing the difference. The calculation unit further includes a first offset unit that outputs a value obtained by adding or subtracting a first value to the difference as the difference value,
The frequency measurement device according to claim 1, wherein the difference value is configured with a predetermined bit width capable of expressing a variation of the difference. The first counter unit further includes a second offset unit that outputs, as the first count value, a value obtained by adding or subtracting a second value to the result of counting the number of changes in the first signal,
The second counter unit further includes a third offset unit that outputs, as the second count value, a value obtained by adding or subtracting a third value to the result of counting the number of changes in the second signal,
The first count value is smaller than a bit width that can represent the result of counting the number of changes in the first signal, and is a bit that can represent a predetermined variation of the first count value. Composed of width,
The second count value is smaller than a bit width that can represent the result of counting the number of changes in the second signal, and is a bit that can represent a predetermined variation of the second count value. Composed of width,
The frequency measuring device according to claim 1 or 2. The frequency measurement device according to claim 3, wherein the calculation unit outputs the difference value as a pulse signal whose pulse width changes according to the value. A first signal generation unit that includes the first vibrator, and that generates the first signal having a frequency that changes when a peripheral medium of the first vibrator is attached to the first vibrator;
6. A second signal generation unit that includes a second vibrator and that generates the second signal having a predetermined frequency regardless of the surrounding medium of the second vibrator. 6. The frequency measuring device according to claim 1.   The electronic device provided with the frequency measuring device of any one of Claims 1 thru | or 6.

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