JP2010239030A - Method of processing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a process of processing a semiconductor wafer, by which back surface grinding of the semiconductor wafer having large unevenness is facilitated, the wafer is easily divided into individual chips and a sheet can be peeled without incurring any problem of remaining paste. <P>SOLUTION: A sheet 20 for surface protection is stuck on a circuit surface 10S, and a half-cut groove 10K is formed by carrying out half-cut dicing on the wafer 10 from the side of the sheet 20 for surface protection. A sheet 30 for grinding is put over and stuck on the sheet 20 for surface protection, and the back surface of the wafer 10 is ground. After the wafer 10 is divided into individual chips 18 through the grinding, the sheet side is irradiated with ultraviolet light to cure the sheet 20 for surface protection. Further, the sheet 20 for surface protection 20 is heated to shrink and then peeled after decreasing an area of contact with the individual chip 18. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for processing a semiconductor wafer, and more particularly to a method for processing a wafer having large surface irregularities.

  As information terminal devices are rapidly becoming smaller and more multifunctional, semiconductor devices mounted on them are required to be thinner and higher in density. More recently, the integration of heterogeneous semiconductor devices in which a plurality of semiconductor devices are housed in a single package is also progressing. Improvements have been made to the semiconductor processing process in order to cope with the progress of such semiconductor devices.

  For example, a method has been developed in which semiconductor devices having different functions are packaged at the semiconductor wafer stage, and then the semiconductor wafer is divided into individual packages and separated into individual packages. In such a semiconductor processing process, different semiconductors are stacked on the semiconductor wafer level, and the surface shape of the wafer tends to be complicated.

  For a wafer having a complicated surface shape, subsequent thinning and chip separation becomes difficult. This is because if dicing is performed after thinning by back surface grinding, defects such as chipping are likely to occur. Therefore, for wafers with complicated surface shapes, a pre-dicing process (DBG process, for example, Patent Document 1) in which half-cut dicing is performed prior to back surface grinding and the wafer is chipped simultaneously with grinding is promising. Yes.

  In addition, it is also known to perform dicing together with the surface protection sheet in a state where the surface protection sheet is stuck on the surface of the wafer without using the DBG process (for example, Patent Documents 2 to 4). In this case, it is possible to effectively protect a wafer having a circuit surface with low durability against cutting water used in the dicing process and a wafer having a large surface unevenness.

JP 2001-127029 A JP 2003-209073 A JP 2005-175148 A JP 2003-197567 A

  In a DBG process for a wafer with a complicated surface shape, if a soft protective tape with a thick adhesive layer is used to protect the wafer surface with large irregularities, adhesive residue on the wafer surface may occur when the protective tape is peeled off. . On the other hand, if a hard protective tape is used, the protection of the wafer surface will not be sufficient, the occurrence of intrusion of grinding water during backside grinding of the wafer due to insufficient followability to the irregularities on the wafer surface, and the wafer after backside grinding. There is concern about damage. In addition, if a high pressure is applied when the protective tape is applied in order to reliably protect the surface of the wafer, the protective tape may be deformed along the surface irregularities, and the ground surface may be distorted after the back surface grinding.

  On the other hand, when dicing is performed with the surface protective sheet attached to the surface, a complicated operation of removing fragments of the surface protective sheet included in each of a large number of diced chips is required. In particular, because the end of the surface protection sheet separated by dicing tends to be pressed against the edge of the chip, the work of peeling the surface protection sheet fragment from the chip is not only complicated, but also difficult There are many.

  Therefore, the present invention ensures the protection of the wafer surface by contamination and grinding residue on the wafer surface in the process of thinning and chip-dividing a semiconductor wafer having a large surface irregularity. An object of the present invention is to provide a semiconductor wafer processing process that can prevent and easily peel off a sheet.

  A method for processing a semiconductor wafer according to the present invention includes the following steps. That is, a dicing process for performing half-cut dicing of the wafer from the surface protective sheet side with the surface protective sheet attached to the circuit surface of the wafer provided with unevenness having a height difference of 100 μm or more, and a grinding sheet A process for affixing the surface protection sheet, a grinding process for grinding the back surface of the wafer to divide the wafer into chips, and a contact area between the surface protection sheet and the circuit surface by processing the surface protection sheet And a peeling process for peeling the treated surface protecting sheet and grinding sheet.

  ADVANTAGE OF THE INVENTION According to this invention, the back surface grinding | polishing with respect to a semiconductor wafer with the large unevenness | corrugation of a surface and chip | tip chip-izing can be performed easily, and the processing process of the semiconductor wafer which can peel a sheet | seat easily without malfunctions, such as adhesive residue, is realizable.

It is sectional drawing which shows the state by which the sheet | seat for surface protection was affixed on the wafer by which the chip | tip was bonded to the circuit surface. It is sectional drawing which shows the dicing process which performs the half cut dicing of a wafer. It is sectional drawing which shows the sticking process which piles up and sticks the sheet | seat for grinding on the sheet | seat for surface protection. It is sectional drawing which shows the state which stuck the transfer tape on the grinding surface of the chip | tip separated into pieces. It is sectional drawing which shows the process process which heats and shrinks the surface protection sheet.

  The semiconductor wafer processing method in this embodiment will be described below. This processing method is a DBG process utilizing a surface protecting sheet and a grinding sheet. FIG. 1 is a cross-sectional view showing a state in which a surface protection sheet is attached to a wafer having a chip bonded to a circuit surface. FIG. 2 is a cross-sectional view showing a dicing process for performing half-cut dicing of the wafer.

  In the present embodiment, a large number of semiconductor chips 12 manufactured by another manufacturing process are bonded to the circuit surface 10S of the wafer 10 with an adhesive. The circuit surface 10 </ b> S of the wafer 10 has irregularities corresponding to the thickness of the chip 12. The thickness 12D of the chip 12 is, for example, 150 μm, and is exaggerated in FIG. 1 and the following drawings. In addition, on the circuit surface 10S of the wafer 10, unevenness of a height difference of 100 μm or more may be formed instead of the chip 12 being bonded.

  In this way, the surface protection sheet 20 is attached to the circuit surface 10S having large irregularities. The surface protection sheet 20 is performed using a vacuum laminator or the like so as to sufficiently adhere not only to the upper surface of the chip 12 but also to the surface exposed toward the upper surface of the circuit surface 10S. By doing in this way, even if the wafer 10 is divided into chips, each chip can be securely fixed and the chip surface can be protected.

  Half-cut dicing of the wafer 10 is performed from the surface protection sheet 20 side with the surface protection sheet 20 still attached to the circuit surface 10S (see FIG. 2, dicing process). Half-cut dicing is a dicing method in which a wafer is cut so as not to be cut completely. A plurality of half-cut grooves 10K are formed by this dicing process. The half cut groove 10K has an appropriate cutting depth with respect to the wafer 10, and does not reach the back surface 10R of the wafer 10. In the dicing process, the surface protection sheet 20 is cut when the wafer 10 is half-cut, but the surface protection sheet 20 prevents cutting water or the like from entering the circuit surface 10S.

  Next to the dicing step, the grinding sheet 30 is pasted to the cut surface protecting sheet 20 (see FIG. 3, pasting step).

  Thus, the back surface 10R of the wafer 10 is ground using a grinder in a state where the grinding sheet 30 and the surface protection sheet 20 are laminated.

  The grinder grinds the wafer 10 beyond the bottom surface of the half-cut groove 10K to a predetermined chip thickness, so that the wafer 10 is divided into a large number of chips separated by the half-cut groove 10K and separated into pieces (grinding). Process). The chips thus separated are fixed by the grinding sheet 30 laminated on the surface protection sheet 20, so that the chips are not dissipated, and damage due to contact between the chips is prevented. .

  FIG. 4 is a cross-sectional view showing a state in which the transfer tape 16 is attached to the ground surface of the separated chip. FIG. 5 is a cross-sectional view illustrating a processing step in which the surface protecting sheet 20 is processed and contracted.

  After the surface protection sheet 20 is cured, the transfer tape 16 is attached to the back surface (ground surface) 18R side of the singulated chip 18. The transfer tape 16 holds the singulated chips 18 with appropriate adhesiveness. In this state, the surface protection sheet 20 is processed. When the treatment is performed by heating, the heating may be performed by a heating furnace, a heat plate, or the like. When using a heat plate, it may be performed from the grinding sheet 30 side or from the transfer tape 16 side. By this treatment (treatment process), the shrinkable surface protection sheet 20 is shrunk, and as shown in FIG. 5, the surface protection sheet 20 and the upper surfaces of the singulated chips 18 (the circuit surface 10S and the chip 12). The contact area with the upper surface and the side surface is reduced. Further, the contracted end portion of the surface protecting sheet 20 is lifted from the surface of the individualized chip 18, and a slight gap can be formed between the surface of the individualized chip 18.

  Thereafter, the surface protecting sheet 20 and the grinding sheet 30 are peeled off from the singulated chips 18 (peeling step). At this time, since the grinding sheet 30 is firmly bonded to the surface protection sheet 20, the cut surface protection sheet 20 can be peeled integrally with the grinding sheet 30. Further, the contact surface of the surface protection sheet 20 with the individualized chips 18 is reduced, and a slight gap is formed between the peripheral portion of the surface protective sheet 20 and the surface of the individualized chips 18. Therefore, peeling of the surface protecting sheet 20 is further facilitated.

Next, the surface protection sheet 20 used in this embodiment will be described.
The surface protecting sheet 20 in the present invention includes a base material 22 and an adhesive layer 24. The base material 22 is a film that shrinks when subjected to some treatment. As a process for shrinking the base material 22, a heat treatment is preferable.
Examples of the substrate 22 having such properties include polyolefins such as polyethylene, polypropylene, and polymethylpentene, polyethylene terephthalate, and polyvinyl chloride. In particular, a heat-shrinkable polyethylene film is preferable.
The shrinkage ratio R (%) of the base material 22 is calculated by the following equation (1). The shrinkage ratio R when the base material 22 is heated to 120 ° C. is preferably 10 to 90%, and more preferably 20 to 80%. When the shrinkage rate R of the base material 22 is low, it becomes difficult to peel off the surface protection sheet 20 from the singulated chips 18 (see FIGS. 4 and 5, etc.), and when the shrinkage rate R is high, the surface prior to the peeling step. This is because the protective sheet 20 can shrink unnecessarily.
R = (L ₁ −L ₂ ) / L ₁ × 100 (1)
(L ₁ (mm) is a dimension before contraction, L ₂ (mm) is a dimension after contraction by heating)
The thickness of the base material 22 is preferably 2 to 160 μm, more preferably 10 to 50 μm. This is because if the substrate 22 is too thin, the circuit surface 10S (see FIGS. 1 and 2) cannot be sufficiently protected, and if the thickness is too large, shrinkage due to heating may be insufficient.
Moreover, the base material 22 may be formed using the material which shrinks | contracts by irradiation of energy rays, such as an ultraviolet-ray and an electron beam, besides the type which heat-shrinks.
The pressure-sensitive adhesive layer 24 of the surface protecting sheet 20 includes, for example, an acrylic pressure-sensitive adhesive as a main component. Since the pressure-sensitive adhesive layer 24 is moderately soft, when affixed to the circuit surface 10S, the adhesive layer 24 penetrates not only between the surface of the chip 12 but also between the chips 12 and contacts the circuit surface 10S. The pressure-sensitive adhesive layer 24 is preferably a layer made of an energy ray-curable pressure-sensitive adhesive that is cured by irradiation with energy rays such as ultraviolet rays and can be easily peeled off. The thickness of the pressure-sensitive adhesive layer 24 is preferably 2 to 200 μm, more preferably 5 to 150 μm.

Next, the grinding sheet 30 used in this embodiment will be described.
The grinding sheet 30 includes a base material 32 and an adhesive layer 34.
The substrate 32 is, for example, polyethylene, polypropylene, polybutene, polybutadiene, polymethylpentene, polyvinyl chloride, vinyl chloride copolymer, polyethylene terephthalate, polybutylene terephthalate, polyurethane, ethylene vinyl acetate copolymer, ionomer resin, ethylene It is formed of a film made of a (meth) acrylic acid copolymer, an ethylene / (meth) acrylic acid ester copolymer, polystyrene, polycarbonate, a fluororesin, and a water additive or a modified product thereof. These crosslinked films are also used. The above-mentioned substrate may be one kind alone, or may be a composite film in which two or more kinds are combined.
The Young's modulus of the substrate 32 is preferably in the range of 3.0 × 10 ^{7 to} 5.0 × 10 ⁹ Pa, and the product of the Young's modulus and the thickness of the substrate 32 is 1.0 × 10 ^3. It is preferable that it exists in the range of -1.0 * 10 < ⁷ > N / m. If the value of Young's modulus or the product of Young's modulus and thickness is less than the above range, the grinding sheet 30 becomes too soft, and the wafer may be cracked during grinding, or problems such as chipping may occur. In addition, the shape of the grinding sheet 30 is not maintained due to the thermal contraction of the surface protection sheet 20, which causes problems such as warping of the sheet. On the other hand, if the value of Young's modulus or the like exceeds the above range, the grinding sheet 30 that is too hard cannot follow the surface protection sheet 20 and may be peeled off from the surface protection sheet 20.
The thickness of the base material 32 becomes like this. Preferably it is 10-300 micrometers, More preferably, it is 50-200 micrometers.
The pressure-sensitive adhesive layer 34 includes, for example, an acrylic pressure-sensitive adhesive as a main component. As the pressure-sensitive adhesive layer 34, a strong pressure-sensitive adhesive that has strong adhesiveness that prevents the grinding sheet 30 from peeling off from the contracted surface protecting sheet 20 is selected. The thickness of the pressure-sensitive adhesive layer 34 is preferably 5 to 150 μm, more preferably 10 to 100 μm.

  Hereinafter, components and manufacturing methods of Examples of the surface protecting sheet 20 and the grinding sheet 30 in the present embodiment will be described.

  First, the formulation of the surface protecting sheet 20 in Example 1 will be described. Each compounding quantity shows the value of solid content conversion. A copolymer of 70 parts by weight of n-butyl acrylate, 10 parts by weight of methyl methacrylate and 20 parts by weight of 2-hydroxyethyl acrylate was prepared, and methacryloyloxyethyl isocyanate was 80% of the hydroxyl groups of 2-hydroxyethyl acrylate. Nart was added to make an acrylic adhesive. 0.185 parts by weight of an isocyanate-based crosslinking agent (manufactured by Nippon Polyurethane Co., Ltd., Coronate L) is added to 100 parts by weight of this acrylic pressure-sensitive adhesive, and the composition of the pressure-sensitive adhesive layer 24 in the surface protection sheet 20 of Example 1 is added. Manufactured.

  This pressure-sensitive adhesive layer composition was applied on a 38 μm-thick polyethylene terephthalate film that had been subjected to a release treatment so as to have a thickness of 100 μm, and heated at 100 ° C. for 1 minute. The pressure-sensitive adhesive layer 24 thus formed was bonded and transferred to a shrinkable polyethylene film for forming the base material 22 to obtain the surface protecting sheet 20 of Example 1.

  The shrinkable polyethylene film on which the substrate 22 was formed had a thickness of 35 μm, and the shrinkage rate when heated to 120 ° C. was 50%.

The shrinkage ratio R (%) was calculated from the above-described equation (1) from the dimension L ₁ (mm) before shrinkage in the polyethylene film and the dimension L ₂ (mm) after shrinkage due to heating.
R = (L ₁ −L ₂ ) / L ₁ × 100 (1)

  As the grinding sheet 30 of Example 1, an acrylic strong adhesive film having a pressure-sensitive adhesive layer 34 having a thickness of 40 μm was used. In this grinding sheet 30, the substrate 32 had a Young's modulus of 4600 MPa and a thickness of 100 μm, and the product of the Young's modulus and the thickness was 460,000 N / m.

  In Example 2, the base material 22 of the surface protecting sheet 20 was formed using a shrinkable polyethylene film having a shrinkage rate of 70% when heated at 120 ° C., and the same surface protecting sheet 20 as in Example 1 and A grinding sheet 30 was used. In Example 3, the same surface protecting sheet 20 and grinding sheet 30 as those in Examples 1 and 2 were used, except that a shrinkable polyethylene film having a shrinkage ratio of 30% when heated at 120 ° C. was used as the base material 22. It was.

  Next, evaluation tests and results of the surface protecting sheet 20 and the grinding sheet 30 of Examples 1 to 3 will be described.

  First, a plurality of chips (length 8 mm × width 8 mm × thickness 150 μm, adhesive layer thickness 10 μm) are arranged on a dummy wafer surface of 8 inches in diameter and 725 μm in thickness so that the distance between the chips is 4 mm. Bonded with. The wafer thus formed was heated at 160 ° C. for 1 hour and cured to obtain an evaluation wafer.

  The heat-shrinkable surface protective sheet 20 was attached to the surface of the wafer for evaluation (chip-side surface) on the evaluation wafer using a vacuum laminator (RAD-3800, manufactured by Lintec Corporation). Next, using a dicing apparatus (DFD 6361, manufactured by DISCO Corporation), half-cut dicing of the wafer is performed with the surface protection sheet 20 from the wafer surface side between the chips bonded to the chip side surface, the width is 35 μm, and the wafer A grid-like groove having a depth of 230 μm from the surface (390 μm from the chip surface) was formed.

  The grinding sheet 30 was pasted on the surface protection sheet 20 using a laminator (RAD-3510F / 12, manufactured by Lintec Corporation). Then, it was thinned and ground into individual chips 18 (12 mm × 12 mm) at the same time as the evaluation wafer was thinned by a backside polishing apparatus (DGP 8760, manufactured by Disco Corporation) until the thickness of the evaluation wafer became 200 μm.

  Then, using a tape mounter with an ultraviolet irradiation unit (RAD-2700F / 12, manufactured by Lintec Corporation), the transfer tape 16 (Adwill D-210, manufactured by Lintec Corporation) is separated by irradiating ultraviolet rays from the sheet surface side. The chip 18 was attached to the ground surface side. Then, the surface protection sheet 20 was heated and shrunk by allowing to stand for 30 seconds so that the surface of the transfer tape 16 was in contact with an 80 ° C. hot plate. The surface protective sheet 20 and the grinding sheet 30 thus contracted were peeled off from the singulated chips 18 held by the transfer tape 16.

After the surface protecting sheet 20 and the grinding sheet 30 were peeled off, the penetration of grinding water into the surface of the singulated chips 18, contamination, and the presence or absence of adhesive residue were observed and evaluated.
Table 1 shows the results of the evaluation tests of the examples.

  As is clear from the results in Table 1, in the examples of the present invention, no adhesive residue on the singulated chips 18, intrusion of grinding water, or surface contamination of the singulated chips 18 was observed. As is apparent from the above, in the embodiment of the present invention, the surface protection sheet 20 reliably protects the wafer 10 in the dicing step, and the grinding water is prevented from entering the wafer surface. No. 30 reliably prevented, and the heat-shrinked surface protecting sheet 20 was peeled without any adhesive residue, and generally good results were shown.

  As described above, according to the present embodiment, the DBG process using the surface protecting sheet 20 and the grinding sheet 30 in combination facilitates back surface grinding and chip separation for a large uneven surface 10 having a height difference of 100 μm or more. In addition, it is possible to prevent defects such as chipping and to peel the sheet without any adhesive residue.

  This is because the surface protection sheet 20 is affixed to the circuit surface 10S having large irregularities, and the circuit surface 10S is protected by half-cut dicing together with the surface protection sheet 20 (see FIG. 2 etc.) and for grinding. This is because the back surface of the wafer is ground in a state where the sheets 30 are stacked (see FIG. 4 and the like), so that the surface of the separated chips can be protected by the grinding sheet 30. Furthermore, adhesive shrinkage can be reliably prevented by shrinking and peeling the heat-shrinkable surface protecting sheet 20 (see FIG. 5 and the like).

DESCRIPTION OF SYMBOLS 10 Wafer 10K Half cut groove 10R Back surface 10S Circuit surface 12 Chip 16 Transfer tape 18 Divided chip 20 Surface protection sheet 22 Base material 24 Adhesive layer 30 Grinding sheet 32 Base material 34 Adhesive layer

Claims (1)

A dicing step of performing half-cut dicing of the wafer from the surface protection sheet side in a state where a surface protection sheet is attached to the circuit surface of the wafer provided with unevenness having a height difference of 100 μm or more;
An attaching step of attaching a grinding sheet to the surface protecting sheet;
Grinding the back surface of the wafer to separate the wafer into chips;
A treatment step of treating the surface protection sheet to reduce a contact area between the surface protection sheet and the circuit surface;
A method for processing a semiconductor wafer, comprising: a peeling step of peeling the treated surface protecting sheet and the grinding sheet.

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