JP2010238000A - Device for bus connection/disconnection of module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect a failure in a transmission system circuit of a module, and upon the detection, reliably disconnect the failed module from a system bus. <P>SOLUTION: In a device for bus connection/disconnection of modules, a module 4A includes a rereading input buffer 16 for rereading a transmission signal TXD fed to the system bus via an output buffer 13 into the module as a transmission return signal TXD_R via a different connector pin, and a monitoring circuit 17 for asserting a transmission anomaly if the transmission return signal TXD_R remains unchanged for a set time. Upon a transmission anomaly assertion signal, a buffer control circuit 19 inactivates an output buffer enable signal EN2 to disconnect the output buffer 13 from the system bus and activates a bypass buffer enable signal EN1 to put a bypass buffer 11 into a bypass mode. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a computer system in which a plurality of modules are daisy chain connected to a system bus, and more particularly to a module bus connection / disconnection device.

  As a computer system construction method, there is a building block method in which a plurality of functional modules are connected by a system bus. For example, the programmable controller (PLC) has a power supply module 2, a CPU module 3, and various functional modules / IO modules 4 </ b> A to 4 </ b> N in accordance with an application, as shown in FIG. The bus connection is the mainstream.

  In addition to structurally fixing each module, the functions of the base 1 include power supply to each module as a system bus and data transfer between the CPU module and each other module, as shown in FIG. Each module has a T-branch connection to the data bus constituting the system bus. The branch length of the T-branch connection can be operated practically without any problem up to a certain transmission speed by wiring the pattern within the shortest distance in the module. However, if the data transmission speed on the system bus exceeds a certain level, the influence of reflection of the transmission signal cannot be ignored and normal data transmission cannot be performed.

  On the other hand, the daisy chain connection method for each module shortens the transmission path length and makes a one-to-one connection between the modules, reducing the reflection of the transmission waveform. Yes.

  A daisy chain connection system bus configuration is shown in FIG. In the case of the daisy chain connection method, a module bus connection / disconnection device that bypasses on the base is required for a slot in which no module is mounted. This bus connecting / disconnecting device is performed by controlling enable signals EN1, EN2 for the bypass buffer 11 and the output buffer 13 by an internal circuit 14 provided on the module side of each stage, as schematically shown in FIG. Patent Documents 1, 2, and 3).

  FIG. 10 shows a specific circuit configuration example of the bus connection / disconnection device. A bypass buffer 11 is inserted into the data bus of the base 1 for each module, and an input buffer 12 that takes in a transmission signal input to the bypass buffer 11 in the module to be mounted (showing the case of 4A); An output buffer 13 for placing an output signal from the module on the output side of the bypass buffer 11 is provided. Switching of bypass / inhibition of the transmission signal by the bypass buffer 11 is controlled by active (L) / inactive (H) of the bypass buffer enable signal EN1 generated from the internal circuit 14 of the module. The switching of the output / inhibition of the transmission signal to be carried on is controlled by the active (L) / inactive (H) of the output buffer enable signal EN2 applied to the output buffer 13.

  In this configuration, when the module 4A is normal, ENI is set to inactive “H” to set the bypass buffer output to a high impedance state, and EN2 is set to active “L” to set the output buffer 13 to the output state. Daisy chain connection is configured. In the slot where the module is not mounted, the bypass buffer 11 is set in the output state by the pull-down resistor 15 of the enable signal EN1.

JP2008-152501 Japanese Patent Laid-Open No. 5-46543 Japanese Patent Laid-Open No. 6-230863

  As described above, for the bus connection / disconnection control of the modules in the system bus in which the modules are daisy chain connected, the active (L) / inactive (H) of the bypass buffer enable signal EN1 and the output buffer enable signal EN2 are used. To control.

  Here, a specific example of module separation control will be described. First, it is assumed that the receiving system circuit from the system bus of the module has failed and cannot be normally received. In the case of daisy chain, if the receiving system does not function properly, transmission to the next slot also does not function. In this case, the received data is monitored by the internal circuit of the module 14, and if normal reception is not possible for a certain period of time, it is determined that the receiving system circuit has failed and the own module is disconnected from the system bus. It is possible to avoid the influence on the whole.

  However, if the transmission circuit for the system bus of the module fails and cannot be transmitted normally to the system bus, the failure cannot be determined by the monitoring method using the received data. In the case of daisy chain connection, if the failure of the transmission system circuit cannot be detected, communication is interrupted and communication of the entire system bus does not function.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a module bus connection / disconnection device that can detect a failure in a transmission system circuit of a module and can reliably disconnect a failure module from a system bus by this detection.

  In order to solve the above-mentioned problems, the present invention monitors the abnormality of the transmission system circuit by reading back the transmission signal from the own module through the system bus, or the occurrence of the abnormality of the reception system circuit of the module connected to the lower slot. An abnormality of the transmission system circuit is monitored by checking the signal, and when the transmission system circuit is determined to be faulty by these monitoring, the faulty module is disconnected from the system bus, and has the following configuration.

(1) A system bus that connects multiple modules in a daisy chain is configured to insert a bypass buffer for each module in the data bus.
Each module connected to the data bus by a connector includes a reception processing circuit that takes in an output signal output from a higher-order module of the module and transmitted to the input side of the bypass buffer as a reception signal RXD through the input buffer, and the module A transmission processing circuit for placing the output signal from the output on the output side of the bypass buffer through an output buffer, and a bypass buffer enable signal EN1 applied to the bypass buffer for switching control of bypass / inhibition of the transmission signal by the bypass buffer And a buffer control circuit for generating an output buffer enable signal EN2 to be provided to the output buffer for switching control of output / inhibition of transmission signals carried on the data bus from its own module,
Each of the modules eliminates a change in the transmission return signal TXD_R, and a read back input buffer that reads the transmission signal TXD loaded on the system bus through the output buffer to the module as a transmission return signal TXD_R through another pin of the connector. Equipped with a monitoring circuit that determines a transmission error when the state continues for a set time,
The buffer control circuit inactivates the output buffer enable signal EN2 in response to the transmission abnormality determination signal to disconnect the output buffer from the system bus, and activates the bypass buffer enable signal EN1 to activate the bypass buffer. It is characterized by having a means for making the bypass state.

(2) As a means for diagnosing abnormalities in the module when the power is turned on and disconnecting from the bus,
The buffer control circuit includes means for inactivating the bypass buffer enable signal EN1 and activating the output buffer enable signal EN2 to connect to the system bus,
The reception processing circuit is provided with means for selecting the read-back signal TXD_R by a multiplexer instead of the reception signal RXD, and determining a transmission abnormality by comparing a match / mismatch between the signal and the transmission signal TXD. ,
The buffer control circuit inactivates the output buffer enable signal EN2 in response to the transmission abnormality determination signal to disconnect the output buffer from the system bus, and activates the bypass buffer enable signal EN1 to activate the bypass buffer. It is characterized by having a means for making the bypass state.

(3) A system bus that connects multiple modules in a daisy chain is configured to insert a bypass buffer for each module in the data bus.
Each module connected to the data bus by a connector includes a reception processing circuit that takes in an output signal output from a higher-order module of the module and transmitted to the input side of the bypass buffer as a reception signal RXD through the input buffer, and the module A transmission processing circuit for placing the output signal from the output on the output side of the bypass buffer through an output buffer, and a bypass buffer enable signal EN1 applied to the bypass buffer for switching control of bypass / inhibition of the transmission signal by the bypass buffer And a buffer control circuit for generating an output buffer enable signal EN2 to be provided to the output buffer for switching control of output / inhibition of transmission signals carried on the data bus from its own module,
Each of the modules includes a monitoring circuit that outputs the abnormality occurrence signal RXD_ERR1 to the upper module when the change of the reception signal RXD from the upper module disappears and this state continues for the set time tR1.
The buffer control circuit includes:
When receiving the abnormality occurrence signal RXD_ERR1 from the lower module, the output buffer enable signal EN2 is made inactive to disconnect the output buffer from the system bus, and the bypass buffer enable signal EN1 is made active to make the bypass buffer enable signal END inactive. Means for bypassing the buffer;
When the reception abnormality signal RXD_ERR1 has no reception abnormality after a lapse of a predetermined time tT2 from the time when the abnormality occurrence signal RXD_ERR1 is received in the bypass buffer bypass state, the module disconnection of the own module due to the abnormality occurrence is continued, and the reception abnormality And means for reconnecting the own module to the system bus when the signal RXD_ERR1 has a reception abnormality.

  As described above, according to the present invention, the transmission signal from the own module is read back through the system bus to monitor the abnormality of the transmission system circuit, or the abnormality occurrence signal of the reception system circuit of the module connected to the lower slot is detected. By checking for abnormalities in the transmission system circuit, if it is determined that the transmission system circuit is faulty, the faulty module is disconnected from the system bus. The faulty module can be reliably separated from the system bus by detection, and the communication function of the entire system bus can be secured.

1 is a circuit configuration of a bus connection / disconnection device according to a first embodiment of the present invention. The operation timing chart at the time of abnormality of a transmission system circuit. The circuit structure of the bus connection / disconnection apparatus which shows Embodiment 2 of this invention. The operation timing chart at the time of abnormality of a transmission system circuit. The operation timing chart at the time of abnormality of a receiving system circuit. Assembly structure of programmable controller. The bus connection diagram of the module by a system bus. The system bus block diagram of a daisy chain connection system. The schematic block diagram of a bus connection / disconnection apparatus. The example of a specific circuit structure of a bus connection / disconnection apparatus.

(Embodiment 1)
FIG. 1 is a circuit configuration diagram of a bus connection / disconnection device showing an embodiment of the present invention, and parts equivalent to those in FIG. 10 are denoted by the same reference numerals.

  In FIG. 1, the transmission signal TXD loaded on the system bus through the output buffer 13 is read back into the own module as a transmission return signal TXD_R through another pin of the connector. In the module (referred to as 4A), the TXD_R signal is taken into the monitoring circuit 17 and used as one input of the multiplexer 18. The monitoring circuit 17 monitors whether the transmission system circuit is abnormal by monitoring the transmission return signal TXD_R that has been read back, and inputs an output signal TXD_ERR to the buffer control circuit 19 when it is determined that there is an abnormality. On the other hand, the multiplexer 18 switches the input data signal RXD and the transmission return signal TXD_R received through the input buffer 12 and inputs them to the reception processing circuit 20.

  FIG. 2 shows an operation timing chart when the transmission system circuit is abnormal, and the module monitoring and disconnection control will be described with reference to this figure. First, in the connected state of the module 4A, the reception signal RXD that has passed through the input buffer 12 is received by the reception processing circuit 20 through the multiplexer 18, and the transmission signal TXD is transmitted from the transmission processing circuit 21 through the output buffer 13 by this reception.

  In this transmission, the transmission signal TXD is read back to the monitoring circuit 17 and the multiplexer 18 through the read back input buffer 16 as a transmission return signal TXD_R. At this time, the monitoring circuit 17 determines that there is a transmission abnormality when the transmission return signal TXD_R does not change and the L level or H level state continues for the set time tT1, and sets the output signal TXD_ERR to the H level.

  In the buffer control circuit 19, when the output signal TXD_ERR becomes H level, the output buffer enable signal EN2 is set to H level (inactive) and is disconnected from the system bus by the output buffer 13, and the bypass buffer enable signal EN1 is set to L level (active). Thus, the bypass buffer 11 on the base is set to the data bypass state.

  As a result, the module 4A is disconnected from the system bus and communication continues normally. When the bypass buffer 11 enters the bypass state, the output signal TXD_ERR of the monitoring circuit becomes L, so that the output signal TXD_ERR latches the abnormality when L → H changes, thereby avoiding connection to the system bus again.

  In order to diagnose the abnormality of the own module at the time of power-on and disconnect from the bus, the buffer control circuit 19 is connected to the system bus with the bypass buffer enable signal EN1 set to H and the output buffer enable signal EN2 set to L. Thereafter, the reception processing circuit 20 selects the read-back signal TXD_R by the multiplexer 18 and fetches it into the reception circuit, and compares this signal with the transmission signal TXD to determine whether transmission is normal / abnormal. In this case, the buffer control circuit 19 can set the output buffer enable signal EN2 to H to disconnect the output buffer from the system bus, and set the bypass buffer enable signal EN1 to L to put the bypass buffer 11 in the bypass state. .

(Embodiment 2)
The configuration of the present embodiment is shown in FIG. 1 differs from FIG. 1 in that the monitoring circuit 22 for the received signal RXD has two timers with different time limits, and the output signal RXD_ERR1 of the monitoring circuit 22 is sent to the buffer control circuit (19) in the upper slot through the system bus. The output signal RXD_ERR2 of the monitoring circuit 22 is input to the buffer control circuit 19 in the own module.

  FIG. 4 shows an operation timing chart when the transmission system circuit is abnormal, and the module abnormality monitoring and disconnection control will be described with reference to this figure. First, when a failure occurs in the transmission system circuit of the module (referred to as 4A) mounted in the slot N (time t1), the monitoring circuit (22) of the module (referred to as 4B) mounted in the slot N + 1 receives the received signal. When the RXD does not change and the L level or H level state continues for the set time tR1, the reception abnormality signal RXD_ERR1 is set to the H level (time t2).

  When the reception abnormality signal RXD_ERR1 becomes H level, the buffer control circuit 19 sets the abnormality flag ERR_FLG in its own circuit to H level. When the abnormality flag ERR_FLG becomes H level, the enable signal EN2 is set to H level to disconnect the module 4A from the system bus, and the enable signal EN1 is set to L level to place the bypass buffer 11 on the base in a bypass state. As a result, the system bus continues normal communication except for the module 4A.

  When the bypass buffer 11 enters the bypass state, the reception abnormality signal RXD_ERR1 from the lower module (slot) again becomes the L level without reception abnormality (time t3). On the other hand, the check signal CHK_FLG in the buffer control circuit 19 is set to H level after a lapse of a predetermined time tT2 after the abnormality flag ERR_FLG in the buffer control circuit 19 is set to H level (time t4). At this timing, the reception abnormality signal RXD_ERR1 is checked. If the reception abnormality signal RXD_ERR1 is at L level, the abnormality flag ERR_FLG is held at H level and disconnection due to occurrence of abnormality is continued.

  Next, FIG. 5 shows an operation timing chart when the reception system circuit of the module mounted in the lower slot N + 1 is abnormal. In the module 4B of the lower slot N + 1, the reception system circuit fails (time t1), and the reception abnormality signal RXD_ERR1 is set to the H level after time tR1 (time t2). Further, after time tR2, the reception abnormality signal RXD_ERR2 is set to H level, and the buffer control circuit (19) disconnects the own module 4B from the bus (time t5).

  In the module 4A in the slot N, when the reception abnormality signal RXD_ERR1 becomes H level, the flag ERR_FLG in the buffer control circuit 19 is set to H level, and the buffer control circuit 19 sets the enable signal EN2 to H level to remove the module 4A from the system bus. Disconnect once (time t2). Thereafter, the reception abnormality signal RXD_ERR1 is checked after time tT2, and if it remains at the H level (with reception abnormality), it is determined that the reception system in the slot N + 1 has failed, and the module 4A is reconnected to the system bus (time t4). .

DESCRIPTION OF SYMBOLS 1 Base 2 Power supply module 3 CPU module 4A-4N Functional module / IO module 11 Bypass buffer 12 Input buffer 13 Output buffer 14 Internal circuit 15 Pull-down resistor 16 Readback input buffer 17, 22 Monitor circuit 18 Multiplexer 19 Buffer control circuit 20 Reception Processing circuit 21 Transmission processing circuit

Claims (3)

A system bus that connects multiple modules in a daisy chain is connected to the data bus by a bypass buffer for each module.
Each module connected to the data bus by a connector includes a reception processing circuit that takes in an output signal output from a higher-order module of the module and transmitted to the input side of the bypass buffer as a reception signal RXD through the input buffer, and the module A transmission processing circuit for placing the output signal from the output on the output side of the bypass buffer through an output buffer, and a bypass buffer enable signal EN1 applied to the bypass buffer for switching control of bypass / inhibition of the transmission signal by the bypass buffer And a buffer control circuit for generating an output buffer enable signal EN2 to be given to the output buffer for switching control of output / inhibition of a transmission signal placed on the data bus from its own module,
Each of the modules eliminates the change of the transmission return signal TXD_R, and the read input buffer for reading back the transmission signal TXD loaded on the system bus through the output buffer to the module as the transmission return signal TXD_R through another pin of the connector. Equipped with a monitoring circuit that determines a transmission error when the state continues for a set time,
The buffer control circuit inactivates the output buffer enable signal EN2 in response to the transmission abnormality determination signal to disconnect the output buffer from the system bus, and activates the bypass buffer enable signal EN1 to activate the bypass buffer. A module bus connecting / disconnecting device comprising means for bypassing the module. As a means of diagnosing the occurrence of an error in the module at power-on and disconnecting from the bus,
The buffer control circuit includes means for inactivating the bypass buffer enable signal EN1 and activating the output buffer enable signal EN2 to connect to the system bus,
The reception processing circuit is provided with means for selecting the read-back signal TXD_R by a multiplexer instead of the reception signal RXD, and determining a transmission abnormality by comparing a match / mismatch between the signal and the transmission signal TXD. ,
The buffer control circuit inactivates the output buffer enable signal EN2 in response to the transmission abnormality determination signal to disconnect the output buffer from the system bus, and activates the bypass buffer enable signal EN1 to activate the bypass buffer. 2. The module bus connection / disconnection device according to claim 1, further comprising means for bypassing the module. A system bus that connects multiple modules in a daisy chain is connected to the data bus by a bypass buffer for each module.
Each module connected to the data bus by a connector includes a reception processing circuit that takes in an output signal output from a higher-order module of the module and transmitted to the input side of the bypass buffer as a reception signal RXD through the input buffer, and the module A transmission processing circuit for placing the output signal from the output on the output side of the bypass buffer through an output buffer, and a bypass buffer enable signal EN1 applied to the bypass buffer for switching control of bypass / inhibition of the transmission signal by the bypass buffer And a buffer control circuit for generating an output buffer enable signal EN2 to be given to the output buffer for switching control of output / inhibition of a transmission signal placed on the data bus from its own module,
Each of the modules includes a monitoring circuit that outputs the abnormality occurrence signal RXD_ERR1 to the upper module when the change of the reception signal RXD from the upper module disappears and this state continues for the set time tR1.
The buffer control circuit includes:
When receiving the abnormality occurrence signal RXD_ERR1 from the lower module, the output buffer enable signal EN2 is made inactive to disconnect the output buffer from the system bus, and the bypass buffer enable signal EN1 is made active to make the bypass buffer enable signal END inactive. Means for bypassing the buffer;
When the reception abnormality signal RXD_ERR1 has no reception abnormality after a lapse of a predetermined time tT2 from the time when the abnormality occurrence signal RXD_ERR1 is received in the bypass buffer bypass state, the module disconnection of the own module due to the abnormality occurrence is continued, and the reception abnormality A module bus connecting / disconnecting device comprising means for reconnecting the own module to the system bus when the signal RXD_ERR1 is abnormally received.

Images