JP2010225711A - Polishing method - Google Patents

Abstract

An object of the present invention is to provide a technique capable of suppressing film peeling in a CMP process and increasing a polishing rate reduced with a decrease in polishing pressure.
A CMP method for processing a substrate by subjecting the substrate to CMP, wherein the pressure applied to the central portion of the substrate is 0.05 to 1.5 psi during the CMP, and the substrate is disposed on the outer periphery of the substrate. The pressure applied to the retainer ring is 3 to 15 times the pressure applied at the center of the substrate.
[Selection] Figure 5

Description

  The present invention relates to a polishing method. In particular, the present invention relates to a CMP (Chemical Mechanical Polishing) method. For example, the present invention relates to a CMP method used in forming a wiring of a semiconductor device.

  In the manufacture of LSI (semiconductor integrated circuit), a polishing technique such as CMP is employed. That is, CMP is used for planarizing the interlayer insulating film. CMP is also used for forming a metal connection portion between the upper layer wiring and the lower layer wiring and forming a buried wiring.

  By the way, in order to achieve high-speed LSI performance, the wiring material has been changed from Al (Al alloy) to low resistance Cu (Cu alloy). A so-called damascene method is used for forming the Cu wiring.

In wiring formation using the damascene method, an insulating film (for example, silicon oxide (SiO ₂ )) in which an interlayer connection hole and a wiring groove (hereinafter, the hole and groove are collectively referred to as a groove) is formed. A barrier metal film is provided on the insulating film made of a laminated film such as a film or a silicon nitride (SiN) film for the purpose of strengthening adhesion and preventing Cu diffusion, and a Cu wiring film is provided on the barrier metal film. It has been. The SiN film is provided as an etching stopper. Then, the SiN film at a portion that needs to be connected to the lower layer wiring is selectively removed. The barrier metal film is made of Ti, W, Ta having a thickness of about 10 to 50 nm, or a nitride of the metal or a nitrogen silicon compound. As the insulating film, an insulating film (Low-k) material having a low relative dielectric constant has begun to be used in place of SiO ₂ and SiN. This is because the capacitance between wirings is reduced by using an insulating film having a low relative dielectric constant. This is because the delay of the signal passing through the wiring is reduced and the performance of the LSI is improved by reducing the capacitance. As this type of Low-k film, a fluorine-containing silicon oxide film (SiOF) and a carbon-containing silicon oxide film (SiOC) are known. Note that the mechanical properties of the fluorine-containing silicon oxide film are equivalent to the mechanical properties of the SiO ₂ film. Therefore, when SiOF is used as an insulating film, LSI manufacturing technology when SiO ₂ is used as an insulating film can be used. In recent years, techniques for further reducing the dielectric constant by introducing holes in the low-k film have been studied.

  Now, a low-k film having a relative dielectric constant of 3 or less adopted as an insulating film has low mechanical strength. Therefore, when CMP is performed on the Cu film or the barrier metal film, a problem such as damage or peeling of the low-k film in the lower layer is likely to occur.

Several techniques for solving this problem have been proposed.
For example, when polishing a Cu film by CMP, by increasing the pressure applied to the retainer ring more than the pressure applied to the semiconductor substrate (wafer), the polishing rate of the substrate peripheral portion is made slower than the substrate central portion, and the substrate peripheral portion Has been proposed (Japanese Patent Laid-Open No. 2005-38935), in which the Cu film is left and the Cu film remaining on the periphery of the substrate is dissolved and removed with a solution.

  Also, when CMP is performed on the conductive film (wiring film) or insulating film, the film thickness at the wafer periphery is made thinner than the film thickness at the wafer center, and the polishing rate at the wafer periphery is polished at the wafer center. A technique for performing CMP at a speed lower than the speed has been proposed (Japanese Patent Laid-Open No. 2008-227413).

  In addition, a local polishing method in which a wafer is rotated face-up and a polishing pad having a smaller diameter than that of the wafer is rotated and pressed against the wafer, and a wafer having a pattern formed between materials having a relative dielectric constant of 2 or less is set to 0. A technique for performing CMP by setting the polishing pressure to 0.01 to 0.2 psi has been proposed (Japanese Patent Laid-Open No. 2004-327766).

  In addition, the CMP is performed by pressing the polishing pad against the wafer, and the CMP is performed while the polishing temperature is controlled to 15 to 70 ° C. and the polishing pressure is controlled to 0.1 to 2.0 psi. Has been proposed (Japanese Patent Laid-Open No. 2008-244376).

JP 2005-38935 A JP 2008-227413 A JP 2004-327666 A JP 2008-244376 A

  The CMP is performed by the following procedure using an apparatus as shown in FIG. As the CMP polishing pad 12, a pad made of polyurethane resin is mainly used. The polishing pad 12 is affixed on the polishing surface plate 11 that is rotationally driven by a motor (not shown). A groove or a hole (not shown) is formed on the surface of the polishing pad 12. This improves the CMP characteristics (polishing rate, uniformity). Alternatively, waste generated by CMP is efficiently discharged, and polishing scratches are less likely to occur. A wafer (semiconductor substrate) 15 is fixed to the polishing head 13. The wafer (semiconductor substrate) 15 is rotated by a motor (not shown). At this time, a predetermined pressure is applied and the wafer 15 is pressed against the polishing pad 12. When the slurry is supplied from a slurry supply nozzle 17 provided substantially at the upper center of the polishing pad 12, the surface of the wafer 15 is scraped off by the surface of the polishing pad 12 and abrasive grains contained in the slurry. Incidentally, in order to prevent the wafer 15 from being detached from the polishing head 13 during CMP, a so-called annular component called a retainer ring 14 is provided around the wafer 15. In recent years, a CMP apparatus that can pressurize the pressure applied to the wafer 15 and the pressure applied to the retainer ring separately has become mainstream. When CMP is performed on a plurality of types of thin films, a dedicated slurry is often used for each. In such a case, a CMP apparatus including a plurality of polishing surface plates is used, and the wafer 15 is transported to each polishing surface plate for each type of slurry to be used, and CMP is continuously performed. The surface state of the polishing pad 12 has a strong influence on the CMP characteristics. Therefore, in order to keep the polishing pad surface in a certain state, a so-called dressing process is often performed. For example, a disk-shaped (doughnut-shaped) dresser 16 to which diamond particles are fixed is pressed against the surface of the polishing pad 12 while being rotated, and the surface is roughened. Dressing is performed simultaneously with CMP of the wafer 15 (in-situ dressing), and is performed before CMP or during the time when CMP is not performed (ex-situ dressing). There is.

Now, it is known that the polishing rate RR in CMP follows Preston's formula [I].
Formula [I]
RR = k ・ P ・ V
[P = polishing pressure V = relative speed between wafer and polishing pad k = Preston coefficient]
From this formula [I], it can be seen that the polishing pressure P should be increased or the relative speed V should be increased in order to improve the polishing rate RR.

  It is also known that the polishing rate is proportional to the frictional force between the wafer and the polishing pad, and that the polishing temperature increases as the frictional force increases. In particular, in the case of CMP in which the contribution of chemical polishing is large, the influence of the polishing temperature is larger than in the case of simple mechanical polishing.

  In the CMP technique proposed in Patent Documents 1 to 4, the pressure P applied to the wafer is reduced to reduce the frictional force applied to the wafer and to suppress film peeling during the CMP process. It is.

  However, although the CMP techniques proposed in Patent Documents 1 and 2 can suppress film peeling during the CMP process at the wafer peripheral portion, the effect is small against film peeling that occurs at the wafer central portion.

  In the CMP technique proposed in Patent Document 3, the polishing pressure applied to the wafer is set to an ultra-low pressure of 0.01 to 0.2 psi, but the relative speed between the wafer and the polishing pad is greatly increased. The frictional force applied to increases. Therefore, the CMP technique disclosed in Patent Document 3 cannot be said to be an effective means for suppressing film peeling.

  The CMP technique proposed in Patent Document 4 requires improvement of the apparatus in order to control the temperature of the slurry supplied onto the polishing pad. Furthermore, it is difficult to control the temperature of the slurry with good followability.

  Therefore, the problem to be solved by the present invention is to provide a technique capable of suppressing film peeling in the CMP process and increasing the polishing rate reduced with a decrease in polishing pressure. In particular, it is to provide a technique capable of increasing the polishing rate without increasing the frictional force applied to the wafer and maintaining good uniformity within the wafer surface.

  For example, in a Cu CMP process at a node of 90 nm to 65 nm, it is common to set the pressure applied to the wafer within a range of 2 psi to 4 psi. In a CMP apparatus that pressurizes the pressure applied to the wafer and the pressure applied to the retainer ring separately, when the pressure applied to the wafer falls within the above pressure range, the pressure applied to the retainer ring from the wafer is disclosed as disclosed in Patent Document 1. If it is increased, the polishing rate of the wafer outer peripheral portion becomes slower than the wafer central portion. For this reason, the uniformity in the wafer surface is deteriorated.

  By the way, the present inventor gradually applied the pressure applied to the retainer ring, which has not been set to high pressure in the past, in an experiment in which the pressure applied to the wafer during the CMP process is polished in a low pressure region of 0.05 to 1.5 psi. As a result, it has been found that the polishing rate can be significantly improved over the entire wafer surface.

  In other words, for the conventional CMP technology that has a strong mechanical polishing factor (by increasing the pressure applied to the wafer, the friction force between the wafer and the polishing pad is increased, thereby increasing the polishing rate). When the pressure applied to the wafer is reduced, the frictional force between the wafer and the polishing pad is small, but by increasing the retainer ring pressure, the polishing temperature rises almost uniformly within the wafer surface. They found that CMP technology with enhanced chemical polishing elements with improved polishing speed with good uniformity could be used. If the pressure applied to the wafer is reduced, film peeling and film damage are less likely to occur. On the other hand, if the pressure applied to the retainer ring arranged around the wafer is increased, the polishing rate is improved. If the technical idea such as the above is utilized well, it came to a revelation that the above problems could be solved.

  Based on the above findings, the present invention has been achieved.

That is, the above problem is
A CMP method for processing a substrate by subjecting it to CMP,
During the CMP,
The pressure applied at the center of the substrate is 0.05 to 1.5 psi,
This is solved by a CMP method in which the pressure applied to the retainer ring disposed on the outer periphery of the substrate is 3 to 15 times the pressure applied to the central portion of the substrate.

  Since the polishing pressure applied to the substrate was lowered, film peeling during the CMP process was suppressed, and the decrease in the polishing rate accompanying the decrease in polishing pressure was improved by increasing the pressure applied to the retainer ring arranged on the outer periphery of the substrate. . In other words, the pressure applied to the retainer ring is increased to increase the temperature, thereby improving the polishing rate, thereby compensating for the decrease in polishing rate caused by lowering the polishing pressure applied to the substrate. . Therefore, it is not necessary to sacrifice the polishing rate to prevent film peeling and film damage. Then, CMP is performed with good in-plane uniformity. In addition, the above features can be obtained without special modification of the apparatus.

Schematic of the main part of the CMP apparatus Schematic diagram of the polishing head Graph showing the relationship between retainer ring pressure / wafer pressure and polishing temperature Graph showing the relationship between wafer position and polishing speed Graph showing the relationship between retainer ring pressure / wafer pressure and polishing rate Cu wiring formation process diagram

  The present invention is a CMP method. For example, a CMP method used for forming a wiring of a semiconductor device. More specifically, it is a CMP method applied to a substrate having, for example, a porous insulating film (porous insulating film; relative dielectric constant is 3 or less). The present invention can be implemented using a normal CMP apparatus having a polishing head and a polishing surface plate.

  During the CMP, the pressure applied at the center of the substrate was set to 0.05 to 1.5 psi (more preferably 0.1 psi to 1.0 psi). The central portion is a region having a size of about 70% of the substrate dimension from the center. Of course, it may be larger than this. For example, it is further preferable that the pressure applied in the region of about 90% of the substrate size from the center is 0.05 to 1.5 psi (more preferably 0.1 psi or more and 1.0 psi or less). In particular, it is more preferable that the pressure applied in the region of about 95% of the substrate size from the center is 0.05 to 1.5 psi (more preferably 0.1 psi or more and 1.0 psi or less). That is, in the present invention, the pressure on the substrate is low. Therefore, film peeling and film damage are unlikely to occur during CMP. When the pressure applied to the substrate is too small, the in-plane uniformity of the polishing rate is deteriorated and the variation in CMP is increased. Moreover, pressure control became difficult, and variations in CMP were likely to occur. Therefore, in order to make such a problem as small as possible, it was set to 0.05 psi or more. The upper pressure limit was 1.5 psi. This is because if the pressure is higher than this, film peeling or film damage is likely to occur. In particular, when CMP is performed on a substrate provided with a fragile Low-k film, film peeling or film damage is likely to occur.

  During the CMP, the pressure applied to the retainer ring disposed on the outer periphery of the substrate was set to 3 to 15 times (more preferably 4 times or more, 10 times or less) the pressure applied to the central portion of the substrate. That is, when the pressure applied to the retainer ring is as small as less than three times the pressure applied to the substrate, the improvement in the polishing rate was low. And the improvement of the fall of the grinding | polishing rate resulting from having reduced the pressure with respect to a board | substrate was inadequate. On the other hand, when the pressure applied to the retainer ring is greater than 15 times the pressure applied to the substrate, the amount of slurry supplied to the substrate decreases rapidly, the polishing rate decreases, and the in-plane uniformity of the polishing rate is reduced. Because it deteriorated.

  And CMP using a polishing slurry for copper or copper alloy has a strong chemical polishing element even in the same chemical mechanical polishing, and the influence of the polishing temperature on the polishing rate and the in-plane uniformity of polishing is large. Especially good results. In addition, the influence of the polishing temperature on the polishing rate showed the same tendency even when the type of slurry was changed.

  The pressure applied to the outer peripheral portion of the substrate (the outer peripheral portion is the region outside the central portion) may not be specifically defined, but is preferably 0.05 to 7 psi (more preferably 0.1 psi or more). 5 psi or less).

This will be described in more detail below.
FIG. 1 is a schematic view of a main part (polishing part) of a CMP apparatus (chemical mechanical polishing apparatus) used in the practice of the present invention. In FIG. 1, 11 is a polishing surface plate, 12 is a polishing pad affixed on the polishing surface plate 11, 13 is a polishing head, 14 is a retainer ring attached to the outer periphery of the polishing head 13, and 15 is a semiconductor substrate ( Wafer). Reference numeral 16 denotes a dresser for keeping the surface of the polishing pad 12 in a certain state, and reference numeral 17 denotes a slurry supply nozzle for supplying slurry onto the polishing pad 12. Since the CMP apparatus having such a configuration has been conventionally known, details are omitted.

  FIG. 2 is a schematic view of a polishing head portion of the CMP apparatus shown in FIG. A membrane 23 for applying pressure to the semiconductor substrate (wafer) 22 is attached to the polishing head 21. The membrane 23 is a so-called air bag system. Then, the zone 1 for controlling the pressure applied to the central portion of the semiconductor substrate 22, the zone 2 for controlling the pressure applied to the outer peripheral portion of the semiconductor substrate 22, and the pressure applied to the outermost peripheral portion of the semiconductor substrate 22 are controlled. Thus, pressure is applied independently of the retainer ring 24 to each of the three regions divided into the zone 3 for the purpose. In this embodiment, a large-diameter wafer, which requires a uniform polishing rate, will be described. However, the present invention can also be applied to a small-diameter wafer. In this embodiment, the membrane 23 has a diameter of about 300 mm. And the zone 3 used the membrane provided in the area | region covering about 3 mm from the edge of the membrane 23 (semiconductor substrate 22). In the zone 2, a membrane provided in the inner region by a width of 20 mm further than the zone 3 was used.

  The embodiment of the present invention is not limited to the CMP apparatus described with reference to FIGS. Any CMP apparatus can be used as long as it can separate and pressurize the pressure applied to the semiconductor substrate and the pressure applied to the retainer ring.

  When CMP was performed under the conditions of the present invention using the above-described CMP apparatus, film peeling of the semiconductor substrate 22 on which the low-k film was formed was effectively prevented because of low-pressure polishing. When the pressure applied to the semiconductor substrate 22 in the zone 1 is smaller than 0.05 psi, it is difficult to uniformly control the polishing pressure within the surface of the semiconductor substrate 22. For this reason, the in-plane uniformity of the polishing rate was lowered. In addition, the variation in polishing time between the semiconductor substrates 22 has increased. On the other hand, when it was larger than 1.5 psi, the Low-k film was easily peeled off by CMP. Moreover, the Low-k film was easily damaged. Furthermore, the in-plane uniformity of the polishing rate was lowered.

  When the pressure applied to the retainer ring 24 was increased, the polishing rate was improved. However, when the pressure applied to the retainer ring 24 is smaller than three times the pressure applied in the zone 1 of the semiconductor substrate 22, the polishing speed improvement effect was slight. Therefore, more than three times was an important requirement. On the contrary, when the pressure applied to the retainer ring 24 is larger than 15 times the pressure applied in the zone 1 of the semiconductor substrate 22, the amount of slurry supplied to the semiconductor substrate 22 is drastically reduced. For this reason, the polishing rate rapidly decreased. In addition, the in-plane uniformity of the polishing rate rapidly decreased. Therefore, the pressure applied to the retainer ring 24 is set to 15 times or less of the pressure applied in the zone 1 of the semiconductor substrate 22.

More specific description will be given below.
A 300 mmφ Cu blanket wafer 15 was loaded into the CMP apparatus shown in FIGS. The polishing pad 12 is a laminated structure pad having a diameter of 763 mm. More specifically, the polishing pad 12 of IC1400 (manufactured by Nitta Hearth Trading Co., Ltd.) in which a foamed polyurethane resin pad in which grooves that are concentric with the lattice grooves are formed on the upper layer was used. The slurry used for CMP is a commercially available slurry for Cu containing silica-based abrasive grains. The dresser 16 had a diameter of 106 mm, and diamond abrasive grain count: # 60 A160 (manufactured by Sumitomo 3M Limited) was used. In the Cu blanket wafer 15, a barrier metal film (10 nm thick tantalum nitride film and 25 nm thick tantalum film thereon) is formed by sputtering on the entire surface of a Si wafer having a diameter of 300 mm, and sputtering is performed on the barrier metal film. A Cu seed film having a thickness of 50 nm is formed, a Cu wiring film having a thickness of 1000 nm is formed by electrolytic plating on the Cu seed film, and annealed at 250 ° C. for 3 minutes.

  Then, CMP was performed under the following conditions. Among the pressures applied to the polishing head shown in FIG. 2, the pressure applied to the wafer (membrane) is 0.5 to 1 psi, for example, 0.9 psi for Zone 1 and Zone 2, and 2. A pressure of 3 psi was applied. The pressure applied to the retainer ring 14 is 2.2 to 3 to 15 times the pressure applied to the wafer (zones 1 and 2), for example, 2.2 to 5.6 times (2 to 5 psi: less than 3 times). The pressure is outside the present invention. That is, the pressure applied to the wafer was 0.9 psi, and the pressure applied to the retainer ring 14 was 2.2 to 5.6 times the pressure applied to the wafer (zones 1 and 2). The reason why the pressure applied to the wafer is 0.9 psi is to represent the pressure around 1.0 psi. The rotation speed of the polishing surface plate 11 is 60 rpm, and the rotation speed of the polishing head 13 is 55 rpm. The slurry was supplied onto the polishing pad at a flow rate of 300 ml / min. Then, polishing for 1 minute was performed. Before polishing, ex-situ dressing was performed for 30 seconds with a load of 9 (lbf).

  FIG. 3 shows the measurement results of the polishing temperature when the retainer ring pressure is changed. That is, the surface temperature of the polishing pad near the center of the wafer (retainer ring) was measured using an infrared radiation thermometer. This surface temperature was defined as a polishing temperature. As can be seen from FIG. 3, the polishing temperature increases as (pressure applied to the retainer ring) / (pressure applied to the wafer) increases. When the pressure applied to the retainer ring is 5 psi (5.6 times the pressure applied to the wafer), the pressure applied to the retainer ring is about 10 ° C. higher than the case where the pressure applied to the retainer ring is 2 psi (2.2 times the pressure applied to the wafer). . This is a remarkable feature because the pressure applied to the wafer is low. When the pressure applied to the wafer is higher than 2 psi, the polishing temperature rises greatly due to the friction between the wafer and the polishing pad, and even if the pressure applied to the retainer ring increases, the polishing temperature rises greatly due to this. It was thought that nothing happened.

  FIG. 4 shows the result of the polishing rate distribution in the wafer diameter direction when the Cu blanket wafer was subjected to CMP under the above polishing conditions. The polishing rate was determined from the film thickness difference before and after the CMP of the Cu blanket wafer. The film thickness of the Cu film was measured using a four-point probe sheet resistance measuring device. The film thickness measurement range is ± 144 mm from the wafer center. Measurement points are 7 mm from the wafer center to 98 mm and 4 mm from 98 mm to 144 mm. As can be seen from FIG. 4, the polishing rate increases substantially uniformly over the entire wafer surface as (pressure applied to the retainer ring) / (pressure applied to the wafer (0.9 psi)) increases. Since the pressure applied to the retainer ring is increased as shown in FIG. 3, it can be said that the polishing temperature has increased.

  From the polishing rate distribution in FIG. 4, the average value of polishing rate in the wafer surface and the non-uniformity (1σ) were obtained. The result is shown in FIG. The polishing speed is 230 nm / min when the pressure applied to the retainer ring is 2 psi (2.2 times the pressure applied to the wafer), while the pressure applied to the retainer ring is 5 psi (5.6 times the pressure applied to the wafer). In the case of (times), the polishing rate is 440 nm / min. That is, the polishing rate is approximately doubled. The non-uniformity when the pressure applied to the retainer ring is 5 psi (5.6 times the pressure applied to the wafer) is slightly larger than the non-uniformity when the pressure is low (2-4 psi). Yes. However, the non-uniformity is less than 4.5% for any retainer ring pressure. That is, good results are obtained.

  As can be seen from the above results, if the present CMP method is employed for forming the wiring of a semiconductor device, a high polishing rate can be obtained, and CMP with excellent in-wafer uniformity is performed.

  Next, wiring formation of a semiconductor device using the CMP method of the present invention will be described with reference to FIG.

  First, a base insulating film (500 nm thick SiO 2) 61 was formed on the entire surface of a 300 mmφ Si wafer by plasma CVD (Chemical Vapor Deposition). Next, an etching stopper film (50 nm thick SiCN film) 62 was formed. Then, a paint is applied using a spin coating method, and then a pre-bake and a curing process are performed to form a low dielectric constant insulating film (Low-k film) 63 having a film thickness of 100 nm and a relative dielectric constant of 2.4. Formed. Thereafter, a He plasma treatment was performed on the surface of the low dielectric constant insulating film 63, and a cap insulating film (50 nm thick SiO2) 64 was formed by plasma CVD (see FIG. 6A).

  Thereafter, a resist film was provided by a coating means. Then, through a lithography process and a dry etching process, a trench for Cu wiring was formed in the insulating film (the low dielectric constant insulating film 63 and the cap insulating film 64) (see FIG. 6B).

  Next, a barrier metal film (a 10-nm thick tantalum nitride film, and a 10-nm thick tantalum film thereon) 65 was provided by a sputtering method (see FIG. 6C).

  Thereafter, a Cu seed film having a thickness of 50 nm was provided on the barrier metal film 65 by a sputtering method, and then a Cu wiring film 66 having a thickness of 300 nm was provided by an electrolytic plating method (see FIG. 6D). Then, an annealing process was performed at 250 ° C. for 3 minutes.

  The Cu wiring film 66 was subjected to CMP on the wafer having the pattern shown in FIG.

  The polishing conditions for the Cu wiring film 66 are as described above. Among the pressures applied to the polishing head shown in FIG. 2, the pressure applied to the wafer (membrane) is 0.9 psi for zones 1 and 2 and 2.3 psi for zone 3. The pressure applied to the retainer ring is 2 to 5 psi. That is, the pressure applied to the retainer ring was 2.2 to 5.6 times the pressure applied to the wafer (zones 1 and 2). The rotation speed of the polishing platen was 60 rpm, and the rotation speed of the polishing head was 55 rpm. The slurry is a commercially available slurry for Cu. Then, slurry was supplied onto the polishing pad at a flow rate of 300 ml / min. Before polishing, ex-situ dressing was performed for 30 seconds with a load of 9 (lbf). Polishing of the Cu wiring film 66 was performed by using an optical end point detector provided in the CMP apparatus, and overpolishing by 20% with respect to the time until the polishing end point (OP; 0%).

  Under the above polishing conditions, the Cu wiring film 66 of the pattern wafer shown in FIG. 6D was polished. At this time, when the pressure applied to the retainer ring was 2 psi (2.2 times the pressure applied to the wafer), the time to the polishing end point was 117 seconds and the excess polishing time was 23 seconds, for a total of 140 seconds. On the other hand, when the pressure applied to the retainer ring was 5 psi (5.6 times the pressure applied to the wafer), the time to the polishing end point was 55 seconds and the excess polishing time was 11 seconds, for a total of 66 seconds. That is, if CMP is performed under the conditions of the present invention, CMP is completed in a short time. And the throughput in the CMP process was greatly improved. Furthermore, shortening the polishing time has the effect of reducing the amount of slurry used and improving the life of consumables such as polishing pads and dressers. Therefore, it greatly contributes to cost reduction in the CMP process.

  Moreover, in the case of CMP under the conditions of the present invention, no defects such as film peeling or Cu polishing residue were observed when polishing the Cu wiring film of the wafer.

11 Polishing surface plate 12 Polishing pad 13 Polishing head 14 Retainer ring 15 Semiconductor substrate (wafer)
16 Dresser 17 Slurry supply nozzle 21 Polishing head 22 Semiconductor substrate (wafer)
23 Membrane 24 Retainer ring 61 Base insulating film 62 Etching stopper film 63 Low dielectric constant insulating film 64 Cap insulating film 65 Barrier metal film 66 Cu wiring film

Claims (3)

A CMP method for processing a substrate by subjecting it to CMP,
During the CMP,
The pressure applied at the center of the substrate is 0.05 to 1.5 psi,
A CMP method characterized in that a pressure applied to a retainer ring disposed on an outer periphery of the substrate is 3 to 15 times a pressure applied at a central portion of the substrate. 2. The CMP method according to claim 1, wherein the substrate having a porous insulating film having a relative dielectric constant of 3 or less is processed by performing CMP. 3. The CMP method according to claim 1, wherein the CMP method is used for forming a wiring of a semiconductor device.

Images