JP2010224219A - Drive circuit, drive method, electro-optical device, and electronic apparatus - Google Patents

Abstract

A high quality image can be displayed in an electro-optical device such as a liquid crystal device.
A driving circuit drives an electro-optical device including a plurality of data lines (6a) and a plurality of scanning lines (11a) extending across each other and a plurality of pixel portions (600). The driving circuit includes an image signal supply means (500) for supplying an image signal corresponding to an image for each of n (where n is a natural number) data lines, and n data lines. The image signal distribution means (7) which distributes the image signal supplied from the image signal supply means to each of the n data lines by selecting each data line included in the time series, and image signal distribution Selection period setting means (900) for setting a period during which a plurality of data lines are selected by the means. In particular, the selection period setting means can set the period during which the first data line is selected so as to at least partially overlap the period during which the second data line selected next to the first data line is selected. It is said that.
[Selection] Figure 9

Description

  The present invention relates to a driving circuit and a driving method for driving an electro-optical device such as a liquid crystal device, an electro-optical device including the driving device, and an electronic apparatus technology such as a liquid crystal projector including the electro-optical device. Related to the field.

  As an electro-optical device driven by this type of driving circuit, various images can be displayed on the electro-optical panel by controlling each pixel with a plurality of scanning lines and data lines provided so as to cross each other. There is something to do. The electro-optic panel is electrically connected to an external circuit board or the like via a flexible substrate, for example. In such an electro-optical device, a technique related to so-called hybrid driving is proposed in which a drive circuit is provided on a flexible substrate connected to an electro-optical panel, and image signals are simultaneously supplied to a plurality of data lines. (For example, refer to Patent Document 1).

JP 2005-43418 A

  However, in the hybrid drive described above, the image signal is allocated to each data line in a time-sharing manner. At this time, the number of data lines that simultaneously supply the image signal among all the data lines is the accurate image signal. Because it becomes difficult to supply, it can not be too much. Therefore, when driving a device having an extremely large number of data lines for displaying a high-definition image, the number of time divisions increases, and a period in which a voltage corresponding to the image is applied to each pixel (i.e., (Writing period) may be insufficient.

  If the writing period is insufficient, for example, the intended color tone cannot be displayed, and the image may be uneven. That is, the above-described technique has a technical problem that there is a possibility that high quality image quality may not be displayed.

  SUMMARY An advantage of some aspects of the invention is to provide a driving circuit and a driving method capable of displaying a high-quality image, an electro-optical device, and an electronic apparatus.

  In order to solve the above problems, a driving circuit according to the present invention includes a plurality of data lines and a plurality of scanning lines extending in a mutually intersecting manner, and a plurality of data lines electrically connected to the plurality of data lines and the plurality of scanning lines, respectively. An image signal corresponding to an image for each of the n data lines (where n is a natural number) with respect to the plurality of data lines. By selecting the image signal supply means to supply and each data line included in the n data lines in time series, the image signal supplied from the image signal supply means is converted to the n data lines. Image signal allocating means for allocating to each, and selection period setting means for setting a period during which the plurality of data lines are selected by the image signal allocating means, wherein the selection period setting means includes a first data line The period during which Serial is settable so as to overlap at least partially in the period in which the second data line selected next is selection of the first data line.

  According to the driving circuit of the present invention, during the operation, a plurality of data lines and a plurality of scanning lines extending crossing each other, and a plurality of data lines and the plurality of scanning lines electrically connected to the plurality of data lines and the plurality of scanning lines, respectively. An electro-optical device including a pixel portion and a storage capacitor that temporarily holds a voltage supplied to the plurality of data lines is driven. Specifically, a scanning signal is supplied from the scanning line to the transistor in the pixel portion, and supply of an image signal from the data line to the pixel electrode in the pixel portion is controlled. Thereby, image display by a so-called active matrix method is performed.

  In the present invention, in the operation of the electro-optical device, first, an image signal is supplied from the image signal supply means to each of a plurality of data lines for every n data lines. That is, the image signals are supplied together as signals supplied to the n data lines. For this reason, the number of wirings in the previous stage of the data line can be effectively reduced.

  The image signal supplied from the image signal supply means is obtained by selecting each data line included in the n data lines in time series by an image signal distribution means such as a demultiplexer, for example. It is distributed to. In other words, the configuration is such that the image signal is supplied only to the selected data line, so that the image signals supplied together are sequentially distributed and supplied to each of the plurality of data lines.

  The period during which the image signal distribution unit selects each data line is appropriately set by the selection period setting unit. Here, in the present invention, in particular, the selection period setting means selects the second data line that is selected next to the first data line during the period in which the first data line is selected by the image signal distribution means. It can be set so as to at least partially overlap the period. That is, the period during which the first data line is selected can be set to extend to the period during which the subsequent second data line is selected. As a result, the selected periods of the first data line and the second data line that normally do not overlap can be set to overlap each other.

  As described above, the period during which the first data line is selected is extended, so that the period during which the image signal is supplied to the first data line (that is, the writing period) is increased. Therefore, display unevenness caused by a shortage of the writing period can be effectively reduced. Note that it is preferable that the period in which the first data line is selected and the period in which the second data line is selected be as short as possible.

  Incidentally, the period in which the first data line is selected overlaps the period in which the second data line is selected, so that the image signal supplied to the first data line and the second data line are supplied. It is conceivable that the images to be affected will affect each other. However, display unevenness can be more suitably reduced if the selection periods are set to overlap only when such an influence is unlikely to occur. In other words, the selection period setting means does not need to set the selection periods of the continuous data lines so as to overlap each other, and performs the setting so that the selection periods overlap only when a predetermined condition set in advance is satisfied. May be.

  The driving circuit of the present invention is typically provided as an integrated circuit on a flexible substrate connected to an electro-optical panel including a display area in which data lines and scanning lines and pixel portions are arranged. However, part or all of the drive circuit of the present invention may be provided on the electro-optical panel.

  As described above, according to the drive circuit of the present invention, high-quality display can be performed in the electro-optical device.

  In one aspect of the drive circuit according to the present invention, the selection period setting means includes a voltage difference between the image signal supplied to the first data line and the image signal supplied to the second data line. Is less than or equal to a predetermined threshold, the period during which the first data line is selected is set so as to at least partially overlap the period during which the second data line is selected.

  According to this aspect, first, the image signal supplied to the first data line and the image signal supplied to the second data line are compared, and the difference between the voltages is obtained. The period during which the first data line is selected is set to overlap the period during which the second data line is selected when the obtained voltage difference is equal to or less than a predetermined threshold. Here, the “predetermined threshold value” is used to determine that the image signal supplied to the first data line and the image signal supplied to the second data line are close to each other so as not to affect each other. The threshold value is set in advance after experimentally or theoretically deriving the influence on the actual display.

  In this aspect, as described above, when the voltage difference between the image signal supplied to the first data line and the image signal supplied to the second data line is equal to or less than a predetermined threshold, the first Since the period during which the data line is selected overlaps with the period during which the second data line is selected, the image signal supplied to the first data line and the image supplied to the second data line Can be prevented from affecting each other. That is, it can be prevented that normal image display cannot be performed by supplying an image signal to be supplied to the second data line to the first data line. Therefore, it is possible to more suitably reduce display unevenness.

  In another aspect of the driving circuit of the present invention, the selection period setting means selects the first data line as the first data line, the first data line being selected first among the n data lines. Is set so as to at least partially overlap the period during which the second data line is selected.

  According to this aspect, among the n data lines to which the image signal is supplied by the image signal supply unit, the selection period of the data line that is selected first is the data line that is subsequently selected by the selection period setting unit. It is set to overlap the selection period. That is, it is set so that the writing period of the image signal that is initially distributed in the image signal distribution means is extended.

  Of the n data lines, the first selected data line displays, for example, a precharge voltage supplied prior to the image signal or an image one frame before on a storage capacitor that holds the image signal. Writing is started in a state where the voltage at that time is held. On the other hand, in the data line selected after that, writing is started in a state where the voltage corresponding to the image signal supplied immediately before is held. Therefore, among the n data lines, the data line selected first has a lower holding voltage (that is, the difference from the voltage to be written is larger) than the data lines selected thereafter. Since writing is performed in this case, there is a high possibility that the writing period will be insufficient.

  However, in this aspect, as described above, the selection period of the data line selected first is set to overlap the selection period of the data line selected subsequently. Therefore, the writing period for the data lines that are likely to be insufficiently written is set to be extended. Therefore, it is possible to more suitably reduce display unevenness.

  In another aspect of the driving circuit according to the present invention, the selection period setting means sets a period during which the first data line is selected for each of the n data lines as a period during which the second data line is selected. To at least partially overlap.

  According to this aspect, the selection period is set to be extended for each of the n data lines to which the image signal is supplied by the image signal supply unit. That is, the selection period of the n data lines is set so as to overlap the selection period of the data lines that are successively selected for every n data lines. In other words, when it is set to extend to the selection period in which the selection period in any one of the n data lines extends, the selection period of all n data lines similarly extends to the selection period that continues. Is set as follows.

  When the period during which the first data line is selected is set to overlap the period during which the second data line is selected, the selection period overlaps with both the first data line and the second data line. It is possible that the impact will come out. At this time, if the selection period is set to overlap only a part of the data lines, display unevenness may occur due to different writing conditions from other data lines that do not overlap the selection period. is there.

  However, in this embodiment, as described above, the selection period of n data lines is set for each n data lines. Therefore, an image signal can be supplied to each of the n data lines under substantially the same conditions. Therefore, it is possible to prevent display unevenness from newly occurring because the selection period is different for each data line.

  In order to solve the above problems, an electro-optical device according to the present invention includes the above-described drive circuit according to the present invention (including various aspects thereof).

  According to the electro-optical device of the present invention, the drive circuit according to the present invention described above is provided, so that a selection period (that is, a writing period) of each data line can be sufficiently ensured. Therefore, the occurrence of unevenness in the displayed image can be effectively reduced, and a high-quality image can be displayed.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention.

  According to the electronic apparatus of the present invention, since the electro-optical device according to the present invention described above is included, a projection display device, a television set, a mobile phone, an electronic notebook, a word processor capable of performing high-quality display. Various electronic devices such as a viewfinder type or a monitor direct view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. In addition, as an electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  In order to solve the above problems, a driving method according to the present invention includes a plurality of data lines and a plurality of scanning lines that extend so as to cross each other, and a plurality of data lines that are electrically connected to the plurality of data lines and the plurality of scanning lines, respectively. And an image signal corresponding to an image for each of the n data lines (where n is a natural number) with respect to the plurality of data lines. The image signal supply step to supply and the data lines included in the n data lines are selected in time series, so that the image signal supplied from the image signal supply means is converted to the n data lines. An image signal allocating step for allocating to each, and a selection period setting step for setting a period during which the plurality of data lines in the image signal allocating step are selected. In the selection period setting step, the first data line Select the period It is settable so as to overlap at least partially in a period for selecting a second data line to be selected next serial first data line.

  According to the driving method of the present invention, as in the case of the above-described driving circuit of the present invention, the selection period of each data line is set to be extended to prevent the writing period from being insufficient. Can do. Accordingly, the occurrence of unevenness in the displayed image can be effectively reduced, and a high-quality image can be displayed in the electro-optical device.

  In the driving method of the present invention, it is possible to adopt the same aspects as the various aspects of the driving circuit of the present invention described above.

  The effect | action and other gain of this invention are clarified from the form for implementing invention demonstrated below.

1 is a plan view illustrating a configuration of an electro-optical device according to an embodiment. It is the HH 'sectional view taken on the line of FIG. 1 is a block diagram illustrating an electrical configuration of an electro-optical device according to an embodiment. FIG. 3 is an equivalent circuit diagram of a pixel unit of the electro-optical device according to the embodiment. 1 is a perspective view showing a configuration of a drive circuit according to an embodiment together with an electro-optical device. It is a block diagram which shows the specific structure of the integrated circuit which is a drive circuit. It is a timing chart which shows the various signals at the time of normal operation. It is a flowchart which shows the operation | movement at the time of changing the width | variety of the control signal which concerns on 1st Embodiment. It is a timing chart which shows the various signals at the time of changing the width of the control signal concerning a 1st embodiment. It is a flowchart which shows the operation | movement at the time of changing the width | variety of the control signal which concerns on 2nd Embodiment. It is a timing chart which shows the various signals at the time of changing the width of the control signal concerning a 2nd embodiment. It is the graph which showed transition of the voltage hold | maintained at storage capacity. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Electro-optical device>
First, an electro-optical device driven by the drive circuit of the present invention will be described with reference to FIGS. In the following embodiments, a drive circuit built-in TFT (Thin Film Transistor) active matrix drive type liquid crystal device, which is an example of the electro-optical device of the present invention, is taken as an example.

  The configuration of the electro-optical device according to this embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the configuration of the electro-optical device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the electro-optical device 100 according to this embodiment, the TFT array substrate 10 and the counter substrate 20 are disposed to face each other. The TFT array substrate 10 is, for example, a transparent substrate such as a quartz substrate or a glass substrate, a silicon substrate, or the like. The counter substrate 20 is a transparent substrate such as a quartz substrate or a glass substrate. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between a pair of alignment films.

  The TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided in a sealing region located around the image display region 10a provided with a plurality of pixel electrodes.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In the sealing material 52, a gap material such as glass fiber or glass beads for dispersing the distance between the TFT array substrate 10 and the counter substrate 20 (that is, the inter-substrate gap) to a predetermined value is dispersed. Note that the gap material may be arranged in the image display region 10a or a peripheral region located around the image display region 10a in addition to or instead of the material mixed in the seal material 52.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. A part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display area 10 a in this way, a plurality of the pixel lines are covered along the remaining side of the TFT array substrate 10 and covered with the frame light shielding film 53. Wiring 105 is provided.

  In regions facing the four corners of the counter substrate 20 on the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are disposed. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, a laminated structure in which pixel switching TFTs as drive elements, wiring lines such as scanning lines and data lines are formed is formed. Although the detailed configuration of this laminated structure is not shown in FIG. 2, pixel electrodes 9a made of a transparent material such as ITO (Indium Tin Oxide) are provided on the laminated structure with a predetermined pattern for each pixel. It is formed in an island shape.

  The pixel electrode 9 a is formed in the image display area 10 a on the TFT array substrate 10 so as to face the counter electrode 21. On the surface of the TFT array substrate 10 facing the liquid crystal layer 50, that is, on the pixel electrode 9a, an alignment film 16 is formed so as to cover the pixel electrode 9a.

  A light shielding film 23 is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. For example, the light shielding film 23 is formed in a lattice shape when viewed in plan on the facing surface of the facing substrate 20. In the counter substrate 20, a non-opening area is defined by the light shielding film 23, and an area partitioned by the light shielding film 23 is an opening area through which light emitted from, for example, a projector lamp or a direct viewing backlight is transmitted. The light shielding film 23 may be formed in a stripe shape, and the non-opening region may be defined by the light shielding film 23 and various components such as data lines provided on the TFT array substrate 10 side.

  On the light shielding film 23, a counter electrode 21 made of a transparent material such as ITO is formed so as to face the plurality of pixel electrodes 9a. Further, in order to perform color display in the image display area 10a, a color filter (not shown in FIG. 2) may be formed on the light shielding film 23 in an area including a part of the opening area and the non-opening area. Good. An alignment film 22 is formed on the counter electrode 21 on the counter surface of the counter substrate 20.

  In addition to the above-described drive circuits such as the data line drive circuit 101 and the scanning line drive circuit 104, the image signal on the image signal line is sampled on the TFT array substrate 10 shown in FIGS. A sampling circuit to be supplied to a line, a precharge circuit to supply a precharge signal of a predetermined voltage level to a plurality of data lines in advance of an image signal, quality, defects, etc. of the electro-optical device 100 during manufacture or at the time of shipment An inspection circuit or the like for inspection may be formed.

  Next, an electrical configuration of the electro-optical device according to the present embodiment will be described with reference to FIGS. 3 and 4. FIG. 3 is a block diagram showing an electrical configuration of the electro-optical device according to this embodiment, and FIG. 4 is an equivalent circuit diagram of a pixel portion of the electro-optical device according to this embodiment.

  In FIG. 3, the electro-optical device 100 includes a demultiplexer 7 and a scanning line driving circuit 104 on a TFT array substrate 10. Of the external circuit connection terminals 102 on the TFT array substrate 10, an image signal supply circuit 500 as an external circuit is electrically connected to the image signal terminal 102 v.

  In the image display area 10a on the TFT array substrate 10, 1088 scanning lines 11a are provided so as to extend in the row direction (that is, the X direction), and 1984 (= 248 × 8) The data lines 6a made of a metal film such as aluminum are provided so as to extend in the column direction (that is, the Y direction) and to be electrically insulated from each scanning line 11a. It has been. The numbers of scanning lines 11a and data lines 6a are not limited to 1088 and 1984, respectively. The number of data lines constituting one group is “8” in this embodiment, but may be “2” or more.

  The pixel portion 600 is arranged corresponding to the intersection of 1088 scanning lines 11a and 1984 data lines 6a. Therefore, in the present embodiment, the pixel units 600 are arranged in a matrix at a predetermined pixel pitch in a length of 1088 rows × width of 1984 columns.

  As shown in FIG. 4, the pixel portion 600 includes a pixel switching TFT 30, a liquid crystal element 72, and a storage capacitor 70.

  The pixel switching TFT 30 has a source electrically connected to the data line 6a, a gate electrically connected to the scanning line 11a, and a drain electrically connected to a pixel electrode 9a of a liquid crystal element 72 described later. The pixel switching TFT 30 is turned on and off by a scanning signal supplied from the scanning line driving circuit 104.

  The liquid crystal element 72 includes a pixel electrode 9 a, a counter electrode 21, and a liquid crystal sandwiched between the pixel electrode 9 a and the counter electrode 21. In the liquid crystal element 72, a data signal of a predetermined level written in the liquid crystal via the data line 6a and the pixel electrode 9a is held with the counter electrode 21 for a certain period. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the liquid crystal device 100 as a whole.

  The storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode in order to prevent the held image signal from leaking.

  Since the pixel portions 600 as described above are arranged in a matrix in the image display region 10a, active matrix driving is possible.

  Referring again to FIG. 3, in the present embodiment, in order to distinguish the eight columns of data lines 6a constituting one group, they are referred to as a, b, c, d, e, f, g, and h series in order from the right. There is. Specifically, the a series is the data line 6a in the 1, 9, 17,..., 1977th column, and the b series is the data line 6a in the 2, 10, 18,. Yes, the c series is the data line 6a in the 3, 11, 19,..., 1979 column, and the d series is the data line 6a in the 4, 12, 20,. The e series is the data line 6a in the 5, 13, 21,..., 1981 column, the f series is the data line 6a in the 6, 14, 22,. Is the data line 6a in the 7, 15, 23,..., 1983 column, and the h series is the data line 6a in the 8, 16, 24,.

  The scanning line driving circuit 104 has a shift register, and supplies scanning signals G1, G2, G3,..., G1088 to the scanning lines 11a in the 1, 2, 3,. . Specifically, the scanning line driving circuit 104 sequentially selects the scanning lines 11a in the first, second, third,..., 1088 rows over a period of one frame and selects a scanning signal to the selected scanning line. The H level corresponding to the voltage is set, and the scanning signals to the other scanning lines are set to the L level corresponding to the non-selection voltage.

  The image signal supply circuit 500 has a separate configuration from the TFT array substrate 10 and is electrically connected to the TFT array substrate 10 via the image signal terminal 102v during display operation. The image signal supply circuit 500 is an example of the “image signal supply unit” in the present invention. The image signal supply circuit 500 includes pixel electrodes 9a corresponding to the scanning lines 11a selected by the scanning line driving circuit 104 and the data lines 6a selected by the demultiplexer 7 among the eight columns of data lines 6a belonging to each group. On the other hand, an image signal having a voltage corresponding to the gradation of the pixel including the pixel electrode 9a is output. The image signal supplied from the image signal supply circuit 500 to the image signal terminal 102v is supplied to the demultiplexer 7 through the image signal line 300. In the present embodiment, as described above, the number of columns of the data line 6a is “1984”, and since these are grouped every 8 columns, the image signal supply circuit 400 performs serial-parallel conversion to 248 systems. , VID248 are supplied to each group of data lines 6a via 248 image signal terminals 102v and 248 image signal lines 300.

  Further, in the present embodiment, the image signal supply circuit 500 pre-charges the data line 6a in place of the image signals VID1 to VID248 in a period preceding the image signal supply period for supplying the image signals VID1 to VID248. The charge signals are output to the 248 image signal lines 300 at once.

  Each of the image signal lines 300 is provided with a storage capacitor 700 so that the image signals VID1 to VID248, a precharge signal, and the like can be temporarily stored. Thereby, it is possible to effectively reduce the shortage of the period for supplying the image signal to each data line 6a (that is, the writing period). Even if such a storage capacitor 700 is not provided, parasitic capacitance is generated in the image signal line 300. Therefore, even when the storage capacitor 700 is not provided, the effect according to this embodiment described later is exhibited.

  The demultiplexer 7 is an example of the “distribution means” in the present invention, and includes a plurality of transistors 71 provided for each data line 6a. The transistor 71 is an n-channel type, and each drain is electrically connected to one end of the data line 6a. The sources of the eight transistors 71 corresponding to the data lines 6a belonging to the same group are electrically connected in common with the image signal lines 300 corresponding to the group.

  That is, the m-th group (where m is an integer between 1 and 248) is the a-sequence (8m-7) -th column, the b-sequence (8m-6) -th column, and the c-sequence (8m-5). Column, (8m-4) th column of d series, (8m-3) th column of e series, (8m-2) th column of f series, (8m-1) th column of g series and h series Since the data line 6a is in the (8m) th column, the sources of the transistors 71 corresponding to the data lines 6a in the eighth column are electrically connected in common, and the image signal VID (m) is supplied. Control signals Sel1 to Sel8 are supplied to the gate of the transistor 71 via eight control signal lines SL (that is, control signal lines SL1 to SL8). Specifically, the control signal Sel1 is supplied to the gate of the transistor 71 corresponding to the data line 6a of the (8m-7) column via the control signal line SL1, and similarly, the (8m-6) column, ( Corresponding to the data line 6a of the 8m-5th column, the (8m-4) th column, the (8m-3) th column, the (8m-2) th column, the (8m-1) th column and the (8m) th column. The control signal Sel2,..., Sel8 is supplied to the gate of the transistor 71 through the control signal lines SL2,..., SL8 included in the routing wiring 90 (see FIG. 1). The control signals Sel1 to Sel8 are supplied from a timing control circuit (not shown) as an external circuit to the control signal lines SL1 to SL8 via the control signal terminal 102s among the external circuit connection terminals 102.

  Further, in this embodiment, a precharge timing signal can be input to the control signal lines SL1 to SL8 from a timing control circuit as an external circuit, in addition to the control signals Sel1 to Sel8. The precharge timing signal defines a precharge period prior to the writing period (that is, the image signal supply period) of the image signals VID1 to VID248, and is supplied all at once to the control signal lines SL1 to SL8. Accordingly, all the transistors 71 are simultaneously turned on by the precharge timing signal, and all the data lines 6a are electrically connected to the pixel signal line 300 all at once. Here, in particular, a precharge signal having a predetermined potential different from the potentials of the image signals VID1 to VID248 is supplied to all the data lines 6a through the image signal line 300 which is in a conductive state during the precharge period. .

  Various timing signals such as a precharge timing signal and a clock signal are generated by a timing signal supply circuit as an external circuit (not shown) and supplied into the electro-optical device 100. Further, the power supply voltage necessary for driving each drive circuit on the TFT array substrate 10 is also supplied from an external circuit. The external drive circuit will be described in detail below.

<Drive circuit and drive method>
Next, a driving circuit and a driving method for driving the above-described electro-optical device will be described with reference to FIGS.

  First, the configuration of the drive circuit according to the present embodiment will be described with reference to FIGS. FIG. 5 is a perspective view showing the configuration of the drive circuit according to this embodiment together with the electro-optical device, and FIG. 6 is a block diagram showing the specific configuration of the integrated circuit which is the drive circuit. In FIG. 5, detailed members of the electro-optical device 100 shown in FIGS. 1 and 2 are omitted as appropriate.

  In FIG. 5, when the electro-optical device 100 according to the present embodiment is applied to various electronic devices, the electro-optical device 100 is electrically connected to the circuit board 400 on the electronic device side via the flexible substrate 200.

  The electro-optical device 100 and the flexible substrate 200 are electrically connected to each other by bonding the connection terminal 210 of the flexible substrate 200 to the external circuit connection terminal 102 of the electro-optical device 100 by, for example, thermocompression bonding. . On the other hand, the flexible board and the circuit board 400 are electrically connected to each other by fitting the connection terminal 220 of the flexible board 200 to the connector 410 provided on the circuit board 400.

  An integrated circuit 250 is provided on the flexible substrate 200 by using, for example, a TAB (Tape Automated Bonding) technique. The drive circuit according to this embodiment is typically configured as a part or all of the integrated circuit 250. However, the drive circuit according to the present embodiment may be provided on the electro-optical device 100 or the circuit board 400.

  In FIG. 6, the integrated circuit 250 includes an image signal comparison circuit 800 and a timing signal supply circuit 900 in addition to the image signal supply circuit 500 described above.

  The image signal comparison circuit 800 includes an image signal related to one data line 6a among 8 data lines 6a included in the same group and an image signal related to another data line 6a selected immediately thereafter. It is a circuit that calculates a difference by comparison. The image circuit includes a line memory, a frame memory, and the like in order to compare two image signals with each other.

  The image signal comparison circuit 800 can further determine whether or not the calculated difference is equal to or less than a predetermined threshold value stored in advance in a memory or the like. It is output to the supply circuit 900.

  The timing signal supply circuit 900 is a circuit that generates and outputs control signals Sel1 to Sel8 for controlling the transistor 71 (see FIG. 3) in the demultiplexer 7. The timing signal supply circuit 900 is configured to be able to change the widths of the control signals Sel1 to Sel8 based on the determination result input from the image signal comparison circuit 800. That is, the timing signal supply circuit 900 is an example of the “selection period setting unit” in the present invention. The timing signal supply circuit 900 can output various timing signals such as a precharge timing signal and a clock signal in addition to the control signals Sel1 to Sel8 described above.

  Hereinafter, the operation of the drive circuit according to the present embodiment will be described by taking two embodiments as examples for each drive method.

<First Embodiment>
First, the operation of the drive circuit according to the first embodiment will be described with reference to FIGS. 7 to 9 in addition to FIG. FIG. 7 is a timing chart showing various signals during normal operation. FIG. 8 is a flowchart showing an operation when changing the width of the control signal, and FIG. 9 is a timing chart showing various signals when changing the width of the control signal.

  In FIG. 3, the scanning line drive circuit 104 sequentially outputs scanning signals G1, G2,..., G1088 sequentially at an H level (ie, a selection voltage) for each horizontal period over a period of a certain frame (nth frame). ).

  In FIG. 6, in a period preceding the image signal supply period in one horizontal period, a precharge timing signal is simultaneously input to the control signal lines SL1 to SL8, and a precharge signal is input to all of the image signal lines 300. The As a result, all the transistors 71 are turned on (that is, turned on) only during the precharge period defined by the pulse width of the precharge timing signal, and the precharge signal is supplied to all the data lines 6a. That is, precharge is performed in a precharge period defined by a precharge timing signal in one horizontal period. Precharge refers to control in which the data line 6a is charged or discharged and the potential of the data line 6a is brought close to the image signal potential in advance in order to prevent insufficient writing.

  In the image signal supply period in one horizontal period, the control signals Sel1 to Sel8 are input to the control signal lines SL1 to SL8, respectively, and the image signals VID1 to VID248 are input to the 248 image signal lines 300, respectively. . Here, in the image signal supply period, the potentials of the control signal lines SL1 to SL8 are exclusively H level in this order by supplying the control signals Sel1 to Sel8, and the image signal supply circuit is synchronized with this supply. 400 supplies the image signals VID <b> 1 to VID <b> 248 to the image signal line 300. The transistor 71 is turned on only for a unit period defined by the pulse widths of the control signals Sel1 to Sel8, and the image signals VID1 to VID248 are supplied to the data line 6a for each series.

  Specifically, the image signal supply circuit 400 determines that the i-th scanning signal Gi becomes i level when the potential of the control signal line SL1 becomes H level by supplying the control signal Sel1. Image signals VID1, VID2, VID3,... That are higher or lower than the counter electrode potential LCCOM by a voltage corresponding to the gradation of the pixel corresponding to the intersection of the scanning line 11a of the row and the a-series data line 6a. , VID 248 is output simultaneously in association with the 1, 2, 3,..., 248th group. At this time, since only the control signal line SL1 of the eight control signal lines SL is at the H level, the a-series data line 6a is selected (that is, only the transistor 71 corresponding to the a-series data line 6a is selected. As a result, the image signals VID1, VID2, VID3,..., VID248 are respectively supplied to the a-line (1, 9, 17,..., 1977th) data line 6a. On the other hand, when the scanning signal Gi is at the H level, the pixel switching TFT 30 is turned on (conductive) in all of the pixels located in the i-th row, and therefore the image signal VID1 supplied to the a-series data line 6a. , VID2, VID3,..., VID248 are applied to the pixel electrodes 9a of i rows and 1 column, i rows and 9 columns, i rows and 17 columns,.

  Next, when the potential of the control signal line SL <b> 2 becomes H level by the supply of the control signal Sel <b> 2, the image signal supply circuit 400 now has the i-th scanning line 11 a and the b-series data line 6 a. .., VID248 corresponding to the gray levels of the pixels corresponding to the intersections of the pixels are simultaneously output in association with the first, second, third,. To do. At this time, since only the control signal line SL2 is at the H level, the b-series data line 6a is selected. As a result, the image signals VID1, VID2, VID3,. (18th,..., 1978) data line 6a and applied to the pixel electrode 9a of i row 2 column, i row 10 column, i row 18 column,..., I row 1978 column, respectively. Will be.

  Similarly, the image signal supply circuit 400 supplies the i-th row when the potential of the control signal line SL3 becomes H level by supplying the control signal Sel3 during the period when the scanning signal Gi of the i-th row is H level. When the pixel corresponding to the intersection of the scanning line 11a of the eye and the c-series data line 6a and the control signal Sel4 are supplied and the potential of the control signal line SL4 becomes H level, the i-th scanning line 11a. When the potential of the control signal line SL5 becomes H level due to the supply of the pixel corresponding to the intersection of the d-series data line 6a and the control signal Sel5, the i-th scanning line 11a and the e-series data When the potential of the control signal line SL6 becomes H level by supplying the pixel corresponding to the intersection with the line 6a and the control signal Sel6, the intersection of the scanning line 11a in the i-th row and the f-series data line 6a. When the potential of the control signal line SL7 becomes H level by supplying the control signal Sel7, the pixel corresponding to the intersection of the i-th scanning line 11a and the g-series data line 6a, When the potential of the control signal line SL8 becomes H level by the supply of the control signal Sel8, it corresponds to the gradation of the pixel corresponding to the intersection of the i-th scanning line 11a and the h-series data line 6a. .., VID248 corresponding to the first, second, third,..., And 248th groups, respectively, are simultaneously output.

  Accordingly, the image signals VID1, VID2, VID3,..., VID248 corresponding to the gradation of each pixel in the i-th row are c-series (3, 11, 19,..., 1979) data lines. 6a and applied to the pixel electrode 9a of i row 3 column, i row 11 column, i row 19 column,..., I row 1979 column, and subsequently d series (4, 12, 20,. .., 1980 column) are applied to the pixel electrode 9a of i row 4 column, i row 12 column, i row 20 column,..., I row 1980 column, respectively, Supplied to the data line 6a of the e series (5th, 13th, 21st,..., 1981th column), i-th row 5th column, i-th row 13th column, i-th row 21th column,. Are applied to the pixel electrode 9a, and the f series (6, 14, 22,..., 1982) ) Is applied to the pixel electrode 9a of i row 6 column, i row 14 column, i row 22 column,..., I row 1982 column, and then g series (7, 15). , 23,..., 1983) and applied to the pixel electrode 9a of i row 7 column, i row 15 column, i row 23 column,..., I row 1983 column, respectively. Are supplied to the data line 6a of the h series (8th, 16th, 24th,..., 1984th column), respectively, i row 8 column, i row 16 column, i row 24 column,. The voltage is applied to the pixel electrode 9a in i row and 1984 column.

  With the operation as described above, the operation of writing the voltage of the image signal corresponding to the gradation to the pixels in the i-th row is completed. Note that FIG. 7 illustrates the case where an image signal indicating the same gradation is supplied to each series of data lines 6a (that is, a solid image or the like is displayed).

  Here, particularly in the present embodiment, the widths of the control signals Sel1 to Sel8 supplied from the timing signal supply circuit 900 (see FIG. 6) are changed based on the determination result in the image signal comparison circuit 800.

  In FIG. 8, first, the image signal comparison circuit 800 acquires the image signal related to the a-sequence data line 6a and the image signal related to the b-sequence data line 6a selected immediately thereafter from the image signal supply circuit 500 ( Step S11). Then, the acquired two image signals are compared with each other, and a difference (for example, a potential difference) is calculated (step S12).

  Subsequently, the image signal comparison circuit 800 determines whether or not the calculated difference is equal to or less than a predetermined threshold value set in advance (step S13). Here, when the difference is not less than or equal to the predetermined threshold (step S13: NO), the subsequent steps are omitted. On the other hand, when the difference is equal to or smaller than the predetermined threshold value (step S13: YES), it is similarly determined whether or not the difference is equal to or smaller than the predetermined threshold value for the data lines 6a of all series in the group (step S14). ).

  If it is not determined that the difference is less than or equal to the predetermined threshold value in all the series of data lines 6a (step S14: NO), the processing shifts to the next series (step S15), and again from step S11 to step S13. The process is repeated. That is, image signals after the c series are sequentially acquired, the difference between the b series and the c series, the difference between the c series and the d series, the difference between the d series and the e series, the difference between the e series and the f series, f It is determined whether or not the difference between the series and the g series and the difference between the g series and the h series are equal to or less than a predetermined value.

  When it is determined that the difference is equal to or smaller than the predetermined threshold value in all the series of data lines 6a (step S14: YES), the timing signal supply circuit 900 changes the width of the control signals Sel1 to Sel8 to be generated ( Step S16). That is, in the present embodiment, when it is determined that the difference is less than or equal to the predetermined value in all series, the width of the control signals Sel1 to Sel8 is changed, and it is determined that the difference is not less than or equal to the predetermined value in any series. In such a case, the widths of the control signals Sel1 to Sel8 are not changed.

  In FIG. 9, the widths of the control signals Sel <b> 1 to Sel <b> 8 are increased so as to overlap the control signals of the series selected immediately after each. Specifically, Sel1 is extended so as to overlap Sel2, Sel2 is extended so as to overlap Sel3, Sel3 is extended so as to overlap Sel4, and Sel4 is extended so as to overlap Sel5. Sel5 is extended so as to overlap Sel6, Sel6 is extended so as to overlap Sel7, and Sel7 is extended so as to overlap Sel8. Sel8, which is a control signal corresponding to the last series, is exceptionally extended to the same extent as other control signals because there is no overlapping symmetrical control signal.

  As the width of the control signals Sel1 to Sel8 is increased in this way, the period for supplying the image signal to each data 6a line (that is, the writing period) is increased. Therefore, display unevenness caused by a shortage of the writing period can be effectively reduced. In addition, it is preferable that the period when the control signals Sel1 to Sel8 overlap is as short as possible.

  Incidentally, there may be a case where the image signals supplied to the two data lines 6a influence each other due to the overlapping of the selected periods of the two different data lines 6a. However, in the present embodiment, when the difference between the two image signals is equal to or smaller than the predetermined threshold, the widths of the control signals Sel1 to Sel8 are changed, and thus the above-described problems can be prevented. Therefore, it is possible to more suitably reduce display unevenness.

  As described above, according to the driving circuit and the driving method according to the first embodiment, high-quality display can be performed in the electro-optical device.

<Second Embodiment>
Next, a drive circuit according to a second embodiment will be described with reference to FIGS. FIG. 10 is a flowchart showing the operation when changing the width of the control signal according to the second embodiment, and FIG. 11 shows various signals when changing the width of the control signal according to the second embodiment. It is a timing chart which shows. FIG. 12 is a graph showing the transition of the voltage held in the holding capacitor. Note that the second embodiment differs from the first embodiment described above in some operations for changing the control signal, and the other configurations and operations are substantially the same. Therefore, in the second embodiment, portions different from the first embodiment will be described in detail, and descriptions of other overlapping portions will be omitted as appropriate.

  10, in the drive circuit according to the second embodiment, first, the image signal comparison circuit 800 includes an image signal related to the a-sequence data line 6a from the image signal supply circuit 500 and the b-sequence data selected immediately thereafter. An image signal related to the line 6a is acquired (step S21). Then, the acquired two image signals are compared with each other, and the difference is calculated (step S22).

  Subsequently, the image signal comparison circuit 800 determines whether or not the calculated difference is equal to or less than a predetermined threshold value set in advance (step S23). Here, when the difference is not less than or equal to the predetermined threshold (step S23: NO), the subsequent steps are omitted. On the other hand, when the difference is equal to or smaller than the predetermined threshold (step S23: YES), the timing signal supply circuit 900 sets the width of the control signal Sel1 related to the a-sequence data line 6a to the control signal related to the b-sequence data line 6a. It changes so that it may overlap with Sel2 (step S24). That is, in the second embodiment, unlike the first embodiment, the width of the control signal is changed separately for each series. When the processes for the a series and the b series are completed, the processes for the b series and the c series are started. By repeating such processing, the width of the control signal is changed separately for all the sequences.

  As shown in FIG. 11, in the second embodiment, there are cases where a series (Sel1) in which the width of the control signal is changed within one horizontal period and a series (Sel2 to SeL8) that are not changed are mixed. Here, the control signals are controlled so as to overlap only between a series and b series where there is no difference between image signals, and control signals are controlled so as not to overlap in other series. In this way, by independently controlling the control signals of each series, it is possible to suitably reduce display unevenness within a range that does not affect the display image.

  In FIG. 12, the voltage held in the holding capacitor 700 (see FIG. 3) provided for each group is supplied with a precharge signal from the initial value V0 when one horizontal period is started. Thus, the precharge voltage Vp is changed according to the precharge signal. Thereafter, the hold voltage is maintained at the precharge voltage Vp until the start of writing, and the image signal corresponding to the a-series data line 6a is supplied to become the voltage V1 corresponding to the image signal.

  In particular, since there is a relatively large difference between the precharge voltage Vp and the voltage V1 corresponding to the image signal, the holding voltage rises to V1 after the image signal is supplied to the a-series data line 6a. , Takes some time. On the other hand, when the image signal corresponding to the data line 6a after the b series is supplied, since the voltage corresponding to the previous image signal is already held in the holding capacitor 700, the holding voltage corresponds to the image signal. It takes no time to reach the voltage to be

  In this way, there is a difference in the holding voltage at the time of writing between the a-series data line 6a to which the image signal is first supplied and the b to h-series data line 6a to which the image signal is supplied thereafter. End up. For this reason, the a-series data line 6a where writing is started in a state where the holding voltage is low is likely to be insufficiently written as compared to other series. Therefore, the effect that the writing period according to the present embodiment can be lengthened is remarkably exhibited in the a-series data line 6a to which the image signal is first supplied. In view of this, display unevenness can be more effectively reduced by changing the width of the control signal only for the a series, or by setting a lower threshold for only the a series.

  As described above, according to the driving circuit and the driving method according to the second embodiment, high-quality display can be performed in the electro-optical device, as in the first embodiment described above.

<Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. FIG. 13 is a plan view showing a configuration example of the projector. Hereinafter, a projector using the liquid crystal device as a light valve will be described.

  As shown in FIG. 13, a lamp unit 1102 including a white light source such as a halogen lamp is provided inside the projector 1100. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  Since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 13, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic device Examples include notebooks, calculators, word processors, workstations, videophones, POS terminals, and devices with touch panels. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal devices described in the above embodiments, the present invention includes a reflective liquid crystal device (LCOS), a plasma display (PDP), a field emission display (FED, SED), an organic EL display, and a digital micromirror device. (DMD), electrophoresis apparatus and the like are also applicable.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. The driving method, the electro-optical device, and the electronic apparatus are also included in the technical scope of the present invention.

  6a ... data line, 7 ... demultiplexer, 10 ... TFT array substrate, 10a ... image display area, 11a ... scanning line, 20 ... counter substrate, 30 ... TFT, 50 ... liquid crystal layer, 70 ... storage capacitor, 71 ... transistor, 72 ... Liquid crystal element, 101 ... Data line drive circuit, 102 ... External circuit connection terminal, 104 ... Scanning line drive circuit, 200 ... Flexible substrate, 210, 220 ... Connection terminal, 250 ... Integrated circuit, 300 ... Image signal line, 400 DESCRIPTION OF SYMBOLS ... Circuit board 410 ... Connector 500 ... Image signal supply circuit 600 ... Pixel part 700 ... Retention capacity 800 ... Image signal comparison circuit 900 ... Timing signal supply circuit

Claims (7)

Drive for driving an electro-optical device including a plurality of data lines and a plurality of scanning lines extending crossing each other, and a plurality of pixel portions electrically connected to the plurality of data lines and the plurality of scanning lines, respectively. A circuit,
Image signal supply means for supplying an image signal corresponding to an image for each of the n data lines (where n is a natural number) for the plurality of data lines;
Image signal distribution means for distributing the image signal supplied from the image signal supply means to each of the n data lines by selecting each data line included in the n data lines in time series. When,
Selection period setting means for setting a period during which the plurality of data lines are selected by the image signal distribution means,
The selection period setting means sets a period during which the first data line is selected so as to at least partially overlap a period during which the second data line selected next to the first data line is selected. A drive circuit characterized by being made possible.   The selection period setting means, when a difference in voltage between the image signal supplied to the first data line and the image signal supplied to the second data line is equal to or less than a predetermined threshold, 2. The drive circuit according to claim 1, wherein a period during which the first data line is selected is set so as to at least partially overlap a period during which the second data line is selected.   The selection period setting means uses the first data line as the first data line of the n data lines, and sets the second data line as a period during which the first data line is selected. 3. The driving circuit according to claim 1, wherein the driving circuit is set so as to at least partially overlap a selected period.   The selection period setting means sets, for each of the n data lines, a period during which the first data line is selected so as to at least partially overlap with a period during which the second data line is selected. The drive circuit according to any one of claims 1 to 3, wherein:   An electro-optical device comprising the drive circuit according to claim 1.   An electronic apparatus comprising the electro-optical device according to claim 5. Drive for driving an electro-optical device including a plurality of data lines and a plurality of scanning lines extending crossing each other and a plurality of pixel portions electrically connected to the plurality of data lines and the plurality of scanning lines, respectively. A method,
An image signal supplying step of supplying an image signal corresponding to an image for each of the n data lines (where n is a natural number) for the plurality of data lines;
Image signal distribution step of distributing the image signal supplied from the image signal supply means to each of the n data lines by selecting each data line included in the n data lines in time series When,
A selection period setting step for setting a period during which the plurality of data lines are selected in the image signal distribution step,
In the selection period setting step, the period for selecting the first data line can be set to overlap at least partially with the period for selecting the second data line selected next to the first data line. The drive method characterized by being made.

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