JP2010219244A - Semiconductor device and manufacturing method for semiconductor device - Google Patents

Abstract

Provided is a semiconductor device in which circuit elements and an inductor are combined and integrated and have a heat dissipation function for heat generated by the inductor.

A first lead, a second lead separated from the first lead, an inductor mounted on a surface of the first lead, and a second lead are mounted on the first lead. 10 and the outer lead of the second lead 12 and the circuit element electrically connected to the inductor L, the back surface of the first lead 10 and a part of the back surface of the element mounting portion of the second lead are exposed, the inductor L and the circuit And a first sealing body 20 that seals the element.

[Selection] Figure 1

Description

The present invention relates to a semiconductor device, and more particularly, to a mold package semiconductor device incorporating an inductor and a semiconductor device manufacturing method.

Many portable electronic devices such as notebook computers, mobile phones, and portable information terminals use batteries as a power source, and include a DC-DC converter as a power conversion device that converts a power supply voltage into a predetermined operating voltage. Yes.

A DC-DC converter is a device that converts an input DC voltage into a desired DC voltage and outputs the desired DC voltage. Such DC-DC converters are strongly demanded to reduce the formation area on the circuit board as the various electronic devices become smaller and more multifunctional. In response to such demands, it is known as a prior art to downsize a circuit element such as a semiconductor integrated circuit (IC) and an inductor in a single package. (For example, see Patent Document 1)

JP 2007-173712 A

However, in the prior art, when circuit elements and inductors are combined and integrated in one package, the circuit elements and inductors are often arranged close to each other. There is a problem that the temperature of an IC or the like, which is a circuit element, is raised to cause a malfunction.

Accordingly, it is an object of the present invention to provide a semiconductor device and a semiconductor device manufacturing method in which circuit elements and inductors are combined and integrated and have a heat dissipation function with respect to heat generated by the circuit elements and inductors.

In order to solve the above-described problems, the present invention is configured as follows.

The semiconductor device according to the present invention is mounted on the first lead, the second lead separated from the first lead, the inductor mounted on the surface of the first lead, and the second lead. A circuit element electrically connected to the inductor by an outer lead of the lead, a first seal that exposes a part of the back surface of the first lead and the back surface of the element mounting portion of the second lead, and seals the inductor and the circuit element. And a stop body.

Further, the back surface of the first lead and a part of the back surface of the element mounting portion of the second lead have a heat dissipation function.

In addition, a height position of a surface on which the inductor of the first lead and a part of the back surface of the element mounting portion of the second lead are mounted differs from a surface on which the circuit element of the second lead is mounted.

In addition, the semiconductor device manufacturing method of the present invention includes a step of patterning a desired circuit pattern on a metal plate to form a first lead and a second lead, an upset process on the second lead, A step of forming a lead in a gull wing, a step of disposing an inductor on a surface of the first lead, a circuit element on a surface of the second lead, a first lead and an inductor, and a second lead and a circuit element, respectively. And a step of electrically connecting, a step of exposing a back surface of the first lead and a back surface of the element mounting portion of the second lead, and sealing the inductor and the circuit element with a first sealing body. And

Advantageous Effects of Invention According to the present invention, it is possible to provide a semiconductor device and a method for manufacturing a semiconductor device, in which circuit elements and inductors are combined and integrated and have a heat dissipation function with respect to heat generated by the circuit elements and inductors.

It is a top view of the semiconductor device concerning Example 1 of the present invention. It is sectional drawing in the AA line shown in FIG. It is sectional drawing in the BB line shown in FIG. It is sectional drawing in the CC line shown in FIG. It is a figure which shows the principle structure and external connection structure of the DC-DC converter which is a semiconductor device which concerns on Example 1 of this invention. It is a figure which shows the specific structure of MIC in the DC-DC converter which is a semiconductor device which concerns on Example 1 of this invention. It is process sectional drawing which shows the semiconductor device manufacturing method which concerns on Example 1 of this invention. It is a top view which shows a part of manufacturing process of the semiconductor device which concerns on Example 1 of this invention. It is a top view which shows the back surface of the semiconductor device which concerns on Example 1 of this invention.

Hereinafter, embodiments of the present invention will be described in detail. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in light of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

As shown in FIG. 1, a DC-DC converter 1 as an example of a semiconductor device according to an embodiment of the present invention includes a first lead 10, a second lead 12 separated from the first lead 10, An inductor L mounted on the surface of the first lead 10; a circuit element mounted on the second lead 12 and electrically connected to the inductor L at the outer leads of the first lead 10 and the second lead 12; A first sealing body 20 that exposes a part of the back surface of the first lead 10 and the rear surface of the element mounting portion 120 of the second lead 12 and seals the inductor L and the circuit element is provided. Here, the circuit element is an element that contributes to driving the inductor L such as the semiconductor integrated circuit (IC) 32, the capacitors C1 to C5, the resistors R2 and R3, and the diode D1. The components mounted on the element mounting portion 120 of the second lead 12 are a semiconductor integrated circuit (IC) 32 and a diode D1. The DC-DC converter includes a semiconductor integrated circuit 32 including a switching element and a control circuit, a circuit element including active elements such as a diode D1, passive elements such as capacitors C1 to C5 and resistors R2 and R3, and an inductor L. Is done.

As shown in FIG. 2 which is a sectional view taken along the line AA in FIG. 1 and FIG. 3 which is a sectional view taken along the line BB in FIG. The back surface 10b facing the front surface 10a of the first lead 10 is exposed and has a heat radiation function for radiating heat generated by the inductor L. Further, as shown in FIG. 2, the diode D1 is mounted on the front surface 120a of the back surface of the element mounting portion of the second lead. The back surface 120b facing the front surface 120a of the element mounting portion 120 of the second lead 12 is exposed and has a heat dissipation function for radiating heat generated by the diode D1. Even when a semiconductor integrated circuit (IC) 32 (not shown) is mounted, it has a similar heat dissipation function.

As shown in FIG. 2 which is a cross-sectional view taken along line AA in FIG. 1 and FIG. 4 which is a cross-sectional view taken along line CC in FIG. ) Is different from the surface (surface 10a) on which the inductor L of the first lead 10 is mounted. The second lead 12 is formed by upset processing and is formed in a gull wing shape as shown in FIG. Further, the element mounting portion 120 of the second lead 12 is at the same height as the first lead 10. FIG. 9 shows a back surface state of the semiconductor device.

The first lead 10 and the second lead 12 are formed on a surface of a thin metal plate such as copper (Cu), copper alloy, alloy material (Fe—Ni), palladium alloy (Ni—Pd—Au), silver ( Ag) and nickel (Ni) plated material or the like is used.

As the inductor L, a surface mount type inductor such as a mold type that can be mounted on the surface 10a of the first lead 10 can be adopted. The mold-type inductor L includes a line electrode that forms an inductor therein, and a pair of terminal electrodes connected to the line electrode on the side surface side. In addition, a back surface electrode connected to the first lead 10 is provided on the back surface side of the inductor L. And the 1st lead | read | reed 10 and a terminal electrode and a back surface electrode are electrically and mechanically connected by connection members (not shown), such as conductive resin, solder, and a conductive metal paste.

Further, the inductor L exposes the terminal electrode and the back electrode, and is sealed with a second sealing body (not shown) that is a ferromagnetic body. The linear expansion coefficient (linear expansion coefficient) of the second sealing body is preferably substantially the same as the linear expansion coefficient of the first sealing body 20. If the linear expansion coefficients of the first sealing body 20 and the second sealing body are substantially the same, the rate of change in length corresponding to the temperature increase is substantially the same, and distortion due to the temperature increase can be prevented. Because. As the linear expansion coefficient of the first sealing body 20, a resin having a linear expansion coefficient of 10 to 30 ppm / ° C. can be used. An epoxy resin, an acrylic resin, or the like can be used for the first sealing body 20.

The inductor L has the surface of the second sealing body covered with a protective material such as polyimide, rubber, or gel. The protective material has functions such as prevention of peeling of the second sealing body and stress relaxation.

Next, a circuit of the DC-DC converter 1 according to the embodiment of the present invention will be described with reference to FIGS. The circuit diagram of FIG. 5 is a diagram illustrating a principle configuration and an external connection configuration of the DC-DC converter 1.

The DC-DC converter 1 is a step-down type constant voltage constant current type DC-DC converter, which converts an input voltage Vdd1 from the DC power supply 30 into a predetermined voltage by an inductor L and outputs an output voltage Vdd2 having a different potential. Circuit. The DC-DC converter 1 is connected between an inductor L as an inductance element, one terminal of the inductor L, and the ground point, and a capacitor C2 that smoothes the output voltage Vdd2, and the other terminal of the inductor L and the ground point. A diode D1 connected between them, a monolithic integrated circuit (MIC) 32 for flowing a drive current toward the inductor L, and a capacitor C1 for smoothing the input voltage Vdd1 are provided. The DC-DC converter 1 has a DC power supply 30 for applying an input voltage Vdd1 that is a DC voltage on the input side, and a load Load on the output side.

The DC-DC converter 1 includes an input voltage terminal Vin, an enable terminal EN, a soft start terminal SS, a comparator terminal COMP, a ground terminal Gnd, a feedback terminal FB, a bootstrap terminal BS, a switch terminal SW, and an output voltage terminal OUT. .

The MIC 32 is a circuit that controls the entire DC-DC converter 1. The MIC 32 receives an input of an operation signal for instructing the start or stop of the operation of the DC-DC converter 1, and operates when the operation signal is at a high (H) level and stops when the operation signal is at a low (L) level. It is supposed to be.

The diode D1 is composed of a Schottky barrier diode (SBD) made of contact between a metal and a semiconductor. The diode D1 releases the energy stored in the inductor L in response to the switch signal from the MIC 32.

The circuit diagram of FIG. 6 is a diagram illustrating a specific configuration of the MIC 32 in the DC-DC converter 1.

The MIC 32 includes a switch control circuit 41, a reference voltage circuit 42, a current detection amplifier 43, an addition circuit 44, a bootstrap (Boot REG) circuit 45, an error amplification circuit 50, an oscillation circuit 51, a pulse width modulation (PWM) comparator 52, a PWM. A circuit 53, a drive circuit 54, a low input malfunction prevention (UVLO) circuit 60, a protection circuit 61, a soft start circuit 62, and the like are provided.

The MIC 32 includes switching transistors Tr1 to Tr3, a rectifying transistor Tr4, resistors R1 and R2 for detecting output voltage, an inductor L, a smoothing capacitor C1, a capacitor C2 forming a noise filter, a resistor R3 for phase compensation, and a capacitor. C3 is connected to a capacitor C5 for soft start (SS) control. The switching transistor Tr3 and the rectifying transistor Tr4 are provided in series between the input terminal IN and the ground point. The inductor L is provided between the switch terminal SW and the output voltage terminal OUT. The resistors R1 and R2 and the capacitor C2 are provided in series between the output voltage terminal OUT and the ground point.

The switch control circuit 41 is connected to the enable terminal EN, generates H level and L level output signals used for switching on / off the output of the MIC 32, and outputs the output signals to the reference voltage circuit 42 and the soft start circuit 62.

The reference voltage circuit 42 is connected to the input terminal IN and the switch control circuit 41, and includes a constant voltage (P.REG) circuit 42a and a reference voltage generation (VREF) circuit 42b. The constant voltage circuit 42a steps down the input voltage Vdd1 input from the input terminal IN and outputs operating voltages (internal power supply voltage Vddi: 5v) of various circuits of the MIC 32. The VREF circuit 42b generates and outputs a predetermined reference voltage Vref (0.5 v) from the input voltage Vdd1 input from the input terminal IN.

The current detection amplifier 43 is a circuit that measures a voltage by measuring a voltage drop in a resistor placed in a current path. The current detection amplifier 43 is connected to the input terminal IN, generates an output signal Va obtained by amplifying the detected voltage, and outputs the output signal Va to the addition circuit 44. The overcurrent protection (OCP) circuit 43a built in the current detection amplifier 43 has a function of protecting the load from an unexpected current when the DC output is short-circuited for some reason.

The adder circuit 44 adds the output signal Va output from the current detection amplifier 43 and the triangular wave signal TW output from the oscillation circuit 51 to generate an output signal Vtw and outputs it to the PWM comparator 52.

The bootstrap circuit 45 is connected to the input terminal IN, biases the input voltage Vdd1 input from the input terminal IN, obtains a constant voltage, and is a switching transistor formed of an N-channel MOSFET (insulated gate field effect transistor). Voltage signals for base drive of Tr2, Tr3 and rectifying transistor Tr4 are output to the drive circuit 54.

The error amplifier circuit 50 divides the output voltage Vout by the output voltage detection resistors R1 and R2 and compares the divided voltage Vfb input via the feedback terminal FB with the internal power supply voltage Vddi and the reference voltage Vref. Then, the potential difference is amplified to generate an output signal EA1 and output to the PWM comparator 52. The error amplifier circuit 50 is connected to the comparator terminal COMP, and a phase compensation circuit, which is a series circuit of a capacitor C3 and a resistor R3, is provided between the comparator terminal COMP and the ground point.

The oscillation circuit 51 generates a triangular wave signal TW having a predetermined frequency and outputs it to the adding circuit 44. The oscillation circuit 51 generates a clock signal CL that repeats the H level and the L level, and outputs the clock signal CL to the PWM circuit 53.

The PWM comparator 52 compares the output signal Vtw output from the adder circuit 44 with the output signal EA1 output from the error amplifier circuit 50 to generate an output signal EA2 and output it to the PWM circuit 53.

The PWM circuit 53 generates a pulse signal Spw for performing PWM control from the output signal EA2 output from the PWM comparator 52, and outputs the pulse signal Spw to the drive circuit 54.

The drive circuit 54 generates drive signals Sd2 to Sd4 for driving the switching transistors Tr2 and Tr3 and the rectifying transistor Tr4 from the input pulse signal Spw, and the gates of the switching transistors Tr2 and Tr3 and the rectifying transistor Tr4. Output to the gate.

The UVLO circuit 60 detects the power supply voltage level and turns off the output transistor so that the internal circuit of the MIC 32 does not operate in an unstable state when the power supply line is instantaneously lowered due to a transient state when the power is turned on or an unexpected accident. To prevent malfunction. The UVLO circuit 60 monitors the level change of the power supply voltage input to the internal circuit of the MIC 32, and outputs an output signal that causes the soft start circuit 62 to stop the voltage output operation when the power supply voltage falls below a predetermined value. To do.

The protection circuit 61 includes an overvoltage protection (OVP) circuit 61a and an overheat protection (TSD) circuit 61b. The OVP circuit 61a is a circuit that prevents the destruction of the MIC 32 by discharging the excess voltage to the outside when a voltage exceeding the specified range of the input voltage of the MIC 32 is input. The TSD circuit 61b is a circuit that monitors the heat generation of the MIC 32 itself, stops the operation of the MIC 32 before reaching an unstable operation temperature, and protects the MIC 32 from thermal destruction. The TSD circuit 61b monitors the heat generation of the MIC 32 itself, and outputs an output signal for stopping the voltage output operation to the soft start circuit 62 when the temperature rise due to the heat generation exceeds a predetermined value.

The soft start circuit 62 is connected to the switch control circuit 41, the UVLO circuit 60, and the TSD circuit 61b as inputs, generates a drive signal Sd1 for driving the switching transistor Tr1, and outputs it to the gate of the switching transistor Tr1. The transistor Tr1 is composed of an N-channel MOSFET, the source terminal is connected to the ground point, and the drain terminal is connected to the constant voltage circuit 42a. A connection node between the drain terminal of the transistor Tr1 and the constant voltage circuit 42a is connected to a ground point via a capacitor C5.

Next, a method for manufacturing the DC-DC converter 1 which is an example of the semiconductor device according to the embodiment of the present invention will be described with reference to the process cross-sectional view of FIG.

(A) First, as shown in FIG. 7A, a metal plate for forming the first lead 10 and the second lead 12 is prepared. Then, the first lead 10 and the second lead 12 are formed by patterning a desired circuit pattern (circuit design) on the prepared metal plate. As shown in FIG. 8, a plurality of (for example, 5 × 9) lead frames made of the first lead 10 and the second lead 12 can be formed from one metal plate.

(B) Next, as shown in FIG. 7B, by performing an upset process, the second lead 12 is formed in a gull wing shape. When the second lead 12 is upset, the height position of the surface on which the inductor L of the first lead 10 is mounted is different from the height position of the surface on which the circuit element of the second lead 12 is mounted. However, the element mounting portion 120 of the second lead 12 is not subjected to upset processing, and the height position of the surface on which the inductor L of the first lead 10 is mounted is the same.

(C) Next, as shown in FIG. 7C, an inductor L is arranged on the surface of the first lead 10, a circuit element (capacitor C1, resistor R2 in the figure), and a second lead 12 on the surface. A circuit element (semiconductor integrated circuit (IC) 32 in the figure) is arranged on the surface of the element mounting portion 120 of the two leads 12. The inductor L and the circuit element are electrically connected by outer leads of the first lead 10 and the second lead 12.

(D) Next, as shown in FIG. 7D, the first lead 10 and the inductor L, and the second lead 12 and the circuit element are electrically connected. Examples of the electrical connection method include soldering and wire bonding.

(E) Next, as shown in FIG. 7 (e), the back surface of the first lead 10 and the back surface of the element mounting portion 120 of the second lead are exposed, and the inductor L and the circuit element are removed by the first sealing body 20. Seal. Since the back surface of the first lead 10 and the back surface of the element mounting portion 120 of the second lead are not sealed by the first seal 20, they have a heat dissipation function.

(F) Next, as shown in FIG. 7 (f), using a tool that cuts with a metal plate such as a dicing blade, the part that becomes the end of the semiconductor device (the arrow shown in FIG. 7 (f)) Dicing. By dicing, a plurality of semiconductor devices made of one metal plate shown in FIG. 8 are divided into device units.

Through the above steps, the semiconductor device according to the embodiment shown in FIG. 1 is completed.

According to the semiconductor device according to the embodiment of the present invention, even if the circuit element and the inductor L are combined and integrated in one package, the first lead 10 on which the inductor L is disposed and the second lead 12 on which the circuit element is disposed. Since they are separated from each other, the heat generated by the first lead 10 and the second lead 12 is not conducted through the first lead 10 and the second lead 12, respectively.

Further, according to the semiconductor device according to the embodiment of the present invention, the back surface 10b of the first lead 10 on which the inductor L is disposed is not sealed with resin, so that the heat generated in the inductor L has a heat dissipation function. Heat is radiated from the back surface 10b. Therefore, the heat generated in the inductor L does not increase the temperature of an IC or the like that is a circuit element. Similarly, heat is radiated from the back surface 120 b of the element mounting portion 120 of the second lead 12.

In addition, when mounting the semiconductor device according to the embodiment of the present invention on a printed circuit board or the like, it is possible to efficiently dissipate heat from the exposed back surface to the mounted substrate through solder or the like, similar to the joining of the external terminals. It becomes possible. When insulation between the circuit element and the substrate is required, an insulating sheet or an insulating adhesive can be used for the back surface 120b of the element mounting portion 120 of the second lead 12.

As described above, the present invention has been described according to the embodiment. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques should be apparent to those skilled in the art.

For example, in the embodiment, the inductor L has been described using a mold type. However, the inductor L is a ferrite core type, a metal composite mold type, or a dust core type that includes a ferrite core and an electric wire wound around the outer periphery of the ferrite core. It does not matter.

Moreover, in the semiconductor device manufacturing method according to the embodiment, a step of sealing the inductor L with a second sealing body containing a ferromagnetic material may be further included.

In the semiconductor device manufacturing method according to the embodiment, a step of covering the surface of the inductor L with a protective material may be further included.

Thus, it should be understood that the present invention includes various embodiments and the like not described herein. Therefore, the present invention is limited only by the invention specifying matters in the scope of claims reasonable from this disclosure.

C1 to C5 ... Capacitor D1 ... Diode L ... Inductor Load ... Load R1-R3 ... Resistance 1 ... DC-DC converter Tr1-Tr4 ... Transistor 10 ... First lead 12 ... Second lead 20 ... First sealing body 30 ... DC Power supply 32 ... MIC
DESCRIPTION OF SYMBOLS 41 ... Switch control circuit 42 ... Reference voltage circuit 42a ... Constant voltage circuit 42b ... Reference voltage generation circuit 43 ... Current detection amplifier 43a ... Overcurrent protection circuit 44 ... Adder circuit 45 ... Bootstrap circuit 50 ... Error amplification circuit 51 ... Oscillation circuit 52 ... PWM comparator 53 ... PWM circuit 54 ... Drive circuit 60 ... Low input malfunction prevention circuit 61 ... Protection circuit 61a ... Overvoltage protection circuit 61b ... Overheat protection circuit 62 ... Soft start circuit

Claims (4)

A first lead; a second lead separated from the first lead; an inductor mounted on a surface of the first lead; and a second lead mounted on the second lead, wherein the first lead and the second lead A circuit element electrically connected to the inductor by an outer lead, a part of a back surface of the first lead and a back surface of the element mounting portion of the second lead are exposed, and the inductor and the circuit element are sealed. A semiconductor device comprising: a first sealing body.
2. The semiconductor device according to claim 1, wherein a part of a back surface of the first lead and a back surface of the element mounting portion of the second lead has a heat dissipation function.
A height position of a surface of the first lead on which the inductor is mounted and a part of the back surface of the element mounting portion of the second lead are different from a surface of the second lead on which the circuit element is mounted. The semiconductor device according to claim 1 or 2.
  Patterning a desired circuit pattern on a metal plate to form a first lead and a second lead; and performing an upset process on the second lead to form a second lead in a gull wing shape; Disposing an inductor on the surface of the first lead and disposing a circuit element on the surface of the second lead, and electrically connecting the first lead and the inductor and the second lead and the circuit element, respectively. And a step of exposing a part of the back surface of the first lead and the back surface of the element mounting portion of the second lead, and sealing the inductor and the circuit element with a first sealing body. A semiconductor device manufacturing method.

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