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JP2010204769A - Electrostatic capacity type coordinate input device - Google Patents

Electrostatic capacity type coordinate input device Download PDF

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JP2010204769A
JP2010204769A JP2009047302A JP2009047302A JP2010204769A JP 2010204769 A JP2010204769 A JP 2010204769A JP 2009047302 A JP2009047302 A JP 2009047302A JP 2009047302 A JP2009047302 A JP 2009047302A JP 2010204769 A JP2010204769 A JP 2010204769A
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input device
coordinate input
switch
electrodes
connection
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JP5245916B2 (en
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Hiroshi Shinoda
信田宏
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Pentel Co Ltd
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Abstract

【課題】静電容量型座標入力装置において、座標を検知するパネルがITO透明電極シート2枚構造となり、2枚に貼り合わせることで位置ズレや貼り合わせ作業中の傷等が問題となりコスト高となってしまう。1枚のITO透明電極シートでマトリックス方式と同等に機能を有する静電容量型座標入力装置を提供する。
【解決手段】パネル部は、スイッチ電極をブリッジ抵抗で連結し、連結電極を形成した1枚構成のパネルスイッチを作成しアクリル板等に貼り付ける。制御基板は、連結電極切り替え回路、発振回路を利用した容量変化を周波数に変換するC/F変換回路、閾値データを記憶するための不揮発性メモリ波形の幅が計測できるインプットキャプチャ機能付きカウンタが内蔵されたCPUで構成する。
【選択図】図4
In a capacitive coordinate input device, a panel for detecting coordinates has a structure of two ITO transparent electrode sheets, and bonding to the two sheets causes problems such as positional misalignment and scratches during bonding work, resulting in high costs. turn into. Provided is a capacitive coordinate input device having a function equivalent to that of a matrix system with a single ITO transparent electrode sheet.
A panel unit is formed by connecting switch electrodes with a bridge resistor to form a single panel switch in which connection electrodes are formed, and attaching the panel switch to an acrylic plate or the like. The control board has a built-in counter with an input capture function that can measure the width of a nonvolatile memory waveform for storing threshold data, and a connection electrode switching circuit, a C / F conversion circuit that converts capacitance changes to frequency using an oscillation circuit The CPU is configured.
[Selection] Figure 4

Description

本発明は、入力方式に静電容量方式を採用した静電容量型座標入力装置に関するものである。   The present invention relates to a capacitance-type coordinate input device that employs a capacitance method as an input method.

図1で示す従来の静電容量型座標入力装置は、パネルスイッチと制御基板から構成される。パネルスイッチは、図2で示す複数のXライン電極と複数のYライン電極(特開2008−05279−図2、特開2007−141817)で構成されアクリル板や透明なABS樹脂板に貼り合わせてものでる。表面パネルに指(導通部材)が近づくと、誘電体(プラスティック、セラミック、ガラス等の絶縁体)をライン電極(複数のXライン電極と複数のYライン電極)と指で挟んだ平行板コンデンサが形成され静電容量が増加する。又逆に表面パネルから指が離れると静電容量が減少する。
制御基板は、前記Xライン電極とYライン電極の静電容量の変化をC/V(容量を電圧)変換回路で電圧に変換し、CPUのADC(A/Dコンバータ)でデジタルデータに置き換え、演算プログラムよりXライン電極とYライン電極の交点を検出することにより座標位置を特定しているのが、静電容量型座標入力装置の一般的な動作原理である。
The conventional capacitive coordinate input device shown in FIG. 1 includes a panel switch and a control board. The panel switch is composed of a plurality of X-line electrodes and a plurality of Y-line electrodes (Japanese Patent Laid-Open No. 2008-05279-FIG. 2, Japanese Patent Laid-Open No. 2007-141817) shown in FIG. 2, and is bonded to an acrylic plate or a transparent ABS resin plate. It's a thing. When a finger (conducting member) approaches the front panel, a parallel plate capacitor with a dielectric (insulator such as plastic, ceramic, glass, etc.) sandwiched between the line electrode (multiple X-line electrodes and multiple Y-line electrodes) and the finger As a result, the capacitance increases. Conversely, when the finger is removed from the front panel, the capacitance decreases.
The control board converts the capacitance change of the X line electrode and the Y line electrode into a voltage by a C / V (capacitance voltage) conversion circuit, and replaces it with digital data by a CPU ADC (A / D converter). The general operation principle of the capacitive coordinate input device is that the coordinate position is specified by detecting the intersection of the X line electrode and the Y line electrode from the calculation program.

特開2008−052729JP2008-052729 特開2007−141817JP2007-141817A

静電容量型座標入力装置に於いては、Xライン電極とYライン電極よりマトリックスを構成するため、Xライン電極シートとYライン電極シートの2枚の電極シートで2層構造を形成する必要がある。2層構造を構成するには2つの方法があり、図2−1で示すXライン電極シートとYライン電極シートを2枚貼り合わせる方法と、図2−2で示す表面にXライン電極を作成し裏面にYライン電極を作成したITO透明電極を両面蒸着する方法がある。   In the capacitive coordinate input device, since the matrix is composed of the X line electrode and the Y line electrode, it is necessary to form a two-layer structure with two electrode sheets of the X line electrode sheet and the Y line electrode sheet. is there. There are two methods for constructing a two-layer structure: a method of bonding two X-line electrode sheets and a Y-line electrode sheet shown in FIG. 2-1, and an X-line electrode on the surface shown in FIG. There is a method of vapor-depositing an ITO transparent electrode having a Y line electrode on the back surface.

ITO透明電極を両面蒸着しXライン電極とYライン電極を1枚のフィルムで構成することが理想であるが、現時点の技術では歩留まりが悪く(抵抗値を一定の値に保つのが難しい)採算ベースに乗らず実現することは不可能である。又ITO透明電極を2枚に貼り合わせる方法も、位置ズレや貼り合わせ作業中の傷等が問題となりコスト高となってしまう。
そこで本発明は上記問題を解決することを目的とし、1枚のITO透明電極シートで容量型座標入力装置を提供する事にある。
Ideally, ITO transparent electrodes are vapor-deposited on both sides, and the X-line electrode and Y-line electrode are composed of a single film, but the current technology has a poor yield (it is difficult to keep the resistance value constant). It is impossible to achieve without riding the base. Also, the method of bonding the ITO transparent electrode to the two sheets also causes problems such as misalignment and scratches during the bonding operation, resulting in high costs.
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a capacitive coordinate input device with a single ITO transparent electrode sheet in order to solve the above problems.

パネルスイッチと、CPUと、C/F変換回路と、不揮発性メモリと、連結切り替え回路とからなる制御基板を有する静電容量型座標入力装置であって、前記パネルスイッチは、ITO透明パターンによって形成されたブリッジ抵抗とスイッチ電極を交互に複数個接続した連結電極が複数個並列に設けられており、非接触状態における前記連結電極の静電容量を不揮発性メモリに登録し、接触状態で連結電極切り替え回路により各連結電極の両端を順次切り替え計測した連結電極の静電容量と、不揮発性メモリに登録されている非接触状態の静電容量の差を比較演算することで、スイッチ電極の位置を特定する静電容量型座標入力装置を提案するものである。   A capacitive coordinate input device having a control board comprising a panel switch, a CPU, a C / F conversion circuit, a nonvolatile memory, and a connection switching circuit, wherein the panel switch is formed by an ITO transparent pattern A plurality of connection electrodes in which a plurality of bridge resistors and switch electrodes are alternately connected are provided in parallel, and the capacitance of the connection electrodes in a non-contact state is registered in a nonvolatile memory, and the connection electrodes are connected in a contact state. The position of the switch electrode is calculated by comparing the difference between the capacitance of the connection electrode, which is measured by sequentially switching both ends of each connection electrode by the switching circuit, and the capacitance of the non-contact state registered in the nonvolatile memory. An electrostatic capacitance type coordinate input device to be specified is proposed.

本発明によれば、静電容量型座標入力装置を構成する場合ITO透明電極シート1枚で構成可能、貼り合わせ作業もなく低価格な静電容量型座標入力装置を構成可能となる。   According to the present invention, when a capacitive coordinate input device is configured, it can be configured with one ITO transparent electrode sheet, and a low-cost capacitive coordinate input device can be configured without bonding work.

従来の静電容量型座標入力装置の構成図Configuration diagram of conventional capacitive coordinate input device マトリックス方式のパネルスイッチMatrix type panel switch 連結電極方式パネルスイッチの構造Structure of connected electrode type panel switch 静電容量型座標入力装置の構成図Configuration diagram of capacitive coordinate input device 静電容量型座標入力装置のシステム構成図System configuration diagram of capacitive coordinate input device 座標特定メカニズム1Coordinate identification mechanism 1 座標特定メカニズム2Coordinate identification mechanism 2 座標検出回路Coordinate detection circuit

本発明は、図4で示す通り連結電極式パネルスイッチと制御基板から構成する。連結電極式パネルスイッチは、図3で示すとおりスイッチ電極をブリッジ抵抗で接続し連結電極を形成しアクリル等の透明板に貼り付けた構造。
制御基板は、パネルスイッチの連結電極を順番に切り替え回路、発振回路を利用した容量変化を周波数変化に変換するC/F変換回路、前記周波数変化を記憶するための不揮発性メモリ、波形の幅が計測できるインプットキャプチャ機能付きカウンタが内蔵されたCPUで構成する。
The present invention comprises a connection electrode type panel switch and a control board as shown in FIG. As shown in FIG. 3, the connection electrode type panel switch has a structure in which the switch electrodes are connected by a bridge resistor to form a connection electrode and is attached to a transparent plate such as acrylic.
The control board sequentially switches the connection electrodes of the panel switch, a C / F conversion circuit that converts the capacitance change using the oscillation circuit into a frequency change, a non-volatile memory for storing the frequency change, and a waveform width It consists of a CPU with a built-in counter with an input capture function that can be measured.

以下本発明の座標特定メカニズムを図5に基づき説明する。
図5の発振回路で使用しているLMC555の発振周波数はC1とR1との時定数で決定される。ナショナルセミコンダクタ社製LMC555データシートより周波数の計算式はf=1.4C×R(LMC555 CMOSTimer用Application Information 7ページ)で提示されている。前記LMC555のデータシートに基づき発振周波数を計算式に当てはめると下記計算式になる。
連結電極切り替え回路にて連結電極で非接触状態と接触状態を計算式に当てはめる。
1−1)図6に示す連結電極切り替え回路にてL1Aを接続し周波数を測定
・非接触状態の周波数の計算式 F1A=1.4C1×R1
・接触状態の周波数の計算式 f1A=1.4(C1×R1+C2×mR)
・変化量 Δ1A=F1A−f1A=−1.4C2×R
1−2)図7に示す連結電極切り替え回路にてL1Bを接続し周波数を測定
・非接触状態の周波数の計算式 F1B=1.4C1×R1
・接触状態の周波数の計算式 f1B=1.4(C1×R1+C2×nR)
・変化量 Δ1B=F1B−f1B=−1.4C2×nR
(但しm、nはブリッジ抵抗の数でm+n=6、Rはブリッジ抵抗で2KΩ程度)
1−3)L1AとL1Bの変化量に対する変化率
・変化率 Δ1A/Δ1B=(−1.4C2×mR)/(−1.4C2×nR)
=m/n
1−4)m+n=6の関係よりスイッチを特定する
SW01が接触状態の場合は m=1 n=5のため m:n=1:5
SW02が接触状態の場合は m=2 n=4のため m:n=1:2
SW03が接触状態の場合は m=3 n=3のため m:n=1:1
SW04が接触状態の場合は m=4 n=2のため m:n=2:1
SW05が接触状態の場合は m=1 n=5のため m:n=5:1
前記理論に基づき連結電極両端(L1AとL1B)の周波数を測定することで接触状態のスイッチを特定することができる。以下同様に連結電極両端のL2A,L2B、L3A、L3B、L4A,L4Bの周波数を測定することでどのスイッチが接触状態であるかを特定することができる。
Hereinafter, the coordinate specifying mechanism of the present invention will be described with reference to FIG.
The oscillation frequency of the LMC 555 used in the oscillation circuit of FIG. 5 is determined by the time constant of C1 and R1. The calculation formula of the frequency is presented as f = 1.4C × R (Application Information 7 for LMC555 CMOSTimer) from the LMC555 data sheet manufactured by National Semiconductor. When the oscillation frequency is applied to the calculation formula based on the LMC555 data sheet, the following calculation formula is obtained.
In the connection electrode switching circuit, the non-contact state and the contact state at the connection electrode are applied to the calculation formula.
1-1) Connect L1A with the connection electrode switching circuit shown in FIG. 6 and measure the frequency.
・ Calculation formula of frequency in non-contact state F1A = 1.4C1 × R1
・ Calculation formula of frequency in contact state f1A = 1.4 (C1 × R1 + C2 × mR)
・ Change amount Δ1A = F1A−f1A = −1.4C2 × R
1-2) Connect L1B in the connection electrode switching circuit shown in FIG. 7 and measure the frequency. Formula for calculating frequency in non-contact state F1B = 1.4C1 × R1
・ Calculation formula of frequency in contact state f1B = 1.4 (C1 × R1 + C2 × nR)
・ Change amount Δ1B = F1B−f1B = −1.4C2 × nR
(Where m and n are the number of bridge resistors, m + n = 6, and R is a bridge resistor of about 2KΩ)
1-3) Rate of change relative to the amount of change in L1A and L1B Change rate Δ1A / Δ1B = (− 1.4C2 × mR) / (− 1.4C2 × nR)
= M / n
1-4) Specify a switch from the relationship of m + n = 6 When SW01 is in a contact state, since m = 1 and n = 5, m: n = 1: 5
When SW02 is in contact, m = 2 and n = 4, so m: n = 1: 2.
When SW03 is in contact, m: 3 n = 3 m: n = 1: 1
When SW04 is in contact, m: 4 n = 2, so m: n = 2: 1
When SW05 is in contact, m = 1, n = 5, m: n = 5: 1
Based on the above theory, the switch in the contact state can be specified by measuring the frequencies at both ends (L1A and L1B) of the connecting electrode. Similarly, it is possible to specify which switch is in contact by measuring the frequencies of L2A, L2B, L3A, L3B, L4A, and L4B at both ends of the connection electrode.

まず始めに図8で示したパネルスイッチの非接触状態を測定するためにCPUのI/O端子2より連結電極切り替え回路に対し、L1Aラインが接続されるように制御信号を出力し、C/F変換回路から出力される周波数をCPUのインプットキャプチャ機能により周波数を測定し、前記測定した周波数データをCPUのI/O端子1に接続された不揮発性メモリに登録する。又同様にCPUのI/O端子2より連結電極切り替え回路に対し順番にL1B, L2A,L2B,L3A,L3B,L4A,L4Bと順番に周波数を測定し不揮発性メモリに登録する。その時の値をF1A,F1B, F2A,F2B,F3A,F3B,F4A,F4Bとする。
次に接触状態を測定する時L1AはSW01を測定するL1BはSW05、L2AはSW06、L2BはSW10、L3AはSW11、L3BはSW15、L4AはSW16、L4BはSW20を接触状態で周波数を測定し不揮発性メモリに登録する。その時不揮発性メモリに記憶した非接触状態の周波数から接触状態の周波数を引いた値を変化量とし、バラツキや誤差を考慮して変化量の70%を接触状態の閾値データとし不揮発性メモリに登録する。
First, in order to measure the non-contact state of the panel switch shown in FIG. 8, a control signal is output from the I / O terminal 2 of the CPU to the connection electrode switching circuit so that the L1A line is connected, and C / The frequency output from the F conversion circuit is measured by the input capture function of the CPU, and the measured frequency data is registered in the nonvolatile memory connected to the I / O terminal 1 of the CPU. Similarly, the frequency is measured in order of L1B, L2A, L2B, L3A, L3B, L4A, and L4B from the I / O terminal 2 of the CPU to the connection electrode switching circuit, and is registered in the nonvolatile memory. The values at that time are assumed to be F1A, F1B, F2A, F2B, F3A, F3B, F4A, and F4B.
Next, when the contact state is measured, L1A measures SW01, L1B measures SW05, L2A switches SW06, L2B switches SW10, L3A switches SW11, L3B switches SW15, L4A switches SW16, and L4B switches SW20 to measure the frequency. Register in the memory. At that time, the value obtained by subtracting the contact state frequency from the non-contact state frequency stored in the non-volatile memory is used as the change amount, and 70% of the change amount is registered in the non-volatile memory as the contact state threshold data in consideration of variations and errors. To do.

次に図8に基づきSW07が接触状態であること特定する方法について説明する。連結電極切り替え回路より、L1AからL4Bまで順番に周波数の変化量が不揮発性メモリに登録されてある閾値データを超えているか測定する。L2A及びL2Bが閾値データを超えているため、SW06からSW10どれかのスイッチが接触状態であることが確認できる。連結電極切り替え回路によりL2Aに接続し変化量Δ2Aを測定する。次に連結電極切り替え回路によりL2Bに接続し変化量Δ2Bを測定する。
前記理論に基づき変化率 Δ2A/Δ2B=0.5になったためSW07が接触状態であることが判断できる。
Next, a method for specifying that SW07 is in a contact state will be described with reference to FIG. From the connection electrode switching circuit, it is measured in order from L1A to L4B whether the frequency change amount exceeds the threshold data registered in the nonvolatile memory. Since L2A and L2B exceed the threshold data, it can be confirmed that any one of the switches SW06 to SW10 is in contact. The connection electrode switching circuit connects to L2A and measures the change amount Δ2A. Next, the connection electrode switching circuit is connected to L2B, and the change amount Δ2B is measured.
Based on the above theory, since the change rate Δ2A / Δ2B = 0.5, it can be determined that SW07 is in a contact state.

Claims (1)

パネルスイッチと、CPUと、C/F変換回路と、不揮発性メモリと、連結切り替え回路とからなる制御基板を有する静電容量型座標入力装置であって、前記パネルスイッチは、ITO透明パターンによって形成されたブリッジ抵抗とスイッチ電極を交互に複数個接続した連結電極が複数個並列に設けられており、非接触状態における前記連結電極の静電容量を不揮発性メモリに登録し、接触状態で連結電極切り替え回路により各連結電極の両端を順次切り替え計測した連結電極の静電容量と、不揮発性メモリに登録されている非接触状態の静電容量の差を比較演算することで、スイッチ電極の位置を特定することを特徴とする静電容量型座標入力装置。
A capacitive coordinate input device having a control board comprising a panel switch, a CPU, a C / F conversion circuit, a nonvolatile memory, and a connection switching circuit, wherein the panel switch is formed by an ITO transparent pattern A plurality of connection electrodes in which a plurality of bridge resistors and switch electrodes are alternately connected are provided in parallel, and the capacitance of the connection electrodes in a non-contact state is registered in a non-volatile memory, and the connection electrodes are connected in a contact state. The position of the switch electrode is calculated by comparing the difference between the capacitance of the connection electrode that is sequentially measured by switching the both ends of each connection electrode and the non-contact state capacitance registered in the nonvolatile memory. A capacitance type coordinate input device characterized by specifying.
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