JP2010263108A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

A semiconductor device in which an underfill material does not wrap around a back surface of a semiconductor chip even when a semiconductor chip is flip-chip mounted on the wiring substrate after an underfill material is arranged in a chip mounting area of the wiring substrate, and its manufacture Provide a method.
A dam portion is disposed along a periphery of a semiconductor chip, and the dam portion is formed in a frame shape so as to surround the semiconductor chip. The dam portion 9 has a thickness equivalent to that of the semiconductor chip 6. The dam portion 9 has a portion (scoop prevention portion 10) that prevents the resin from creeping up against the back surface of the semiconductor chip 6 opposite to the front surface.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device in which a semiconductor chip is connected to a wiring board by a flip chip mounting method and a method for manufacturing the same.

  In recent years, with the reduction in size and thickness of electronic devices such as portable devices, flip chip mounting technology for connecting a semiconductor chip to a wiring board by means of bumps provided on the semiconductor chip has been studied. In a semiconductor device in which a semiconductor chip is connected to a wiring board using a flip chip mounting method, an underfill material is generally disposed between the wiring board and the semiconductor chip. The underfill material is used to protect a portion (hereinafter referred to as an electrical connection portion) connecting the bump and the wiring board, or to avoid generation of a void when the semiconductor chip is sealed with resin.

  Examples of techniques for disposing an underfill material between a wiring board and a semiconductor chip include, for example, 1) after connecting the semiconductor chip to the wiring board by a flip chip mounting method, and then underfilling the gap between the wiring board and the semiconductor chip. There is a method of filling the material. 2) There is a method in which an underfill material is disposed in an area (hereinafter referred to as a chip mounting area) on a wiring board where a semiconductor chip is mounted, and then the semiconductor chip is connected to the wiring board by a flip chip mounting method.

  In the method 1), since the underfill material is filled in the gap between the wiring board and the semiconductor chip by capillary action, the filling time becomes longer, and the method 2) (from the viewpoint of efficiency in mass production of products) 9 (a) and (b) shown in the work flow) are being studied.

JP 2006-351559 A JP 2008-187054 A

  However, in the method 2), when the semiconductor chip is connected to the wiring substrate while being held by the bonding tool, the underfill material applied in advance to the wiring substrate crawls up the outer peripheral surface of the semiconductor chip and moves to the back surface of the semiconductor chip. And adhesion to the bonding tool occur. This phenomenon becomes more prominent as the thickness of the semiconductor chip is reduced. When the resin adhering to the bonding tool and the back surface of the semiconductor chip is cured, the semiconductor chip is fixed to the bonding tool. As a result, there is a possibility that the electric bonding portion between the wiring board and the semiconductor chip may be broken during the operation of the bonding tool ((b) of FIG. 9).

  Further, in the configuration in which the underfill material is disposed between the wiring board and the semiconductor chip, the technique of providing a frame-shaped dam portion around the chip mounting area of the wiring board is disclosed in Patent Documents 1 and 2 described above. Has been proposed.

  However, even if the configurations disclosed in Patent Documents 1 and 2 are adopted in the method 2), the underfill material creeps up the outer peripheral surface of the semiconductor chip and wraps around the back surface of the semiconductor chip. Therefore, there is a possibility that the above-described problem of breakage of the electrical connection portion cannot be solved. In addition, since the problem that the underfill material wraps around the back surface of the semiconductor chip during the Philip chip mounting process is more likely to occur as the semiconductor chip is thinner, it is difficult to reduce the thickness of the semiconductor device.

  The present invention provides a semiconductor device that can solve the above-described problems and a method for manufacturing the same.

  A semiconductor device according to an embodiment of the present invention includes a wiring board, a semiconductor chip electrically connected to one surface of the wiring board by a flip chip mounting method, and an outer surface of the semiconductor chip on the one surface. A frame-shaped dam portion formed along the periphery, and a resin as an underfill material that is disposed in a gap between the wiring substrate and the semiconductor chip and contacts the dam portion.

  The dam part has a scooping prevention part that prevents the resin from scooping up the outer peripheral edge of the semiconductor chip and wrapping around the surface of the semiconductor chip opposite to the wiring substrate.

  The scooping prevention portion is formed in a taper shape on the inner peripheral portion of the dam portion so that the distance between the dam portion and the outer peripheral edge of the semiconductor chip increases as the distance from the wiring substrate increases.

  By providing such a frame-like dam portion having a scooping prevention portion, the resin is disposed on the outside of the semiconductor chip in the step of connecting the semiconductor chip to the wiring substrate after the resin is disposed in the chip mounting area of the wiring substrate. It flows toward the outer peripheral edge side of the wiring board without scooping up the peripheral edge. As a result, it is possible to suppress the resin from entering the surface of the semiconductor chip opposite to the wiring substrate. In addition, since the resin can be prevented from being wrapped around, the problem of breakage of the electric bonding portion, which has occurred in the prior art, is solved. That is, the problem that the resin is cured and the electric bonding portion between the wiring board and the semiconductor chip is broken during the operation of the bonding tool is solved. Further, this makes it possible to use a semiconductor chip having a thickness smaller than that of the conventional one, and the semiconductor device can be made thinner.

  ADVANTAGE OF THE INVENTION According to this invention, when connecting a semiconductor chip to a wiring board with a Philip chip mounting method, the subject that resin (underfill material) wraps around to a semiconductor chip back surface can be solved. In addition, the semiconductor device can be thinned.

Sectional drawing which shows schematic structure of the BGA type semiconductor device by Example 1 of this invention. The top view which shows the wiring board (the unit substrate structure part of a mother board) used for the BGA type semiconductor device by Example 1 of this invention. The figure which shows schematic structure of the A-A 'cross section and B-B' cross section of FIG. FIG. 6 is a plan view showing a modification of the scooping prevention unit in the semiconductor device of Example 1; FIG. 6 is a diagram illustrating a manufacturing process of the semiconductor device of Example 1, and illustrates a process of connecting a semiconductor chip to the substrate after supplying an underfill material to the substrate. FIG. 6 is a diagram showing a manufacturing process of the semiconductor device of Example 1, and shows a process of sealing a semiconductor chip on a substrate with resin, mounting solder balls on the substrate, and dividing the substrate for each unit device. Sectional drawing which shows schematic structure of the semiconductor device by Example 2 of this invention. Sectional drawing which shows schematic structure of the semiconductor device by Example 3 of this invention. A situation when manufacturing a semiconductor device using a method of connecting a semiconductor chip to the wiring board by a flip chip mounting method after disposing an underfill material in the chip mounting area of the wiring board, and a problem to be concerned at this time FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Example 1
FIG. 1 is a cross-sectional view showing a schematic configuration of a BGA type semiconductor device according to Embodiment 1 of the present invention. FIG. 2 is a plan view showing a unit substrate configuration of a wiring board used in the BGA type semiconductor device according to the first embodiment of the present invention. FIG. 3 is a diagram showing a schematic configuration of the AA ′ cross section and the BB ′ cross section of FIG. 2.

  A semiconductor device 1A according to the first embodiment includes a wiring board 2 that is substantially square and has predetermined wiring formed thereon. The wiring board 2 is a glass epoxy board having a thickness of 0.2 mm, for example, and predetermined wiring is formed on both surfaces of the base material, and this wiring is partially covered with an insulating film (not shown) such as a solder resist. A plurality of connection pads 3 are formed in a portion of the wiring on one surface of the wiring board 2 exposed from the solder resist. A plurality of lands 4 are formed in a portion of the wiring on the other surface of the wiring board 2 exposed from the solder resist. The connection pads 3 and the lands 4 corresponding to the connection pads 3 are electrically connected to each other by the wiring of the wiring board 1. In addition, solder balls 5 serving as external terminals are respectively mounted on the plurality of lands 4, and the solder balls 5 are arranged in a grid at predetermined intervals.

  In addition, a semiconductor chip 6 is disposed above a substantially central portion of one surface of the wiring board 2. The semiconductor chip 6 is a Si substrate having a thickness of 100 μm, for example, and a logic circuit and a memory circuit are formed on the first surface (that is, the surface). A plurality of electrode pads 7 are formed in the vicinity of the periphery of the first surface of the semiconductor chip 6, and a passivation film (not shown) is formed on the first surface of the semiconductor chip 6 excluding the electrode pads 7. Thus, the surface on which the circuit is formed (circuit formation surface) is protected.

  For example, bump electrodes 8 are provided on the electrode pads 7 of the semiconductor chip 6. Each electrode pad 7 is electrically connected to the corresponding connection pad 3 of the wiring board 2 via the bump electrode 8. The bump electrode 8 is made of Cu, for example. The bump electrode 8 may be formed of a wire bump made of Au.

  As shown in FIGS. 1 and 2, a dam portion 9 is disposed on the wiring substrate 2 along the periphery of the semiconductor chip 6, and the dam portion 9 has a frame shape so as to surround the semiconductor chip 6. Is formed. Further, the dam portion 9 is configured with a thickness equivalent to that of the semiconductor chip 6 so that the upper surface of the dam portion 9 is the same as the height of the back surface of the semiconductor chip 6. The dam portion 9 has, on its inner peripheral portion, a portion for preventing the resin from creeping up with respect to the second surface (that is, the back surface) of the semiconductor chip 6 opposite to the first surface (the scooping prevention portion 10). Called).

  The creeping prevention portion 10 is formed in a tapered shape so that the distance between the dam portion 9 and the outer peripheral edge of the semiconductor chip 6 increases as the distance from the wiring substrate 2 increases. With this shape, when the semiconductor chip 6 is connected to the wiring substrate 2 to which the underfill material 11 is applied, the underfill material 11 that crawls up along the outer peripheral surface of the semiconductor chip 6 is formed on the wiring substrate 2. It flows to the peripheral side. Incidentally, the clearance between the scooping prevention portion 10 and the semiconductor chip 6 is set to about 5 to 10 μm, for example. As a result, the flip chip mounting method can be carried out without any problem even when the scooping prevention unit 10 is provided.

  Note that when the semiconductor chip 6 is connected to the wiring substrate 2, the underfill material 11 creeps up at the center of each side around the semiconductor chip 6. Therefore, as shown in FIG. 4, the scooping prevention unit 10 may be provided only for the central part of each side.

  Further, flow holes 12 through which the underfill material 11 is circulated are arranged at portions of the frame-shaped dam portion 9 corresponding to the four sides around the semiconductor chip 6. Each circulation hole 12 penetrates along the one surface of the wiring board 2 in the direction from the inner edge to the outer edge of the frame-shaped dam portion 9. In this example, the circulation holes 12 are arranged in four directions. With such a configuration, even if the inner region of the dam portion 8 is filled with the underfill material 11 that flows to the peripheral side of the wiring substrate 2, the underfill material 11 is located above the dam portion 8 (second semiconductor chip 6 second). Will not go to the side).

  As described above, the frame-shaped dam portion 9 having the scooping prevention portion 10 extending from the front surface side of the semiconductor chip 6 toward the position near the back surface is provided around the chip mounting area of the wiring board 2. It was. As a result, when the semiconductor chip 6 is connected to the wiring substrate 2, the underfill material 11 that crawls up to the outer peripheral surface of the semiconductor chip 6 can flow toward the peripheral side of the wiring substrate 2. As a result, it is possible to prevent the underfill material 11 from entering the back surface of the semiconductor chip 6 during the Philip chip mounting process.

  In addition, since the underfill material 11 can be prevented from wrapping around the back surface of the semiconductor chip during the Philip chip mounting process, the problem of breakage of the electrical adhesive portion that has occurred in the prior art is solved. That is, the problem that the surrounding underfill material 11 is cured and the electric bonding portion between the wiring board 2 and the semiconductor chip 6 is broken when the bonding tool is operated is solved. Furthermore, this allows the use of a semiconductor chip 6 (for example, a chip having a thickness of 100 μm or less) that is thinner than the conventional one, so that the semiconductor device can be made thinner.

  Furthermore, by using the dam portion 9, the underfill material 11 is disposed not only between the wiring substrate 2 and the semiconductor chip 6 but also between the dam portion 9, the wiring substrate 2 and the semiconductor chip 6. The connection strength between 6 and the wiring board 2 can be improved. Moreover, the reliability and mechanical strength of the semiconductor device are improved by improving the connection strength.

  Further, by providing the plurality of flow holes 12 in the frame-shaped dam portion 9, the underfill material 11 is accommodated in the inner region of the dam portion 9 without overflowing the underfill material 11 in the upper direction of the dam portion 9. be able to.

  In addition, since the scooping prevention portion 10 in the dam portion 9 is configured in a tapered shape, the underfill material 11 that tends to scoop up in the upper direction of the dam portion 9 when the semiconductor chip 6 is connected to the wiring board 2, It can flow well to the peripheral side of the wiring board 2. As a result, the fillet shape of the underfill material 11 is also stabilized. As a result, the reliability of electrical connection between the semiconductor chip 6 and the wiring board 2 is improved.

  In addition, a sealing body 13 is disposed on the surface of the wiring substrate 2 on which the semiconductor chip 6 is disposed so as to cover the semiconductor chip 6 and the dam portion 9. The sealing body 13 is made of, for example, a thermosetting resin such as an epoxy resin, and protects the semiconductor chip 6 disposed on the wiring board 2.

  Although the sealing body 13 is provided on the wiring substrate 2 for protecting the semiconductor device and improving the moisture resistance, the present invention may have a configuration in which the sealing body 13 is not provided.

  Next, a method for manufacturing the semiconductor device of Example 1 will be described.

  The wiring board 2 used in this embodiment is obtained by processing a mother board by a MAP (Mold Array Process) method. A plurality of unit substrate components as shown in FIGS. 2 and 3 are formed in a matrix on the mother substrate. The wiring board 2 is obtained by dividing the single mother board into individual unit board components. The wiring board 2 shown in FIG. 2 is one unit board constituent part divided from the mother board.

  In each unit substrate constituting part of the mother substrate, predetermined wiring is formed on both surfaces of the glass epoxy base material, and the wiring is partially covered with an insulating film (not shown) such as a solder resist. A plurality of connection pads 3 are formed on a portion of the wiring on one surface of the glass epoxy substrate exposed from the solder resist. In addition, a plurality of lands 4 are formed in a portion of the wiring on the other surface of the glass epoxy substrate that is exposed from the solder resist. And the connection pad 3 and the land 4 corresponding to this are each electrically connected by the wiring in a glass epoxy base material.

  Around each chip mounting area on one surface of the glass epoxy substrate, as shown in FIGS. 2 and 3, a substantially quadrangular and frame-shaped dam portion 9 is arranged. The dam portion 9 has a thickness equivalent to that of the semiconductor chip 6 in the direction perpendicular to the wiring substrate 2.

  The dam part 9 has a creeping prevention part 10 extending from the front surface side of the semiconductor chip 6 to a position in the vicinity of the back surface. The creeping prevention portion 10 is configured in a tapered shape so that the distance between the dam portion 9 and the outer peripheral edge of the semiconductor chip 6 increases as the distance from the wiring substrate 2 increases. Note that the clearance between the scooping prevention unit 10 and the semiconductor chip 6 is, for example, about 5 to 10 μm. Further, the dam portion 9 is formed with a flow hole 12 for the underfill material 11 in a direction from the inner edge to the outer edge of the frame-shaped dam portion 9 along one surface of the wiring board 2.

  A frame portion (not shown) is provided around the plurality of unit substrate constituent portions arranged in the matrix shape, so that the mother substrate can be transported and positioned. Further, a dicing line is provided between the unit substrate constituent parts. In this way, a mother board as a base of the wiring board 2 is prepared.

  Next, an underfill material 11 and NCP (Non Conductive Paste) are supplied to each unit board constituent part (that is, a part corresponding to the wiring board 2) of the mother board.

  More specifically, the mother board 14 is held on a stage of a potting device (not shown). Then, as shown in FIG. 5A, a predetermined amount of underfill material 11 is supplied to the chip mounting area on one surface of each unit substrate constituent part (wiring substrate 2) by the dispenser 15 of the potting device.

  Subsequently, the semiconductor chip 6 is connected to each unit substrate constituent part (wiring board 2) by a flip chip mounting method.

  More specifically, in this connection step, first, for example, the mother board 14 is held on a flip chip bonder (not shown). And as shown in FIG.5 (b), the semiconductor chip 6 is vacuum-sucked by the bonding tool 16 which has the suction hole 16a on the back surface on the opposite side to the surface of the semiconductor chip 6 provided with the bump electrode 8. Hold. Thereafter, the bonding tool 16 holding the semiconductor chip 6 is lowered to the mother substrate 14 side. Then, as shown in FIG. 5C, the semiconductor chip 6 is passed through the opening of the frame-shaped dam portion 8, and the bump electrodes 8 of the semiconductor chip 6 are brought into contact with the connection pads 3 of the unit substrate constituting portion (wiring substrate 2). The bump electrode 8 and the connection pad 3 are electrically connected by an ultrasonic thermocompression bonding method. Further, the NCP is thermally cured, and the semiconductor chip 6 is fixed to the unit substrate constituent part.

  In this chip connection step, the underfill material 11 that has been applied to the unit substrate constituent portion in advance is going to crawl along the outer peripheral surface of the semiconductor chip 6. However, since the dam part 9 has the creeping prevention part 10, the underfill material 11 flows from the chip mounting area toward the peripheral side of the dam part 9 along the wiring board 2 without going upward. It fits in the dam part 9.

  In the dam portion 9, flow holes 12 for the underfill material 11 are arranged in four directions from the inner edge to the outer edge of the frame-shaped dam portion 9 along one surface of the wiring board 2. For this reason, even if the inner region of the dam portion 8 is filled with the underfill material 11, the underfill material 11 does not go above the dam portion 8 (second surface side of the semiconductor chip 6).

  Furthermore, since the dam portion 9 is provided, the underfill material 11 is disposed not only between the wiring substrate 2 and the semiconductor chip 6 but also between the dam portion 9 and the wiring substrate 2 and the semiconductor chip 6. Therefore, the fillet shape of the underfill material 11 is stabilized, and the connection strength between the semiconductor chip 6 and the wiring board 2 can be improved.

  After the chip connection by the flip chip mounting method is completed, the mother board 14 is transferred to a sealing process.

  More specifically, in the sealing step, the mother board 14 that is the basis of the plurality of wiring boards 2 is set in a molding die that includes an upper mold and a lower mold (not shown). A cavity is formed in the upper mold of the molding die so as to collectively cover a plurality of unit substrate constituent parts. All of the plurality of semiconductor chips 6 connected to the mother substrate 14 are arranged in such a cavity, and the cavity is closed by the mother substrate 14. A gate portion is formed on the upper mold of the molding die, and a heat-sealed sealing resin is injected from the gate portion into the cavity. Thereby, the entire surface of the mother substrate 14 to which the plurality of semiconductor chips 6 are connected is covered with the sealing resin 17. As the sealing resin 17, for example, a thermosetting resin such as an epoxy resin is used.

  Then, the sealing resin 17 is thermally cured by heating the sealing resin 17 at a predetermined temperature, for example, about 180 ° C. in a state where the cavity is completely filled with the sealing resin 17. As a result, as shown in FIG. 6A, a sealing resin 17 is formed that collectively covers a plurality of unit substrate constituent portions of the mother substrate.

  Subsequently, the mother substrate 14 covered with the sealing resin 17 is baked at a predetermined temperature, whereby the sealing resin 17 is completely cured. In addition, since the underfill material 11 is disposed between the semiconductor chip 6 and the mother board 14, the sealing resin 14 is formed on the mother board 14, so that the semiconductor chip 6 and the mother board 14 (wiring board 2) are formed. Voids between the two can be reduced. The cured sealing resin 17 becomes the sealing body 13 shown in FIG. 1 by dividing the mother substrate.

  Subsequently, the mother substrate 14 having the sealing resin 17 formed on the upper surface is transferred to a ball mounting process, and is disposed on the surface of the mother substrate 14 opposite to the semiconductor chip 6 as shown in FIG. On the plurality of lands 4, conductive solder balls 18 are mounted to form external electrodes.

  More specifically, in the ball mounting process, using a mounting tool (not shown) in which a plurality of suction holes are formed so as to match the position of the land 4 on the unit substrate constituting portion of the mother board 14, a metal ball made of solder (for example, A solder ball 18) is held on the mounting tool. Then, flux is formed on the held solder balls 18. Thereafter, the mounting tool is brought close to the surface of the unit substrate constituting portion on which the lands 4 are formed, and a plurality of solder balls are collectively mounted on the plurality of lands 4 of the unit substrate constituting portion. After the solder balls 18 are mounted on all the unit substrate constituent parts, the external substrate is formed by flowing the mother substrate 14 through a reflow process.

  Subsequently, the mother board 14 on which the solder balls 18 are mounted on all the unit board constituent parts is transferred to a board dicing process, and the mother board 14 and the sealing resin 17 are connected to a dicing line as shown in FIG. Cut at the DL.

  More specifically, in the substrate dicing step, the surface of the sealing resin 17 is attached to an adhesive tape (dicing tape) 19 and the mother substrate 14 is fixed by the dicing tape 19. Thereafter, the mother substrate 14 and the sealing resin 17 are cut along the dicing line DL by a dicing blade of a dicing device (not shown), and separated into a plurality of unit devices. After separation, the unit device is picked up from the adhesive tape 19 to obtain a substantially hexahedral semiconductor device as shown in FIG. As described above, the semiconductor device manufactured in this way can be thinned, and the reliability and mechanical strength of the semiconductor device are improved.

(Example 2)
FIG. 7 is a cross-sectional view showing a schematic configuration of a semiconductor device according to Example 2 of the present invention.

  Similar to the first embodiment, the semiconductor device 1 </ b> B according to the second embodiment includes a wiring substrate 2 having a substantially square shape and predetermined wiring formed thereon. A plurality of connection pads 3 are formed on one surface of the wiring board 2, and a plurality of lands 4 electrically connected to the connection pads 3 are formed on the other surface. Further, the semiconductor chip 6 is connected to the substantially central portion of one surface of the wiring board 2 by the flip chip mounting method as in the first embodiment. As shown in FIG. 7, a frame-like dam portion 9 similar to that of the first embodiment is disposed around the chip mounting area on the wiring board 2.

  In the case of the present embodiment, the second semiconductor chip 20 is mounted on the second surface (back surface) of the semiconductor chip 6 and above the dam portion 9. In the second semiconductor chip 20, the second surface (back surface) 20 a opposite to the first surface (front surface) on which the electrode pads 21 are formed is the back surface of the semiconductor chip 6 and the dam portion 9. It is bonded to the upper side via an insulating adhesive member 22, for example, DAF (Die Attached Film).

  By connecting the electrode pads 21 of the second semiconductor chip 20 and the connection pads 3a disposed outside the dam portion 9 of the wiring substrate 2 with the conductive wires 23, the second semiconductor chip 20 and the wiring are connected. The substrate 2 is electrically connected. For example, Au or Cu is used for the conductive wire 23.

  The semiconductor chips 6 and 20 and the dam portion 9 may be covered with a sealing body 13.

  In Example 2 configured as described above, when the semiconductor chip 6 is connected to the wiring board by the flip chip mounting method, the underfill material 11 scoops up the outer peripheral surface of the semiconductor chip 6 to the back surface of the semiconductor chip 6. It is possible to prevent wraparound. In addition to the effects similar to those of the first embodiment, the second semiconductor chip 20 having a projected area on the wiring board 2 larger than that of the first semiconductor chip 6 is formed on the first semiconductor chip 6. It can be laminated stably. Since the portion of the second semiconductor chip 20 that protrudes outside the outer peripheral surface of the first semiconductor chip 6 is supported by the dam portion 9, the thickness of the second semiconductor chip 20 can be reduced. It is. Thus, the thickness of the MCP (Multi Chip Package) type semiconductor device can be reduced. Furthermore, wire bonding can be satisfactorily performed on the electrode pads 21 arranged on the portion of the second semiconductor chip 20 that protrudes outward from the outer peripheral surface of the first semiconductor chip 6.

(Example 3)
FIG. 8 is a cross-sectional view showing a schematic configuration of a semiconductor device according to Embodiment 3 of the present invention.

  Similar to the first embodiment, the semiconductor device 1 </ b> C according to the third embodiment includes the wiring substrate 2 having a substantially square shape on which predetermined wiring is formed. A plurality of connection pads 3 are formed on one surface of the wiring board 2, and a plurality of lands 4 electrically connected to the connection pads 3 are formed on the other surface. Further, the semiconductor chip 6 is connected to the substantially central portion of one surface of the wiring board 2 by the flip chip mounting method as in the first embodiment. As shown in FIG. 8, a frame-shaped dam portion 9 similar to that of the first embodiment is disposed around the chip mounting area on the wiring board 2.

  A second semiconductor chip 20 is mounted on the second surface (back surface) of the semiconductor chip 6 and above the dam portion 9. In the second semiconductor chip 20, the second surface (back surface) 20 a opposite to the first surface (front surface) on which the electrode pads 21 are formed is the back surface of the semiconductor chip 6 and the dam portion 9. It is bonded to the upper side via an insulating adhesive member 22, for example, DAF. By connecting the electrode pads 21a of the second semiconductor chip 20 and the connection pads 3a arranged on the outside of the dam portion 9 of the wiring substrate 2 with the conductive wires 23, the second semiconductor chip 20 and the wiring are connected. The substrate 2 is electrically connected.

  The semiconductor chips 6 and 20 and the dam portion 9 may be covered with a sealing body 13.

  In the present embodiment, the dam portion 9 is made of a conductive material (for example, a metal material). The dam portion 9 made of a conductive material is mounted on the wiring board 2 and is electrically connected to one connection pad 3 b on the wiring board 2. A plurality of common electrode pads 21b (for example, a GND terminal or a power supply terminal) provided on the second semiconductor chip 20 are connected to the dam portion 9 by wires 23, so that the plurality of electrode pads 21b can be shared. An external terminal connected to the electrode pad 21b is in time with one external terminal (solder ball 5a). That is, this embodiment can be made into a common pin.

  In the third embodiment, when the semiconductor chip 6 is connected to the wiring board by the flip chip mounting method, the underfill material 11 can be prevented from climbing up the outer peripheral surface of the semiconductor chip 6 and wrapping around the back surface of the semiconductor chip 6. it can. In addition to the effects similar to those of the first embodiment, a common pin can be formed, so that the number of external electrodes can be reduced.

  Further, by electrically connecting the second semiconductor chip 20 stacked on the first semiconductor chip 6 and the dam portion 9 with the wire 23, the wire length at this connection portion can be shortened. As a result, it is possible to reduce the frequency of occurrence of the problem that the wire 23 falls when the sealing body 13 is molded with resin.

  As mentioned above, although the invention made | formed by this inventor was demonstrated based on the Example, this invention is not limited to said Example, It cannot be overemphasized that it can change variously in the range which does not deviate from the summary.

  For example, in the present embodiment, the case where the present invention is applied to a semiconductor device in which one semiconductor chip 6 is mounted on one surface of the wiring board 2 has been described. However, in the present invention, a plurality of semiconductor chips 6 are provided on one surface of the wiring board 2. The present invention may be applied to semiconductor devices arranged side by side.

  In this embodiment, the wiring board 2 made of a glass epoxy base material has been described. However, the wiring board 2 may be a flexible wiring board made of a polyimide base material.

1A, 1B, 1C Semiconductor device 2 Wiring board 3, 3a, 3b Connection pad 4 Land 5, 5a Solder ball 6 Semiconductor chip, 1st semiconductor chip 7, 21, 21a, 21b Electrode pad 8 Bump electrode 9 Dam part 10 Rising prevention part 11 Underfill material 12 Distribution hole 13 Sealing body 14 Mother board 15 Dispenser 16 Bonding tool 17 Sealing resin 18 Solder ball 19 Adhesive tape 20 Second semiconductor chip 22 Adhesive member 23 Wire DL Dicing line

Claims (19)

A wiring substrate, a semiconductor chip connected to one surface of the wiring substrate via a gap, a frame-shaped dam portion formed on the one surface along the outer periphery of the semiconductor chip, and A resin in contact with the dam part while being disposed in the gap,
The dam portion includes a scooping prevention portion that prevents the resin from scooping up an outer peripheral edge of the semiconductor chip and wrapping around a surface of the semiconductor chip opposite to the wiring substrate. A wiring board; a semiconductor chip electrically connected to one surface of the wiring board by a flip chip mounting method; and a frame-shaped dam formed on the one surface along an outer peripheral edge of the semiconductor chip A resin as an underfill material that is in contact with the dam portion while being disposed in a gap between the wiring board and the semiconductor chip,
The dam portion includes a scooping prevention portion that prevents the resin from scooping up an outer peripheral edge of the semiconductor chip and wrapping around a surface of the semiconductor chip opposite to the wiring substrate. A wiring board; a semiconductor chip electrically connected to one surface of the wiring board by a flip chip mounting method; and a frame-shaped dam formed on the one surface along an outer peripheral edge of the semiconductor chip A resin as an underfill material that is in contact with the dam portion while being disposed in a gap between the wiring board and the semiconductor chip,
The dam part has a scooping prevention part for preventing the resin from scooping up the outer peripheral edge of the semiconductor chip and wrapping around the surface of the semiconductor chip opposite to the wiring board;
The scooping prevention part is formed in a taper shape on the inner peripheral part of the dam part so that the distance between the dam part and the outer peripheral edge of the semiconductor chip becomes wider as it gets closer to the wiring board. .   The surface of the said dam part on the opposite side to the said wiring board side is the same as the height of the surface on the opposite side to the said wiring board of the said semiconductor chip. Semiconductor device.   5. The semiconductor device according to claim 1, wherein the scooping prevention portion is provided only for a central portion of four sides constituting an outer peripheral edge of the semiconductor chip.   The semiconductor device according to claim 1, wherein the dam portion is provided with a circulation hole through which the resin is circulated from an inner edge to an outer edge of the dam portion.   The semiconductor device according to claim 1, wherein the plurality of semiconductor chips are arranged on one surface of the wiring board.   The plurality of semiconductor chips include: a first semiconductor chip electrically connected to one surface of the wiring board via a bump electrode; and a second semiconductor chip stacked on the first semiconductor chip. The semiconductor device according to claim 7, further comprising:   The surface of the second semiconductor chip opposite to the surface on which the electrode pads of the second semiconductor chip are formed is bonded to the surface of the first semiconductor chip opposite to the wiring substrate. The semiconductor device according to claim 8.   The second semiconductor chip is a chip whose projected area onto the wiring board is larger than that of the first semiconductor chip, and the second semiconductor chip is located outside the outer peripheral edge of the first semiconductor chip. The semiconductor device according to claim 8, wherein the protruding portion is supported by the dam portion. The dam part is made of a conductive material,
The dam portion made of the conductive material is disposed on the one surface so as to be electrically connected to one of the plurality of connection pads disposed on the one surface of the wiring board. And
The semiconductor device according to claim 9, wherein a plurality of common electrode pads provided on the second semiconductor chip are electrically connected to the dam portion.   A plurality of external terminals are disposed on the other surface of the wiring board, and the plurality of external terminals respectively correspond to the plurality of connection pads disposed on the one surface of the wiring board. The semiconductor device according to claim 1, wherein the semiconductor device is electrically connected.   The semiconductor device according to claim 1, further comprising a sealing resin that covers the semiconductor chip and the dam portion on one surface of the wiring board. A wiring board; a semiconductor chip electrically connected to one surface of the wiring board via a bump electrode; and a frame-shaped dam formed on the one surface along the outer periphery of the semiconductor chip And a resin as an underfill material that is disposed in a gap between the wiring board and the semiconductor chip and is in contact with the dam part, and the dam part is provided on the inner peripheral part and the wiring board. A method of manufacturing a semiconductor device having a taper shape so that the distance between the dam portion and the outer peripheral edge of the semiconductor chip becomes wider as it gets closer,
Preparing the wiring board and the frame-shaped dam part, and disposing the dam part on one surface of the wiring board so that an inner peripheral part of the dam part has the tapered shape;
Disposing the resin inside the dam portion on the one surface;
Inserting the semiconductor chip inside the dam part and electrically connecting the bump electrodes of the semiconductor chip to connection pads disposed on the one surface;
A method for manufacturing a semiconductor device, comprising: Covering the semiconductor chip and the dam with a sealing resin on one surface of the wiring board, and curing the sealing resin;
Disposing a plurality of external terminals electrically connected to the other surface of the wiring board corresponding to each of the plurality of connection pads;
The method of manufacturing a semiconductor device according to claim 14, further comprising:   16. The manufacturing method of a semiconductor device according to claim 14, wherein the wiring board is obtained by dividing a single mother board, in which a plurality of unit substrate constituent parts are configured in a matrix, into individual unit substrate constituent parts. Method.   17. The method of manufacturing a semiconductor device according to claim 14, wherein the dam portion is provided with a flow hole through which the resin flows from the inner edge to the outer edge of the dam portion.   The surface of the said dam part on the opposite side to the said wiring board side is made the same as the height of the surface on the opposite side to the said wiring board of the said semiconductor chip. A method for manufacturing a semiconductor device.   The method of manufacturing a semiconductor device according to claim 14, wherein a plurality of the semiconductor chips are stacked on one surface of the wiring board.

Images