JP2010129588A - Method for manufacturing semiconductor integrated circuit apparatus - Google Patents

Abstract

In a chip pick-up process in an assembly process of a semiconductor integrated circuit device, chip breakage, chipping, and pick-up failure around a chip due to rapid thinning of the chip are reduced.
In a state where three push-up blocks 110a, 110b, and 110c constituting the push-up member 110 are integrally raised, an ionized air blow 41 is provided from the ionized air nozzle 42 to the peeling portion 40 formed below the periphery of the chip 1. When supplied toward the air, peeling propagates in the air blow direction by the action of the air knife. As a result, a gas flow path is formed between the back surface of the chip and the top surface of the dicing tape 4, and the collet 105 is lifted together with the chip and the rubber chip 125 by the gas pressure of the air blow, and finally peeled off over the entire back surface of the chip. Enlarged and completely peeled off.
[Selection] Figure 41

Description

  The present invention relates to a technique effective when applied to a die bonding technique or a chip peeling technique (die pick-up technique) in a method of manufacturing a semiconductor integrated circuit device (or semiconductor device).

  Japanese Laid-Open Patent Publication No. 2008-53260 (Patent Document 1) discloses a die peeling technique that promotes peeling by supplying air blow from the periphery of the die toward the center while the bottom surface of the dicing tape is free. Has been.

  In Japanese Patent Laid-Open No. 2006-319150 (Patent Document 2), air blow toward the upper surface of the dicing tape under the periphery of the edge portion of the die in a state where the lower surface of the dicing tape around the edge portion of the die is free. A die peeling technique is disclosed that promotes peeling by supplying

  In Japanese Unexamined Patent Publication No. 2006-165188 (Patent Document 3), a vacuum suction hole is provided only around the periphery of a collet tip rubber tip (hardness JIS-A60) having elasticity so as not to leave a void in the thin film tip. A technique for die bonding with a chip protruding downward is disclosed.

  Japanese Unexamined Patent Publication No. 2004-022995 (Patent Document 4) or Japanese Unexamined Patent Publication No. 2005-150311 (Patent Document 5) discloses a collet having convex elasticity.

  Japanese Laid-Open Patent Publication No. 2005-093838 (Patent Document 6) or US Patent Publication No. 2005-0061856 (Patent Document 7) discloses a die bonding technique for performing temporary crimping and main crimping on separate stages. Yes.

  In Japanese Patent Application Laid-Open No. 2005-9166 (Patent Document 8) or US Patent Publication No. 2005-0200142 (Patent Document 9), whether or not a component is adsorbed with respect to an adsorption nozzle such as a mounter of an electronic component is determined. It is disclosed that the detection is performed by a change in the detection flow rate of the sensor.

  Japanese Laid-Open Patent Publication No. 2003-133791 (Patent Document 10), Japanese Laid-Open Patent Publication No. 2004-23027 (Patent Document 11), or Japanese Laid-Open Patent Publication No. 2007-103777 (Patent Document 12) includes an electronic component mounter, etc. In Japanese Patent Application Laid-Open No. 2004-259542, it is disclosed that when an electronic component is sucked and transported by a suction nozzle, whether or not the component is correctly sucked is detected by a change in flow rate detected by an air flow sensor.

  In Japanese Patent Application Laid-Open No. 2004-186352 (Patent Document 13) or US Patent Publication No. 2006-0252233 (Patent Document 14), regarding the pickup of a thin film chip after wafer dicing, ultrasonic vibration is applied from below the dicing tape. When the chip is peeled off from the adhesive sheet (dicing tape) by applying the suction collet from above, the suction flow rate of the suction collet is measured to determine whether the chip is completely peeled off the dicing tape and adsorbed on the suction collet. Confirmation is disclosed.

  Japanese Patent Application Laid-Open No. 2005-1117019 (Patent Document 15) or US Pat. No. 7,115,482 (Patent Document 16) discloses a method of picking up a thin film chip after wafer dicing using a multistage push-up mechanism from below the dicing tape. It is disclosed that the chip is peeled off from the pressure-sensitive adhesive sheet (dicing tape) from above by an adsorbing collet.

JP 2008-53260 A JP 2006-319150 A JP 2006-165188 A JP 2004-022995 A Japanese Patent Application Laid-Open No. 2005-150311 JP 2005-093838 A US Patent Publication No. 2005-0061856 Japanese Patent Laid-Open No. 2005-9166 US Patent Publication No. 2005-0200142 Japanese Patent Laid-Open No. 2003-133791 Japanese Patent Laid-Open No. 2004-23027 JP 2007-103777 A JP 2004-186352 A US Patent Publication No. 2006-0252233 JP 2005-1117019 A U.S. Pat. No. 7,115,482

  In the chip pick-up process or die bonding process after dicing in the assembly process of the manufacturing process of a semiconductor integrated circuit device, reduction of pick-up defects or die bonding process defects is an important issue due to rapid chip thinning. It has become. In particular, according to a study by the inventors of the present application, in a pickup of an ultra-thin film chip having a thickness of 50 μm or less (for example, mainly 50 μm or less and 10 μm or more), a chip by a peeling operation is used. It is clear that the curvature of the peripheral part is likely to cause cracking and chipping of the chip, and it is necessary to peel off the dicing tape without curving the chip as much as possible. The present invention has been made to solve these problems.

  An object of the present invention is to provide a manufacturing process of a highly reliable semiconductor integrated circuit device.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

  That is, according to one aspect of the present invention, after the initial peeling portion is mechanically generated from the lower dicing tape to the periphery of the die in a state where the upper surface of the die is vacuum-sucked by the suction collet, Die peeling that promotes peeling is performed by applying air blow.

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

  That is, after the upper surface of the die is vacuum-sucked by the suction collet, an initial peeling portion is mechanically generated from the lower dicing tape to the periphery of the die, and then air blow is applied to the portion. Thus, by performing die peeling that promotes peeling, cracks and the like due to die bending can be minimized.

[Outline of Embodiment]
First, an outline of a typical embodiment of the invention disclosed in the present application will be described.

1. A method of manufacturing a semiconductor integrated circuit device including the following steps:
(A) A step of supplying a plurality of chips divided into individual chip regions to a chip processing apparatus with their back surfaces fixed to an adhesive tape while maintaining the two-dimensional arrangement of the original wafer.
(B) In a state where the surface of the first chip of the plurality of chips is vacuum-adsorbed with an adsorption collet, and the adhesive tape on the back surface of the first chip is vacuum-adsorbed on the upper surface of the lower base, Peeling the adhesive tape from the back surface of the first chip;
Here, the step (b) includes the following substeps:
(B1) A step of forming a peeling portion between the periphery of the back surface of the first chip and the adhesive tape by pushing up the back surface of the first chip with a push-up member through the adhesive tape. ;
(B2) A step of enlarging the peeling portion by supplying a first gas blow from a nozzle toward the peeling portion.

2. In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the step (b) further includes the following substeps:
(B3) After the lower step (b1), it is confirmed that there is substantially no vacuum leak from between the surface of the first chip and the adsorption collet, and then the process proceeds to the lower step (b2). Process.

  3. In the method of manufacturing a semiconductor integrated circuit device according to the item 1 or 2, the first gas blow is formed using an ionized gas.

  4). 4. In the method of manufacturing a semiconductor integrated circuit device according to any one of items 1 to 3, the first gas blow is supplied from a first side direction of the first chip.

5). The method for manufacturing a semiconductor integrated circuit device according to any one of 1 to 4 further includes the following steps:
(C) After the step (a) and before the step (b), the suction collet and the first collet are not in contact with the surface of the first chip. Supplying a second gas blow from the nozzle between the surfaces of the chip;

  6). 6. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 5, the load on the adsorption collet in the sub-step (b2) is increased by the action of the first gas blow. The strength is set to the extent that you want.

  7). 7. In the method for manufacturing a semiconductor integrated circuit device according to any one of items 1 to 6, a load applied to the adsorption collet in the substep (b2) is 0.3N to 1.5N.

  8). 7. In the method for manufacturing a semiconductor integrated circuit device according to any one of items 1 to 6, a load applied to the suction collet in the substep (b2) is 0.5N to 1.0N.

  9. 9. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 8, the spray angle of the first gas blow is not less than 5 degrees and not more than 30 degrees.

  10. 9. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 8, the spray angle of the first gas blow is not less than 10 degrees and not more than 25 degrees.

  11. 11. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 10, the push-up member lifts the first chip substantially flat.

  12 In the method of manufacturing a semiconductor integrated circuit device according to the item 4, the push-up member lifts the first chip in an inclined manner so that the first side becomes higher.

  13. 11. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 3 and 5 to 10, the push-up member lifts the first chip in an inclined manner so that the first side becomes higher.

  14 11. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 10, the push-up member is a push-up pin.

  15. 15. In the method of manufacturing a semiconductor integrated circuit device according to any one of 1 to 14, in the step (b), the outer periphery of the suction collet is inside the outer periphery of the first chip.

[Description format, basic terms, usage in this application]
1. In the present application, the description of the embodiment may be divided into a plurality of parts for convenience, if necessary, but these are not independent from each other unless otherwise specified. Regardless of the description before and after the description, each part of a single example, one part is the other part of the details, or part or all of the modified examples. Moreover, as a general rule, the same part is not repeated. In addition, each component in the embodiment is not indispensable unless specifically stated otherwise, unless it is theoretically limited to the number, and obviously not in context.

  2. Similarly, in the description of the embodiment, etc., regarding the material, composition, etc., “X consisting of A” etc. is an element other than A unless specifically stated otherwise and clearly not in context. It is not excluded that one of the main components. For example, as for the component, it means “X containing A as a main component”. For example, “silicon member” is not limited to pure silicon, but also includes SiGe alloys, other multi-component alloys containing silicon as a main component, and members containing other additives. Needless to say.

  3. Similarly, suitable examples of graphics, positions, attributes, and the like are given, but it is needless to say that the present invention is not strictly limited to those cases unless explicitly stated otherwise, and unless otherwise apparent from the context.

  4). In addition, when a specific number or quantity is mentioned, a numerical value exceeding that specific number will be used unless specifically stated otherwise, unless theoretically limited to that number, or unless otherwise clearly indicated by the context. There may be a numerical value less than the specific numerical value.

  5. “Wafer” usually refers to a single crystal silicon wafer on which a semiconductor integrated circuit device (same as a semiconductor device or an electronic device) is formed, but also an epitaxial wafer, a composite wafer such as an insulating substrate and a semiconductor layer, etc. Needless to say.

  6). The term “chip” or “die” generally refers to a completely separated wafer separation process (blade dicing, laser dicing or other pelletizing process), but in this application, the chip area before separation is the same for convenience. Shown in terms. For example, in the so-called DBG (Dicing before Grinding) process, after half-cut dicing, it is ground and finally separated into chips. move on. Including such cases, for example, if the “wafer” is separated, it is not strictly a wafer, but before the chips are separated, it is a chip area and not a chip. Therefore, regardless of before and after separation, these are collectively referred to as “wafer”, “chip” or “die”.

  7). The term “wiring board” generally refers to an organic wiring board, ceramic wiring board, lead frame, etc., other chips, wafers, and other thin film integrated circuit devices. That is, in recent years, a lamination technique of laminating several tens of chips on a chip with an adhesive has been widely used, and the invention disclosed in this application is applied to a wide range including them.

  8). The “lower substrate” is generally called an “adsorption piece”, but forms the center of the chip peeling mechanism of the “chip processing apparatus” and is fixed to the adhesive sheet (almost in the two-dimensional arrangement of the original wafer). The chip group fixed to the adhesive sheet is fixed in position by vacuum-adsorbing the adhesive sheet. The central portion is a “push-up block”, “lift stage” or the like in a certain apparatus, and a push-up pin or the like in a certain apparatus. The “lower substrate” is composed of the central portion and the peripheral portion, and the peripheral portion functions to suck and fix the chip and the adhesive tape around the pickup target chip. Both the central part and the peripheral part are structured to be sucked by vacuum through suction holes and gaps, and are almost always sucked except for the alignment.

  9. The “adsorption collet” has conventionally been composed of a single piece of metal (stainless steel, etc.), ceramic, polymer, etc., but the thin film wafer or thin film chip (mainly having a thickness of 150 micrometers or less, mainly handled by the present application) 100 micrometer or less, and the lower limit is currently around 10 micrometers.) In order to prevent cracks and the like from entering the chip, a polymer such as an elastomer that directly touches the chip is used as a main component. A rubber chip and a suction collet body or a rubber chip holder for holding the rubber chip are included. The rubber chip generally includes a thermosetting elastomer such as fluoro rubber, nitrile rubber, and silicone rubber, or an elastic polymer material such as thermoplastic elastomer as a main component. In the specific explanation, the vertical movement of the collet and push-up block is advanced with respect to the lower substrate periphery (assuming that it does not move), but in principle this is a relative movement. it is conceivable that.

  10. The hardness of the rubber chip is displayed in accordance with the International Organization for Standardization ISO Standard 7619 Durometer Type A (American Standard Shore A; JIS K 6253).

  11. Regarding the rubber tip, when it is called “ring shape”, its outline or external / internal contour shape is not limited to a circle or an ellipse, but a square, a rectangle, a figure with rounded corners, and similar Needless to say, other shapes are also included.

[Details of the embodiment]
The embodiment will be further described in detail. In the drawings, the same or similar parts are denoted by the same or similar symbols or reference numerals, and description thereof will not be repeated in principle.

  In addition, the following can be illustrated as a typical prior application of the related technical field by this inventor.

  That is, regarding the technology for controlling the peeling operation by monitoring the flow rate of the collet vacuum system and the technology for landing the bonding collet at the bonding position with the vacuum suction turned off, the Japanese Patent Application No. 2008- No. 99965 (filing date: 2008.4.8) and its corresponding US application Ser. No. 12/137522 (filing date: June 11, 2008).

  In addition, regarding a technique for detecting a leak from between a collet and a die, Japanese Patent Publication No. 2007-317748 (publication date: December 6, 2007) and its corresponding US application No. 11/735411 (application date: April 12, 2007).

  Further, a technique using a die peeling base having a taper is described in detail in Japanese Patent Application No. 2008-99965 (application date: 2008.4.8) of the present inventors.

1. Overall process / equipment explanation (mainly Figures 1 to 30)
The present embodiment is applied to the manufacture of a semiconductor package in which a chip is mounted on a wiring board, and the manufacturing method will be described in the order of steps with reference to FIGS.

  First, after an integrated circuit is formed on a main surface of a wafer 1A made of single crystal silicon as shown in FIG. 1 according to a known manufacturing process, each of a plurality of chip formation regions 1A ′ partitioned by grid-like scribe lines is provided. An electrical test is performed on the formed integrated circuit to determine whether it is acceptable. The chip formation region 1A ′ of the wafer 1A used in the present embodiment has a square planar shape having the same vertical and horizontal lengths. In the present embodiment, a square chip will be described as an example for convenience of drawing, but it goes without saying that a more general rectangular chip can be processed in exactly the same way. In the case of a rectangle, a block, collet, or other planar shape shown in FIG. 33 or FIG. 36 is more suitable.

  Next, as shown in FIG. 2, a back grind tape 3 for protecting the integrated circuit is affixed to the integrated circuit formation surface (the lower surface side in the drawing) of the wafer 1A. Then, in this state, the back surface (upper surface side in the figure) of the wafer 1A is ground with a grinder, and subsequently, the damaged layer on the back surface caused by this grinding is removed by a method such as wet etching, dry polishing, plasma etching or the like. Accordingly, the thickness of the wafer 1A is reduced to 100 μm or less, for example, about 90 μm to 10 μm. The processing methods such as wet etching, dry polishing, and plasma etching are slower in processing speed in the wafer thickness direction than grinding speed by the grinder, but the damage to the wafer is compared with grinding by the grinder. In addition, the damage layer inside the wafer generated by grinding by the grinder can be removed, and there is an effect that the wafer 1A and the chip are hardly broken.

  Next, after the back grind tape 3 is removed, as shown in FIG. 3, the dicing tape 4 is attached to the back surface (the surface opposite to the integrated circuit forming surface) of the wafer 1A. The part is fixed to the wafer ring 5. The dicing tape 4 is a pressure-sensitive type in which a pressure-sensitive adhesive is applied to the surface of a tape base material made of polyolefin (PO), polyvinyl chloride (PVC), polyethylene terephthalate (PET), etc. to provide tackiness. An adhesive tape or UV curable adhesive tape is cut into a circle.

  Next, as shown in FIG. 4, the wafer 1 </ b> A is diced using a known dicing blade 6 to divide each of the plurality of chip formation regions 1 </ b> A ′ into square chips 1. At this time, since each divided chip 1 needs to be left on the circular dicing tape 4, the dicing tape 4 is cut by about half of the thickness direction. When a UV curable adhesive tape is used as the dicing tape 4, the dicing tape 4 is irradiated with ultraviolet rays prior to the chip 1 peeling step described below to reduce the pressure-sensitive adhesive's adhesive strength. .

  Next, as shown in FIG. 5 (plan view) and FIG. 6 (cross-sectional view), the pressing plate 7 is disposed above the dicing tape 4 fixed to the wafer ring 5, and the expanding ring 8 is disposed below. Then, as shown in FIG. 7, by pressing the pressing plate 7 against the upper surface of the wafer ring 5, the peripheral portion on the back surface of the dicing tape 4 is pressed against the expanding ring 8. If it does in this way, since the dicing tape 4 receives the strong tension | tensile_strength which goes to the periphery from the center part, it will be extended without slack in the horizontal direction.

  Next, in this state, the expand ring 8 is positioned on the stage 101 of the chip peeling apparatus 100 shown in FIG. 8 and held horizontally. At the center of the stage 101, a suction piece 102 that is moved in the horizontal and vertical directions by a drive mechanism (not shown) is disposed. The dicing tape 4 is held such that the back surface thereof faces the upper surface of the suction piece 102.

  9 is a cross-sectional view of the suction piece 102, FIG. 10 is an enlarged cross-sectional view of the vicinity of the upper surface of the suction piece 102, and FIG. 11 is an enlarged perspective view of the vicinity of the upper surface of the suction piece 102.

  There may be a case where a plurality of suction ports 103 and a plurality of concentric grooves 104 are provided around the upper surface of the suction piece 102 or only a plurality of suction holes. The inside of each of the suction port 103 and the groove 104 is decompressed by a suction mechanism (not shown) when the suction piece 102 is raised and its upper surface is brought into contact with the back surface of the dicing tape 4. At this time, the back surface of the dicing tape 4 is sucked downward and comes into close contact with the upper surface of the suction piece 102.

  When the dicing tape 4 is sucked downward, if the width or depth of the groove 104 is large, the dicing tape 4 below the chip 1 adjacent to the chip 1 to be peeled is sucked into the groove 104. The interface between the adjacent chip 1 and the dicing tape 4 below the chip 1 may peel off in the upper region of the groove 104. In particular, in the dicing tape 4 using a pressure sensitive adhesive having a relatively weak adhesive force, such peeling is likely to occur. If such a phenomenon occurs, the adjacent chip 1 may fall off from the dicing tape 4 during the operation of peeling the chip 1 to be peeled from the dicing tape 4, which is not preferable. Therefore, in order to prevent such a phenomenon from occurring, the width and depth of the groove 104 are made as small as possible, and a gap as much as possible is provided between the dicing tape 4 below the adjacent chip 1 and the upper surface of the suction piece 102. It is effective to prevent the occurrence of the problem, and it is also effective to increase the suction holes and not provide the grooves.

  Three blocks 110 a to 110 c that push up the dicing tape 4 upward are incorporated in the central portion of the suction piece 102. In the three blocks 110a to 110c, the second block 110b having a smaller outer shape is arranged inside the first block 110a having the largest outer shape, and the third block 110c having the smallest outer shape is further arranged inside thereof. Is arranged. As will be described later, the three blocks 110a to 110c include a first compression coil spring 111a interposed between the outer block 110a and the intermediate block 110b, and the intermediate block 110b and the inner block 110c. It is connected to the second compression coil spring 111b having a larger spring constant than the first compression coil spring 111a and the inner block 110c, and moves up and down in conjunction with a pusher 112 that moves up and down by a drive mechanism (not shown). It is like that.

  Of the three blocks 110a to 110c, the outer block 110a having the largest outer shape may be one having a smaller outer shape than the chip 1 to be peeled (for example, about 0.5 mm to 3 mm). . For example, when the chip 1 is a square, it is desirable to make it a square that is slightly smaller than that. Further, as will be described in other embodiments described later, when the chip 1 is rectangular, it is desirable to make it a rectangle slightly smaller than that. As a result, the corner portion that is the outer periphery of the upper surface of the block 110a is positioned slightly inward of the outer edge of the chip 1, so that a location that is a starting point when the chip 1 and the dicing tape 4 are separated (chip 1) Can be concentrated on the outermost peripheral portion).

  Further, the upper surface of the block 110a is preferably a flat surface or a surface having a large local radius in order to secure a contact area with the dicing tape 4. When the contact area between the upper surface of the block 110a and the dicing tape 4 is small, a large bending stress is concentrated on the peripheral portion of the chip 1 supported from below by the upper surface of the block 110a, so that the peripheral portion of the chip 1 may be broken. .

  The intermediate block 110b arranged inside the block 110a has an outer shape smaller by about 1 mm to 3 mm than the block 110a. The block 110c having the smallest outer shape disposed further inside than the block 110b has an outer shape that is smaller by about 1 mm to 3 mm than the intermediate block 110b. In the present embodiment, the shape of each of the intermediate block 110b and the inner block 110c is formed in a columnar shape in consideration of the ease of processing and the like. Also good. The heights of the upper surfaces of the three blocks 110a to 110c are equal to each other in the initial state (when the blocks 110a to 110c are not in operation), and are also equal to the height of the upper peripheral portion of the suction piece 102.

  As shown in FIG. 10 in an enlarged manner, gaps (S) are provided between the periphery of the suction piece 102 and the outer block 110a and between the three blocks 110a to 110c. The inside of these gaps (S) is decompressed by a suction mechanism (not shown). When the back surface of the dicing tape 4 comes into contact with the upper surface of the suction piece 102, the dicing tape 4 is sucked downward and the block 110a. It adheres to the upper surface of ~ 110c.

In order to peel the chip 1 from the dicing tape 4 using the chip peeling device 100 having the suction piece 102 as described above, first, as shown in FIG. The center part (blocks 110 a to 110 c) of the suction piece 102 is moved directly below the chip 1) located at the center of the figure, and the suction collet 105 is moved above the chip 1. At the center of the bottom surface of the suction collet 105 supported by a moving mechanism (not shown), a suction port 106 whose inside is depressurized is provided, and selectively sucks only one chip 1 to be peeled off. It can be held. In FIG. 12 to FIG. 31, the detailed structure of the collet 105 is omitted for the sake of simplicity. This detailed structure will be described in detail after FIG.

  Next, as shown in FIG. 13, the suction piece 102 is raised and its upper surface is brought into contact with the back surface of the dicing tape 4, and the inside of the suction port 103, the groove 104 and the gap (S) described above is decompressed. As a result, the dicing tape 4 in contact with the chip 1 to be peeled adheres to the upper surfaces of the blocks 110a to 110c. Further, the dicing tape 4 that is in contact with another chip 1 adjacent to the chip 1 is in close contact with the periphery of the upper surface of the suction piece 102. At this time, if the suction piece 102 is slightly pushed up (for example, about 300 μm), further tension is applied to the dicing tape 4 to which the horizontal tension is applied by the pressing plate 7 and the expanding ring 8 described above. Therefore, the suction piece 102 and the dicing tape 4 can be more closely attached.

  Further, the suction collet 105 is lowered almost simultaneously with the raising of the suction piece 102, the bottom surface of the suction collet 105 is brought into contact with the upper surface of the chip 1 to be peeled, and the chip 1 is sucked, and the chip 1 is lightly pressed downward. wear. As described above, when the chip 1 is sucked upward using the suction collet 105 when the dicing tape 4 is sucked downward using the suction piece 102, the dicing tape 4 and the chip 1 are peeled off by pushing up the blocks 110a to 110c. Can be promoted.

  Next, as shown in FIG. 14, the three blocks 110 a to 110 c are pushed upward simultaneously to apply an upward load to the back surface of the dicing tape 4, and the chip 1 and the dicing tape 4 are pushed up. At this time, the back surface of the chip 1 is supported by the upper surfaces (contact surfaces) of the blocks 110a to 110c via the dicing tape 4 to reduce bending stress applied to the chip 1, and the outer periphery (corner portion) of the upper surface of the block 110a. ) Is arranged on the inner side of the outer periphery of the chip 1, the stress that peels off is concentrated on the interface that is the separation starting point of the chip 1 and the dicing tape 4, and the peripheral portion of the chip 1 is efficiently removed from the dicing tape 4. Peel off. At this time, the dicing tape 4 below the other chip 1 adjacent to the chip 1 to be peeled is sucked downward and brought into close contact with the periphery of the upper surface of the suction piece 102 so that the peripheral edge of the chip 1 The peeling of the dicing tape 4 can be promoted. FIG. 15 is an enlarged perspective view showing the vicinity of the upper surface of the suction piece 102 at this time (illustration of the chip 1 and the dicing tape 4 is omitted).

  The push-up amount (stroke) of the blocks 110a to 110c is, for example, about 0.2 mm to 0.4 mm, but it is desirable to increase or decrease according to the size of the chip 1. That is, when the size of the chip 1 is large, the contact area between the chip 1 and the dicing tape 4 is large, and hence the adhesive force between the two is also large, so it is necessary to increase the push-up amount. On the other hand, when the size of the chip 1 is small, the contact area between the chip 1 and the dicing tape 4 is small, and therefore the adhesive force between the two is also small, so that even if the push-up amount is small, the chip 1 is easily peeled off. Note that the pressure-sensitive adhesive applied to the dicing tape 4 has a difference in adhesive strength depending on the manufacturer and product type. Therefore, even when the sizes of the chips 1 are the same, it is necessary to increase the push-up amount when a pressure-sensitive adhesive having a large adhesive force is used.

  When the blocks 110a to 110c are pushed upward to apply a load to the back surface of the chip 1, bending stress in a direction perpendicular to the outer periphery of the chip is applied to the outermost peripheral portion of the chip 1 in a direction parallel to the outer periphery of the chip. It is desirable to make it smaller than the bending stress. At the outermost peripheral portion of the chip 1, fine cracks generated when the wafer 1A is diced using the dicing blade 6 described above remain. Therefore, if a strong bending stress is applied to the outermost peripheral portion of the chip 1 along the direction orthogonal to the outer periphery of the chip 1 when the blocks 110a to 110c are pushed upward, there is a risk that the chip 1 may break due to the growth of cracks. is there. In the present embodiment, a uniform load is applied slightly inward from the outermost peripheral portion of the chip 1 using the block 110a having an upper surface that is slightly smaller than the size of the chip 1, thus avoiding the above-described problems. The entire periphery of the chip 1 can be evenly peeled from the dicing tape 4.

In order to push up the three blocks 110a to 110c at the same time, as shown in FIG. 16, the pusher 112 is pushed up to push up the inner block 110c connected to the pusher 112. Thereby, the intermediate block 110b is pushed up by the spring force of the compression coil spring 111b interposed between the inner block 110c and the intermediate block 110b, and further the compression interposed between the outer block 110a and the intermediate block 110b. Since the outer block 110a is pushed up by the spring force of the coil spring 111a, the three blocks 110a to 110c are pushed up simultaneously. And when a part (surface shown by the arrow of a figure) of the outside block 110a contacts the peripheral part of the adsorption | suction piece 102, the raise of blocks 110a-110c stops. At this time, most of the region of the chip 1 to be peeled is supported by the upper surfaces of the three blocks 110a to 110c, and in the region outside the outer periphery (corner) of the upper surface of the block 110a, the chip Separation at the interface between 1 and the dicing tape 4 proceeds efficiently.

  When the three blocks 110a to 110c are pushed upward simultaneously, the pusher 112 pushes up the block 110c with such a weak force that the compression coil spring 111a having a weak spring force does not contract. In this way, the intermediate block 110b and the inner block 110c do not protrude further upward until a part of the outer block 110a comes into contact with the peripheral portion of the suction piece 102.

  Further, the compression coil spring 111 a needs to have a spring force that can lift the block 110 a against at least the tension of the dicing tape 4. When the spring force of the compression coil spring 111a is smaller than the tension of the dicing tape 4, the outer block 110a does not lift up even if the pusher 112 is pushed up, and the chip 1 cannot be supported by the upper surface of the outer block 110a. In this case, since sufficient stress cannot be concentrated on the starting point of separation between the chip 1 and the dicing tape 4, the chip 1 is cracked due to a decrease in peeling speed or excessive bending stress applied to the chip 1. May cause problems.

  Next, as shown in FIG. 17, the middle block 110 b and the inner block 110 c are pushed upward simultaneously to push up the dicing tape 4. As a result, the position of the outer periphery (corner portion) of the upper surface of the block 110b that supports the chip 1 moves further inward compared to the state where it is supported by the block 110a, so that the chip 1 and the dicing tape 4 are peeled off. It progresses from the area outside the outer periphery of the upper surface of the block 110b toward the center of the chip 1. FIG. 18 is an enlarged perspective view showing the vicinity of the upper surface of the suction piece 102 at this time (illustration of the chip 1 and the dicing tape 4 is omitted).

  In order to push the two blocks 110b and 110c upward simultaneously, as shown in FIG. 19, the pusher 112 is pushed up to further push up the block 110c connected to the pusher 112. At this time, since the intermediate block 110b is pushed up by the spring force of the compression coil spring 111b, the two blocks 110b and 110c are pushed up simultaneously. Then, when a part of the intermediate block 110b (the surface indicated by the arrow in the drawing) comes into contact with the outer block 110a, the ascent of the blocks 110b and 110c stops. The force by which the pusher 112 pushes up the block 110c is such that the compression coil spring 111a having a weak spring force contracts but the compression coil spring 111b having a strong spring force does not contract. Accordingly, the inner block 110c does not protrude further upward until a part of the intermediate block 110b comes into contact with the outer block 110a.

  When the two blocks 110b and 110c are pushed upward, in order to promote the peeling between the chip 1 and the dicing tape 4, the inside of the gap (S) between the blocks 110a to 110c is decompressed to The contacting dicing tape 4 is sucked downward. Further, the inside of the groove 104 is decompressed, and the dicing tape 4 in contact with the periphery of the upper surface of the suction piece 102 is brought into close contact with the upper surface of the suction piece 102 (FIG. 17).

  Next, as shown in FIG. 20, the inner block 110c is further pushed upward to push up the back surface of the dicing tape 4, and the back surface of the chip 1 is supported by the top surface of the block 110c. FIG. 21 is an enlarged perspective view showing the vicinity of the upper surface of the suction piece 102 at this time (illustration of the chip 1 and the dicing tape 4 is omitted). In order to push up the inner block 110c upward, as shown in FIG. 22, the block 110c is pushed up with such a strong force that the compression coil spring 111b contracts. Thereby, in the area | region outside the outer periphery (corner | corner part) of the upper surface of the block 110c which is contacting the dicing tape 4, peeling with the chip | tip 1 and the dicing tape 4 advances.

  Subsequently, as shown in FIG. 23, the block 110c is pulled down and the suction collet 105 is pulled up, whereby the work of peeling the chip 1 from the dicing tape 4 is completed.

  It is necessary to reduce the area of the upper surface of the block 110c to such an extent that the chip 1 is peeled from the dicing tape 4 only by the suction force of the suction collet 105 when the block 110c is pushed upward. When the area of the upper surface of the block 110c is large, the contact area between the chip 1 and the dicing tape 4 is increased, and the adhesive force between the two is also increased. Can not be peeled from.

  On the other hand, when the area of the upper surface of the block 110c is reduced, when the block 110c pushes up the back surface of the dicing tape 4, a strong load is intensively applied to the narrow region (center portion) of the chip 1; The chip 1 may break. Therefore, when pushing up the block 110c, the pushing speed is reduced, the time during which the upper surface of the block 110c is in contact with the dicing tape 4 is shortened, or the pushing amount (stroke) of the block 110c is reduced (for example, 0.2 mm). It is desirable to prevent a strong load from being applied to the narrow region of the chip 1.

  Further, as one method for increasing the suction force of the suction collet 105, it is effective to slow the pulling-up speed of the suction collet 105. When the suction collet 105 is rapidly pulled up while a part of the chip 1 is in close contact with the dicing tape 4, a gap is formed between the bottom surface of the suction collet 105 and the top surface of the chip 1 (that is, “vacuum leak”). Since the degree of vacuum inside the collet 105 is lowered, the force for sucking the chip 1 is lowered. On the other hand, when the pulling speed of the suction collet 105 is decreased, the time required for peeling the chip 1 from the dicing tape 4 becomes longer. Therefore, the pulling speed of the suction collet 105 is made variable, and when pulling is started, the pulling speed is slowed to secure a sufficient suction force. It is better to prevent time delays. It is also an effective method for increasing the suction force of the suction collet 105 to make the area of the bottom surface of the suction collet 105 larger than the area of the upper surface of the block 110c.

  In this way, by increasing the suction force of the suction collet 105, even if the contact area between the chip 1 and the dicing tape 4 is relatively large, the chip 1 is attached to the dicing tape 4 only by the suction force of the suction collet 105. Therefore, the peeling time can be shortened, and the above-described problem that occurs when the area of the upper surface of the block 110c is reduced can be avoided.

  Further, if the block 110c is pulled downward while the chip 1 is pressed down by the suction collet 105, the suction collet 105 also moves downward, so that the chip 1 may hit the block 110c and break. Therefore, when lowering the block 110c downward, it is desirable to pull up the suction collet 105 immediately before that, or at least fix the position so that the suction collet 105 does not move downward.

  Thus, the chip 1 peeled off from the dicing tape 4 is sucked and held by the suction collet 105 and conveyed to the next process (pellet attaching process) (generally from the pickup stage of the same apparatus to the die bonding stage). 132 or the die bonding unit 300). When the suction collet 105 that has transported the chip 1 to the next process returns to the chip peeling device 100 (chip peeling unit), the next chip 1 is removed from the dicing tape 4 according to the procedure shown in FIGS. It is peeled off. Thereafter, the chips 1 are peeled off from the dicing tape 4 one by one according to the same procedure.

  Next, first, a description will be given of a pelletizing process related to what is to be evacuated after confirmation of landing. As shown in FIG. 24, the chip 1 transported to the pelletizing process is bonded to the adhesive member layer or the adhesive 10 (usually before the wafer is divided into chips, for example, when dicing tape is applied or before, on the back surface of the wafer. DAF, that is, “Die attach film”, a double-sided adhesive sheet for die bonding or an adhesive layer for die bonding is attached, or a liquid adhesive is applied or dropped onto the wiring board immediately before die bonding. The DAF is generally stretched between the back surface of the wafer and the dicing tape, and is divided together with the chip when dicing, etc. When the chip is picked up, the DAF is picked up together with the chip. If attached, it is not necessary to form an adhesive layer again during die bonding. Since mass production is advantageous.) It is mounted on the wiring board 11 via a. That is, the chip 1 peeled off from the dicing tape 4 is lowered toward the wiring substrate 11 on the die bonding stage 132 heated to about 100 to 150 degrees Celsius in a state where the chip 1 is vacuum-sucked by the suction collet 105. .

  As shown in FIG. 25, when it is confirmed that the chip 1 has landed on the wiring board 11, the collet 105 turns off the vacuum suction while pressing the chip 1 with a predetermined pressure, and keeps it for a predetermined time (for example, Stay in that position (1 to a few seconds). During this time, thermocompression bonding proceeds.

  Thereafter, as shown in FIG. 26, the collet 105 is retracted from the chip 1 while the vacuum suction is turned off.

  The chip 1 that has been subjected to the thermocompression bonding is electrically connected to the electrode 13 of the wiring board 11 via the Au wire 12 as shown in FIG.

  Next, the pelletizing process (die bonding process) related to cutting the vacuum before landing will be described. As shown in FIG. 24, the chip 1 conveyed to the pelletizing process is bonded to the adhesive or the adhesive member layer 10 (usually before the wafer is divided into chips, for example, when dicing tape is applied or before, on the back surface of the wafer. DAF, that is, “Die attach film”, a double-sided adhesive sheet for die bonding or an adhesive layer for die bonding is attached, or a liquid adhesive is applied or dropped onto the wiring board immediately before die bonding. (In other words, an adhesive member layer is interposed between the chip and the wiring board during die bonding.) The DAF is generally stretched between the back surface of the wafer and the dicing tape and is used for dicing or the like. When picking up a chip, it is picked up with the chip.Die attach It is not necessary to form anew adhesive layer should have previously pasted during die bonding film is advantageous in mass production.) Via a are mounted on the wiring board 11. That is, the chip 1 peeled off from the dicing tape 4 is adsorbed by physical adsorption with the vacuum suction turned off to the adsorption collet 105, and is about 100 to 150 degrees Celsius (the glass transition temperature of the organic wiring board is generally 240 degrees Celsius). Therefore, the substrate heating temperature can be about 100 to 200 degrees Celsius, but in order to minimize the deformation of the substrate, it is preferably about 100 to 150 degrees Celsius, at least. , It is necessary to be lower than the glass transition temperature of the substrate) and is lowered toward the wiring substrate 11 on the die bonding stage 132 heated.

  As shown in FIG. 25, when it is confirmed that the chip 1 has landed on the wiring board 11, the collet 105 presses the chip 1 with a predetermined pressure and keeps vacuum suction off for a predetermined time (for example, 1 Stay in that position (seconds to seconds). During this time, thermocompression bonding proceeds.

  Thereafter, as shown in FIG. 26, the collet 105 is retracted from the chip 1 while the vacuum suction is turned off.

  The chip 1 that has been subjected to the thermocompression bonding is electrically connected to the electrode 13 of the wiring board 11 via the Au wire 12 as shown in FIG. By doing so, since the landing is performed in a state where the vacuum suction is turned off, even if the thin film chip is curved at the time of peeling and adsorption, the curve is released at the time of landing, so the chip after die bonding Therefore, no bending or undesired stress remains. Below, explanation common to both is continued.

  Next, as shown in FIG. 28, the second chip 14 is laminated on the chip 1 mounted on the wiring substrate 11 via an adhesive 10 or the like, and the electrodes of the wiring substrate 11 are connected via Au wires 15. 16 is electrically connected. The second chip 14 is a silicon chip on which an integrated circuit different from the chip 1 is formed. After being peeled off from the dicing tape 4 by the method described above, the second chip 14 is transported to the pelletizing process and stacked on the chip 1. .

  Thereafter, the wiring substrate 11 is transferred to a molding process, and the chips 1 and 14 are sealed with a molding resin 17 as shown in FIG.

  In this embodiment, the case where the chip 1 to be peeled is slightly larger than the outer block 110a has been described. However, for example, as shown in FIG. If it is smaller than the outer block 110a and larger than the intermediate block 110b, as shown in FIG. 30 (b), the intermediate block 110b is first pushed up to peel off the peripheral edge of the chip 1 from the dicing tape 4, and then As shown in FIG. 30 (c), the inner block 110 c can be pushed up to peel the center portion of the chip 1 from the dicing tape 4. In this case, for example, a spacer is sandwiched between the suction piece 102 and the outer block 110a so that the outer block 110a does not lift even when the pusher 112 is pushed up.

  In this embodiment, the method of peeling chips using three blocks (110a to 110c) has been described. However, the number of blocks is not limited to three, and chips to be peeled off. If the size of 1 is large, 4 or more blocks may be used. Further, when the size of the chip 1 to be peeled is very small, two blocks may be used.

2. Detailed explanation of the area around the pickup (mainly Figs. 31 to 38)
31 to 38, the peeling operation control, the detailed structure of the collet 105, and the relationship between them and the lower substrate 102 (adsorption piece) will be described.

FIG. 31 is a conceptual diagram (FIG. 31a), a time chart (FIG. 31b), and a cross-sectional view (FIG. 31b) schematically showing the pickup unit and its control system. The pick-up operation starts when the target chip 1 on the dicing tape 4 is positioned on the suction piece 102 and the collet 105. When the positioning is completed, the dicing tape 4 is sucked onto the upper surface of the suction piece 102 by evacuating through the suction hole 103 and the gap S of the suction piece 102. In this state, a command of the pickup unit control system 144 causes the vacuum suction system 107 (for example, suction pressure minus 80 to 90 kilopascals, suction flow rate 7 L / min.) To be a valve 143 (this three-way valve is when vacuum suction is off, The vacuum supply source side is closed and the collet side is opened to the atmosphere), and a vacuum is supplied from the factory vacuum supply source via the vacuum supply pipe 141 so that the collet 105 faces the device surface of the chip 1. Descent while evacuating and land. Here, when the push-up block 110 which is the main part of the suction piece 102 rises, the chip 1 rises while being sandwiched between the collet 105 and the push-up block 110, but the peripheral portion of the dicing tape 4 is vacuumed to the suction piece peripheral portion 102a. Since it remains adsorbed, tension is generated around the chip 1, and as a result, the dicing tape 4 is peeled off around the chip. However, at this time, the periphery of the chip receives a stress on the lower side and is curved. As a result, a gap is formed between the lower surface of the collet and air flows into the vacuum suction system 107 of the collet 105. As a result, the suction amount output of the gas flow rate sensor 21 provided in the vacuum suction system 107 increases. Here, for example, when the raising of the push-up block 110 is stopped and the standby state is maintained by a command from the pickup unit control system 144, the dicing tape 4 is peeled off, and the curved state of the chip 1 is relaxed to be within the allowable range. Often return. FIG. 31b shows the transition of the suction amount output (digital output signal and analog output signal) of the gas flow rate sensor 21 in such a process. When the collet is lowered, a large amount of suction is shown corresponding to the open state. When landing at t ₁ , the flow rate decreases rapidly and becomes almost “0” at t ₂ . Since the push-up block some time to start increasing tension is small leak does not occur, it comes when the leak starts due to the curvature of the chip to t _3. The leak that stops the ascending of the block 110 and maintains the standby state is eliminated, and the flow rate returns to almost “0” again at t ₄ . The gas flow rate sensor 21 may be anything as long as it can measure the gas flow rate or the physical quantity corresponding thereto. Needless to say, the shape and dimensions of the rubber chip are almost the same as the shape and dimensions of the target chip (rectangular if the chip is rectangular), from the viewpoint of preventing cracks around the chip. (It is not excluded to make it larger or slightly smaller). Regarding this, the push-up block is the same, and in this embodiment, an example that is slightly smaller than the tip is shown to promote peripheral peeling, but it is needless to say that the shape and dimensions of the tip are almost the same. Alternatively, it may be slightly larger.

  32 to 38, the detailed structure of the suction collet 105, particularly the lower end thereof, that is, the rubber chip 125 and its variations, and the relationship between them and the lower base 102 (suction piece) will be described. FIG. 32 a is a top view of the push-up block 110 corresponding to the description of FIGS. 1 to 30 and shows the positional relationship between the push-up block 110 and the rubber tip 125. The shape of the rubber chip 125 is almost the same as the chip to be picked up. FIG. 32b is a bottom view of the collet body 105 (or rubber chip holder). There is a vacuum suction hole 122 (for example, 4 mm in diameter) in the center, and vacuum suction grooves 121 are provided in the direction of each axis and diagonal. The rubber chip 125 is provided with vacuum suction holes 106a to 106i corresponding to the vacuum suction groove 121 and the push-up blocks 110a to 110c (for example, 0.8 mm in diameter).

  FIG. 33 is a variation of the rubber chip 125, and the two inner push-up blocks 110 b and 110 c have substantially the same top shape as the chip 1. By doing so, stress concentration at the corner portion of the chip can be relaxed. The structure of the rubber tip shown in FIG. 32 or 33 is very important in the peeling process. In particular, when the vacuum suction hole 106a is provided in the central portion (including the region near the center), even if the chip is bent by the tension of the adhesive tape, the holding state of the chip can be maintained by the vacuum suction hole 106a in the central portion. Assuming that the chip is 10 mm square (chip thickness 25 microns, DAF thickness 25 microns), the first block (segment) is, for example, 8.6 mm square, the second block is 6.3 mm square, and the third block is 4.0 mm. It becomes a corner.

  34 is a schematic cross-sectional view of the AA cross section of FIGS. 32 and 33 in a state where the collet 105 is landed, and FIG. 35 is a schematic cross-sectional view of the BB cross section of FIGS. 32 and 33. At this time, the lower side of the dicing tape 4 is adsorbed through a gap S between the suction hole 103 and the lower base main part 110 provided in the lower base peripheral part 102a. At this time, the upper side of the dicing tape 4 is vacuum-sucked through the vacuum suction hole 106.

  FIG. 36 shows still another variation of the rubber chip 125 that can detect leaks more finely. That is, a large number of vacuum suction holes 106a to 106w are arranged in the rubber chip 125 corresponding to each sub-block of the push-up block 110 and the innermost part of the suction piece 102a. In such an arrangement, at least one or a plurality of suction holes are provided corresponding to the individual segments (in addition to the outermost segment outside) of each push-up block, so that the accuracy of detecting the peeling state due to leakage is improved. be able to. In addition, when combined with a rubber tip made of a relatively soft elastomer, the adsorption force can be dispersed throughout the tip, so that even if the tip is curved, no stress is concentrated locally.

  37 is a schematic cross-sectional view of the AA cross section of FIG. 36 with the collet 105 landed, and FIG. 38 is a schematic cross-sectional view of the BB cross section of FIG.

  In addition, the center hole 106a in FIGS. 31, 32, and 36 is not necessarily essential. For example, in the slide-type peeling method as shown in FIG. 46, it is not particularly important that the suction hole is at the center. In addition, when there are a large number of suction holes as shown in FIG. 36, an intermediate hole group (such as 106t) can be substituted even if it is not centered.

3. Details of each stripping process (mainly Figures 39 to 50)
The following exfoliation processes can be applied to the entire process described in Section 1 as appropriate, and can be applied singly or in combination.

3-1. Description of outline of push-up & air peeling process which is one embodiment of the present invention (mainly FIG. 41 and FIG. 42)
First, the outline of the push-up & air peeling process will be described with reference to FIGS. 41 and 42, taking the peeling apparatus described above or below as an example. As shown in FIG. 41, for example, the three raised blocks 110a, 110b, and 110c constituting the lift stage 110 (the pushed member) are integrally raised (the upper surface of the lower base peripheral portion 102a is set to the reference height. When the ionized air blow 41 (gas blow) is supplied from the ionized air nozzle 42 toward the peeling portion 40 formed below the periphery of the chip 1 at an altitude of about 300 micrometers, for example. The separation is propagated in the direction of the air blow 41 by the action of the air knife. As a result, a gas flow path is formed between the back surface of the chip 1 and the top surface of the dicing tape 4. In the process, the collet 105 is lifted together with the tip 1 and the rubber tip 125 by the gas pressure of the air blow 41. In this way, the peeling finally expands over the entire area of the back surface of the chip 1 and complete peeling. Although this is not essential, when the gas blow 41 is started, after the lift stage 110 is lifted (or simultaneously), the vacuum leak check of the collet 105 described in FIG. When the gas blow 41 is started after confirming that there is no gas, the peeling operation can be made more stable. This is because if the air blow 41 is performed in a state where there is a leak, the action of the air blow 41 is likely to contribute to the direction of peeling the chip 1 from the collet 105 (rubber chip 125). As a result of the vacuum leak check, if it is found that there is a leak, wait for a while and then restart from the vacuum leak check again, or sometimes reverse the process steps as appropriate and proceed with the process again. You can do it.

  Further, when the gas blow 41 is applied, the pressure applied to the collet 105, that is, the pressure for pressing the collet 105 (rubber chip 125) against the chip 1 (referred to as “collet load”) is weakened more than usual. If the collet 105 is lifted together with the rubber chip 125 and the chip 1 by the blow 41, a smooth peeling process can be performed. The collet load is, for example, about 0.75 N, that is, a preferable range is about 0.3 to 1.5 N (more preferably about 0.5 to 1.0 N).

  As the blowing angle θ of the air blow 41 at this time, for example, an acute angle of about 20 degrees is most preferable from the viewpoint of smooth propagation of peeling. Generally, the range is about 5 degrees or more and 30 degrees or less, but in order not to apply undesired stress to the chip 1, a range of about 10 degrees or more and 25 degrees or less is more preferable. In addition, when it is 45 degrees or more, generally undesired stress may be increased.

  Next, FIG. 42 shows a nozzle cross-sectional shape (FIG. 41A) and a front shape (FIG. 41B) of the gas blow nozzle 42 in FIG. The nozzle cross-sectional shape in FIG. 41A corresponds to the Y-Y ′ cross section in FIG. As shown in FIG. 42, an ionized gas supply port 44 for supplying ionized gas from an ionizer is provided behind the gas blow nozzle 42, and ionized air or the like supplied therefrom is a plurality of gases. Spraying from the blow nozzle opening 43 toward the peeling portion 40 between the back surface (on the first side 2 a side) of the chip 1 to be peeled and the top surface of the dicing tape 4. By this spraying, the peeling propagates from the first side 2a side to the second side 2b side.

  The speed immediately after the gas blow nozzle opening 43 of the air blow 41 at this time is preferably, for example, around 100 meters / second, that is, the range is about 50 meters / second to 150 meters / second (gas pressure). Is, for example, about 0.35 MPa).

  The relationship between the gas blow nozzle opening row 43 and the tip 1 (first side 2a) is preferably such that the lengths of both are substantially the same (substantially equivalent length). If the gas blow nozzle opening row 43 is longer, the other chips may be affected. If the first side 2a of the chip 1 is longer, the peeling characteristics may be deteriorated. The distance between the nozzle tip and the tip 1 (first side 2a) is, for example, about 20 millimeters (preferably a range of about 5 to 50 millimeters can be exemplified).

  It is preferable that the air blow 41 is supplied from one side (for example, from the first side direction) so that the gas passage extends linearly on the back surface of the chip 1. The supply may be performed from a plurality of directions around the chip 1. However, if the gas is supplied from a plurality of directions, the gas passage on the back surface of the chip 1 is disturbed, and it is necessary to pay attention so that undesired stress is not applied to the chip due to the generation of turbulent flow.

  Further, the gas blow nozzle opening row 43 may be a single slit-like opening, but in order to form a uniform gas blow over the entire width, a plurality of divided gas blow nozzle openings 43 and It is effective to do.

  In addition, the air blow 41 is generally optimal in terms of cost from dry air, but may be nitrogen or other gas.

  In the present application, gas blow by mainly ionized gas is exemplified, but this means that when normal non-ionized gas blow is used, the chip 1, the dicing tape 4, the wiring board 11 and the like are charged. This is to prevent it. Therefore, if charging is not a problem, a normal non-ionized gas blow may be used.

  In this example, after the peeling portion 40 is formed on the outer peripheral portion of the back surface of the chip 1 to be peeled by the push-up operation by the push-up member 110, the air blow 41 (gas / gas) is applied to the peeling portion 40 (initial peeling or trigger for peeling). The reason why the air blow 41 is applied is that the air blow 41 acts in the direction of peeling the chip 1 from the collet 105 (rubber chip 125). .

  As explained above, according to this push-up & air peeling process, complete peeling can be achieved with a short push-up stroke (short push-up time), and as a result, the curvature of the chip during the peeling process can be minimized. it can.

  Further, as shown in FIG. 41, peeling is performed in a state where almost all of the upper and lower sides of the chip 1 to be peeled (unattached with the dicing tape 4 before and after being vacuum-sucked up and down) are almost entirely sandwiched from above and below. Since the operation proceeds, the peeling process becomes extremely small in the curvature of the chip 1.

3-2. Detailed explanation of push-up block ascending / standby process ("3-step peeling process", FIGS. 39 to 40)
In this subsection, a basic example is shown in which the push-up & air stripping process described in subsection 3-1 is applied to the stripping apparatus and stripping process described in sections 1 and 2.

  In the basic configuration of this example, if the three-stage lift stages 110a, 110b, and 110c are fully operated, it takes time and the opportunity for bending of the chip 1 also increases. Therefore, the lift stages 110a, 110b, and 110c of each stage are increased. By performing the air blow 41 for every rise, an early complete peeling is realized and a subsequent lift operation is to be omitted. If necessary, a leak check is performed every time the lift stages 110a, 110b, 110c of each stage are raised.

FIG. 39 is a process flow diagram showing specific processing steps for a method of using leak detection when each of the sub-blocks 110a to 110c of the push-up block 110 is pushed up sequentially and the dicing tape 4 is peeled off. FIG. 40 is a cross-sectional flow diagram of the main part. Based on these, the progress of specific steps will be described. In each of the following examples, as can be clearly described, an example is given in which each of the peeling element processes leaks first and does not leak the second time.
(1) The dicing tape 4 is vacuum-sucked on the upper surface of the lower base 102 (tape suction step 31).
(2) The collet 105 lands on the upper surface (generally, but not limited to, the device surface) of the chip 1 while vacuuming (collet landing step 32). The landed state is shown in FIG. 40a.
(3) The push-up block 110 rises all at once (first step ascending step 33). The chip 1 and the collet 105 are also pushed up accordingly. At this time, since the lower substrate peripheral portion 102a does not move, the tension for peeling off the dicing tape 4 on the outer periphery of the chip 1 works. Also, at this step, monitoring of leaks is started.
(4) The presence of a leak is detected (leak detection step 34; see FIG. 40b). If there is no leak, the process immediately proceeds to step (9). FIG. 40b shows a state when the leak 133 is detected.
(5) The ascending operation in (3) is decelerated (including stop) for a predetermined time or until there is no leak (see FIG. 40c). That is, the “standby step”. During this time, monitoring of leakage is continuously or intermittently performed. If there is no leak, the process proceeds to step (7). However, this step can be omitted when the process moves from (4) to the next step (6). This may shorten the processing time. The same applies to the following examples. In general, peeling from an adhesive tape is a rheological phenomenon, and even if it is difficult to peel off at a high speed, it often peels easily when time is applied while applying a weak tension. Therefore, stop standby and deceleration standby are often effective.
(6) Return to before step (3) starts. Alternatively, the process of (3) is reversed until there is no leak in the leak monitor. That is, the push-up block 110 is collectively lowered. That is, the “retreat step”. This is the same in the following examples, but it is effective when the tip is bent and the tension is relaxed, and as a result, peeling does not proceed in one direction over time. When returning to the original state as described above, the adhesive tape again adheres to the back surface of the chip, but it is generally considered that the adhesive force during re-adhesion is weaker than the adhesive force during initial adhesion. Moreover, the adhesive force at the time of re-adhesion is greatly reduced in the case of UV irradiation with a UV curable tape.
(7) The push-up block 110 rises all at once (first step rise).
(8) No leak is detected. FIG. 40c shows a state in which the leak has disappeared. If “No leak” does not occur even after repeating a predetermined number of times, depending on the setting, the chip is skipped, or the initial increase is reduced so that no leak occurs, or an alarm is displayed ( Or send alarm signal to host) Select one or more to stop.

When no leak is detected, air blow 41 (ionized air blow) is started as shown in FIGS. 39 and 40 (c). Now, when peeling proceeds smoothly, complete peeling occurs and the process proceeds to (21). Here, when complete peeling cannot be performed, the air blow 41 is stopped and the process proceeds to the next (9).
(9) The push-up blocks 110b and 110c are raised together (second step raising step 35). At this time, the push-up block 110a and the lower base peripheral portion 102a do not move.
(10) There is a leak (leak detection step 36). If there is no leak, the process immediately proceeds to step (15).
(11) The ascending operation in (9) is decelerated (including stop) for a predetermined time or until there is no leak. That is, the “standby step”. During this time, monitoring of leakage is continuously or intermittently performed. If there is no leak, the process proceeds to step (13). However, this step can be omitted when the process proceeds from (10) to the next step (12). This may shorten the processing time.
(12) Return before step (9) starts. Alternatively, the process of (9) is reversed until there is no leak in the leak monitor. That is, the push-up blocks 110b and 110c are lowered at once.
(13) The second stage is raised again (second stage is raised again).
(14) No leak. If “No leak” does not occur even after repeating a predetermined number of times, depending on the setting, the chip is skipped, or the initial increase is reduced so that no leak occurs, or an alarm is displayed ( Or send alarm signal to host) Select one or more to stop.

When no leak is detected, air blow 41 (ionized air blow) is started as shown in FIGS. 39 and 40 (c). Now, when peeling proceeds smoothly, complete peeling occurs and the process proceeds to (21). Here, when complete peeling cannot be performed, the air blow 41 is stopped and the process proceeds to the next (15).
(15) Raise the final stage, that is, the push-up block 110c alone (final stage ascending step 37). Of course, the chip 1 and the collet 105 are raised accordingly.
(16) There is a leak (leak detection step 38). If there is no leak, the process immediately proceeds to step (21).
(17) The ascending operation of (15) is decelerated (including stop) for a predetermined time or until there is no leak. That is, the “standby step”. During this time, monitoring of leakage is continuously or intermittently performed. If there is no leak, the process proceeds to step (19). However, this step can be omitted when the process proceeds from (16) to the next step (18). This may shorten the processing time.
(18) Return to before the start of step (15). Alternatively, the process of (15) is reversed until there is no leak in the leak monitor. That is, the push-up block 110c is lowered alone. Of course, the tip 1 and the collet 105 are lowered accordingly.
(19) Re-raise the last stage (last stage re-rise).
(20) No leak. If “No leak” does not occur even after repeating a predetermined number of times, depending on the setting, the chip is skipped, or the initial increase is reduced so that no leak occurs, or an alarm is displayed ( Or send alarm signal to host) Select one or more to stop.

When no leak is detected, air blow 41 (ionized air blow) is started as shown in FIGS. 39 and 40 (c). Now, when peeling proceeds smoothly, complete peeling occurs and the process proceeds to (21).
(21) The collet rises and completely peels off (complete peeling step 39).

  Note that the vacuum for suction on the collet side and on the lower substrate side remains pulled up from step (1), (2) to step (21). That is, it remains ON.

  The merit of this peeling process is that any shape of chip can be pushed up corresponding to the shape.

3-3. Detailed description of the push-up & air separation process (example using a single horizontal lift stage) according to an embodiment of the present invention (mainly FIGS. 43 to 45)
In this example, the push-up block 110 (110a, 110b, 110c) described in the sub section 3-2 is lifted in a horizontal state like the integral lift stage 110, and the push-up & air separation process (sub- The peeling method described in Section 3-1). Therefore, an integrated stage as shown in FIGS. 49 (a) and 49 (c) may be used from the beginning. Hereinafter, a push-up & air separation process (an example using a single horizontal lift stage) according to an embodiment of the present invention will be described with reference to FIGS. 43 to 45.
(1) As shown in FIG. 43, first, the dicing tape 4 is vacuum-sucked on the upper surface of the lower base 102 (tape suction step 51).
(2) Next, as shown in FIG. 45, at time t31, the empty collet 105 (rubber chip 125) starts to descend from the cycle height toward the chip 1 to be peeled.
(3) Next, as shown in FIG. 45, at the time t32, the descending speed is reduced, and as shown in FIG. 44 (a), the ionizer is turned on and the cooling blow 61 is connected to the chip 1 and the rubber chip. 125 (collet 105) is supplied between the lower surfaces of the collet 105 (cooling blow step 52 in FIG. 43). This is for cooling the rubber chip 125 (collet 105) heated during die bonding. This cooling blow 61 (blow with ionized gas, usually dry air is used. However, other gas may be used if necessary. Here, the same gas blow for peeling is used. ) Is typically performed using the gas blow nozzle 42 described in subsection 3-1 (other nozzles may be used if desired).

Also, as shown in FIG. 45, evacuation of the collet 105 is started at time t32. Preparation for landing.
(4) Next, as shown in FIG. 45, at time t33, the rubber chip 125 (collet 105) reaches the pickup height and lands on the surface of the chip 1 as shown in FIG. 44 (b) (FIG. 43). The collet landing step 53). At this time, the chip 1 is vacuum-sucked through the dicing tape 4 also from the back side.

Further, as shown in FIG. 45, the cooling blow 61 is turned off immediately before landing.
(5) Next, as shown in FIG. 43, FIG. 44 (c) and FIG. 45, at the time point 34, the lift stage 110 starts to rise (for example, about 300 micrometers) (pushing member raising step 54). By this pushing-up operation, the peeling portion 40 is generated on the outer peripheral portion of the back surface of the chip 1.
(6) Next, as shown in FIGS. 43 and 45, at time t35, a vacuum leak check is performed (leak check 55). As a result of the vacuum leak check, if there is no leak, the process proceeds to the next step. If there is a leak, wait until the leak disappears (or retry), or skip the offending chip 1. As this retry, a process such as returning to the push-up member ascending step 54 can be selected.
(7) After confirming that there is no leak, as shown in FIG. 43, FIG. 44 (d), and FIG. (Gas blow step 56).

The gas blow 41 gradually expands the peeling portion 40 as shown in FIG. 44 (e), and when the gas passage penetrates as shown in FIG. .
(8) Next, as shown in FIGS. 43 and 45, at time t37, the load on the collet 105 is turned off, and the collet 105 starts to rise for complete peeling in a vacuum suction state. Immediately after this, a leak check step 57 is executed. This is to confirm whether the collet 105 (rubber chip 125) holds the chip 1 securely or whether the complete peeling is successful.

If there is no leak, the process proceeds to the next step. If there is a leak, either wait until the leak disappears (you can try again) or skip the offending chip 1 (you may stop with an alarm). As this retry, a process such as returning to the push-up member ascending step 54 can be selected.
(9) When it is confirmed that there is no leak, as shown in FIGS. 43 and 45, at time t38, the collet 105 (rubber chip 125) vacuum-adsorbs the chip 1 toward die bonding. Then, the rise to the cycle height is started (collet rise 58).

At the same time, the gas blow 41 is stopped. Further, immediately after that, the lift stage 110 is lowered to the reference height (the same height as the upper surface of the lower base peripheral portion 102a).
(10) Next, as shown in FIGS. 43 and 45, at time t39 (corresponding to time t19 in FIG. 52), the collet 105 (rubber chip 125) is vacuum bonded to the chip 1 for die bonding. Then, the rise to the cycle height is completed, and the process moves to horizontal movement (refer to FIG. 52 hereafter).

3-4. Detailed description of the push-up & air separation process (example using a single inclined lift stage) according to an embodiment of the present invention (mainly FIGS. 46 to 49)
This example is a push-up & air separation process by a one-stage lift that inclines and raises the integral lift stage 110 described in sub-section 3-3. Thereby, a lift stroke can be shortened. Here, FIG. 49 (in this figure, the dicing tape 4 and the member above it are removed so that the movement of the lift stage 110 can be easily seen) is shown in FIG. The stage 110, and FIG. 47 corresponds to the CC ′ cross section thereof. Hereinafter, a push-up & air separation process (an example using a single horizontal lift stage) according to an embodiment of the present invention will be described with reference to FIGS.
(1) As shown in FIG. 46, first, the dicing tape 4 is vacuum-sucked on the upper surface of the lower base 102 (tape suction step 51). The state of the lower base 102 at this time is as shown in FIG.
(2) Next, as shown in FIG. 48, at time t31, the empty collet 105 (rubber chip 125) starts to descend from the cycle height toward the chip 1 to be peeled.
(3) Next, as shown in FIG. 48, at the time t32, the descending speed is reduced, and as shown in FIG. 47 (a), the ionizer is turned on, and the cooling blow 61 is connected to the tip 1 and the rubber tip. It is supplied between the lower surfaces of 125 (collet 105) (cooling blow step 52 in FIG. 46). This is to cool the rubber chip 125 (collet 105) heated during die bonding as described above. This cooling blow 61 (blow with ionized gas, usually dry air is used. However, other gas may be used if necessary. Here, the same gas blow for peeling is used. ) Is usually performed using the gas blow nozzle 42 described in sub-section 3-1, etc. (other nozzles may be used if necessary).

Further, as shown in FIG. 48, evacuation of the collet 105 is started at time t32. Preparation for landing.
(4) Next, as shown in FIG. 48, at time point t33, the rubber chip 125 (collet 105) reaches the pickup height and lands on the surface of the chip 1 as shown in FIG. 47 (b) (FIG. 46). The collet landing step 53). At this time, the chip 1 is vacuum-sucked through the dicing tape 4 also from the back side.

Further, as shown in FIG. 48, the cooling blow 61 is turned off immediately before landing.
(5) Next, as shown in FIG. 46, FIG. 47 (c), FIG. 48 and FIG. 49 (b), at the time point 34, the first side 2a side of the lift stage 110 rises (for example, about 150 micrometers). The most suitable range can be exemplified by about 100 to 300 micrometers) (the pushing member raising step 54a). By this pushing-up operation, a peeling portion 40a is generated on the outer peripheral portion of the back surface of the chip 1 on the first side 2a side.
(5 ′) Next, as shown in FIGS. 46, 47 (d), 48 and 49 (c), at the time point 44, the second side 2b side of the lift stage 110 is raised (for example, 150 micrometers). The most suitable range can be exemplified by about 100 to 300 micrometers) (pushing member raising step 54b). By this push-up operation, the peeling propagates to the outer peripheral portion of the back surface of the chip 1 on the second side 2b side, and the peeling portion 40b is formed on the outer peripheral portion of the rear surface of the chip 1 on the second side 2b side (FIG. 49B). 40t).
(6) Next, as shown in FIGS. 46 and 48, a vacuum leak check is performed at time t35 (leak check 55). As a result of the vacuum leak check, if there is no leak, the process proceeds to the next step. If there is a leak, wait until the leak disappears (or retry), or skip the offending chip 1. As this retry, processing such as returning to the block first side rising step 54a or the block second side rising step 54b can be selected.
(7) After confirming that there is no leak, as shown in FIG. 46, FIG. 47 (e) and FIG. The same operation is performed (gas blow step 56).

The gas blow 41 gradually expands the peeling portion 40a as shown in FIG. 47 (f), and when the gas passage penetrates as shown in FIG. .
(8) Next, as shown in FIGS. 46 and 48, at time t37, the load on the collet 105 is turned off, and the collet 105 starts to rise for complete peeling in a vacuum suction state. Immediately after this, a leak check step 57 is executed. This is to confirm whether the collet 105 (rubber chip 125) holds the chip 1 securely or whether the complete peeling is successful.

  If there is no leak, the process proceeds to the next step. If there is a leak, either wait until the leak disappears (you can try again) or skip the offending chip 1 (you may stop with an alarm).

As this retry, processing such as returning to the block first side rising step 54a or the block second side rising step 54b can be selected.
(9) When it is confirmed that there is no leak, as shown in FIGS. 46 and 48, at time t38, the collet 105 (rubber chip 125) vacuum-adsorbs the chip 1 toward die bonding. Then, the rise to the cycle height is started (collet rise 58).

At the same time, the gas blow 41 is stopped. Further, immediately after that, the lift stage 110 is lowered to the reference height (the same height as the upper surface of the lower base peripheral portion 102a). The lowering of the lift stage 110 may be performed for each of the first side and the second side, or may be performed in a horizontal state.
(10) Next, as shown in FIGS. 46 and 48, at the time t39 (corresponding to the time t19 in FIG. 52), the collet 105 (rubber chip 125) is vacuum bonded to the chip 1 for die bonding. Then, the rise to the cycle height is completed, and the process moves to horizontal movement (refer to FIG. 52 hereafter).

In addition, in order to further increase the speed of the peeling process, as indicated by a broken line arrow in FIG. 46, the process may proceed directly from the step (5) to the above step (6). 6b). The procedure will be described below.
(6b) Next, as shown in FIGS. 46 and 48, a vacuum leak check is performed at time t35 (leak check 55). As a result of the vacuum leak check, if there is no leak, the process proceeds to the next step. If there is a leak, wait until the leak disappears (or retry), or skip the offending chip 1. Here, as the retry, a process such as returning to the block first side rising step 54a or the block second side rising step 54b can be selected.
(7b) After confirming that there is no leak, as shown in FIG. 46 and FIG. 47 (c), the gas blow 41 for the progress of peeling is performed in the same manner as the sub-section 3-1 etc. (gas -Blow step 56).

  When the peeled portion 40a is gradually enlarged by the gas blow 41 and the gas passage is penetrated, the state becomes almost completely peeled.

  The subsequent steps are the same as those after step (8).

3-5. Detailed explanation of push-up & air peeling process (example using push-up pin) according to one embodiment of the present invention (mainly FIG. 50)
In this example, the push-up & air separation process described in sub-section 3-1 is realized by a push-up pin. According to this, the structure of the suction piece (lower base) 102 can be made relatively simple. On the other hand, in this process, since the lower support of the chip 1 is not perfect, it is necessary to pay attention to chip cracks during peeling. Based on FIG. 50 (mainly refer to the figures in sub-section 3-3 and the description related thereto), the details of the push-up & air peeling process (example using push-up pins) will be described.
(1) First, the dicing tape 4 is vacuum-sucked on the upper surface of the lower base 102.
(2) Next, the empty collet 105 (rubber chip 125) starts to descend from the cycle height toward the chip 1 to be peeled.
(3) Next, the descending speed is reduced, the ionizer is turned on, and the cooling blow 61 is supplied between the tip 1 and the lower surface of the rubber tip 125 (collet 105). This cooling blow 61 (blow with ionized gas, usually dry air is used. However, other gas may be used if necessary. Here, the same gas blow for peeling is used. ) Is typically performed using the gas blow nozzle 42 described in subsection 3-1 (other nozzles may be used if desired).

At the same time, evacuation of the collet 105 is started. Preparation for landing.
(4) Next, the rubber chip 125 (collet 105) reaches the pickup height and lands on the surface of the chip 1. At this time, the chip 1 is vacuum-sucked through the dicing tape 4 also from the back side.

At substantially the same time, the cooling blow 61 is turned off immediately before landing.
(5) Next, as shown in FIG. 50, the push-up pin 110x starts to rise (for example, about 200 to 300 micrometers). By this pushing-up operation, the peeling portion 40 is generated on the outer peripheral portion of the back surface of the chip 1.
(6) Next, a vacuum leak check is performed. As a result of the vacuum leak check, if there is no leak, the process proceeds to the next step. If there is a leak, wait until the leak disappears (or retry), or skip the offending chip 1. As this retry, a process such as returning to the previous push-up pin ascending step can be selected.
(7) After confirming that there is no leak, as shown in FIG. 50, the gas blow 41 for the progress of peeling is performed in the same manner as the sub section 3-1.

When the peeling portion 40 is gradually enlarged by the gas blow 41 and the gas passage penetrates, the state becomes almost complete peeling.
(8) Next, the load of the collet 105 is turned off, and the collet 105 starts to rise for complete peeling in a vacuum suction state. Immediately after this, a leak check step 57 is executed. This is to confirm whether the collet 105 (rubber chip 125) holds the chip 1 securely or whether the complete peeling is successful.

If there is no leak, the process proceeds to the next step. If there is a leak, either wait until the leak disappears (you can try again) or skip the offending chip 1 (you may stop with an alarm). As this retry, processing such as returning to the push-up pin ascending step can be selected.
(9) When it is confirmed that there is no leak, the collet 105 (rubber chip 125) starts to rise to the cycle height toward die bonding in a state where the chip 1 is vacuum-adsorbed.

At the same time, the gas blow 41 is stopped. Further, immediately after that, the push-up pin 110x descends to a reference height (the same height as or lower than the upper surface of the lower base body peripheral portion 102a).
(10) Next, the collet 105 (rubber chip 125) completes the rise to the cycle height toward the die bonding in a state where the chip 1 is vacuum-sucked, and shifts to horizontal movement (refer to FIG. 52 hereafter). ).

4). Explanation of chip transport, physical adsorption landing and die bonding process (mainly see FIGS. 51 to 60)
In general, processing from chip separation to completion of landing on the wiring board is executed while the chip is vacuum-sucked to the suction collet. However, in this case, in the case of a thin film chip (especially one having a thickness of 100 micrometers or less), the chip remains locally deformed by vacuum suction (see FIGS. 54 to 56 for chip distortion due to vacuum suction). ) Since it will land and be bonded and fixed to the substrate, voids and strain are likely to remain after bonding. This tendency is particularly strong in the method in which an adhesive layer (method using DAF) is formed in advance on the back surface of the chip. In addition, if the device surface, that is, the surface of the chip, mainly the main part of a transistor or the like and the surface on which the multilayer wiring is formed (the main surface opposite to the back surface) is adsorbed upward (so-called face-up product), the device In terms of reliability, it is important to bond without leaving voids, strains or deformations. In general, peripheral voids are partially eliminated in the molding process, but those near the center are not eliminated.

  In this section, in order to solve these problems, a case will be described in which a method of turning off vacuum suction at an early stage is applied to a landing portion on a wiring board in the bonding process described in another section or the vicinity thereof. In the following embodiments, turning off vacuum adsorption is completely turned off and only physical adsorption is used (FIG. 31), unless specifically stated otherwise, and unless otherwise apparent from the context. When the three-way switching valve 143 is switched in accordance with the instruction of the pickup unit control system 144, it indicates that the vacuum suction system of the suction collet is separated from the vacuum supply source and is open to the atmosphere). The same applies to the other sections, but the landing technique in this section is an alternative or detailed process of that part of the process described in the other sections, and is not essential for the processes described in the other sections. It goes without saying that there is nothing.

Here, the detailed flow of the process from chip separation to die bonding will be described mainly with reference to FIGS. As described above, in FIG. 51, first, a pickup operation is started in the pickup unit (pickup operation start step 201 in FIG. 51, hereinafter the same FIG. 51). First, the dicing tape 4 is attracted to the lower base 102 (DC tape adsorption step 202). Collet 105 at time t ₁₁ in FIG. 52 starts to decrease and come on the chip 1 of interest. Switches to slow descent at time _{t 12.} Then, evacuation of the collet 105 is started at time _{t 13.} Came the collet 105 is lowered while vacuum suction at time _{t 14,} lands on the chip 1 (collet adsorption start step 203). FIG. 53 shows an outline of a cross section at this time. Immediately after, increase in operating and collet 105 Choke time _{t 15} is started. Although the boosting operation at the time t ₁₆ returns to the block Choke time ended t ₁₇ origional (t ₁₅ between -t ₁₇ for example 100 ms), the collet 105 if there is no problem to complete the peeling as it continues to rise . After complete peeling, at time t ₁₈ , the collet 105 increases its ascent speed and reaches a predetermined translational height at time t ₁₉ . That is, the collet 105 ascends while being held by the vacuum suction by the rubber chip 125 (pickup step 204). FIG. 54 shows an outline of the cross section at this time. After rising to a predetermined height, the collet 105 moves above the die bonding position, that is, above the wiring substrate 11 on the bonding stage 132 (step 205 where the collet 105 moves above the bonding position). FIG. 55 shows an outline of the cross section at this time. From time t ₂₀ , the collet 105 starts to descend while being held by vacuum suction with the rubber tip 125. FIG. 56 shows an outline of the cross section at this time. It switched to the low speed drop at time _{t 21.} This is the final landing position. Is evacuated off the collet at time t ₂₂ (suction off step 206), the chip 1 is lowered while being held only in a substantially intermolecular force (physical adsorption) to rubber tip 125. FIG. 57 shows an outline of the cross section at this time (a comparison between FIGS. 54 to 56 and FIG. 57 shows that the distortion due to the vacuum suction of the chip is eliminated in FIG. 57). Chip 1 at time _{t 23} is landed on the wiring substrate 11 (the landing step 207; between t ₂₁ -t ₂₃ eg speed 20 mm / sec; Time about 30 milliseconds). 52, when descending by a route such as efg (the time between fg is, for example, speed 2 mm / sec; time is about 40 milliseconds), the time when the final landing posture in that method is entered, that is, the “f” point The vacuum suction may be turned off immediately after (may be turned off at other timings). When landing is confirmed at time t24, a bonding load (for example, 5N) is applied to the collet 105 (bonding step 208). FIG. 58 shows an outline of the cross section at this time. Bonding is completed in time t25 (the time for example, about one second between t ₂₃ -t _25), collet starts to rise. FIG. 59 shows an outline of the cross section at this time. The predetermined parallel movement altitude is reached at time t26. FIG. 60 shows an outline of the cross section at this time. Thereafter, the collet 105 moves to the pickup unit again for the next chip peeling.

  Here, in this process, since the route abc is taken in FIG. 52, that is, the vacuum suction is turned off before landing (including weakening as compared with the parallel movement), the route adc is taken in FIG. Compared to the case, since there is no deformation or stress due to adsorption on the chip 1 at the time of landing, bonding characteristics are improved. Further, since unnecessary force due to adsorption is not applied to the chip 1 at the time of landing, no voids or undesired distortions remain as a result of smoothly learning the surface to be bonded of the wiring board. Such an effect is particularly effective for a process using DAF (including a type attached to the back surface of a wafer and a type previously attached to a dicing tape) in which chip deformation during die bonding is likely to be a problem.

  Although not necessarily indispensable, since the vacuuming is turned off after switching from high speed descent to low speed descent (final landing speed), chip 1 does not fall due to the impact force of switching (however, sufficient physical Under the condition that the adsorption is secured, the vacuum adsorption may be turned off before the speed is switched, and it may be better not to switch the speed). That is, since the mass of the chip is relatively small, the physical adsorption force is generally considered to be stronger than the gravity, but the impact force is generally considered to be comparable to the physical adsorption force.

  It should be noted that even if the vacuuming is turned on and off, it is not always necessary to completely turn it off (open to the atmosphere). For example, if the suction pressure when turned on is, for example, minus 80 to 90 kilopascals, It is sufficient that the pressure of the electrode is sufficiently low in absolute value, for example, about several percent or less (however, a thin film chip is more effective in a completely off state where vacuum adsorption is not used, that is, effective only in physical adsorption) This is effective for improving the die bonding characteristics, ie, reducing the voids, and when expressed in terms of pressure, it is, for example, about 0.05 to 0.0005 kilopascals or less in absolute value. It is easier to control when the switch is completely off, and it is advantageous in terms of speed of pressure response.) Further, it may be switched between strong and weak without being completely turned off. That is, it is also effective to set the suction strength to 30% or less, desirably 15% or less, at the time of ON. Considering stable chip holding, a negative pressure, that is, a weak suction state (not weak discharge) is desirable even when it is not completely turned off.

  The landing method described in this section is particularly effective in combination with a collet die bonding method having a low elastic rubber tip described in the next section. This is because when the vacuum suction is applied to the low-elasticity rubber chip, the stress applied to the chip is dispersed in a wide range, so that the chip deformation is quickly recovered when the vacuum suction is turned off. . Further, if the vacuum suction is turned off at least during the thermocompression bonding, the bonding pressure is sufficiently dispersed through the low-elastic rubber chip, which is particularly effective for eliminating local deformation of the chip and voids.

  Also, the landing method described in this section includes a die bonding method using a collet having a rubber chip for a thin film chip (a chip having a chip thickness of 150 micrometers or less, or 100 micrometers or less, and even a chip thickness of 50 micrometers or less). This combination is particularly effective. This is because the thin film chip is likely to be locally deformed, and if it is landed as it is, a closed space is easily formed between the thin film chip and the surface of the wiring board.

  In addition, the landing method described in this section is particularly effective in combination with each peeling and die bonding method using a collet having a rubber chip described in Section 3. This is because when the chip is peeled off while repeatedly bending and recovering, the chip is often adsorbed while leaving a strain.

5). Explanation of low-elastic rubber chip material (mainly see Fig. 61)
As the material of the rubber chip, it is first effective to select from among thermosetting elastomers because it is easy to select a material having low hardness. For example, Geltec's alpha gel (registered trademark of Geltec), that is, a silicone-based gel-like elastomer containing silicone as a main component is a suitable candidate from the viewpoint of preventing contamination of the chip. . Of these series, theta gel (registered trademark of Geltech), theta 5 (hardness of about 56), theta 6 (hardness of about 14), and theta 8 (hardness of about 28) are more preferred. Further, theta 8 (hardness of about 28) is particularly suitable among theta gels.

  Other materials can be selected from thermosetting elastomers such as fluorine rubber, heat-resistant nitrile rubber, natural rubber, isoprene rubber, styrene-butadiene rubber, and neoprene rubber.

  Furthermore, in consideration of recycling, there are options such as a polyimide-based thermoplastic elastomer as a thermoplastic resin.

  A hardness range of 10 or more and less than 70 is suitable for using elasticity. Within that range, a hardness of 15 or more and less than 55 is particularly suitable for utilizing elasticity. A range of hardness of 20 or more and less than 40 is particularly suitable for handling a thin film chip. However, other ranges are not excluded. Among the embodiments of the present application, there are applications where a conventional hard collet or rubber chip such as an elastomer, metal, ceramics or the like having an altitude of about 80 is suitable. Needless to say, examples of physical adsorption and detection of chip curvature due to leakage are not particularly limited to this range.

  When a rubber chip having low elasticity is used in this way, it is easy to follow the irregularities (since the top surface of the chip is not necessarily flat), it is difficult to leak during peeling, and the peeling effect can be enhanced.

  In addition, when such a low-elasticity rubber tip is used, even if the tip is temporarily bent in the peeling process, the rubber tip is also deformed to a considerable extent in accordance with that, so that the stress is dispersed and the tip is damaged. Residual stress can be prevented.

  Furthermore, when such a low-elasticity rubber chip is used, impact during landing can be reduced in die bonding. Therefore, it is particularly effective for face-up products.

  Furthermore, when such a low-elastic rubber chip is used, residual strain during pressure bonding can be reduced in die bonding. Therefore, it is particularly effective for a process using DAF or the like.

  In addition, if a rubber chip with low elasticity is used in this way, even if the vacuum suction is turned off before landing, the contact area with the chip surface is large, so that sufficient physical adsorption force can be secured. Can do.

  In addition, when such a low-elasticity rubber chip is used, damage to the chip during crimping can be reduced regardless of whether or not vacuum suction is turned off before landing in die bonding.

  Generally, the physical adsorption force is caused by van der Waals force, but the reach distance is in the range of 0.2 nm to 10 nm. The physical adsorption force between the upper surface of the semiconductor chip and the rubber chip belongs to the relatively weak category due to the London force (attraction between the induced dipoles) among the van der Waals forces. Therefore, it is necessary to make as much area as possible within the reach. For that purpose, it is necessary to prepare a member excellent in copying property. Moreover, since an impact is likely to cause a drop, a material having as high an impact absorption as possible is preferable.

  Since the rubber chip has a relatively poor thermal conductivity, generally, in die bonding by a collet using a rubber chip, heating is performed from the wiring board side, that is, the bonding stage side.

6. Description of the two-stage die bonding process (mainly see FIGS. 62 to 65)
In the above description, the method of completing the thermocompression bonding with one bonding tool (collet 105) has been shown. However, a plurality of chips (for example, five) are temporarily attached with the first bonding tool (collet 105), and then, If the plurality of chips are finally pressure-bonded with the second bonding tool, the throughput can be increased several times. Further, in the temporary crimping combined with the low-elasticity rubber chip described in section 5, even when operated at a high speed, there is little damage to the chip, so that a high-speed temporary crimping can be performed. (It goes without saying that a low-elasticity rubber tip can also be used for the crimping bonding tool 305.) This will be described in detail below.

  FIG. 62 is a top view showing a configuration of the integrated peeling / die bonding apparatus 400. The chip peeling part 100 (pickup part) described above is on the left side of the figure, and the die bonding part 300 is on the right side, and the temporary bonding part 300a and the main pressure bonding part 300b are included therein. The temporary bonding part 300a is provided with a temporary bonding stage 132a. On the other hand, the main press bonding part 300b is provided with a vertically long main press bonding stage 132b.

  The AA cross section of FIG. 62 is shown in FIGS. 63 to 65 to describe the two-stage die bonding process. As shown in FIG. 63, the peeled chip 1j is transferred by the collet 105 above the wiring substrate 11a on the temporary bonding stage 132a. Next, as shown in FIG. 64, the collet 105 descends and temporary pressure bonding (pressure bonding state in which the position is fixed by the adhesive member layer) is performed in a short time (pressurization time, for example, about 0.1 second). At this time, if the timing is correct, the main pressure bonding tool 305 performs the main pressure bonding of the chips 1a to 1e to the substrate 11b. Since the main bonding requires more time than the temporary bonding (for example, pressurization time of about 4 seconds), the collet 105 reciprocates between the pickup unit 100 and the temporary bonding unit 300a several times during this time, and the chips 1f to 1j Temporary pressure bonding can be completed (see FIG. 65). When completed, the collet 105 moves to the peeling stage for the next chip 1k peeling.

  In addition, as described above, the provisional pressure bonding stage and the main pressure bonding stage are about 100 degrees Celsius to 150 degrees Celsius (the glass transition temperature of the organic wiring substrate is generally about 240 degrees Celsius to 330 degrees Celsius, The heating temperature can be about 100 to 200 degrees Celsius, but is preferably about 100 to 150 degrees Celsius in order to minimize the deformation of the substrate, but at least below the glass transition temperature of the substrate. It is necessary to be warm). The main bonding tool 305 is also heated to the same temperature or a temperature higher by about 50 degrees Celsius. Therefore, unlike the temporary crimping collet, the lower end portion of the final crimping bonding tool 305 can be composed of a member having a relatively good heat conduction, and silicon or the like constituting the chip has a relatively good heat conduction. Since it is a member and can be efficiently heated, the thermocompression bonding can proceed smoothly.

7). Description of modification of collet vacuum suction system (mainly see FIGS. 66, 67 and 52)
The vacuum suction system of the collet 105 described so far is a completely closed type (the valve 143 in FIG. 31 is connected to a vacuum source when it is on, and is disconnected from the vacuum source when it is off and is open to the atmosphere. However, what is described here is an improved type in which a leak hole 221 is provided in a region relatively close to the rubber tip of the collet body 105, as shown in FIG. This has the effect of speeding up the pressure response of the collet tip when adsorption is turned off (of course, the vacuum suction system of the collet 105 described so far is also disconnected from the vacuum source and released into the atmosphere when off. In general, however, switching between the vacuum source and the atmosphere release is performed by the switching valve 143 placed closer to the vacuum source than the collet tip, so a slight delay is inevitable. It took about 40 to 100 milliseconds, that is, if a leak path is permanently installed at the tip of the collet, even if the leak path is relatively thin, only the conductance of the vacuum channel to the switching valve 143 is required. Pressure response is faster). Also, always use a leak path (for example, a leak path with a hole diameter of about 0.3 mm, a flow rate of 0.4 L / min when only the leak path is opened, and a pressure of 84 kPa. Incidentally, a rubber chip with a hole diameter of about 0.8 mm. When all of the suction holes are opened, the flow rate is about 7.0 L / min.), So that the impact on the chip due to the impact when the vacuum suction system is closed by the chip can be mitigated. That is, when a relatively soft elastomer as described in section 5 is used as a rubber tip, the vacuum sealability is very good, and the vacuum recovers from the state where the tip is bent and leaks. There is concern that the impact when closing the door is relatively large. However, in this case, since there is always a leak path, the vacuum suction system is not completely closed, so that it is considered that there is little possibility that a strong impact is applied to the chip. In addition, if there is a leak hole, the response is fast, so even if the vacuum suction is turned off immediately before landing, the chip distortion can be sufficiently prevented at the time of landing. Further, when a rubber tip made of a low elastic member is used, the recovery from the bending is performed more smoothly in combination with the recovery force of the low elastic member.

The detailed procedure will be described below with reference to FIG. As described above, in FIG. 66, first, a pickup operation is started in the pickup section (pickup operation start step 211 in FIG. 66, hereinafter the same FIG. 66). First, the dicing tape 4 is adsorbed to the lower base 102 (DC tape adsorbing step 212). Collet 105 at time t ₁₁ in FIG. 52 starts to decrease and come on the chip 1 of interest. Switches to slow descent at time _{t 12.} Then, evacuation of the collet 105 is started at time _{t 13.} Came the collet 105 is lowered while vacuum suction at time _{t 14,} lands on the chip 1 (collet adsorption start step 213). Immediately after, increase in operating and collet 105 Choke time _{t 15} is started. The time boosting operation at t ₁₆ is returned to the block Choke time ended t ₁₇ original collet 105 if there is no problem to complete the peeling as it continues to rise. After complete peeling, at time t ₁₈ , the collet 105 increases its ascent speed and reaches a predetermined translational height at time t ₁₉ . That is, the collet 105 ascends while being held by the vacuum suction by the rubber chip 125 (pickup step 214). After rising to a predetermined height, the collet 105 moves above the die bonding position, that is, above the wiring substrate 11 on the bonding stage 132 (moving above the bonding position). From time t ₂₀ , the collet 105 starts to descend while being held by vacuum suction with the rubber tip 125. It switched to the low speed drop at time _{t 21.} This is the final landing position. Is evacuated off the collet at time t ₂₂ (suction off step 216), the chip 1 is lowered while being held only in a substantially intermolecular force (physical adsorption) to rubber tip 125. Chip 1 at time _{t 23} is landed on the wiring board 11 (landing step 217). When landing is confirmed at time t24, a bonding load is applied to the collet 105 (bonding step 218). When bonding is completed at time t25, the collet starts to rise. The predetermined parallel movement altitude is reached at time t26. Thereafter, the collet 105 moves to the pickup unit again for the next chip peeling.

8). Explanation of modification examples such as rubber tip shape (mainly refer to FIG. 68 to FIG. 71)
What is described in this section is the collet rubber tip shape described in FIGS. 32 to 37, 39 to 40, 42, 44, 46 to 48, 53 to 60, 63 and 67, and others. It is about improvement. These features are that the outer part of the main part including the center of the rubber chip is provided with a thinner peripheral part (jaw) than that to increase the flexibility of the outer edge of the rubber chip. The rubber chip holding characteristics are improved so that leakage does not occur. This can reduce die cracks and the like during pickup. Further, since the standby time and the number of retries are reduced, the processing time can be shortened.

  Further, the hardness of the elastomer constituting the rubber chip in this case is the same as that described in section 5, but when the followability of the peripheral portion is high, it is slightly increased, that is, about 25 or more and less than 65. Tend to be preferred. In the method of using the physical adsorption to cut the vacuum suction before landing, the micro average distance between the die and the rubber chip increases, so that the physical adsorption becomes unstable when the hardness exceeds 70.

8-1. Explanation of rubber chip shape with less leakage (mainly FIGS. 68 to 70)
FIG. 68 is a schematic cross-sectional view (FIG. 69 or FIG. 69) showing a state in the middle of a die pick-up step (using a rubber chip having a peripheral jaw) in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. 70 corresponding to the AA cross section). FIG. 69 is a bottom view (specific example a) of the rubber chip corresponding to FIG. FIG. 70 is a bottom view (specific example b) of the rubber chip corresponding to FIG. Based on these, the rubber chip shape with less leakage will be described.

  First, an example will be described in which the die is pushed up from below and pushed up by the blocks 110a, 110b, and 110c (push-up block 110, that is, the portion immediately below the die 1a of the lower base 102). As shown in FIGS. 68 and 69, the rubber chip 125 is divided into a central rubber chip main part 125a and a peripheral ring-shaped rubber chip peripheral part 125b (on the lower surface side of the rubber chip 125). It is a feature. The rubber chip peripheral portion 125b is thinner than the rubber chip main portion 125a. This is so that the periphery of the die 1a can be followed when it is pulled downward by the dicing tape 4 and deformed downward. For this reason, each of the vacuum suction holes 106b, 106c, 106d, 106e, 106f, 106g, 106h, and 106i around the rubber chip main portion 125a has a vacuum suction groove extending on the lower surface of the rubber chip peripheral portion 125b. 421.

  The width of the rubber chip peripheral portion 125b is such that the die deformation margin width M outside the push-up block 110a (with the deformation of the dicing tape 4, the locality radius of the corresponding die 1a, 1b, 1c becomes too small). It is preferable that the margin width is such that the die is not cracked (same for the slide method) (for example, about 0.5 to 0.7 millimeters). The thickness of the lower jaw L of the rubber tip peripheral portion 125b is 0.5 to 2 mm when the hardness of the elastomer is about 50 (for example, the rubber tip thickness is 3 to 5 millimeters). -About a meter is suitable. The above points are almost the same for the rubber chip described in the subsection (10-3).

  The shape of the lower surface can also be as shown in FIG. As shown in FIG. 70, a single ring-shaped vacuum suction groove 421 may be connected to the vacuum suction holes 106b, 106c, 106d, 106e, 106f, 106g, 106h, and 106i. With this structure, followability to die deformation and vacuum adsorbability are improved. However, the durability and the like are better in FIG.

  That is, according to the rubber chip having such a shape, since the suction area around the die 1a is large, the suction force on the periphery of the die is greatly improved. Therefore, as shown in FIG. 40B, FIG. 42D, FIG. 44D, or FIG. 48B, vacuum suction can be maintained even in a situation where leakage usually occurs. The processing speed can be improved by reducing the number of times. In addition, since the stress that causes the die to deform downward can be canceled out by the vacuum suction force, die cracking and chipping can be reduced.

8-2. Other rubber chip shapes with less leakage (mainly Figure 71)
FIG. 71 is a schematic cross-sectional view showing a state during the die pick-up process (using another rubber chip having a peripheral jaw) in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. Based on this, another example of a rubber chip shape with less leakage will be described. Compared with that of the subsection (8-1), this shape has a feature that the portion to be fixed to the collet at the upper peripheral portion of the rubber chip is thick, so that it is easy to manufacture and fix. The planar shape of the lower surface is the same as that in FIG. 69 or 70, and description thereof will not be repeated.

  As shown in FIG. 71, there is a ring-shaped groove 422 between the upper surface and the lower surface of the rubber chip peripheral portion 125b. Since this ring-shaped groove 422 is provided, workability is improved while securing followability of the lower jaw, and attachment (holdability) to the collet 105 is facilitated. The dimensions and the like of the jaw are almost the same as those in the subsection (8-1). About the dimension of the ring-shaped groove | channel 422, what can ensure the followable | trackability of a lower jaw part is sufficient.

8-3. A preferred example of a planar relationship between a rubber chip and a die used in a die pick-up process in the method of manufacturing a semiconductor integrated circuit device according to each embodiment of the present invention (mainly FIG. 72)
A preferred planar relationship between a rubber chip and a die used in the die pick-up process in the method of manufacturing a semiconductor integrated circuit device according to each embodiment of the present invention will be specifically described by taking a rubber chip 125 of FIG. 69 as an example. To do. That is, as shown in FIG. 72, it is important from the viewpoint of preventing cracks in the die that the die 1 (semiconductor chip) to be attracted and the outer periphery of the lower surface of the rubber chip 125 have substantially the same shape and size. . However, even if it is an equivalent shape and size, if the rubber chip 125 directly touches a minute crack or a damaged part generated at the time of dicing, there is a possibility of picking up a silicon piece or the like. Therefore, from the viewpoint of reducing dust and the like, it is effective to make the outer periphery of the lower surface of the rubber chip 125 slightly inside the outer periphery of the die 1 (for example, about 0.4 millimeters).

9. Summary The invention made by the present inventor has been specifically described by taking a square silicon chip as an example based on the embodiment. However, the present invention is not limited thereto, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  For example, it goes without saying that the present invention can be similarly applied to picking up electronic chips on rectangular chips, chips of other shapes, chips other than silicon such as GaAs chips, and other chips.

It is a perspective view of the semiconductor chip used for the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is a side view which shows the grinding process of a semiconductor wafer. It is a side view which shows the process of affixing a dicing tape on a semiconductor wafer. It is a side view which shows the dicing process of a semiconductor wafer. It is a top view which shows the state which fixed the semiconductor wafer and the dicing tape to the wafer ring, and has arrange | positioned the pressing plate above it and arrange | positioned the expand ring below. It is sectional drawing which shows the state which fixed the semiconductor wafer and the dicing tape to the wafer ring, has arrange | positioned the press plate above it, and has arrange | positioned the expand ring below. It is sectional drawing which shows the state which gave the tension | tensile_strength of the dicing tape by pinching | interposing a dicing tape with a wafer ring with a pressing plate and an expand ring. It is principal part sectional drawing of the chip | tip peeling apparatus explaining the peeling method of the semiconductor chip which affixed the dicing tape. It is sectional drawing which shows the adsorption | suction piece of a chip | tip peeling apparatus. It is an expanded sectional view near the upper surface of a suction piece. It is an expansion perspective view of the upper surface vicinity of an adsorption | suction piece. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expansion perspective view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is sectional drawing of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expansion perspective view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is sectional drawing of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expansion perspective view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is sectional drawing of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is an expanded sectional view of the upper surface vicinity of the adsorption | suction piece explaining the peeling method of a semiconductor chip. It is sectional drawing which shows a mode that the semiconductor chip peeled in FIG. 23 is conveyed to a die-bonding part. FIG. 24 is a cross-sectional view showing a state where the semiconductor chip peeled in FIG. 23 is conveyed to a die bonding unit and landed on a wiring board. It is sectional drawing which shows the place which the semiconductor chip peeled in FIG. 23 was bonded to the wiring board in the die bonding part. It is sectional drawing of the wiring board which shows the pelletizing process of a semiconductor chip. It is sectional drawing of the wiring board which shows the lamination | stacking of a semiconductor chip, and a wire bonding process. It is sectional drawing of the wiring board which shows the resin sealing process of a semiconductor chip. (A)-(c) is sectional drawing of the upper surface vicinity of the adsorption | suction piece explaining the other example of the peeling method of a semiconductor chip. (A) And (b) is explanatory drawing for demonstrating the principle of the peeling method of a semiconductor chip. (A) And (b) is a top view which shows the structure of each example of a rubber chip | tip, a pushing-up block, and a collet main body. (a) And (b) is a top view which shows the structure of a rubber chip, each other example of a pushing-up block, and a collet main body. It is sectional drawing explaining the state of the AA cross section of FIG. 33 or FIG. It is sectional drawing explaining the state of the BB cross section of FIG. 33 or FIG. (a) And (b) is a top view which shows each other example of a rubber chip | tip, a pushing-up block, and the structure of a collet main body. It is sectional drawing explaining the state of the AA cross section of FIG. It is sectional drawing explaining the state of the BB cross section of FIG. It is a processing flowchart which shows the peeling process (example using the three-stage lift stage of subsection 3-2) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is a schematic cross-sectional flowchart which shows the peeling process (example using the 3 step | paragraph lift stage of subsection 3-2) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is a schematic cross section of the state immediately after peeling which shows the peeling process (push-up of subsection 3-1 & gas blow peeling) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. They are the nozzle cross-sectional shape (FIG. 41 (a)) and front shape (FIG. 41 (b)) of the gas blow nozzle in FIG. FIG. 6 is a processing block flow diagram showing a peeling process (a push-up & gas blow peeling using a single horizontal lift stage in subsection 3-3) in a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention. is there. FIG. 44 is a cross-sectional flowchart of the main part of the peeling apparatus corresponding to the processing block flowchart of FIG. 43. 44 is an operation timing chart showing an operation of the peeling apparatus corresponding to the processing block flowchart of FIG. 43. FIG. FIG. 5 is a processing block flow diagram showing a peeling process (a push-up & gas blow peeling using a single inclined lift stage in subsection 3-4) in a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention; is there. FIG. 47 is a cross-sectional flowchart of the main part of the peeling apparatus corresponding to the processing block flowchart of FIG. 46. It is an operation | movement timing chart which shows operation | movement of the peeling apparatus corresponding to the process block flowchart of FIG. 47 is a perspective flow for explaining the operation of the lift stage (main part of the lower substrate) of the peeling apparatus corresponding to the processing block flowchart of FIG. It is sectional drawing of the principal part of the peeling apparatus which shows the peeling process (The push-up & gas blow peeling using the push-up pin of the subsection 3-5) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is a step flow figure explaining the die bonding procedure in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of the present invention. 6 is a time chart for explaining a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 3 is a first schematic cross-sectional flow diagram illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 3 is a schematic cross-sectional flow diagram 2 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 6 is a schematic cross-sectional flow diagram 3 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 6 is a schematic cross-sectional flow diagram 4 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 6 is a schematic cross-sectional flow diagram 5 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 7 is a schematic cross-sectional flow diagram 6 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 9 is a schematic cross-sectional flow diagram 7 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention; FIG. 9 is a schematic cross-sectional flow diagram 8 illustrating a die bonding procedure in the method for manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention; It is a hardness comparison figure between each standard regarding the material of the rubber chip used for die bonding in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of the present invention. It is a model top view which shows the structure of the chip | tip peeling & die bonding integrated apparatus used for the step die bonding method in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. FIG. 3 is a first cross-sectional step flow diagram showing the flow of the step die bonding method in the method of manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention; FIG. 6 is a second cross-sectional step flow diagram showing the flow of the step die bonding method in the method of manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. FIG. 7 is a third cross-sectional step flow diagram showing the flow of the step die bonding method in the method of manufacturing a semiconductor integrated circuit device according to one embodiment of the present invention. It is a step flow figure explaining the modification of the die bonding procedure in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is sectional drawing of the collet used for the modification of the die bonding procedure in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. It is a schematic cross section which shows the mode in the middle of the die pick-up process (what uses the rubber chip which has a peripheral jaw part) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. FIG. 69 is a bottom view (specific example a) of a rubber chip corresponding to FIG. 68; FIG. 69 is a bottom view (specific example b) of the rubber chip corresponding to FIG. 68; It is a schematic cross section which shows the mode in the middle of the die pick-up process (what uses the other rubber chip which has a peripheral jaw part) in the manufacturing method of the semiconductor integrated circuit device which is one embodiment of this invention. A preferred example of the planar relationship between a rubber chip and a die used in the die pick-up process in the method of manufacturing a semiconductor integrated circuit device according to each embodiment of the present invention (specifically taking the rubber chip of FIG. 69 as an example) It is a top view explaining (Description).

Explanation of symbols

1,1a ~ 1k Semiconductor chip (die)
1A Wafer 1A 'Chip formation region 2a First side of chip 2b Second side of chip (side opposite to first side)
3 Back Grinding Tape 4 Dicing Tape 5 Wafer Ring 6 Dicing Blade 7 Holding Plate 8 Expanding Ring 10 Adhesive Member Layer or Adhesive 11 Wiring Board 12, 15 Au Wire 13, 16 Electrode 14 Second Chip 17 Mold Resin 18 Multilayer Package 21 Gas flow sensor 31 Tape adsorption 32 Collet landing 33 First stage rise 34 Leak detection 35 Second stage rise 36 Leak detection 37 Final stage rise 38 Leak detection 39 Complete peeling 40 Peeling part 40a Initial peeling part 40b Peeling enlargement part 40t Peeling enlargement 41 Ionized gas blow (for delamination) (ionized air blow)
42 Gas Blow Nozzle 43 Gas Blow Nozzle Opening 44 Ionized Gas Supply Port 51 DC Tape Adsorption Start 52 Cooling Blow 53 Collet Landing 54 Pushing Member Lift 54a Pushing Block First Side Lifting 54b Pushing Block Second Side (opposite side) Rise 55 Leak check 56 Gas blow 57 Leak check 58 Collet rise 61 Ionized gas blow (for cooling) (Ionized air blow)
100 Chip peeling device (chip peeling part)
101 Stage 102 Suction piece (lower base)
102a Lower substrate peripheral portion 103 Suction port 104 Groove 105 Suction collet 106, 106a to 106w Suction port 107 Vacuum suction system 110 Push-up block (lower base main part, lift stage, or push-up member)
110a Outside push-up block (push-up member)
110b Intermediate push-up block (push-up member)
110c Inner push-up block (push-up member)
110x push-up pin (push-up member)
111a, 111b Compression coil spring 112 Pusher 121 Vacuum suction groove 125 Rubber chip 125a Rubber chip main part 125b Rubber chip peripheral part 132 Die bonding stage 132a Temporary bonding stage 132b Main pressure bonding stage 133 (from between suction collet and chip) Leak 141 Vacuum supply pipe 143 Valve 144 Pickup unit control system 201 Pickup operation start step 202 DC tape suction step 203 Collet suction start step 204 Pickup step 205 Step upward bond position 206 Adsorption off step 207 Landing step 208 Bonding step 211 Pickup operation start step 212 DC tape suction step 213 Collet suction start step 214 Pick-up step 215 Step to move upward of bond position 216 Adsorption off step 217 Landing step 218 Bonding step 221 Leak hole 300 Die bonding part 300a Temporary bonding part 300b Main crimping part 305 Final crimping bonding tool 400 Separation / die bonding Integrated device 421 Ring-shaped vacuum suction groove 422 Ring-shaped groove S Gap θ Gas blow blowing angle

Claims (14)

A method of manufacturing a semiconductor integrated circuit device including the following steps:
(A) A step of supplying a plurality of chips divided into individual chip regions to a chip processing apparatus with their back surfaces fixed to an adhesive tape while maintaining the two-dimensional arrangement of the original wafer.
(B) In a state where the surface of the first chip of the plurality of chips is vacuum-adsorbed with an adsorption collet, and the adhesive tape on the back surface of the first chip is vacuum-adsorbed on the upper surface of the lower base, Peeling the adhesive tape from the back surface of the first chip;
Here, the step (b) includes the following substeps:
(B1) A step of forming a peeling portion between the periphery of the back surface of the first chip and the adhesive tape by pushing up the back surface of the first chip with a push-up member through the adhesive tape. ;
(B2) A step of enlarging the peeling portion by supplying a first gas blow from a nozzle toward the peeling portion. In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the step (b) further includes the following substeps:
(B3) After the lower step (b1), it is confirmed that there is substantially no vacuum leak from between the surface of the first chip and the adsorption collet, and then the process proceeds to the lower step (b2). Process.     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the first gas blow is formed using an ionized gas.     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the first gas blow is supplied from a first side direction of the first chip. The method for manufacturing a semiconductor integrated circuit device according to the item 1 further includes the following steps:
(C) After the step (a) and before the step (b), the suction collet and the first collet are not in contact with the surface of the first chip. Supplying a second gas blow from the nozzle between the surfaces of the chip;     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the load applied to the adsorption collet in the sub-step (b2) is set to a strength that raises the adsorption collet by the action of the first gas blow. Has been.     In the method for manufacturing a semiconductor integrated circuit device according to the item 1, the load on the suction collet in the substep (b2) is 0.3 to 1.5N.     In the method for manufacturing a semiconductor integrated circuit device according to the item 1, a load applied to the adsorption collet in the substep (b2) is 0.5 to 1.0 N.     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the spray angle of the first gas blow is 5 degrees or more and 30 degrees or less.     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, the spray angle of the first gas blow is 10 degrees or more and 25 degrees or less.     In the method for manufacturing a semiconductor integrated circuit device according to the item 1, the push-up member lifts the first chip substantially flat.     In the method of manufacturing a semiconductor integrated circuit device according to the item 4, the push-up member lifts the first chip in an inclined manner so that the first side becomes higher.     In the method for manufacturing a semiconductor integrated circuit device according to the item 1, the push-up member is a push-up pin.     In the method of manufacturing a semiconductor integrated circuit device according to the item 1, in the step (b), the outer periphery of the suction collet is inside the outer periphery of the first chip.

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