JP2010119020A - Method of driving image sensor - Google Patents

Abstract

The present invention provides a method for driving an image sensor, in which current consumption can be suppressed and output noise during darkness can be reduced.
For example, a chip selection control signal Gate1 (Tin) including a first pulse and a second pulse is supplied from a TG12 to a first-stage CCD1, and operations of other CCDs 2 to 15 are stopped. The CCD 1 starts the color advance scanning in response to the first pulse and sweeps out the residual charge accumulated in the charge transfer unit. Thereafter, the CCD 1 starts actual scanning in response to the second pulse, shifts the signal charge obtained by the photoelectric conversion unit to the charge transfer unit, and horizontally transfers the signal charge at the charge transfer unit. Thus, an image signal output OS is generated. Further, the CCD 1 outputs a similar chip selection control signal Tout (Tin) to the next-stage CCD 2 based on the second pulse. Thus, similar operations are repeated in the CCD2 to CCD15.
[Selection] Figure 4

Description

  The present invention relates to a method for driving an image pickup device. For example, the present invention relates to a contact image sensor module (Contact Image Sensor Module (hereinafter referred to as CISM)) or a package type image sensor used in an MFP (Multi Function Peripheral) or the like. The present invention relates to a driving method of a built-in one-dimensional CCD (Charged Coupled Device) image sensor.

  2. Description of the Related Art Conventionally, a CCD image sensor is known as an image sensor that electrically reads an image projected on an imaging surface by replacing an optical signal with an electric signal. In the CISM, driving of a plurality of CCD image sensors arranged on the imaging surface is controlled by a single timing generator (hereinafter referred to as TG).

  In the case of a CCD image sensor, there is an electric charge that occurs naturally even in the dark, which causes dark output noise. For this reason, in the conventional CISM, all CCD image sensors are driven simultaneously to sweep out (forcibly discharge) residual charges accumulated in the charge transfer unit in the dark, thereby generating dark output noise. I was holding it down.

  However, by simultaneously driving all the CCD image sensors, a large driving current (consumption current) is required, and the load on the TG becomes large. Moreover, due to the heat generated by the TG and the CCD image sensor, the dark output noise, which is a characteristic of the CCD image sensor, tends to increase, which is a factor that reduces the effect of “charge sweeping”, which is a dark output noise reduction measure. .

  On the other hand, in order to suppress the current consumption of the CCD image sensor and the TG, a method of driving the CCD image sensor to be scanned only during the actual scanning period can be considered. In the case of this method, for example, the supply of timing signals (CK1, CK2) from the TG for controlling charge transfer in the CCD image sensor to the CCD image sensor during the non-scanning period may be cut off. However, when the supply of the timing signals (CK1, CK2) is cut off, there is a problem that charges during the non-scanning period are accumulated in the charge transfer section and the dark output noise increases.

  As described above, in the conventional CISM, all the CCD image sensors are driven at the same time, resulting in an increase in current consumption and an increase in dark output noise due to an increase in heat generation. In order to avoid this, even when a method of driving only the CCD image sensor to be scanned is employed, residual charges accumulate during the non-scanning period, resulting in an increase in dark output noise.

As an image sensor with low power consumption, a proposal has already been made to stop the supply of a horizontal transfer clock during a blanking period of a horizontal transfer unit that transfers pixel charges in the horizontal direction (for example, Patent Document 1). reference). However, this proposal is a method of transferring pixel charges from a light receiving unit in which a plurality of light receiving elements are arranged in a matrix to a horizontal transfer unit through a vertical transfer unit, and CISM is a method (configuration). Different. Moreover, when the horizontal transfer clock is stopped, the pixel charge during the horizontal scanning blanking period is accumulated in the horizontal transfer unit, and there is a similar problem that output noise in the dark increases.
JP 2004-235691 A

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method for driving an image sensor that can suppress current consumption and reduce dark output noise.

  According to one aspect of the present invention, there is provided a driving method of an image sensor for capturing a single image by controlling a plurality of image sensors arranged on an imaging surface and connected in series. Among the image pickup elements, an element selection control signal including a first scan start signal and a second scan start signal that are effective in two scanning periods is given to the first stage image pickup element, and is selected by the element selection control signal. In response to the first scanning start signal, the signal charge obtained by the photoelectric conversion unit that converts the optical signal into an electrical signal is transferred to the charge transfer unit, and the charge transfer unit Output to the charge transfer unit of the signal charge obtained by the photoelectric conversion unit corresponding to the second scanning start signal for the image sensor selected by the element selection control signal. Transfer of the above and From the image sensor selected by the element selection control signal while allowing the output of the image signal from the load transfer unit and prohibiting the horizontal transfer of the signal charge in the charge transfer unit of the non-selected image sensor. In response to the second scanning start signal, there is provided a method of driving an image sensor, wherein the element selection control signal is output to the next-stage image sensor in a non-selected state.

  Moreover, according to one aspect of the present invention, there is provided a method of driving an image sensor for capturing a single image by controlling a plurality of image sensors that are arranged on an imaging surface and connected in series. Among the plurality of image sensors, an element selection control signal indicating that the image sensor is selected is given to the first image sensor, and the first image sensor is selected by the element selection control signal. In response to the scanning start signal, the signal charge obtained by the photoelectric conversion unit that converts the optical signal into the electrical signal is transferred to the charge transfer unit, and the output of the image signal from the charge transfer unit is prohibited, and the element For the image sensor selected by the selection control signal, in response to the second scanning start signal, the signal charge obtained by the photoelectric conversion unit is transferred to the charge transfer unit, and from the charge transfer unit Allow image signal output, non- The image pickup device selected is prohibited from horizontal transfer of the signal charge in the charge transfer unit, and the image pickup device selected by the device selection control signal receives a non-transfer signal corresponding to the second scanning start signal. There is provided a method of driving an image sensor, wherein the element selection control signal is output to a next-stage image sensor in a selected state.

  Moreover, according to one aspect of the present invention, there is provided a method of driving an image sensor for capturing a single image by controlling a plurality of image sensors that are arranged on an imaging surface and connected in parallel. Unique identification information is assigned to each of the plurality of image pickup devices, and it is determined that the image pickup device is selected based on a match between the unique identification information and the count value of the scanning start signal. In the first scanning, the transfer of the signal charge obtained by the photoelectric conversion unit that converts the optical signal into the electric signal to the charge transfer unit and the output of the image signal from the charge transfer unit are prohibited and selected. In the second scanning, the image sensor is allowed to transfer the signal charge obtained by the photoelectric conversion unit to the charge transfer unit and to output an image signal from the charge transfer unit. Selected shooting Element, a driving method of an image sensor and inhibits the horizontal transfer of signal charges in the charge transfer portion is provided.

  Furthermore, according to one aspect of the present invention, there is provided a driving method of an image sensor for controlling a plurality of image sensors that are arranged on an imaging surface and connected in series with each other, Among the plurality of image sensors, an element selection control signal indicating that the image sensor is selected according to the count value is given to the first-stage image sensor, and the count value of the element selection control signal and the scan start signal A signal obtained by a photoelectric conversion unit that determines that the image sensor has been selected based on a match with the count value and converts the optical signal into an electrical signal during the first scan for the selected image sensor. The transfer of charges to the charge transfer unit and the output of image signals from the charge transfer unit are prohibited, and the signal charge obtained by the photoelectric conversion unit during the second scan of the selected image sensor The charge transfer part of Transfer and image signal output from the charge transfer unit are permitted, and the non-selected image sensor is prohibited from horizontally transferring signal charges in the charge transfer unit, and the selected image sensor Accordingly, there is provided a method for driving an image sensor, wherein an element selection control signal whose count value changes by “1” is output to the next image sensor in a non-selected state.

  With the above configuration, it is possible to provide a method for driving an image sensor that can suppress current consumption and reduce dark output noise.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, it should be noted that the drawings are schematic, and the dimensions and ratios of the drawings are different from the actual ones. Moreover, it is a matter of course that the drawings include portions having different dimensional relationships and / or ratios. In particular, some embodiments described below exemplify apparatuses and methods for embodying the technical idea of the present invention, and the technology of the present invention depends on the shape, structure, arrangement, etc. of components. The idea is not specified. Various changes can be made to the technical idea of the present invention without departing from the gist thereof.

[First Embodiment]
FIG. 1 shows the basic configuration of a CISM used in an MFP or the like according to the first embodiment of the present invention. Here, a case in which one TG and 15 CCD image sensors (CCD chips) are included (a CISM having a 15-chip configuration) will be described as an example. In particular, by using a chip selection control signal for selecting a CCD image sensor, the residual charge accumulated in the non-scanning period in the charge transfer unit of the CCD image sensor to be scanned is swept immediately before the actual scanning period. In this example, the current consumption is suppressed and the output noise during darkness is reduced. Note that “immediately before” refers to a period (timing) from the selection of the CCD image sensor to the start of actual scanning.

  1, the CISM 11 has one TG 12 and 15 CCD image sensors (CCD1, CCD2,..., CCD14, CCD15) 13a, 13b,..., 13n, 13o. Each of the CCD image sensors 13a, 13b,..., 13n, 13o is a one-dimensional imaging device that electrically reads out an image projected on the imaging surface by replacing an optical signal with an electrical signal. They are arranged in a horizontal row (series connection) with respect to the imaging surface. Details of the CCD image sensors 13a, 13b,..., 13n, 13o will be described later.

  The TG 12 controls driving of all the CCD image sensors 13a, 13b,..., 13n, 13o, and shift clocks (scanning) for the CCD image sensors 13a, 13b,. A start signal SHCK, an OS (output) gate control signal GCK, and charge transfer clocks CK1 and CK2 are supplied. The shift clock SHCK is a signal charge shift control signal that defines one scanning period and shifts the signal charges of the photodiode portions of the CCD image sensors 13a, 13b,..., 13n, 13o to the charge transfer portion. The gate control signal GCK is for controlling the OS gate of the CCD image sensors 13a, 13b,..., 13n, 13o from a high impedance (disable) state to a signal output (enable) state. The charge transfer clocks CK1 and CK2 are for horizontally transferring the signal charges shifted to the charge transfer units of the CCD image sensors 13a, 13b,..., 13n, 13o.

  The TG 12 outputs a chip selection control signal Gate1 indicating which CCD image sensor is selected only for the first-stage CCD image sensor (CCD1) 13a. In the case of the present embodiment, the chip selection control signal Gate1 corresponds to two scanning periods (two cycles of the shift clock SHCK) and becomes valid once in each scanning period. For example, the chip selection control signal Gate1 corresponds to the first pulse (first scan start signal) for charge sweeping (color feed scanning) corresponding to the first pulse of the shift clock SHCK and the second pulse. And a second pulse (second scan start signal) for actual scanning. This chip selection control signal Gate1 is generated in TG12 by repeatedly dividing a reference pulse signal (for example, scanning start pulse TR) and obtaining a logical sum of two types of pulse signals having appropriate pulse widths.

  That is, for example, the TG 12 is based on the scan start pulse TR supplied from an external MFP system (not shown), the shift clock SHCK, the OS gate control signal GCK, the charge transfer clocks CK1, CK2, And the generation (output) of the chip selection control signal Gate1 is controlled.

  An analog data bus (@CISM) ADB is provided in the substrate of the CISM 11. The analog data bus ADB has an emitter follower-connected NPN transistor Tr1 and a resistance element r1 connected in series between a power supply Vdd and a ground Vss. The image signal output OS from the CCD image sensors 13a, 13b,..., 13n, 13o supplied via the analog data bus ADB is a CISM output (one image obtained by connecting a plurality of image signals). Are taken out from the connection point between the NPN transistor Tr1 and the resistance element r1.

  FIG. 2 shows a configuration example of the CCD image sensors 13a, 13b,..., 13n, 13o. In the case of the present embodiment, the CCD image sensors 13a, 13b,..., 13n, 13o have the same configuration, and therefore the CCD image sensor 13a will be described as an example here.

  The CCD image sensor 13a includes a photodiode unit (photoelectric conversion unit) 13-1, a charge transfer unit 13-2, a controller 13-3, a switch unit 13-4, a reading unit 13-5, an OS gate 13-6, and R, G, B LEDs (not shown) are included.

  The photodiode unit 13-1 converts an optical signal into an electric signal at the time of scanning, and shifts the obtained signal charge to the charge transfer unit 13-2 (charge transfer). The charge transfer unit 13-2 horizontally transfers the signal charge from the photodiode unit 13-1 and outputs it to the reading unit 13-5. The reading unit 13-5 amplifies the signal charge from the charge transfer unit 13-2. The OS gate 13-6 sends the amplified output from the reading unit 13-5 onto the analog data bus ADB as an image signal output OS.

  The controller 13-3 is configured by a flip-flop (FF) circuit having a CCD gate control input signal Tin as a gate input. For example, the shift clock SHCK and the OS gate control signal GCK from the TG 12 and the preceding CCD The CCD gate control input signal Tin from the image sensor is taken in, and the SHIFT signal, the OS Enable signal, the SWITCH signal, and the CCD gate control output signal Tout that becomes the CCD gate control input signal Tin of the next CCD image sensor are obtained. Is to be generated.

  In the case of the present embodiment, each CCD image sensor 13a, 13b,..., 13n, 13o directly receives the CCD gate control input signal Tin from the preceding CCD image sensor, and the CCD gate to the next CCD image sensor. A control output signal Tout is output.

  The CCD gate control input signal Tin given to the first-stage CCD image sensor 13a is the chip selection control signal Gate1 from the TG12.

  The switch unit 13-4 controls (switches) the supply of the charge transfer clocks CK1 and CK2 from the TG 12 to the charge transfer unit 13-2 in accordance with the SWITCH signal from the controller 13-3. The supply of the charge transfer clocks CK1 and CK2 to the external charge transfer unit 13-2 is cut off. That is, for the charge transfer unit 13-2, according to the SWITCH signal generated based on the CCD gate control input signal Tin, the internal charge transfer clock CK1 ′, CK2 ′ is supplied.

  FIG. 3 shows the operation timing of the CISM 11 taking the CCD image sensor 13a as an example. For example, in response to the input of the scan start pulse TR, the shift clock SHCK, the OS gate control signal GCK, the charge transfer clocks CK1 and CK2, and the chip selection control signal Gate1 are generated by the TG12. In the present embodiment, the first pulse (high level) of the chip selection control signal Gate1 is generated at the rising timing of the first pulse of the shift clock SHCK, and the rising timing of the second pulse of the shift clock SHCK. Thus, the second pulse (high level) of the chip selection control signal Gate1 is generated. The first pulse becomes low level at the falling timing of the first pulse of the OS gate control signal GCK, and the second pulse becomes low level at the rising timing of the third pulse of the shift clock SHCK. As a result, the charge transfer operation in the CCD image sensor 13a is performed only during the actual scanning period of the second scan and the residual charge sweep-out scanning period (color feed scanning period) which is the first scan immediately before that.

  On the other hand, the CCD image sensor 13a generates a SWITCH signal based on the chip selection control signal Gate1 in the controller 13-3, and controls the switching timing of the switch unit 13-4. The SWITCH signal is used to supply the internal charge transfer clocks CK1 'and CK2' to the charge transfer unit 13-2 only during the charge transfer period. That is, for example, when the shift clock SHCK and the first pulse of the chip selection control signal Gate1 are both at a high level, the SWITCH signal is at a high level only while the shift clock SHCK is at a high level. The SWITCH signal becomes high when both the second pulse of the shift clock SHCK and the chip selection control signal Gate1 are at high level, and remains at high level only while the second pulse is at high level. Thereby, the charge transfer clocks CK1 ′, CK2 outside the charge transfer period for the charge transfer unit 13-2 of the CCD image sensor 13a to be scanned as well as the CCD image sensors 13b,. The supply of 'is blocked. As a result, the TG 12 and the CCD image sensors 13a (13b,..., 13n, 13o) accompanying the supply of the charge transfer clocks CK1 and CK2 during the charge transfer unnecessary period except during the actual scanning period and the color feed scanning period. It is possible to suppress an increase in current consumption and heat generation.

  Further, the controller 13-3 generates a SHIFT signal and an OS Enable signal during the actual scanning period. When the shift clock SHCK and the chip selection control signal Gate1 are both at a high level, the SHIFT signal is at a high level only while the shift clock SHCK is at a high level. Thereby, a shift operation for shifting the signal charge of the photodiode unit 13-1 to the charge transfer unit 13-2 is performed immediately before the actual scanning. Originally, the shift clock SHCK is a signal for shifting the signal charge of the photodiode unit 13-1 to the charge transfer unit 13-2, but the shift operation is not performed during the color feed scanning period by this SHIFT signal. The shift operation is performed only immediately before the actual scanning period.

  The OS Enable signal is at a high level at the rising timing of the OS gate control signal GCK when the chip selection control signal Gate1 is at a high level, and is at a high level while the chip selection control signal Gate1 is at a high level. As a result, the OS gate 13-6 is enabled during the actual scanning period, and the image signal output OS can be sent to the analog data bus ADB. That is, during the color feed scanning period, charges are horizontally transferred through the charge transfer unit 13-2 by the internal charge transfer clocks CK1 'and CK2', but the OS gate 13-6 is set to a high impedance state and the output operation is prohibited. Therefore, the residual charge accumulated in the charge transfer unit 13-2 before starting the actual scanning is not output as the image signal output OS. As a result, it is possible to reduce the residual charge accumulated in the charge transfer unit 13-2 in the dark (during the non-scanning period) becoming dark output noise.

  The controller 13-3 generates the first pulse of the CCD gate control output signal Tout with reference to the second pulse of the shift clock SHCK, and also uses the third pulse of the shift clock SHCK as a reference. The second pulse of the CCD gate control output signal Tout is generated and output to the CCD image sensor 13b at the next stage.

  4 shows operation timings of the CCD image sensors 13a, 13b, 13c,..., 13o in the CISM 11 having the configuration shown in FIG.

  As shown in FIG. 4, the TG 12 first outputs a chip selection control signal Gate1 indicating that the CCD image sensor (CCD1) 13a has been selected as a scanning target. Then, the first-stage CCD image sensor 13a takes in the chip selection control signal Gate1 as the CCD gate control input signal Tin. Then, two scans including the color advance scanning period without the shift operation and the actual scan period with the shift operation described above are executed. That is, during the color feed scanning period, the signal charge is not shifted to the charge transfer unit 13-2, and only the residual charge accumulated in the charge transfer unit 13-2 is replaced with the internal charge transfer clocks CK1 'and CK2. Use 'to perform horizontal transfer (color feed). On the other hand, during the actual scanning period, the signal charge is shifted to the charge transfer unit 13-2, and the signal charge shifted into the charge transfer unit 13-2 is horizontal by the internal charge transfer clocks CK1 ′ and CK2 ′. Forward. Thus, after the dark output noise is swept out, the image signal output OS is read by actual scanning.

  The CCD image sensor 13a outputs a CCD gate control output signal Tout indicating that the CCD image sensor 13b has been selected as a scanning target, to the next stage CCD image sensor (CCD2) 13b.

  The CCD image sensor 13b takes in the CCD gate control output signal Tout from the preceding CCD image sensor 13a as a CCD gate control input signal Tin. Similarly, the CCD image sensor 13b performs two scans including a color feed scanning period and an actual scanning period. Further, a CCD gate control output signal Tout indicating that the CCD image sensor 13c has been selected as a scanning target is output to the next stage CCD image sensor (CCD3) 13c.

  In this way, the CCD gate control output signal Tout indicating that the CCD image sensor 13o has been selected as a scanning target from the CCD image sensor (CCD14) 13n to the final CCD image sensor (CCD15) 13o. Is output. As a result, the CCD image sensor 13o performs two scans including the color advance scanning period and the actual scanning period. However, since the CCD image sensor 13o is the final stage, the CCD gate control output signal Tout is not generated for the next stage CCD image sensor.

  As described above, the chip selection control signal (CCD gate control output signal) is supplied not only during the actual scanning period but also during the two scanning periods including the actual scanning period and the color feed scanning period. That is, as a chip selection control signal, a scanning period for color feeding without a shift operation is provided before an actual scanning period with a shift operation. In addition, in a plurality of CCD image sensors connected in series, the same chip selection control signal is sequentially generated and supplied to the next-stage CCD image sensor. As a result, only the CCD image sensor to be scanned can be selectively driven, and the same control is continuously performed in the entire CISM. Accordingly, it is possible to sweep out the residual charge in the charge transfer unit from all the individually driven CCD image sensors immediately before the actual scanning (during the color feed scanning period), and it is possible to reduce dark output noise. Is. In particular, the supply of the charge transfer clock from the TG outside the charge transfer period is prevented not only for the CCD image sensor that is not to be scanned but also for the CCD image sensor that is to be scanned. For this reason, the operation duty (drive load) decreases and increases according to the number of CCD image sensors driven at the same time. In addition to suppressing current consumption in the TG accompanying the supply of the charge transfer clock, the TG and the CCD image sensor It is possible to suppress an increase in heat generation. Therefore, it is possible to reduce dark output noise that increases with heat generation.

  In the above-described embodiment, the CCD gate control input signal and the CCD gate control output signal including the chip selection control signal need only be able to determine the start timings of the color feed scanning period and the actual scanning period, respectively. It is not necessary to be caught by the length (pulse width) of one pulse and the second pulse.

[Second Embodiment]
FIG. 5 shows a configuration example of a CCD image sensor (CCD chip) constituting the CISM according to the second embodiment of the present invention. In the present embodiment, the internal charge transfer clocks CK1 ′ and CK2 ′ for the first scan and the internal charge transfer clocks CK1 ′ and CK2 ′ for the second scan are generated by knowing the start timing of the first scan. This is an example of such a case. Otherwise, as in the case of the first embodiment, the charge transfer unit of the CCD image sensor to be scanned is accumulated in the non-scanning period immediately before the actual scanning period. By sweeping out the remaining electric charge, current consumption is reduced and dark output noise is reduced. Note that “immediately before” refers to a period (timing) from the selection of the CCD image sensor to the start of actual scanning.

  As shown in FIG. 5, the CCD image sensor 23 of this embodiment includes a photodiode unit 23-1, a charge transfer unit 23-2, a controller 23-3, a switch unit 23-4, a readout unit 23-5, and an OS gate. 23-6, a counter 23-7, and R, G, B LEDs (not shown). In such a configuration, for example, 15 CCD image sensors 23 are connected in series, whereby a 15-chip CISM as shown in FIG. 1 is realized.

  FIG. 6 shows the operation timing of a 15-chip CISM as an example.

  When the CCD image sensor 23 is the first stage (CCD 1), the controller 23-3 takes in a chip selection control signal from a TG (not shown) as a CCD gate control input signal Tin. When the CCD image sensor 23 is not the first stage, the controller 23-3 takes in the CCD gate control output signal (chip selection control signal) Tout from the preceding CCD image sensor as the CCD gate control input signal Tin. Based on the high level of the CCD gate control input signal Tin, the controller 23-3 determines that the CCD image sensor 23 has been selected for scanning.

  On the other hand, the counter 23-7 counts the number of pulses of the OS gate control signal (scanning start signal) GCK from the TG during the period when the CCD gate control input signal Tin is at a high level (enable). This count value (the output of the counter 23-7) is sent to the controller 23-3.

  In the present embodiment, the CCD gate control input signal Tin becomes high level at the falling timing of a certain OS gate control signal GCK and becomes low level at the falling timing of the next OS gate control signal GCK. Therefore, the controller 23-3 can determine the start timing of the first scan (color feed scanning period) based on the output of the counter 23-7. For example, when the CCD gate control input signal Tin is at a high level, the OS gate control signal GCK is counted by 1, and it is determined that it is the start timing of the first scan. Further, when the CCD gate control input signal Tin is at a low level, the OS gate control signal GCK is counted by 1, thereby determining that it is the start timing of the second scanning (actual scanning period).

  Accordingly, the internal charge transfer clocks CK1 ′ and CK2 ′ for the first scan are charged at the timing of the first scan, and the internal charge transfer clocks CK1 ′ and CK2 ′ for the second scan are charged at the timing of the second scan. The switching of the switch unit 23-4 is controlled so as to be output to the transfer unit 23-2. In addition, the timing of the shift operation (SHIFT signal), the timing at which the OS gate 23-6 is turned on and the image signal output OS is sent to the analog data bus ADB (OS Enable signal), and the like are controlled. As a result, as in the case of the first embodiment, it is possible to sweep out the residual charges in the charge transfer unit 23-2 immediately before the actual scanning (during the color feed scanning period). Output noise can be reduced. Note that the timing of the shift operation and the timing of sending the image signal output OS are as described in the first embodiment.

  Further, the controller 23-3 becomes high level at the falling timing of the first OS gate control signal GCK, which becomes the CCD gate control input signal Tin of the next stage CCD image sensor, and controls the second OS gate. A CCD gate control output signal Tout that becomes a low level at the falling timing of the signal GCK is generated and output to the CCD image sensor in the next stage.

  Thus, in each CCD image sensor, at the end of the scanning period of the first scan, scanning is performed by generating the CCD gate control output signal Tout that conveys the timing of the start of the first scanning to the subsequent CCD image sensor. This makes it possible to selectively drive only the CCD image sensor to be subjected to the above, and the same control is continuously performed in the entire CISM.

  That is, even if the chip selection control signal Gate1 is not present, each CCD image sensor uses the shift clock SHCK and the OS gate control signal GCK to know the internal charge transfer clock CK1 ′ as long as the start timing of the first scan is known. , CK2 ′, SHIFT signal, and OS Enable signal can be generated. Therefore, the same effect as in the case of the first embodiment can be expected.

  In the present embodiment, the case where a counter is used is illustrated, but the start timing of the first scan can be determined even in other configurations.

[Application 1 of the second embodiment]
FIG. 7 shows a configuration example of a generation circuit that generates a CCD gate control output signal (element selection control signal) Tout according to the application example 1 of the second embodiment of the present invention. In this application example 1, the CCD gate control input signal Tin is set to the high level at the falling timing of the shift clock SHCK and then set to the low level at the falling timing of the second OS gate control signal GCK. Show.

  In FIG. 7, the generation circuit 33 includes an inverter 33a to which the SHIFT signal is input, a flip-flop (S / R FF) 33b in which the output of the inverter 33a is the SET input, an inverter 33c to which the OS gate control signal GCK is input. It has an inverter 33d to which a CCD gate control input signal Tin is inputted, and an AND circuit 33e to which the outputs of the inverters 33c and 33d and the Q output of the flip-flop 33b are inputted. The Q output of the flip-flop 33b becomes the CCD gate control output signal Tout. The output of the AND circuit 33e is a RESET input of the flip-flop 33b. This RESET input is an edge type reset.

  FIG. 8 shows the operation timing of the generation circuit 33. For example, the SHIFT signal becomes a high level according to the shift clock SHCK when the CCD gate control input signal Tin is at a high level. As a result, the signal charge of the photodiode portion 23-1 is shifted to the charge transfer portion 23-2 immediately before the actual scanning period. The OS Enable signal is generated by latching the signal Tin ′ obtained by latching the CCD gate control input signal Tin at the rising timing of the shift clock SHCK and further latching at the rising timing of the OS gate control signal GCK. The internal charge transfer clocks CK1 ′ and CK2 ′ become high level at the rising timing of the OS gate control signal GCK when the CCD gate control input signal Tin is at high level, and when the CCD gate control input signal Tin is at low level. The OS gate control signal GCK becomes low level at the rise timing (the second rise timing of the OS gate control signal GCK thereafter). The CCD gate control output signal Tout becomes a high level at the falling timing of the SHIFT signal (the falling timing of the shift clock SHCK) when the CCD gate control input signal Tin is at the high level, and the CCD gate control output signal Tout is At the high level, when the CCD gate control input signal Tin is at the low level, it goes to the low level at the falling timing of the OS gate control signal GCK.

  In the case of this application example 1, at the time indicated by * in the figure, the fall of the CCD gate control input signal Tin comes after the fall of the OS gate control signal GCK. The output signal Tout never goes low.

  Also with the above-described configuration, it is possible to sweep out the residual charge accumulated in the charge transfer unit 23-2 outside the scanning period within the color advance scanning period immediately before the actual scanning period. Reduction is possible. In addition, only the CCD image sensor to be scanned can be selectively driven, and the charge transfer unit 23-2 of the CCD image sensor to be scanned is within the charge transfer period, that is, the color feed scanning period and the actual scanning period. During this period, the internal charge transfer clocks CK1 ′ and CK2 ′ can be supplied. For this reason, the supply of the charge transfer clocks CK1 and CK2 outside the scanning period to the charge transfer unit 23-2 including the CCD image sensor that is not another scan target can be stopped, and the consumption current and heat generation of the TG can be suppressed. Similarly, current consumption and heat generation of the CCD image sensor can be suppressed.

  That is, according to the first application example, when only the CCD image sensor to be scanned is driven in order to reduce the current consumption, the dark output noise due to the residual charge in the charge transfer unit increases. This can be solved by improving the simple signal interface.

[Third Embodiment]
FIG. 9 shows a basic configuration of a CISM used in an MFP or the like according to the third embodiment of the present invention. Here, a case in which one TG and 15 CCD image sensors (CCD chips) are included (a CISM having a 15-chip configuration) will be described as an example. In particular, the charge transfer unit of the CCD image sensor to be scanned immediately before the actual scanning period using a signal (address pattern signal) for recognizing what position the CCD image sensor is arranged. This is an example in which the residual charge accumulated in the non-scanning period is swept out to suppress current consumption and reduce dark output noise. Different parts will be described.

  In the case of this embodiment, for example, a unique address pattern signal (identification information) is attached to each CCD image sensor, and the comparison of the address pattern signal and the count value of the shift clock (scanning start signal) SHCK is performed. The selection and the discrimination of the first scan and the second scan are performed. The address pattern signal is, for example, 4-bit data (CS1 to CS4) created by pulling up and pulling down a CISM wiring pattern.

  That is, in this CISM 11A, 15 CCD image sensors (CCD1 to CCD15) 43a, 43b, 43c,..., 43n, 43o are connected in parallel to one TG 12a. The TG 12a is supplied with a scanning start pulse TR from an external MFP system (not shown). From the TG 12a to the CCD image sensors 43a, 43b, 43c,..., 43n, 43o, a shift clock SHCK, an OS (output) gate control signal GCK, a counter reset signal ST, and a charge transfer clock CK1, CK2 is supplied respectively.

  FIG. 10 shows a configuration example of the CCD image sensors 43a, 43b, 43c,..., 43n, 43o. In the case of the present embodiment, the CCD image sensors 43a, 43b, 43c,..., 43n, 43o have substantially the same configuration, and therefore the CCD image sensor 43a will be described as an example here.

  The CCD image sensor 43a includes a photodiode unit 43-1, a charge transfer unit 43-2, a controller 43-3, a switch unit 43-4, a reading unit 43-5, an OS gate 43-6, a counter 43-7, and R, G, B LEDs (not shown) are included.

  The charge transfer clocks CK1 and CK2 are supplied to the switch unit 43-4. The shift clock SHCK is supplied to the controller 43-3 and the counter 43-7. The OS gate control signal GCK and the counter reset signal ST are supplied to the counter 43-7. The count value of the counter 43-3 is supplied to the controller 43-3.

  The controller 43-3 compares the address pattern signals CS1 to CS4 with the count value of the shift clock SHCK from the counter 43-7, and according to the comparison result, the SWITCH signal for controlling the switching of the switch unit 43-4, A SHIFT signal for the shift operation and an OS Enable signal for turning on / off the OS gate 43-6 are generated. That is, when the address pattern signals CS1 to CS4 match the count value of the shift clock SHCK, the controller 43-3 determines that the CCD image sensor has been selected as a scanning target.

  FIG. 11 shows an example of address pattern signals of the CCD image sensors 43a, 43b, 43c,..., 43n, 43o.

  For example, as shown in FIG. 11, the address pattern signal “0001” is sent to the CCD image sensor (CCD1) 43a, and the address pattern signal “0010” is sent to the CCD image sensor (CCD2) 43b. The address pattern signal “0011” is assigned to the CCD image sensor (CCD15) 43o in order.

  FIG. 12 shows the operation timing of the above-described CISM 11A. First, the counter reset signal ST is output from the TG 12a to the CCD image sensors 43a, 43b, 43c,. After the count value of the counter 43-7 is reset, the shift clock SHCK is supplied from the TG 12a to the CCD image sensors 43a, 43b, 43c,..., 43n, 43o. Then, the number of pulses of the shift clock SHCK is counted by the counter 43-7 in each CCD image sensor 43a, 43b, 43c,..., 43n, 43o, and accumulated and stored. Then, each controller 43-3 compares the count value with a unique address pattern signal.

  Normally, when the count value is equal to its own address pattern signal, it is determined that the CCD image sensor has been selected, and the first scan (color feed scanning) is started. When the count value becomes “1” larger than its own address pattern signal, the second scan (actual scan) is started. First, the first-stage CCD image sensor (CCD1) 43a whose address pattern signal is “0001” is selected based on the count value “1”, and the internal charge transfer clock is output within the remaining charge sweep-out scanning period which is the first scan. A SWITCH signal is generated so that CK1 ′ and CK2 ′ are supplied to the charge transfer unit 43-2. Next, with the count value “2”, the first stage CCD image sensor (CCD1) 43a generates the SWITCH signal, the SHIFT signal, and the OS Enable signal for the actual scanning that is the second scanning. At the same time, the second-stage CCD image sensor (CCD2) 43b whose address pattern signal is “0010” is selected, and the SWITCH signal is generated for the residual charge sweeping scan which is the first scan.

  Thus, in the CISM 11A, only the CCD image sensor to be scanned can be selectively driven by the address pattern signal, and the same control is continuously performed in the entire CISM. That is, not only the CCD image sensor is selected based on the unique address pattern signal but also the charge transfer clocks CK1 and CK2 can be blocked for the non-selected CCD image sensor. Therefore, the same effect as in the case of the first embodiment can be expected.

  Note that the switch unit 43-4 is switched to supply the internal charge transfer clocks CK1 ′ and CK2 ′ to the charge transfer unit 43-2 by the SWITCH signal, and the signal charge in the photodiode unit 43-1 is changed by the SHIFT signal. The timing of the shift operation for shifting to the charge transfer unit 43-2 and the timing of turning on the OS gate 43-6 by the OS Enable signal are in all the CCD image sensors 43a, 43b, 43c,..., 43n, 43o. The same is true as shown in the first and second embodiments.

  As described above, according to the present embodiment, the current consumption and heat generation of the TG can be suppressed, and the current consumption and heat generation of the CCD image sensor can be suppressed as in the first and second embodiments. A CISM with less current and dark output noise can be obtained.

  Although a 4-bit binary number is used as the address pattern signal, the present invention is not limited to this, and as a method for recognizing the address, for example, a gray code can be used.

[Fourth Embodiment]
FIG. 13 shows the basic configuration of a CISM used in an MFP or the like according to the fourth embodiment of the present invention. Here, a case in which one TG and 15 CCD image sensors (CCD chips) are included (a CISM having a 15-chip configuration) will be described as an example. In particular, the charge transfer of the CCD image sensor to be scanned immediately before the actual scanning period using a signal (element selection control signal) for recognizing what position the CCD image sensor is arranged. This is an example in which the remaining electric charge accumulated in the non-scanning period is swept out to reduce current consumption and reduce dark output noise. First to third embodiments Different parts will be described.

  In FIG. 13, this CISM 11B includes one TG 12b and 15 CCD image sensors (CCD 1, CCD 2, CCD 3, CCD 4,..., CCD 14, CCD 15) 53a, 53b, 53c, 53d,. And have. CCD image sensors 53a, 53b, 53c, 53d,..., 53n, 53o are arranged in a horizontal row (in series connection) with respect to the imaging surface.

  The TG 12b controls driving of all the CCD image sensors 53a, 53b, 53c, 53d,..., 53n, 53o, and each CCD image sensor 53a, 53b, 53c, 53d,. In contrast, a shift clock (scanning start signal) SHCK, an OS (output) gate control signal GCK, a counter reset signal ST0, and charge transfer clocks CK1 and CK2 are supplied.

  Further, the TG 12 outputs, for example, “one pulse” as an address recognition signal (element selection control signal) CKX indicating that it is the first stage CCD image sensor only to the first stage CCD image sensor (CCD1) 53a.

  FIG. 14 shows a configuration example of the CCD image sensors 53a, 53b, 53c, 53d,..., 43n, 43o. In the case of the present embodiment, the CCD image sensors 53a, 53b, 53c, 53d,..., 53n, 53o have almost the same configuration, and therefore the CCD image sensor 53a will be described as an example here.

  The CCD image sensor 53a includes a photodiode unit 53-1, a charge transfer unit 53-2, a controller 53-3, a switch unit 53-4, a reading unit 53-5, an OS gate 53-6, counters (1), (2 ) 53-7, 53-8, an arithmetic unit (shift register) 53-9, and R, G, B LEDs (not shown).

  The charge transfer clocks CK1 and CK2 are supplied to the switch unit 53-4. The shift clock SHCK is supplied to the counter (2) 53-8. The OS gate control signal GCK is supplied to the counter (2) 53-8. The counter reset signal ST0 is supplied to the counters (1), (2) 53-7, 53-8. The count value of the counter (1) 53-7 is supplied to the controller 53-3 and the calculator 53-9. The count value of the counter (2) 53-8 is supplied to the controller 53-3.

  The counter (1) 53-7 counts the number of pulses of the address recognition signal CKX from the TG 12b (or the address recognition signal CKXo from the preceding CCD image sensor), and the counter (2) 53-8 is the TG 12b. The number of pulses of the shift clock SHCK from is counted.

  The controller 53-3 compares the count value of the address recognition signal CKX from the counter (1) 53-7 with the count value of the shift clock SHCK from the counter 53-8, and switches 53 according to the comparison result. -4 switching control signal, a SHIFT signal for shift operation, and an OS Enable signal for turning on / off the OS gate 53-6. That is, when the count value of the address recognition signal CKX matches the count value of the shift clock SHCK, the controller 53-3 determines that the CCD image sensor is selected as a scanning target.

  On the other hand, the arithmetic unit 53-9 gives the address recognition signal CKXo of “+1 pulse” to the CCD image sensor of the next stage based on the count value of the address recognition signal CKX from the counter (1) 53-7. Generate and output. For example, when the scanning object is the CCD image sensor 53a, an address recognition signal CKXo of “2 pulses” is sent to the CCD image sensor 53b at the next stage, and when the scanning object is the CCD image sensor 53b, the next stage. When the scanning object is the CCD image sensor 53c, a “4-pulse” address recognition signal CKXo is sent to the CCD image sensor 53d. In the case where the scanning object is the CCD image sensor 53n, the address recognition signal CKXo of “15 pulses” is output to the CCD image sensor 53o at the final stage.

  FIG. 15 shows the operation timing of the above-described CISM 11B. First, the counter reset signal ST0 is output from the TG 12b to the CCD image sensors 53a, 53b, 53c, 53d,. After the count values of the counters (1) 53-7 and (2) 53-8 are reset, an address recognition signal CKX of “one pulse” is supplied from the TG 12b to the CCD image sensor 53a. Then, the number of pulses of the “1 pulse” address recognition signal CKX is counted by the counter (1) 53-7 of the CCD image sensor 53a.

  On the other hand, the shift clock SHCK is supplied from the TG 12b to the CCD image sensors 53a, 53b, 53c, 53d,..., 53n, 53o. The number of pulses of the shift clock SHCK is counted by the counter (2) 53-8 in each CCD image sensor 53a, 53b, 53c, 53d,. Then, in each controller 53-3, the count value is compared with the number of pulses of the address recognition signal CKX which is the count value of the counter (1) 53-7.

  Normally, when the count values are equal, it is determined that the CCD image sensor is selected, and the first scan (color feed scanning) is started. When the count value of the counter (2) 53-8 becomes “1” larger than the count value of the counter (1) 53-7, the second scan (actual scan) is started.

  First, the first stage CCD image sensor (CCD1) 53a is selected by the address recognition signal CKX with the number of pulses “1” and the count value “1” of the shift clock SHCK, and the residual charge sweep scanning which is the first scan is performed. A SWITCH signal is generated so that the internal charge transfer clocks CK1 ′ and CK2 ′ are supplied to the charge transfer unit 53-2 within the period. Further, before the count value of the shift clock SHCK becomes “2”, the calculation unit 53-9 generates an address recognition signal CKXo having a pulse number of “2” to the CCD image sensor (CCD2) 53b in the next stage. Is output.

  Next, the first stage CCD image sensor (CCD1) 53a uses the count value “2 (address recognition signal CKX + 1)” of the shift clock SHCK to switch the SWITCH signal, the SHIFT signal, and the OS Enable signal for the second scanning. A signal is generated. At the same time, in the CCD image sensor (CCD2) 53b in the next stage, the internal charge transfer clocks CK1 ′ and CK2 ′ are supplied to the charge transfer unit 53-2 within the remaining charge sweeping scan period which is the first scan along with the selection of itself. The SWITCH signal is generated so as to be performed. Further, before the count value of the shift clock SHCK becomes “3”, the address recognition signal CKXo having the number of pulses “3” is sent from the arithmetic unit 53-9 to the CCD image sensor (CCD3) 53c in the next stage. Is output.

  Thus, finally, the CCD image sensor (CCD 14) 53n generates the SWITCH signal, the SHIFT signal, and the OS Enable signal for the second scanning by the count value “15” of the shift clock SHCK. Done. At the same time, in the final stage CCD image sensor (CCD15) 53o, the internal charge transfer clocks CK1 ′ and CK2 ′ are supplied to the charge transfer unit 53-2 within the remaining charge sweeping scan period which is the first scan along with the selection of the CCD image sensor (CCD15) 53o. The SWITCH signal is generated so as to be performed.

  Next, according to the count value “16” of the shift clock SHCK, the CCD image sensor (CCD15) 53o at the final stage generates a SWITCH signal, a SHIFT signal, and an OS Enable signal for the actual scanning that is the second scanning. Is called. However, since the CCD image sensor (CCD15) 53o is the final stage, the address recognition signal CKXo for the next stage CCD image sensor is not output.

  Thus, in the CISM 11B, only the CCD image sensor to be scanned can be selectively driven by the address recognition signal, and the same control is continuously performed in the entire CISM. That is, while sequentially selecting the next-stage CCD image sensor, it is possible to carry out the residual charge sweeping scan immediately before the actual scanning and to cut off the supply of the charge transfer clocks CK1 and CK2 to the non-selected CCD image sensor. It becomes. Therefore, the same effect as in the first to third embodiments can be expected.

  Note that the timing of switching the switch unit 53-4 to supply the internal charge transfer clocks CK1 ′ and CK2 ′ to the charge transfer unit 53-2 by the SWITCH signal, and the signal charge in the photodiode unit 53-1 by the SHIFT signal. The timing of the shift operation to shift to the charge transfer unit 53-2 and the timing of turning on the OS gate 53-6 by the OS Enable signal are all CCD image sensors 53a, 53b, 53c, 53d,. The same applies to 53o, as shown in the first to third embodiments.

  As described above, according to the present embodiment, the current consumption and heat generation of the TG can be suppressed, and the current consumption and heat generation of the CCD image sensor can be suppressed, as in the first to third embodiments. A CISM with less current and dark output noise can be obtained.

  As shown in FIG. 15, the address recognition signal CKX may be output every time the CCD image sensor is initialized (supply of the scanning start pulse TR), or once when the power is turned on. May be output only. Further, the address recognition signal CKXo is not limited to the regularity of increasing “+1” in the CCD image sensor at the next stage.

  In each of the above embodiments, the CISM having a 15-chip configuration has been described as an example. However, the present invention is not limited to this.

  Further, the present invention can be applied not only to CISM but also to a package type image sensor.

  Furthermore, the switch unit can be configured by an AND gate.

  In addition, the present invention is not limited to the above (each) embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage. Further, the above (each) embodiment includes various stages of the invention, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if several constituent requirements are deleted from all the constituent requirements shown in the (each) embodiment, the problem (at least one) described in the column of the problem to be solved by the invention can be solved. When the effect (at least one of the effects) described in the “Effect” column is obtained, a configuration from which the constituent requirements are deleted can be extracted as an invention.

The block diagram which shows the structural example of CISM according to the 1st Embodiment of this invention. FIG. 2 is a circuit diagram showing a configuration example of a CCD image sensor in the CISM shown in FIG. 1. The timing chart shown in order to demonstrate operation | movement of CISM taking the CCD image sensor shown in FIG. 2 as an example. The timing chart shown in order to demonstrate operation | movement of CISM shown in FIG. The circuit diagram which shows the structural example of the CCD image sensor according to the 2nd Embodiment of this invention. The timing chart shown in order to demonstrate operation | movement of CISM taking the CCD image sensor shown in FIG. 5 as an example. The circuit diagram which shows the structural example of the CCD gate control output signal generation circuit according to the application example 1 of the 2nd Embodiment of this invention. 8 is a timing chart for explaining the operation of the CCD gate control output signal generation circuit shown in FIG. The block diagram which shows the structural example of CISM according to the 3rd Embodiment of this invention. FIG. 10 is a circuit diagram showing a configuration example of a CCD image sensor in the CISM shown in FIG. 9. The figure which shows an example of the address pattern signal allocated to a CCD image sensor. The timing chart shown in order to demonstrate operation | movement of CISM shown in FIG. The block diagram which shows the structural example of CISM according to the 4th Embodiment of this invention. FIG. 14 is a circuit diagram showing a configuration example of a CCD image sensor in the CISM shown in FIG. 13. 14 is a timing chart for explaining the operation of the CISM shown in FIG.

Explanation of symbols

  11, 11A, 11B ... CISM, 12, 12a, 12b ... TG, 13a-13o, 23, 43a-43o, 53a-53o ... CCD image sensors, 13-1, 23-1, 43-1, 53-1 ... Photodiode section, 13-2, 23-2, 43-2, 53-2 ... charge transfer section, 13-3, 23-3, 43-3, 53-3 ... controller, 13-4, 23-4, 43-4, 53-4 ... switch section, 13-6, 23-6, 43-6, 53-6 ... OS gate, 23-7, 43-7, 53-7, 53-8 ... counter, 53- 9 ... Calculator.

Claims (5)

An image sensor driving method for imaging a single image by controlling a plurality of image sensors arranged on an imaging surface and connected in series with each other,
An element selection control signal including a first scan start signal and a second scan start signal that are effective in two scanning periods is given to the first stage image sensor among the plurality of image sensors,
For the image sensor selected by the element selection control signal, the signal charge obtained by the photoelectric conversion unit that converts the optical signal into an electrical signal corresponding to the first scanning start signal is transferred to the charge transfer unit, And prohibiting the output of an image signal from the charge transfer unit,
For the image sensor selected by the element selection control signal, in response to the second scanning start signal, transfer of the signal charge obtained by the photoelectric conversion unit to the charge transfer unit, and the charge transfer unit Image signal output from
While prohibiting horizontal transfer of signal charges in the charge transfer unit of the image sensor that has not been selected,
An image sensor that outputs the element selection control signal from the image sensor selected by the element selection control signal to the next image sensor in a non-selected state corresponding to the second scanning start signal. Driving method. An image sensor driving method for imaging a single image by controlling a plurality of image sensors arranged on an imaging surface and connected in series with each other,
An element selection control signal indicating that the image sensor is selected is given to the first image sensor among the plurality of image sensors,
For the image sensor selected by the element selection control signal, in response to the first scanning start signal, transfer of the signal charge obtained by the photoelectric conversion unit that converts the optical signal into an electric signal to the charge transfer unit, And prohibiting the output of the image signal from the charge transfer unit,
For the image sensor selected by the element selection control signal, in response to a second scanning start signal, transfer of the signal charge obtained by the photoelectric conversion unit to the charge transfer unit, and the charge transfer unit Image signal output from
While prohibiting horizontal transfer of signal charges in the charge transfer unit of the image sensor that has not been selected,
The image pickup element selected by the element selection control signal causes the element selection control signal to be output to the next-stage image pickup element in a non-selected state corresponding to the second scanning start signal. Device driving method. An image sensor driving method for capturing a single image by controlling a plurality of image sensors arranged on an imaging surface and connected in parallel,
Assigning unique identification information to each of the plurality of image sensors,
It is determined that the image sensor is selected based on a match between the unique identification information and the count value of the scanning start signal,
For the selected imaging device, at the first scanning, the signal charge obtained by the photoelectric conversion unit that converts the optical signal into an electric signal is transferred to the charge transfer unit, and the image signal from the charge transfer unit Is prohibited,
In the second scanning, the selected image sensor is allowed to transfer the signal charge obtained by the photoelectric conversion unit to the charge transfer unit and to output an image signal from the charge transfer unit. ,
A method of driving an image pickup device, wherein the non-selected image pickup device is prohibited from horizontally transferring signal charges in the charge transfer section. An image sensor driving method for imaging a single image by controlling a plurality of image sensors arranged on an imaging surface and connected in series with each other,
An element selection control signal indicating that the image sensor is selected according to the count value is given to the first-stage image sensor among the plurality of image sensors,
It is determined that the image sensor is selected by matching the count value of the element selection control signal and the count value of the scanning start signal,
For the selected imaging device, at the first scanning, the signal charge obtained by the photoelectric conversion unit that converts the optical signal into an electric signal is transferred to the charge transfer unit, and the image signal from the charge transfer unit Is prohibited,
For the second scanning, the selected image sensor is allowed to transfer the signal charge obtained by the photoelectric conversion unit to the charge transfer unit, and to output an image signal from the charge transfer unit,
While prohibiting horizontal transfer of signal charges in the charge transfer unit of the image sensor that has not been selected,
A method for driving an image sensor, comprising: outputting an element selection control signal in which the count value changes by “1” from the selected image sensor to the next image sensor in a non-selected state.   The horizontal transfer of the signal charge in the charge transfer unit of the selected image sensor is permitted only during scanning by controlling the supply of a charge transfer clock to the charge transfer unit. The driving method of the image pick-up element in any one of 1-4.

Images