JP2010108964A - Method for manufacturing circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form micro wiring with a rectangular wiring cross-sectional shape by a semi-additive method. <P>SOLUTION: In a method for manufacturing a circuit board which includes a metal layer on an insulating resin, the method includes steps of: forming a first metal layer on a surface of the insulating resin; forming a plating resist layer for a metal wiring pattern on a surface of the first metal layer as a first resist layer through the use of a positive photoresist; forming a second metal layer by an electrolytic plating; and etching the exposed second metal layer with an etching solution. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a circuit having excellent productivity capable of forming a highly accurate circuit pattern.

  With the reduction in weight and size of electronic products, there is a need for higher precision in patterning of printed circuit boards. Among them, the demand for flexible films used for printed circuit boards is increasing because they can be used for three-dimensional wiring due to their flexibility and are suitable for downsizing of electronic products. TAB (Tape Automated Bonding) technology used for IC (Integrated Circuit) connection to a liquid crystal display panel can obtain a high-definition pattern as a resin circuit board by processing a relatively narrow long polyimide film. it can. However, the TAB technology is approaching its limit with respect to the progress of miniaturization. In view of this, there has been a proposal to increase the wiring density by increasing the number of circuit boards (see Patent Document 1).

  However, even if the wiring density is increased by increasing the number of layers, the density of terminal connections between the semiconductor element terminals and the circuit board cannot be increased. There is a demand for miniaturization of semiconductor elements from the viewpoint of performance and cost, and it is necessary to further increase the circuit pattern wiring density of the semiconductor element mounting portion of the circuit board.

  In order to form circuit pattern lines, photolithography technology based on the full additive method and semi-additive method, which are easy to process high-definition patterns, is used. The resolution of the photoresist used is affected. In general, the resolution of the photoresist for forming fine wiring is higher in the positive type than in the negative type. However, the positive resist has a larger taper in cross-sectional shape than the negative type, and the cross-sectional shape of the wiring is less likely to be rectangular, which is disadvantageous for miniaturization as follows. That is, as the miniaturization proceeds, it is necessary to increase the contact area between the wiring bottom and the substrate and the bonding area between the IC chip bump and the wiring top as much as possible to ensure the bonding strength. For this reason, it is necessary to make the top width and bottom width of the wiring as large as possible in the design. In order to ensure insulation reliability, it is necessary to increase the distance between the wirings as much as possible. In order to satisfy the above conditions, the cross-sectional shape of the wiring needs to be rectangular, but as described above, it is difficult to make the cross-sectional shape of the fine wiring rectangular when using a positive resist.

On the other hand, there is also a method in which wiring is formed by a semi-additive method using a negative resist and only necessary portions are thinned by etching (see Patent Document 2). According to this method, it is easy to make the cross-sectional shape of the wiring rectangular. However, when the wiring pitch is narrowed, development failure occurs at the resolution of the negative resist, and wiring cannot be formed.
JP 2002-43750 A (pages 2 to 5) JP 2007-287953 A (page 1 to page 21)

  As described above, if the photoresist used in the semi-additive method is a positive type, it is difficult to make the wiring cross section rectangular, and if it is a negative type, the resolution is lower than that of the positive and it is difficult to form fine wiring. there were. An object of the present invention is to solve such problems and to form a wiring having a rectangular and fine wiring cross-sectional shape by a semi-additive method.

  That is, the present invention is a method of manufacturing a circuit board having a metal layer on an insulating resin, the step of forming the first metal layer on the surface of the insulating resin, and the surface of the first metal layer as the first resist layer. A circuit having a step of providing a plating resist layer for a metal wiring pattern using a positive photoresist, a step of forming a second metal layer by electrolytic plating, and a step of etching the exposed second metal layer with an etching solution A method for manufacturing a substrate.

  According to the present invention, a fine wiring having a rectangular cross-sectional shape can be easily formed using a positive photoresist.

  A method for manufacturing a circuit board according to the present invention will be described below with reference to FIGS. In addition, the following description is an example of this invention and is not limited to this.

  First, the first metal layer 201 is formed on the surface of the insulating resin 101 (FIG. 1- (1)). The insulating resin used here needs to have heat resistance sufficient to withstand the thermal process in the circuit pattern manufacturing process and electronic component mounting. As an insulating resin suitably used in the present invention, for example, a film made of polycarbonate, polyether sulfide, polyethylene terephthalate, polyethylene naphthalate, polyphenylene sulfide, polyimide, polyamide, liquid crystal polymer, or the like can be employed. Among these, a polyimide film is preferably used because it is excellent in heat resistance and chemical resistance. In addition, a liquid crystal polymer film is suitably employed because it has excellent electrical characteristics such as low dielectric loss. It is also possible to employ a flexible glass fiber reinforced resin plate as the insulating resin. Examples of the resin for the glass fiber reinforced resin plate include resins such as epoxy, polyphenylene sulfide, polyphenylene ether, maleimide, polyamide, and polyimide.

  The thickness of the insulating resin is preferably thinner in order to reduce the weight and size of electronic equipment or to form fine via holes. On the other hand, in order to ensure mechanical strength and maintain flatness, the thicker one is preferable, and therefore the range of 4 μm to 125 μm is preferable.

  As a method for forming the first metal layer, any of sputtering, vapor deposition, and electroless plating may be used. As the material of the first metal layer, a material having high electrical conductivity such as copper, gold, silver or the like is used. The first metal layer to be formed preferably has a thickness in the range of 0.01 μm to 3 μm. By setting the thickness of the first metal layer to 3 μm or less, the etching can be performed in a short time when the unnecessary first metal layer is removed by etching (FIG. 2- (2)) described later. Further, since the etching proceeds in the width direction, the width of the first metal layer (wiring portion) existing under the second metal layer may be reduced. This reduction in the width direction is preferably 1 μm or less, and for that purpose, the thickness of the first metal layer is preferably 0.2 μm or less. This causes variations in the amount to be etched. Therefore, in order to actually perform etching of a certain thickness over the entire unnecessary portion of the first metal layer, it corresponds to removing twice the thickness. Etching must be performed. On the other hand, since the etching of the wiring portion in the width direction is performed from both sides, the amount of reduction is further doubled. That is, if an unnecessary portion of the first metal layer having a thickness of 0.2 μm is to be completely etched, the wiring portion is thinned by about 0.8 μm. On the other hand, by setting the first metal layer to 0.01 μm or more, sufficient conductivity can be obtained, and the film thickness variation of the second metal layer formed thereon can be suppressed by electroplating in a later step. .

  The first metal layer may be a single layer or may be formed from a plurality of metal layers. For example, in order to ensure adhesion with a flexible film, a metal layer such as copper, silver, or gold having good electrical conductivity is formed on a chromium, molybdenum, titanium or alloy layer containing them, These multiple layers may be combined to form a first metal layer for power feeding. In this case, the total film thickness is preferably in the above range. As a concrete example, after the polyimide film surface is plasma-treated, an alloy film of Ni: Cr = 80: 20 having a thickness of 10 nm or more and 30 nm or less is formed by sputtering, and then Cu sputtering is performed at a thickness of 80 to 200 nm. A layer may be formed as the first metal layer.

  Second, a plating resist layer 301 for a metal wiring pattern is provided as a resist layer on the surface of the first metal layer formed as described above. This is formed by removing the resist at the place where the wiring is arranged by using a photolithography technique (FIG. 1- (2)). Specifically, the photoresist is applied by a spin coater, blade coater, roll coater, die coater or screen printer, and then dried, and then the photoresist is exposed and developed through a photomask having a predetermined pattern. A resist layer 301 is formed on a portion where the plating film is unnecessary. In the present invention, a positive type photoresist which is advantageous for higher resolution is used. By this step, a trapezoidal (forward taper) resist pattern having a longer bottom than the top is formed. As a positive resist material, it is desirable to form a film by liquid coating. A laminate of a film such as a dry film is not suitable for forming a fine wiring because the adhesion with the surface of the first metal layer is weaker than that of a liquid resist and the resist is easily peeled off when the resist width is narrow. It is desirable that after plating, the resist is dissolved and peeled off. In the case of a material such as polyimide that is difficult to dissolve after curing, a resist remains between the wirings, and the first metal layer between the wirings cannot be removed, resulting in a short circuit.

Third, a pattern 202 of the second metal layer is formed by electrolytic plating using the first metal layer as an electrode for electrolytic plating power supply (FIG. 1- (3)). The second metal layer is preferably made of a material having high electrical conductivity such as copper, gold, or silver, and particularly preferably copper. As the electrolytic copper plating solution when copper is used, a copper sulfate plating solution, a copper cyanide plating solution, a copper pyrophosphate plating solution, and the like are used. The current density of the electrolytic copper plating is preferably as small as possible so long as the productivity is not impaired. This is because as the current density increases, the voltage drop increases and the plating film variation increases. For copper sulfate plating solution, the current density is desirably 0.2~2A / dm ^2, more preferably 0.2~1A / dm ^2. Since the second metal layer grows in a portion where there is no plating resist, it has a reverse taper shape. The thickness is preferably 2 μm or more and 20 μm or less.

  Fourth, the exposed second metal layer is etched with an etchant. Thereby, the upper part and side part of the 2nd metal layer of a reverse taper shape are partially etched, and it becomes possible to make a 2nd metal layer into a rectangle (FIG. 1- (4)). As the etching solution, it is desirable to use a hydrogen peroxide / sulfuric acid based etching solution that is less affected by the etching rate change due to the copper concentration. % Or more, 8 wt. % Or less and the hydrogen peroxide concentration is 1 wt. % Or more, 5 wt. % Or less is desirable. The sulfuric acid concentration is 2 wt. % And the hydrogen peroxide concentration is 1 wt. If it is% or more, the etching time can be shortened and good productivity can be maintained. The sulfuric acid concentration is 2 wt. % Or less than 1 wt. If it is smaller than%, it takes a long time to etch the wiring, and the etching solution may penetrate into the sputter layer below the resist, and the lower part of the second metal layer may be easily etched. The sulfuric acid concentration is 8 wt. % Or less and the hydrogen peroxide concentration is 5 wt. % Or less, the viscosity of the etching solution is sufficiently low, the penetration of the etching solution between the wiring and the resist layer is good, and the side surface portion can be etched well. The sulfuric acid concentration is 8 wt. If the ratio is larger than%, uniform etching is performed, so that the lower portion of the second metal layer may be etched. Further, if the etching time is extended, the wiring may be peeled off from the substrate before the wiring cross section becomes rectangular. Hydrogen peroxide concentration is 5 wt. If it exceeds 50%, the etching rate becomes faster, the top corner is etched without being etched down to the lower portion of the second metal layer, and the wiring cross section may become a hexagon.

Note that it is preferable to include a pretreatment step before etching. Pretreatment includes heat treatment, ultraviolet irradiation, and alkali cleaning such as TMAH. In either case, the purpose is to form a stable gap at the interface between the second metal layer and the resist layer so that the etchant can enter stably. As heat treatment conditions for the pretreatment, an amount of heat necessary for shrinking the resist is required. However, if the temperature is high, the resist will not be peeled off in a later step, so it is preferable to treat the temperature at 80-120 ° C. for about 30 minutes. However, it is not limited to this because it is influenced by the physical properties of the positive resist. In addition, in the case of performing ultraviolet irradiation, it is a condition that the positive resist is deformed to such an extent that a gap is formed at the interface with the second metal layer due to ultraviolet rays, but an exposure amount of about 500 to 1000 mJ / cm ² is required. It becomes a standard. Alkaline cleaning is not uniform because it depends on the alkali resistance of the resist, but as a guideline, it is a guideline to perform alkali cleaning with the same level of strength as the developer. Etching is possible without pre-treatment, but the gap is not stable, so the etching variation is large and the yield may be reduced in the wiring shape.

  In order to achieve flattening etching, it is preferable that the etching solution concentration be thin and the etching rate be fast so as to satisfy the supply rule. The copper concentration of the etching solution is controlled at 2.5 g / L to 16 g / L, and an appropriate amount of an additive for suppressing the decomposition of hydrogen peroxide solution is added. Etching may be either dipping or showering, but when it is necessary to suppress variations in etching, a horizontal conveyor dipping process is preferred.

  By the way, when the second metal layer is formed by electrolytic plating by the semi-additive method, the portion where the resist layer and the portion where the plating deposits contacts is poor in exchangeability of the plating solution, so that the metal ion supply is delayed and the film thickness becomes thin. There is. At this time, when the wiring cross-sectional shape is viewed, the central portion is thicker than the end portion in the width direction. This is likely to occur when a plating solution having a low metal ion concentration that emphasizes film thickness uniformity is employed. In particular, when the wiring width becomes narrower, the resist opening width becomes narrower and the exchangeability of the plating solution becomes worse, so that the wiring top becomes round (FIG. 1- (5)). If the wiring top is rounded, a side slip may occur when mounting electronic components.

  On the other hand, the etching process of the present invention can flatten the rounded wiring top when correcting the inversely tapered shape to a rectangle. That is, according to the present invention, the wiring side taper and the wiring top can be flattened simultaneously by etching. In terms of flattening the rounded wiring top, it is also preferable to use an additive having a strong leveling effect as the additive of the plating solution, and these techniques can be used in combination. For example, by using a pulse reverse plating method using a dye-based additive or a pulse power source as used in decorative plating, the wiring top can be flattened.

  The thickness of the resist layer is preferably 3 μm or more thicker than the thickness of the second metal layer. However, when the wiring top is round, A in FIG. 6 is the thickness of the second metal layer. This is because the difference in etchability of the etching solution is used to flatten the wiring top. When the thickness of the resist layer is 3 μm or more thicker than the thickness of the second metal layer, the etchability of the etchant at the top of the wiring is improved compared to the end of the wiring (contact portion with the resist layer), and etching that flattens Is possible.

  After the exposed second metal layer is etched with an etching solution, the plating resist layer is peeled off (FIG. 2- (1)). As a peeling method, there are a method of dissolving with an inorganic alkali or an organic alkali after UV irradiation, and a method of dissolving with an organic solvent without UV irradiation.

  Thereafter, the exposed first metal layer 201 is removed with an etching solution (FIG. 2- (2)). As the etching solution for removing the exposed first metal layer, a low etching rate such as hydrogen peroxide / sulfuric acid based etching solution or sodium persulfate is preferable. This is because if the etching rate is high, the variation in etching increases, and not only the first metal layer but also the wiring that is the second metal layer is removed. Further, when the first metal layer is made of chromium or an alloy layer containing chromium that is difficult to etch, it is necessary to etch only the chromium or the chromium alloy with a liquid that selectively etches. The solution for selectively etching only chromium or a chromium alloy contains hydrochloric acid and an inhibitor such as benzotriazole. Since the inhibitor is adsorbed by copper, the copper wiring as the second metal layer is protected and is not etched.

  Furthermore, it is preferable to etch the surface of the resin 101 between the wirings from which the first metal layer has been removed. This is because the residue of the first metal layer that lowers the insulation reliability is etched together with the resin surface and completely removed (FIG. 2- (3)). The removal thickness of the resin surface is preferably 1 nm or more and 500 nm or less. Examples of the etching solution used at this time include concentrated sulfuric acid, an alkaline aqueous solution, an organic solvent, chromic acid, and an alkaline permanganate solution. Further, as a method that does not use an etchant, there is a method of etching by plasma ashing.

  In the method for manufacturing a circuit board according to the present invention, each step may be performed on an insulating resin attached to a reinforcing plate via a peelable organic layer. Reinforcing plates that are preferably used include glass plates such as soda lime glass, borosilicate glass, and quartz glass, metal plates such as Invar alloy, stainless steel, and titanium, ceramic plates such as alumina, zirconia, and silicon nitride, and glass fiber reinforced resin. A board etc. are mentioned. These are all preferable in that the thermal expansion coefficient and the hygroscopic expansion coefficient are small. Further, a glass plate is preferred because it is excellent in heat resistance and chemical resistance in the circuit pattern manufacturing process, easily obtains a substrate having a large area and high surface smoothness at low cost, and hardly deforms plastically. Among them, a glass plate made of borosilicate glass typified by aluminoborosilicate glass is particularly preferably used because it has a high elastic modulus and a small thermal expansion coefficient.

  When a metal plate or a glass fiber reinforced resin plate is used for the reinforcing plate, a long continuous body can be manufactured, but it is preferable to use a single wafer type in that it is easy to ensure positional accuracy. A sheet means a state where it is handled as an individual sheet, not a long continuous body.

When the Young's modulus is small or the thickness is thin, the glass plate used for the reinforcing plate becomes warped or twisted due to the expansion and contraction force of the flexible film, and when it is vacuum-adsorbed on a flat stage, the glass plate May crack. In addition, the insulating resin is deformed by vacuum adsorption and desorption, and it tends to be difficult to ensure the positional accuracy. On the other hand, if the glass plate is thick, the flatness may deteriorate due to uneven thickness, and the exposure accuracy tends to deteriorate. In addition, the load increases during handling by a robot or the like, which makes it difficult to handle quickly and causes a decrease in productivity, and also tends to increase the transportation cost. From these points, the thickness of the glass plate is preferably in the range of 0.3 mm to 2.0 mm. In addition, the product of the cube of the Young's modulus (kg / mm ² ) and thickness (mm) of the glass substrate that is a single-wafer reinforcing plate is preferably in the range of 850 kg · mm to 860000 kg · mm, preferably 1500 kg · More preferably, the range is from mm to 190000 kg · mm, and the most preferred range is from 2400 kg · mm to 110000 kg · mm.

When a metal plate is used for the reinforcing plate, if the Young's modulus of the metal plate is small or the thickness is thin, the warping or twisting of the metal plate increases due to the expansion force or contraction force of the insulating resin, and vacuum adsorption is performed on a flat stage. It becomes impossible to maintain the position accuracy because the insulating resin is deformed by the warp or twist of the metal plate. Further, if the metal plate is broken, it becomes a defective product at that time. On the other hand, if the metal plate is thick, the flatness may deteriorate due to uneven thickness, and the exposure accuracy will deteriorate. In addition, the load is increased during handling by a robot or the like, which makes it difficult to handle quickly and causes a decrease in productivity, and also increases the transportation cost. From these points, the thickness of the metal plate is preferably in the range of 0.1 mm to 0.7 mm. Moreover, it is preferable that the product of the cube of the Young's modulus (kg / mm ² ) and the thickness (mm) of the metal substrate which is a single-wafer reinforcing plate is in the range of 2 kg · mm to 162560 kg · mm. The product of the cube of Young's modulus (kg / mm ² ) and thickness (mm) of the metal substrate is more preferably 10 kg · mm to 30000 kg · mm, and in the range of 15 kg · mm to 20500 kg · mm. Most preferably it is.

  In the present invention, it is not necessary for the reinforcing plate to fix the entire surface of the insulating resin. Only the portion of the circuit pattern on the insulating resin that requires dimensional accuracy may be fixed. Therefore, the sizes of the insulating resin and the reinforcing plate may be different. For example, a reinforcing plate that is the same as or slightly larger than an electronic component such as an IC mounted on an insulating resin may be bonded and fixed. A glass plate or a ceramic plate with poor flexibility can be used as the reinforcing plate, and a long continuous body can be produced using a long insulating resin (for example, a flexible film).

  An adhesive or a pressure-sensitive adhesive is used for the organic layer used for bonding the circuit board and the reinforcing plate. Examples of the adhesive or pressure-sensitive adhesive include pressure-sensitive adhesives called acrylic or urethane re-peeling agents. In order to have a sufficient adhesive force during the processing of the circuit board, and can be easily peeled off at the time of peeling, and does not cause distortion in the circuit board, a material having an adhesive force in a region called a weak adhesive to a medium adhesive is preferable. As such an adhesive or pressure-sensitive adhesive, it is also possible to use a silicone resin or an epoxy resin having tackiness.

  In addition, as the organic material layer, those whose adhesive strength is reduced in a low temperature region, those whose adhesive strength is reduced by ultraviolet irradiation, and those whose adhesive strength is reduced by heat treatment are suitably used. Among these, an organic substance whose adhesive strength is reduced by irradiation with ultraviolet rays is preferably used because it has a large change in adhesive strength. An example of a material whose adhesive strength is reduced by ultraviolet irradiation is a two-component cross-linking acrylic pressure-sensitive adhesive. Moreover, as an example of the adhesive force decreasing in the low temperature region, an acrylic pressure-sensitive adhesive that reversibly changes between a crystalline state and an amorphous state can be mentioned.

  In this invention, peeling force is measured by 180 degree direction peel strength when peeling 1 cm width insulating resin bonded together with the reinforcement board through the organic substance layer. The peeling speed when measuring the peeling force is 300 mm / min. In the present invention, the peel force is preferably in the range of 0.098 N / m to 98 N / m.

  If the peeling force when peeling the insulating resin from the reinforcing plate is less than 0.098 N / m, the insulating resin may peel from the organic layer during circuit pattern formation. On the other hand, when the peeling force is greater than 98 N / m, when the circuit board is a circuit board based on a flexible film, the flexible film after peeling may be deformed or curled. The peeling interface may be either the interface between the reinforcing plate and the organic material layer or the interface between the organic material layer and the circuit board, but the step of removing the organic material layer from the circuit board can be omitted, so the interface between the organic material layer and the circuit board. It is more preferable to peel off.

  In order to improve the adhesive force between the reinforcing plate and the organic layer, the reinforcing plate may be subjected to a primer treatment such as application of a silane coupling agent. In addition to the primer treatment, cleaning by ultraviolet treatment or ultraviolet ozone treatment, surface roughening treatment such as chemical etching treatment, sand blast treatment or fine particle dispersion layer formation is also preferably used.

  The thickness of the organic layer is preferably in the range of 0.1 μm to 20 μm, more preferably in the range of 0.3 μm to 10 μm.

  In the case where the circuit board is a circuit board based on a flexible film, the flexible film is preferably conditioned before being attached to the reinforcing plate. The flexible film has a characteristic of repeatedly expanding and contracting depending on the environment such as heat and humidity. For example, when a flexible film expanded by temperature or humidity is bonded to a reinforcing plate to form a highly accurate circuit pattern, the flexible film contracts after peeling from the reinforcing plate, so the circuit pattern on the flexible film The positional accuracy of the is reduced. Alternatively, when a flexible film that has shrunk due to temperature or humidity is bonded to a reinforcing plate to form a highly accurate circuit pattern, the flexible film expands after peeling from the reinforcing plate, so the circuit on the flexible film The pattern position accuracy decreases. From the above, it is preferable that the humidity adjustment is performed without overlapping the flexible film under a temperature condition of more than 0 ° C. and less than 100 ° C. and a humidity condition of 25% RH or more and 75% RH or less. When the temperature / humidity environment when the circuit pattern of the flexible film is bonded to the electronic component or other circuit board after being peeled from the reinforcing plate is known, it is preferable to match the environment.

  The circuit board is preferably heat-treated before processing. By performing the heat treatment, it is possible to suppress accumulation of heat shrinkage strain on the circuit board due to the thermal history of the circuit board manufacturing process. The heat treatment temperature is preferably 100 ° C. or higher, and more preferably the highest temperature in the circuit board manufacturing process.

  Further, an example of a circuit board manufacturing method using the reinforcing plate of the present invention will be described with reference to FIGS. A silane coupling agent is applied to a reinforcing plate 702 (for example, an aluminoborosilicate glass plate) having a thickness of 0.7 mm using a spin coater, blade coater, roll coater, bar coater, die coater, or screen printer. In order to uniformly apply a thin film of a silane coupling agent having a relatively low viscosity to a single-wafer substrate that is intermittently sent, it is preferable to use a spin coater. After the silane coupling agent is applied to the glass substrate, it is dried by heat drying or vacuum drying to obtain a silane coupling agent layer having a thickness of 20 nm.

  Next, an ultraviolet curable organic material 701 is applied on the silane coupling agent layer by a spin coater, a blade coater, a roll coater, a bar coater, a die coater, or a screen printing machine. In order to uniformly apply an organic substance having a relatively high viscosity onto the silane coupling agent layer of the single-wafer substrate that is intermittently sent, it is preferable to use a die coater. After the organic layer 701 is formed on the silane coupling agent layer, the layer is dried by heat drying or vacuum drying to obtain an ultraviolet curable organic layer (hereinafter referred to as an organic layer) having a thickness of 2 μm. An air blocking film in which a silicone resin layer is provided on a polyester film film is attached to the organic layer 701 and left for one week. Instead of laminating the air blocking film, it can be stored in a nitrogen atmosphere or in a vacuum. It is also possible to apply the organic material layer to a long film substrate, transfer it to a single wafer substrate after drying.

  Further, the silane coupling agent may be added to the organic layer 701 instead of being applied to the surface of the reinforcing plate 702. Even if the silane coupling agent is applied to the reinforcing plate 702 or added to the organic layer 701, the same effect can be obtained.

  The organic material layer 701 may be initially formed on the flexible film side, may be formed on the reinforcing plate side, or may be formed on both sides. It is easy to form the organic layer, and when peeling the flexible film, it can be peeled off so that the organic layer remains on the reinforcing plate side instead of the flexible film side, so it is better to form the organic layer on the reinforcing plate side preferable.

  Next, the air blocking film is peeled off and a flexible film (for example, polyimide film) 101 is attached. The thickness of the flexible film 101 is preferably in the range of 4 μm to 125 μm. A metal layer may be formed in advance on one side or both sides of the flexible film 101. If a metal layer is provided on the reinforcing plate bonding surface side of the flexible film 101, it can be used as a ground layer for shielding electromagnetic waves. The flexible film may be pasted in a cut sheet of a predetermined size, or may be pasted and cut while being unwound from a long roll. For the pasting operation, a roll laminator or a vacuum laminator can be used. After the flexible film 101 is pasted, the organic layer 701 is irradiated with ultraviolet rays to cause crosslinking.

  Thereafter, in the same process as when the reinforcing plate is not used, formation of the first metal layer 201 (FIG. 3- (1)), formation of the patterned plating resist layer 301 (FIG. 3- (2)), Formation of the second metal layer 202 (FIG. 3- (3)), etching of the second metal layer (FIG. 3- (4)), peeling of the plating resist layer (FIG. 4- (1)), Each step of etching (FIG. 4- (2)) and etching of the surface of the resin 101 between the wirings (FIG. 4- (3)) can be performed.

  EXAMPLES Hereinafter, although this invention is demonstrated in detail based on an Example, this invention is not limited to these.

Example 1
This will be described with reference to FIGS. Organic film layer 701 (UV curable adhesive “SK Dyne” SW22) that can peel off the flexible film 101 of 25 μm thick polyimide film (“Kapton” (trade name) 100EN manufactured by Toray DuPont Co., Ltd.) To a reinforcing plate 702 that is a flat glass plate. The organic layer 701 was irradiated with 1 J / cm ² of UV after fixing the flexible film 101 to the reinforcing plate 702 to reduce the adhesive force.

  Next, after the surface of the flexible film substrate 101 was subjected to nitrogen plasma treatment, an alloy film of Ni: Cr = 80: 20 was formed by sputtering to 10 nm, then copper was formed to 100 nm by sputtering, and the first metal layer 201 was formed. (FIG. 3- (1)). The first metal layer 201 was used as a conductive layer for electrolytic plating power supply.

Next, a positive plating resist 301 for forming a wiring pattern was formed on the first metal layer 201 to a thickness of 15 μm. As a plating resist, a positive photosensitive liquid resist “PMER P-LA900PM” (Tokyo Ohka Kogyo Co., Ltd.) used for semiconductor elements is used, and a plating resist 301 having a resist thickness of 15 μm and L / S = 7/8 μm is used. Formed. “PMER P-LA900PM” was applied with a spin coater to a thickness of 15 μm, and then cured at 90 ° C. for 30 minutes. Next, the wiring formation portion is exposed to UV light of 800 mJ / cm ² , then developed with 3% TMAH (tetramethylammonium hydroxide) aqueous solution, and the pattern of the plating resist 301 is formed by opening the resist in the wiring formation portion. (FIG. 3- (2)).

  At this time, a resist pattern as shown in FIG. 5 was formed as follows. As inner leads (IL), rectangular bonding pads 802 of 7 μm × 50 μm were arranged on two long sides of a 9 mm × 2 mm rectangle 801 at a pitch of 15 μm, 600 pieces per side. The 7 μm side of the bonding pad was placed in parallel with the long side of the 9 mm × 2 mm rectangle, and the center of the 50 μm side of the bonding pad was placed on the long side of the rectangle. Also, as outer leads (OL), a rectangular bonding pad of 24 μm × 50 μm, 600 pieces per side at a pitch of 50 μm, on two long sides of a rectangle 804 of 30 mm × 30 mm having the same center as the IL rectangle. 805 are arranged. The IL bond pad and the OL bond pad have a one-to-one correspondence and are connected by a wiring 803 having a width of 7 μm. These were made into 1 unit, and this was equally arrange | positioned on a 335 mm x 250 mm polyimide film at a pitch of 40 mm at 8 rows x 6 columns.

Next, the 2nd metal layer which is a copper layer was formed in the resist opening part by 12 micrometers in thickness (FIG. 3- (3)). Here, the thickness of the second metal layer is the length of A in FIG. For the electrolytic copper plating, a copper sulfate plating solution was used, and the plating conditions were a current density of 1 A / dm ² .

  Next, the cross section of the wiring was made rectangular. The etching solution is hydrogen peroxide 3 wt. %, Sulfuric acid 5 wt. %, A copper concentration of 6 g / L, and a hydrogen peroxide / sulfuric acid based etching solution to which 10 ml / L of “PTH-940” manufactured by Armex PE Co. was added as an additive was used. First, as a pretreatment for the rectangular etching, a heat treatment was performed at 80 ° C. for 30 minutes in a clean oven to form a gap at the interface between the wiring and the resist. Then, etching was performed by immersion in an etching solution at 23 ° C. for 60 seconds. The wiring cross section was made rectangular by these processes (FIG. 3- (4)).

Next, the entire surface of the resist 301 was irradiated with 2000 mJ / cm ² of UV, and the resist 301 was dissolved and peeled off with a 5% TMAH aqueous solution (FIG. 4- (1)).

  Next, a wiring was formed by removing the first genus layer 201 between the wirings using a hydrogen peroxide-sulfuric acid based etching solution. Further, the Ni: Cr = 80: 20 alloy layer, which is a part of the first metal layer, is a liquid that selectively etches only chromium or a chromium alloy without etching copper (“Mekku remover” (trade name) CH1960 MEC ( Etching (made by Co., Ltd.)) (FIG. 4- (2)). Next, the resin surface between the wirings from which the first metal layer was removed was etched by 0.2 μm with alkali permanganate (FIG. 4- (3)).

  Here, FIG. 6 shows a schematic wiring cross-sectional view of the bonding pad 802 in FIG. The target of rectangularization of each wiring cross section is that the difference between the wiring top width B and the wiring bottom width C is 2 μm or less, and the rounding height difference D of the wiring top is 1 μm or less. However, variations in wiring width and thickness within the same substrate are within an average value ± 2.0 μm, and those exceeding the average value ± 2.0 μm are regarded as defective. The width and height of 27 bond pads 802, 9 units, 3 units per unit, were measured. Table 1 shows the maximum values. In this embodiment, the maximum value of the difference between the top width B and the bottom width C of the wiring is 0.5 μm, and the maximum value of the top roundness difference D is 0.8 μm. The target cross-sectional shape was obtained. Further, a total of 960 units of 335 mm × 250 mm polyimide film in which 48 units were equally arranged in 8 rows × 6 columns at a pitch of 40 mm was subjected to a visual inspection for short circuit and disconnection. Those in which neither a short circuit nor disconnection occurred and the wiring width was within the range of the average value ± 2.0 μm were regarded as non-defective products, and the ratio of non-defective products was calculated as a yield. The yield was as stable as 96%.

Example 2
Wiring was formed in the same manner as in Example 1 except that a positive plating resist 301 for forming a wiring pattern was formed on the first metal layer 201 to a thickness of 14 μm.

  As shown in Table 1, the maximum value of the difference between the wiring top width B and the wiring bottom width C is 0.5 μm, and the maximum value of the top roundness difference D is 3 μm. No shape was obtained. Moreover, the yield at this time was as stable as 95% (Table 1).

Example 3
The hydrogen peroxide concentration of the etching solution for the rectangular etching is 1 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 0.5 μm, the maximum value of the roundness difference D of the top is 0.5 μm, and all 27 bonding pads 802 The target cross-sectional shape was obtained. Moreover, the yield at this time was as stable as 95%.

Example 4
The hydrogen peroxide concentration of the etching solution for the rectangular etching is 0.5 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 2.5 μm, the maximum value of the roundness difference D of the top is 0.7 μm, and the top width B and the bottom width C are In the difference, the target cross-sectional shape was not obtained. Moreover, the yield at this time was as stable as 95%.

Example 5
The hydrogen peroxide concentration of the etching solution for the rectangular etching is 5 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1.5 μm, the maximum value of the roundness difference D of the top is 0.5 μm, and all 27 bonding pads 802 The target cross-sectional shape was obtained. Moreover, the yield at this time was as stable as 95%.

Example 6
The hydrogen peroxide concentration of the etching solution for the rectangular etching is 6 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 2.5 μm, the maximum value of the roundness difference D of the top is 0.5 μm, and the top width B and the bottom width C are In the difference, the target cross-sectional shape was not obtained. Moreover, the yield at this time was as stable as 95%.

Example 7
The sulfuric acid concentration of the etching solution for the rectangular etching is 2 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1.0 μm, the maximum value of the top roundness difference D is 0.5 μm, and all 27 bonding pads 802 The target cross-sectional shape was obtained. Moreover, the yield at this time was as stable as 95%.

Example 8
The sulfuric acid concentration of the etching solution for the rectangular etching is 1 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 2.5 μm, and the maximum value of the top roundness difference D is 1.2 μm. The cross-sectional shape of was not obtained. Moreover, the yield at this time was as stable as 95%.

Example 9
The sulfuric acid concentration of the etching solution for the rectangular etching is 8 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1.0 μm, the maximum value of the top roundness difference D is 0.5 μm, and all 27 bonding pads 802 The target cross-sectional shape was obtained. Moreover, the yield at this time was as stable as 95%.

Example 10
The sulfuric acid concentration of the etching solution for the rectangular etching is 9 wt. Wiring was formed in the same manner as in Example 1 except that the process was performed in%. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 2.5 μm, the maximum value of the roundness difference D of the top is 0.4 μm, and the top width B and the bottom width C are In the difference, the target cross-sectional shape was not obtained. At this time, a stable yield of 95% was obtained.

Example 11
Wiring was formed in the same manner as in Example 1 except that a positive plating resist 301 for forming a wiring pattern was formed on the first metal layer 201 to a thickness of 17 μm. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1 μm, and the maximum value of the top roundness difference D is 0.8 μm. The cross-sectional shape of was obtained. Moreover, the yield at this time was as stable as 95%.

Example 12
Wiring was formed in the same manner as in Example 1 except that UV irradiation of 1000 mJ / cm ² was performed instead of heat treatment for the pretreatment of the rectangular etching. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1 μm, and the maximum value of the top roundness difference D is 0.8 μm. The cross-sectional shape of was obtained. Moreover, the AOI yield of the wiring shape at this time was as stable as 95%.

Example 13
Wiring was formed in the same manner as in Example 1 except that the pretreatment for the rectangular etching was carried out with a 5% TMAH solution at 23 ° C. for 1 minute instead of heat treatment. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1 μm, and the maximum value of the top roundness difference D is 0.8 μm. The cross-sectional shape of was obtained. Moreover, the yield at this time was as stable as 95%.

Example 14
Wiring was formed in the same manner as in Example 1 except that the pretreatment for the rectangular etching was not performed. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1 μm, and the maximum value of the top roundness difference D is 0.8 μm. The cross-sectional shape of was obtained. Further, the yield at this time was a low value of 75%. A stable gap could not be formed between the resist 301 and the metal layer 202, and there was a wiring that was not etched by the rectangular etching, and the wiring width varied and the yield was low.

Example 15
Wiring was formed in the same manner as in Example 1 except that the flexible film 101 was not bonded to the reinforcing plate 702. As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 0.5 μm, the maximum value of the roundness difference D of the top is 0.8 μm, and all 27 bonding pads 802 The target cross-sectional shape was obtained. However, the yield at this time was as low as 65%. Since the resist layer 301, which is a positive resist, is hard, the metal layer 202 is formed in unnecessary portions because the resist layer 301 is cracked or peeled off when bent in the process, and short-circuit defects frequently occur. Is the cause of the yield reduction.

Example 16
Except that a positive plating resist 301 for forming a wiring pattern is formed to a thickness of 18 μm and a second metal layer 202 that is a copper layer is formed to a thickness of 15 μm on the first metal layer 201, the same as in Example 1. Wiring formation was performed.

  As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 0 μm, and the maximum value of the top roundness difference D is 0.7 μm. The cross-sectional shape of was obtained. Moreover, the yield at this time was as stable as 94%.

Example 17
Except that a positive plating resist 301 for forming a wiring pattern is formed to a thickness of 21 μm and a second metal layer 202 that is a copper layer is formed to a thickness of 18 μm on the first metal layer 201, the same as in Example 1. Wiring formation was performed.

  As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring is 1 μm, and the maximum value of the roundness difference D of the top is 0.6 μm, which is the target for all 27 bonding pads 802. The cross-sectional shape of was obtained. Moreover, the yield at this time was as stable as 94%.

Comparative Example 1
This will be described with reference to FIGS. Organic film layer 701 (UV curable adhesive “SK Dyne” SW22) that can peel off the flexible film 101 of 25 μm thick polyimide film (“Kapton” (trade name) 100EN manufactured by Toray DuPont Co., Ltd.) To a reinforcing plate 702 that is a flat glass plate. The organic layer 701 was irradiated with 1 J / cm ² of UV after fixing the flexible film 101 to the reinforcing plate 702 to reduce the adhesive force.

  Next, after the surface of the flexible film substrate 101 was subjected to nitrogen plasma treatment, an alloy film of Ni: Cr = 80: 20 was formed by sputtering to 10 nm, then copper was formed to 100 nm by sputtering, and the first metal layer 201 was formed. (FIG. 7- (1)). The first metal layer 201 was used as a conductive layer for electrolytic plating power supply.

Next, a positive plating resist 301 for forming a wiring pattern was formed on the first metal layer 201 to a thickness of 15 μm. As the plating resist, a positive photosensitive liquid resist “PMER P-LA900PM” (Tokyo Ohka Kogyo Co., Ltd.) used for semiconductor elements is used, and a plating resist 301 having a resist thickness of 15 μm and L / S = 10/10 μm is used. Formed. “PMER P-LA900PM” was applied with a spin coater to a thickness of 15 μm, and then cured at 90 ° C. for 30 minutes. Next, the wiring formation part was exposed to ultraviolet rays of 800 mJ / cm ² , then developed with a 3% TMAH aqueous solution, and the resist of the wiring formation part was opened to form a pattern of the plating resist 301 (FIG. 7- (2 )). The resist pattern was the same as in Example 1.

Next, the 2nd metal layer which is a copper layer was formed in the resist opening part by 12 micrometers in thickness (FIG. 7- (3)). For the electrolytic copper plating, a copper sulfate plating solution was used, and the plating conditions were a current density of 1 A / dm ² .

Next, without rectifying the wiring cross-section, the entire surface of the resist 301 was irradiated with 2000 mJ / cm ² of UV, and then the resist 301 was dissolved and peeled off with a 5% TMAH aqueous solution (FIG. 7- (4)).

  Next, a wiring was formed by removing the first genus layer 201 between the wirings using a hydrogen peroxide-sulfuric acid based etching solution. Further, the Ni: Cr = 80: 20 alloy layer, which is a part of the first metal layer, is a liquid that selectively etches only chromium or a chromium alloy without etching copper (“Mekku remover” (trade name) CH1960 MEC ( Etching (manufactured by Co., Ltd.) (FIG. 8- (1)). Next, the resin surface between the wirings from which the first metal layer was removed was etched by 0.2 μm with alkaline permanganate (FIG. 8- (2)).

  As shown in Table 1, the maximum value of the difference between the top width B and the bottom width C of the wiring was 5.0 μm, the maximum value of the roundness difference D of the top was 3.2 μm, and the target cross-sectional shape was not obtained. Moreover, the yield at this time was as stable as 95%.

Comparative Example 2
Organic film layer 701 (UV curable adhesive “SK Dyne” SW22) that can peel off the flexible film 101 of 25 μm thick polyimide film (“Kapton” (trade name) 100EN manufactured by Toray DuPont Co., Ltd.) To a reinforcing plate 702 that is a flat glass plate. The organic layer 701 was irradiated with 1 J / cm ² of UV after fixing the flexible film 101 to the reinforcing plate 702 to reduce the adhesive force.

  Next, after the surface of the flexible film substrate 101 was subjected to nitrogen plasma treatment, an alloy film of Ni: Cr = 80: 20 was formed by sputtering to 10 nm, then copper was formed to 100 nm by sputtering, and the first metal layer 201 was formed. . The first metal layer 201 is used as a conductive layer for electrolytic plating power supply.

  Next, a plating resist 301 was formed to a thickness of 15 μm on the first metal layer 201. As the plating resist, “ORDYL E4715” (negative type) manufactured by Tokyo Ohka Co., Ltd. was used, and the pattern of the plating resist 301 was formed by opening the resist in the wiring forming portion. The resist pattern was the same as in Example 1.

  Next, a second metal layer, which is a copper layer, was formed to a thickness of 8 μm in the resist opening. However, since resist residues frequently occur in the openings of the resist layer 301, the wiring peeled after the second metal layer was formed, and the wiring could not be formed.

  The circuit board manufacturing method of the present invention is suitably used, for example, when producing a wiring board of an electronic device, an IC package interposer, a wafer level burn-in socket wiring board, and the like.

Sectional drawing which shows the one aspect | mode of the circuit board of this invention. Sectional drawing which shows the one aspect | mode of the circuit board of this invention. Sectional drawing which shows the one aspect | mode of the circuit board of this invention. Sectional drawing which shows the one aspect | mode of the circuit board of this invention. The schematic diagram which shows the test pattern used in the Example of the circuit board of this invention. Sectional drawing used by description of wiring cross-sectional shape. Sectional drawing which shows the one aspect | mode of the comparative example of this invention. Sectional drawing which shows the one aspect | mode of the comparative example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Flexible film 201 1st metal layer 202 2nd metal layer 301 Resist layer 701 Organic substance layer 702 Reinforcement board A Wiring height B Wiring top width C Wiring bottom width D Top roundness difference

Claims (8)

A method of manufacturing a circuit board having a metal layer on an insulating resin, the step of forming a first metal layer on the surface of the insulating resin, and a metal wiring pattern for the surface of the first metal layer as a first resist layer A method of manufacturing a circuit board, comprising: a step of providing a plating resist layer using a positive type photoresist; a step of forming a second metal layer by electrolytic plating; and a step of etching the exposed second metal layer with an etching solution. The etching solution is a hydrogen peroxide-sulfuric acid etching solution, and the sulfuric acid concentration is 2 wt. % Or more, 8 wt. % Or less and the hydrogen peroxide concentration is 1 wt. % Or more, 5 wt. The circuit board manufacturing method according to claim 1, wherein the circuit board is less than or equal to%. The method for manufacturing a circuit board according to claim 1, further comprising a step of forming a gap at an interface between the plating resist layer and the second metal layer after the second metal layer is formed. 4. The method for manufacturing a circuit board according to claim 3, wherein the step of forming a gap at the interface between the plating resist layer and the second metal layer is a heat treatment step. 4. The method for manufacturing a circuit board according to claim 3, wherein the step of forming a gap at the interface between the plating resist layer and the second metal layer is an ultraviolet irradiation step. 4. The method for manufacturing a circuit board according to claim 3, wherein the step of forming a gap at the interface between the plating resist layer and the second metal layer is a treatment step using an alkaline solution. The method for manufacturing a circuit board according to claim 1, wherein the thickness of the plating resist layer is 3 μm or more thicker than the thickness of the second metal layer. The method for manufacturing a circuit board according to claim 1, further comprising a step of fixing the insulating resin to the reinforcing plate through a peelable organic layer before forming the first metal layer on the surface of the insulating resin.

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