JP2010103390A - Phase change memory selection type electron source and pattern drawing apparatus - Google Patents

Abstract

A phase change memory selection type electron source and a drawing apparatus capable of drawing a pattern with a smooth pattern outline and a high resolution are provided.
A phase change memory selective electron source according to the present invention includes a first electrode group in which a plurality of first electrodes extending in one direction are arranged, a second electrode extending in another direction orthogonal to the one direction. A second electrode group in which a plurality of electrodes are arranged, and a matrix electrode portion including a resistance layer provided between the first electrode group and the second electrode group, and in order on the matrix electrode portion, A phase change memory layer, an electron passage layer, and a surface electrode, which change and locally change in resistance value, are formed. A first power supply for applying a voltage to the matrix electrode and the surface electrode; a second power supply for applying a voltage to at least one first electrode and at least one second electrode; and based on the pattern And a pattern generation unit that selects the first electrode and the second electrode and applies a voltage from the second power supply unit.
[Selection] Figure 1

Description

  The present invention relates to a phase change memory selection type electron source used for pattern drawing using an electron beam and a drawing apparatus provided with this phase change memory selection type electron source, and in particular, the contour of a pattern is smooth and with high resolution. The present invention relates to a phase change memory selection type electron source capable of pattern drawing and a drawing apparatus.

Recently, an electron beam is scanned to draw a predetermined pattern. However, when drawing by scanning an electron beam, drawing time is required. Therefore, a predetermined pattern is collectively drawn on the substrate at the same magnification using an electron beam.
For example, various electron beam exposure apparatuses and electron beam drawing apparatuses using a method of driving an electron emission region of a planar electron source with a two-dimensional matrix circuit have been proposed (see Patent Documents 1 to 3).

  In Patent Document 1, a plurality of cells subdivided into a plurality of lattices are arranged in a matrix, each generating a pattern signal from a planar electron emission source that operates independently, and pattern data, An electron beam exposure apparatus comprising a pattern generator for outputting to the electron emission source and an electron optical system for projecting an electron beam of a desired pattern emitted from the electron emission source onto an exposed surface is described. ing.

  Patent Document 2 discloses an electron source capable of emitting electrons only from portions corresponding to lattice points of a matrix (lattice) composed of a plurality of surface electrode groups and a plurality of lower electrode groups. (See FIG. 3).

  Patent Document 3 describes an electron beam drawing apparatus equipped with a multi-electron beam source produced by two-dimensionally arranging thin film electron sources in a lattice shape. An electron beam having the shape of the integrated circuit pattern to be emitted is emitted.

JP-A-6-236840 JP-A-2005-317657 JP 2007-12633 A

  In the method of driving the electron emission region of the planar electron source by the two-dimensional matrix circuit such as the electron beam exposure apparatus disclosed in Patent Document 1, the electron source disclosed in Patent Document 2, and the electron beam drawing apparatus disclosed in Patent Document 3, all of them are electrons. Since the emission area is a union of matrix elements, the contour of the pattern to be drawn has a problem that the contour to be actually drawn becomes stepped when the direction of the line such as a curved pattern changes continuously. is there. Thus, conventionally, there has been a problem that the outline is stepped and sufficient resolution cannot be obtained.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a phase change memory selection type electron source and a drawing apparatus capable of solving the problems based on the above prior art and drawing a pattern with a smooth pattern outline and high resolution.

  To achieve the above object, according to a first aspect of the present invention, there is provided a phase change memory selective electron source that emits electrons in a predetermined pattern, wherein a first electrode extending in one direction is formed on a plurality of planes. A first electrode group, a second electrode group in which a second electrode extending in another direction orthogonal to the one direction is arranged on a plurality of planes, and the first electrode group and the A plate-like matrix electrode portion provided with a resistance layer provided between the second electrode group and a surface on the first electrode side of the matrix electrode portion, which changes phase by heating, A phase change memory layer whose resistance value locally changes, a surface electrode provided opposite to the phase change memory layer, an electron passage layer provided between the phase change memory layer and the surface electrode, A voltage is applied between the matrix electrode portion and the surface electrode. A second power supply for applying a voltage to the power supply section, at least one first electrode of the first electrode group of the matrix electrode section, and at least one second electrode of the second electrode group And a first electrode of the first electrode group and a second electrode of the second electrode group based on the pattern and the pattern of emitting electrons, and the selected first electrode and the second electrode And a pattern generation unit that applies a voltage to the two electrodes by a second power supply unit.

In the present invention, the electron passage layer is preferably provided with a plurality of quantum wires extending in a first direction from the matrix electrode toward the surface electrode at a predetermined interval.
In the present invention, it is preferable that the phase change memory layer is made of a chalcogenide semiconductor.

  According to a second aspect of the present invention, there is provided a phase change memory selection type electron source that emits electrons in a predetermined pattern, wherein the first electrode extending in one direction is arranged on a plurality of planes. A group, a second electrode group in which a second electrode extending in another direction orthogonal to the one direction is arranged on a plurality of planes, and between the first electrode group and the second electrode group A plate-like matrix electrode portion provided with a resistance layer provided on the surface and a surface of the matrix electrode portion on the first electrode side, which changes phase by heating and changes its resistance value locally. A phase change memory layer; a surface electrode provided opposite to the phase change memory layer; an electron passage layer provided between the phase change memory layer and the surface electrode; the matrix electrode portion; and the surface electrode. A first power supply for applying a voltage between the matrix and the matrix A second power supply unit for applying a voltage to at least one first electrode of the first electrode group of the electrode unit and at least one second electrode of the second electrode group; and emitting the electrons A first electrode of the first electrode group and a second electrode of the second electrode group are selected based on a pattern to be transmitted, and a second is selected for the selected first electrode and second electrode. A phase change memory selection type electron source having a pattern generation unit for applying a voltage by a power source unit, and the surface change electrode of the phase change memory selection type electron source. And a stage having a stage.

In the present invention, the electron passage layer is preferably provided with a plurality of quantum wires extending in a first direction from the matrix electrode toward the surface electrode at a predetermined interval.
In the present invention, it is preferable that the phase change memory layer is made of a chalcogenide semiconductor.

  According to the phase change memory selection type electron source and the drawing apparatus of the present invention, the contour of the pattern to be drawn can be drawn smoothly, and further, the pattern drawing can be performed with high resolution.

Hereinafter, a phase change memory selective electron source and a drawing apparatus according to the present invention will be described in detail based on preferred embodiments shown in the accompanying drawings.
FIG. 1A is a schematic cross-sectional view showing a phase change memory selection type electron source according to an embodiment of the present invention, and FIG. 1B shows the phase change memory layer temperature on the vertical axis and the horizontal axis on the horizontal axis. It is a graph for taking the position and explaining the formation method of a drawing pattern.
FIG. 2 is a schematic cross-sectional view showing a phase change memory selective electron source according to an embodiment of the present invention. FIG. 3 is a block diagram showing a main part of the configuration of the phase change memory selection type electron source according to the embodiment of the present invention.

A phase change memory selective electron source 10 shown in FIG. 1 includes a planar surface electrode 12, a planar matrix electrode portion 14, a phase change memory layer 15, and an electron passage layer 16.
A phase change memory layer 15 is formed on the upper surface of the planar matrix electrode portion 14. A surface electrode 12 is provided opposite to the phase change memory layer 15. An electron passage layer 16 is formed between the surface electrode 12 and the phase change memory layer 15. The surface electrode 12, the phase change memory layer 15, the matrix electrode unit 14, and the electron passage layer 16 are connected.

The surface electrode 12 is composed of, for example, a titanium thin film 13a and a gold thin film 13b. The titanium thin film 13a is formed to flatten the surface of the gold thin film 13b, that is, the surface 12a of the surface electrode 12. If the gold thin film 13b can be planarized, a material other than the titanium thin film 13a can be used.
Further, the shape of the surface electrode 12 is not particularly limited as long as it is planar.
Furthermore, the surface electrode 12 may have a single layer structure. In this case, for example, a metal, a semiconductor, carbon, a carbon compound, and a conductive material can be used for the surface electrode 12.

The matrix electrode portion 14 has a generally flat plate shape as a whole, and a plurality of rectangular strip-shaped Y electrodes 30 (first electrodes) extending in the Y direction (one direction) are provided on the same plane via an insulator 31. The first electrode group arranged on the upper side with a predetermined gap and the rectangular X-shaped electrode (second electrode) extending in the X direction (other direction) orthogonal to the Y direction are an insulator ( A plurality of second electrode groups arranged on the same plane with a predetermined gap therebetween, and a resistance layer 32 provided between the Y electrode group and the X electrode group, Have The intersection of the Y electrode 30 and the X electrode 34 is rectangular.
The Y electrode 30 and the X electrode 34 are made of tungsten, for example.

The resistance layer 32 functions as a heater for heating the phase change memory layer 15. By applying an alternating current or direct current as a method of applying a voltage to the Y electrode 30 and the X electrode 34 with respect to the resistance layer 32, dielectric heating or resistance heating can be performed.
In the case of dielectric heating, the resistance layer 32 can be made of a heat-resistant polymer such as polyimide or phenol resin.
In the case of resistance heating, as the resistance layer 32, for example, a nickel alloy material such as nickel-chromium or copper-nickel or a ceramic material such as alumina, aluminum nitride, silicon carbide, or silicon nitride is used. In addition, a desired resistance value can be obtained by adding a metal such as iron, aluminum or silicon or a semiconductor material to the resistance layer 32.

In the matrix electrode 14, an insulating layer 40 made of, for example, silicon nitride is formed on the surface on the X electrode 34 side. On the surface of the insulating layer 40, a metal layer 42 used as a ground (GND) is made of, for example, tungsten. An insulating substrate 44 such as a glass substrate is provided below the metal layer 42.
Note that the position of the ground (GND) is not limited to the position of the metal layer 42. For example, a stage 64 (see FIG. 4) provided in the drawing device 60 described later may be grounded (GND).

The phase change memory layer 15 is formed on the surface of the matrix electrode portion 14 on the Y electrode group 30 side. The phase change memory layer 15 changes, for example, to an amorphous state (high resistance state) and a crystalline state (low resistance state) having different electrical resistances. For example, when the threshold temperature is exceeded, the phase change memory layer 15 undergoes a phase change and becomes amorphous. Thus, the electrical resistance value is constituted by a substance that varies greatly, for example, 10 times to 100 times. The phase change memory layer 15 can change the resistance value locally. The phase change memory layer 15 can set a threshold temperature depending on the composition ratio of the chalcogenide compound.
The phase change memory layer 15 is made of, for example, a chalcogenide semiconductor. The phase change memory layer 15 is, for example, based on an antimony-tellurium-based alloy such as GeSbTe (germanium / antimony / tellurium), AgInSbTe (silver / indium / antimony / tellurium), or BiGeTe (bismuth / germanium / tellurium). And the like based on bismuth-tellurium-based alloys.
In the present embodiment, a substance that constitutes the phase change memory layer 15 is a substance that causes a phase change when the threshold temperature is exceeded and whose electric resistance value changes greatly, for example, 10 to 100 times. Is not particularly limited.

  The first power supply unit 18 applies a DC voltage to the Y electrode group of the surface electrode 12 and the matrix electrode unit 14, and the surface electrode 12 side has a positive potential and the Y electrode group (each Y electrode) has a negative potential. It is. As will be described later, the first power supply unit 18 is connected to the Y electrode group (each Y electrode) via the first control unit 50. As will be described later, electrons e are emitted from the surface 12 a of the surface electrode 12 by the first power supply unit 18.

As shown in FIG. 2, the electron passage layer 16 is provided with a plurality of quantum wires 20 extending in the first direction D from the back electrode 14 toward the front electrode 12 with a predetermined interval s.
In the electron passage layer 16, the quantum wire 20 has a length extending from the surface 15 a of the phase change memory layer 15 to the back surface 12 b of the surface electrode 12, and the quantum wire 20 includes the surface 15 a and the surface 15 a of the phase change memory layer 15. Each of the front electrodes 12 is connected perpendicularly to the back surface 12b. As will be described later, since electrons e are emitted from each quantum wire 20, the resolution for drawing is determined by the arrangement state of the quantum wires 20 in the electron transmission layer 16.

In the present embodiment, the quantum wire 20 is formed with, for example, a plurality of, for example, three regions having different thicknesses at predetermined intervals in the first direction D. In the regions having different thicknesses, the thin portions in the first direction become the end portions 20a, and constitute the quantum dots 22 partitioned by the end portions 20a.
In the quantum wire 20, for example, three quantum dots 22 are formed, and by applying a voltage to both ends of the quantum wire 20 so that the energy level values of the electrons in each quantum dot 22 coincide with each other. Electron conduction occurs due to the resonant tunneling effect between the quantum dots 22.

In addition, the quantum wire 20 can be stabilized over time by terminating the surface with atoms such as oxygen, nitrogen, carbon, hydrogen, or chlorine, for example.
The quantum wire 20 is made of a thin wire-like conductor whose thickness is such that the quantum effect is manifested. The quantum wire 20 is, for example, a metal, carbon, a carbon compound, a charge transfer complex, a high conductivity It is composed of molecules or semiconductors.
The thickness of the quantum wire 20 is 10 nm or less, for example, at the thickest portion. When the quantum wire 20 is made of silicon, the thickness of the quantum wire 20 is 5 nm or less.
The interval s between the quantum wires 20 varies depending on the material constituting the quantum wires 20, and is, for example, not less than the atomic interval of the material constituting the quantum wires 20, and preferably 0.5 nm or more. In the present embodiment, the drawing resolution is determined by the interval s between the quantum wires 20.

In the present embodiment, the electron passage layer 16 has a quantum wire structure in which a plurality of quantum wires 20 extending in the first direction D are provided with a predetermined interval s. However, the configuration of the electron passage layer 16 is as follows. However, the present invention is not limited to this.
For example, if the electrons are accelerated and emitted so that the straightness of the electrons is sufficient for the pattern to be drawn, a material other than the quantum wire structure can be used as the electron passage layer 16. . As the electron passage layer 16, for example, an MIM (Metal Insulator Metal) structure or a MIS (Metal Insulator Semiconductor) structure can be used.

  In the present embodiment, the front surface electrode 12 has a flat front surface 12a and back surface 12b, but is not limited thereto. For example, in order to improve the straightness of the electrons e after being emitted from the surface 12a, the surface electrode 12 can be locally concave in a region aligned with the upper part of each quantum wire 20.

In addition, each quantum wire 20 is not limited to being connected to the surface electrode 12 or the phase change memory layer 15, that is, directly in electrical contact, and each quantum wire 20 has a nanometer order around it. The electrical carriers may be conducted between the front surface electrode 12 or the back surface electrode 14 and each quantum wire 20 by a tunnel effect.
Further, the quantum wire 20 constituting the electron passage layer 16 may have a constant thickness without forming the quantum dots 22. In this case, the thickness d of the quantum wire 20 is simply the thickness of the quantum wire 20.
In the present invention, the nanometer order is from 1 nm to 100 nm, and refers to the size at which the quantum confinement effect is manifested.

As shown in FIG. 3, in the phase change memory selection type electron source 10 of the present embodiment, in the matrix electrode 14, the first control unit 50 is connected to the Y electrode group (each Y electrode 30). A second control unit 52 is connected to the electrode group (each X electrode 34).
A second power supply unit 54 is connected to the first control unit 50 and the second control unit 52.

The second power supply unit 54 includes at least one Y electrode 30 of the Y electrode group of the matrix electrode unit 14 and the X electrode group via the first control unit 50 and the second control unit 52. A voltage is applied between at least one X electrode 34. Thereby, the resistance layer 32 is heated, and the phase change memory layer 15 can be phase-changed (amorphized).
Note that the voltage applied in the second power supply unit 54 may be alternating current or direct current. In the case of alternating current, the resistance layer 32 is heated by dielectric heating. In the case of direct current, for example, the resistance layer 32 is heated by resistance application by applying pulses.

The first control unit 50 is for applying a predetermined voltage to at least one and all of the Y electrodes 30 in the Y electrode group, and each Y electrode 30 and the second power supply unit. 54 is switched. The first control unit 50 has a function of bringing all the Y electrodes 30 of the Y electrode group into a conductive state.
A known terminal selection device (selector) can be used for the first control unit 50.

The second control unit 52 is for applying a predetermined voltage to at least one of the X electrodes 34 of the X electrode group and a maximum of all of them. The connection state with the power supply unit 54 is switched. Further, the second control unit 52 has a function of bringing all the X electrodes 34 of the X electrode group into a conductive state.
A known terminal selection device (selector) can be used for the second control unit 52.

In addition, a pattern generation unit 56 is connected to the first control unit 50, the second control unit 52, and the second power supply unit 54.
The pattern generation unit 56 selects the Y electrode 30 of the Y electrode group and the X electrode 32 of the X electrode group based on the pattern of the electron beam emitted from the surface 12a of the surface electrode 12, and the selected Y electrode 30 and X A voltage is applied to the electrode 34 by the second power supply unit 54.
Here, in the matrix electrode portion 14, the intersection of the Y electrode and the X electrode is represented by coordinates (X, Y). In this case, the pattern generation unit 56 converts the pattern to be drawn into intersection points, that is, the above coordinates, and obtains pattern coordinates. As the coordinate conversion method of the pattern coordinates, for example, various coordinate conversion methods used in the electron beam exposure apparatus are used.

The pattern generation unit 56 obtains coordinates of a region where electrons are not emitted (hereinafter referred to as non-pattern coordinates) from the coordinates representing this pattern. Based on the non-pattern coordinates, the selected Y electrode and X electrode are determined.
Further, the pattern generation unit 56 obtains coordinates adjacent to the non-pattern coordinates (hereinafter referred to as adjacent coordinates) among the pattern coordinates. Based on the adjacent coordinates, the selected Y electrode and X electrode are determined. In this way, the non-pattern portion and the Y electrode and the X electrode in the adjacent region of the non-pattern portion are determined. Note that non-pattern coordinates may be obtained from the beginning.

In the pattern generation unit 56, as the non-pattern unit, the Y electrode selected by the first control unit 50 and the first electrode can be applied to the selected Y electrode and the X electrode from the second power supply unit 54. 2, the first selection signal for connecting the X electrode selected in the second control unit 52 and the second power supply unit 54 to the first control unit 50 and the second power supply unit 54. 2 has a function of outputting to the second control unit 52.
Further, in the pattern generation unit 56, the first control unit 50 selects the Y electrode and the X electrode selected as the adjacent region of the non-pattern unit so that the voltage can be applied from the second power supply unit 54. The second selection signal for connecting the Y electrode to the second power supply unit 54 and connecting the X electrode selected in the second control unit 52 to the second power supply unit 54 It has a function of outputting to the control unit 50 and the second control unit 52.

  When the pattern is drawn, the pattern generation unit 56 outputs a second selection signal to the first control unit 50 and the second control unit 52 to select the Y electrode and the X electrode. After that, when the resistance layer 32 is heated, the second power supply unit is set so that the phase change memory layer 15 is close to a threshold temperature at which no phase change occurs, for example, as in the temperature profile 46a shown in FIG. A predetermined pulse voltage from 54 is applied to the Y electrode and the X electrode via the first control unit 50 and the second control unit 52 for a predetermined time. Thereby, the phase change memory layer 15 located above the adjacent region of the non-pattern part is locally heated.

Next, the pattern generation unit 56 outputs the second selection signal to the first control unit 50 and the second control unit 52 to select the Y electrode and the X electrode. After that, when the resistance layer 32 is heated, the second power supply unit 15 is set so that the phase change memory layer 15 becomes equal to or higher than the threshold temperature at which the phase change occurs, for example, as in the temperature profile 46b shown in FIG. A predetermined pulse voltage from 54 is applied to the Y electrode and the X electrode via the first control unit 50 and the second control unit 52 for a predetermined time.
Thereby, the temperature of the phase change memory layer 15 located above the non-pattern part exceeds the threshold temperature of the phase change and becomes amorphous, and the resistance value becomes 1000 times, for example, and the resistance value becomes high. Thus, electrons e are less likely to be injected into the electron passage layer 16 on the region where the resistance value of the phase change memory layer 15 is high, and emission of the electrons e is suppressed.

In the present embodiment, for example, as shown in FIG. 1A, the intersection of the Y electrode 30b and the X electrode 34 represented by coordinates (X _i , Y _j ) is an adjacent region of the non-pattern part. Assume that the intersection of the Y electrode 30a and the X electrode 34 represented by coordinates (X _i , Y _{j + 1} ) is a non-pattern part.
In this case, the region 32a sandwiched between the Y electrode 30a and the X electrode 34 represented by coordinates (X _i , Y _j ) is heated, and the region of the phase change memory layer 15 above this region 32a is less than the adjacent threshold temperature. Although it is heated.
Then, the region 32b sandwiched between the Y electrode 30b and the X electrode 34 represented by coordinates (X _i , Y _{j + 1} ) is heated, and the region of the phase change memory layer 15 above this region 32b is heated to a threshold temperature or higher. As a result, it becomes amorphous, that is, the resistance value becomes high. At this time, since the temperature of the adjacent region is also lower than the threshold temperature, but the temperature is high, the region 15a to be amorphized is an intersection represented by coordinates (X _i , Y _{j + 1} ) as shown in FIG. The region 48 extends to a wider width α than the width β of the portion, and extends to the intersection with the Y electrode 30a and the X electrode 34 shown in the region 17 (see FIG. 1A).
In this way, the pattern generation unit 56 controls the state of the phase change memory layer 15 above the intersection of the Y electrode 30 and the X electrode 34 represented by coordinates (X, Y) to draw a pattern. Accordingly, the portion where the electrons e are not emitted can be controlled.

In the phase change memory selection type electron source 10 of the present embodiment, the emission region of the electrons e is a set of rectangular intersections of the X electrode and the Y electrode selected by the matrix electrode unit 14 as described above. The temperature distribution is not limited and depends on the temperature distribution generated in the phase change memory layer 15 by heating the resistance layer 32.
Further, in the phase change memory selection type electron source 10 of the present embodiment, as described above, not only the upper region of each intersection part but also a part of the adjacent intersection part has electrons in the electron passage layer 16. e can be less likely to be injected. Thereby, a high resolution pattern is obtained. In addition, the contour of the pattern to be drawn can be smoothly connected instead of a set of rectangular intersections.

  In this embodiment, the phase change of the phase change memory layer 15 is caused by the threshold temperature. This phase change is caused by the pulse voltage applied to the resistance layer 32 sandwiched between the X electrode 34 and the Y electrode 30. The time relationship is obtained in advance. Based on the relationship between the pulse voltage and time obtained in advance, the phase change memory layer 15 is heated to the phase change temperature or heated to less than the phase change.

Next, a manufacturing method of the phase change memory selection type electron source 10 of the present embodiment will be described.
First, a tungsten layer, for example, is formed as the metal layer 42 on the insulating substrate 44, for example, a quartz substrate, by the CVD method. This metal layer 42 (tungsten layer) is used as the ground (GND) of the phase change memory selection type electron source 10.
Next, a silicon nitride layer, for example, is formed as the insulating layer 40 on the metal layer 42 (tungsten layer) by, eg, CVD.

Next, a tungsten film is formed to a thickness of 30 nm on the insulating layer 40 (silicon nitride layer) by, eg, CVD.
An electric beam resist is applied on the tungsten film to form a resist film.
Next, a striped X electrode pattern extending in the X direction (other directions) and having a width of 30 nm and a spacing of 10 nm is drawn with an electron beam and developed. Thereby, a resist pattern for the X electrode is formed. As a result, a portion of the tungsten film that does not become the X electrode is exposed.
Next, the exposed tungsten film is removed by dry etching or wet etching. Thereby, a plurality of X electrodes 34 are formed on the same plane. That is, an X electrode group is formed.
Next, the resist film is removed, and a silicon nitride (SiN) layer or a silicon carbide (SiO ₂ ) layer is formed as the resistance layer 32 by, eg, CVD so as to cover the X electrode group (each X electrode). .

Next, a tungsten film is formed to a thickness of 30 nm on the resistance layer 32 (silicon nitride layer or silicon carbide layer) by, eg, CVD.
An electric beam resist is applied on the tungsten film to form a resist film.
Next, a stripe-shaped Y electrode pattern having a width of 30 nm and an interval of 10 nm extending in the Y direction (one direction) orthogonal to the X electrode pattern is drawn with an electron beam and developed. Thereby, a resist pattern for the Y electrode is formed. As a result, a portion of the tungsten film that does not become the Y electrode is exposed.
Next, the exposed tungsten film is removed by dry etching or wet etching. Thereby, a plurality of Y electrodes are formed on the same plane. That is, a Y electrode group is formed.

  Next, the resist film is removed and the chalcogenide semiconductor layer (GeSbTe (germanium antimony tellurium) is formed as the phase change memory layer 15 by, for example, CVD or sputtering so as to cover the Y electrode group (each Y electrode). ), Those based on antimony and tellurium alloys such as AgInSbTe (silver, indium, antimony and tellurium), or those based on bismuth and tellurium alloys such as BiGeTe (bismuth, germanium and tellurium) A thickness of 50 nm is formed.

  Next, a polysilicon layer having a thickness of 1 μm is formed on the phase change memory layer 15 by, eg, CVD. Then, the surface of the polysilicon layer is planarized by, for example, a CMP method.

Next, in the polysilicon layer, a region corresponding to a region where the X electrode group and the Y electrode group formed below are formed is surrounded by a Teflon (registered trademark) frame. And each Y electrode is electrically connected.
Next, a platinum electrode is disposed at a position facing the polysilicon layer. Fill the Teflon frame with a hydrofluoric acid solution and immerse the platinum electrode. Then, a predetermined voltage is applied with the Y electrode as a positive electrode and the platinum electrode as a negative electrode, and anodization is performed.
Thereby, quantum wires extending in a direction perpendicular to the layer are uniformly formed in the polysilicon layer, an assembly of quantum wires is obtained, and the electron passage layer 16 is formed. The quantum wire is composed of nanometer-order silicon fine particles bonded in one row.

  Next, after the quantum wire is formed, a platinum electrode is disposed opposite to the quantum wire, and in this state, the platinum electrode is immersed in a sulfuric acid aqueous solution to electrically connect the Y electrodes to each other. Is a positive electrode, a platinum electrode is a negative electrode, and a predetermined voltage is applied to perform an electrochemical oxidation treatment. By this electrochemical oxidation treatment, an oxide film is formed on the surface of each quantum wire.

Next, a titanium thin film 13a is formed by sputtering, for example, as a surface electrode 12 so as to be in contact with the upper part of the electron passage layer, that is, the tips of all the quantum wires, and a gold thin film 13b is formed on the titanium thin film 13a. Form. Thus, the surface electrode 12 is formed.
The titanium thin film 13a is formed to flatten the gold thin film 13b. However, if the gold thin film 13b can be flattened, another conductive material other than the titanium thin film 13a can be used instead of the titanium thin film 13a. Can be formed.

Next, a drawing apparatus using the phase change memory selection type electron source of this embodiment will be described.
FIG. 4 is a schematic cross-sectional view showing a drawing apparatus having a phase change memory selection type electron source according to an embodiment of the present invention.
As shown in FIG. 4, in the drawing apparatus 60, the phase change memory selection type electron source 10 is disposed inside the vacuum chamber 62 with the surface 12 a of the surface electrode 12 facing the surface 64 a of the stage 64.

  Also, a pair of magnetic fields is applied in a direction perpendicular to the surface 12a (electron emission surface) of the surface electrode 12 of the phase change memory selection type electron source 10 (hereinafter simply referred to as “perpendicular direction”). Magnets 66 and 68 are provided so as to sandwich phase change memory selection type electron source 10 and stage 64. Magnet 66 is disposed to face back surface 44 b of insulating substrate 44 of phase change memory selection type electron source 10, and magnet 68 is disposed to face back surface 64 b of stage 64.

  In the drawing device 60, an acceleration power supply unit 70 that accelerates the electrons e emitted from the phase change memory selection type electron source 10 toward the stage 64 is provided. The acceleration power supply unit 70 applies a voltage between the surface electrode 12 and the stage 64, generates an electric field between the surface electrode 12 and the stage 64, and directs electrons e toward the stage 64 by the electric field. Accelerate.

  A substrate (drawing object) 80 is placed on the surface 64 a of the stage 64. The substrate 80 is a silicon wafer of 4 inches or more, for example. On the surface 80 a of the substrate 80, an electron beam resist film (drawing object) 82 is formed. The vacuum chamber 82 is provided with an evacuation device (not shown) such as a vacuum pump, and the inside of the vacuum chamber 82 can be set to a predetermined degree of vacuum.

In the drawing device 60 of the present embodiment, the phase change memory selected type electron source 10, the emitted electrons, a vertical magnetic field B, the vertical electric field E _1, moves in a spiral. At this time, if the electron e reaches the resist film 82 in one cycle or a plurality of cycles of electron movement, the surface thereof becomes a focal point, and the surface 12a of the surface electrode 12 of the phase change memory selection type electron source 10 is obtained. The pattern of the electron e immediately after being emitted from is reproduced on the resist film 82. For this reason, the vertical magnetic field B, the vertical electric field E ₁ , and the position h _{0 of the} resist film are adjusted so that the focus of the emitted electrons e becomes the resist film 82. For example, the vertical magnetic field B can be adjusted by changing the magnets 66 and 68 to those having different magnetic forces. In addition, the vertical electric field E ₁ can be adjusted by changing the voltage of the acceleration power supply unit 70.

In the drawing apparatus 60 according to the present embodiment, the vertical magnetic field B and the vertical electric field E ₁ are applied to the phase change memory selection type electron source 10, thereby approximately from the surface 12 a of the surface electrode 12 of the phase change memory selection type electron source 10. Electrons e can be emitted in the vertical direction, that is, within a range of 1 to 2 ° from the normal line of the surface 12a of the surface electrode 12.

Next, a drawing method of the drawing apparatus 60 using the phase change memory selection type electron source 10 of the present embodiment will be described.
First, all the X electrodes are electrically connected by the second control unit 52, and all the Y electrodes are electrically connected by the first control unit 50. Then, a voltage is applied from the second power supply unit 54 to the X electrode and the Y electrode, the entire region of the resistance layer 32 is heated, and then gradually cooled to bring the entire region of the phase change memory layer 15 into a low resistance state. .
Next, the first control unit 50 releases the electrical connection between all the Y electrodes, and the second control unit 52 releases the electrical connection between all the X electrodes.

Next, the pattern generation unit 56 obtains pattern coordinates, non-pattern coordinates, and adjacent coordinates (coordinates adjacent to the non-pattern coordinates) based on the drawing pattern.
In the pattern generation unit 56, the selected Y electrode and X electrode are determined based on the adjacent coordinates, and the selected Y electrode and X electrode are determined based on the non-pattern coordinates.

  Next, the pattern generation unit 56 outputs the second selection signal to the first control unit 50 and the second control unit 52 to select the Y electrode and the X electrode. Thereafter, a predetermined pulse voltage is applied from the second power supply unit 54 to the Y electrode and the X electrode via the first control unit 50 and the second control unit 52 for a predetermined time, and the phase change memory layer 15 is For example, as in a temperature profile 46a shown in FIG. 1B, heating is performed near a threshold temperature that does not change phase.

Next, the pattern generation unit 56 outputs the first selection signal to the first control unit 50 and the second control unit 52 to select the Y electrode and the X electrode. Thereafter, a predetermined pulse voltage is applied from the second power supply unit 54 to the Y electrode and the X electrode via the first control unit 50 and the second control unit 52 for a predetermined time, and the phase change memory layer 15 is For example, it heats more than the threshold temperature which changes phase like the temperature profile 46b shown in FIG.
In this case, as described above, the region 32a sandwiched between the Y electrode 30a and the X electrode 34, which is an adjacent region of the non-pattern portion represented by the coordinates (X _i , Y _j ) shown in FIG. The region of the phase change memory layer 15 above this region 32a is heated, although it is below the adjacent threshold temperature.

Then, a region 32b sandwiched between the Y electrode 30b and the X electrode 34, which is a non-pattern portion represented by the coordinates (X _i , Y _{j + 1} ) shown in FIG. 1A, is heated, and the region 32b above the region 32b is heated. The region of the phase change memory layer 15 is heated to a temperature equal to or higher than the threshold temperature, becomes amorphous and has a high resistance value. At this time, since the temperature of the adjacent region is also lower than the threshold temperature, but the temperature is high, the region 15a to be amorphized is an intersection represented by coordinates (X _i , Y _{j + 1} ) as shown in FIG. The region 48 extends to a width α wider than the width β of the portion, and as shown in the region 17 (see FIG. 1A), the region 48 reaches the intersection with the Y electrode 30a and the X electrode 34.
In this way, the pattern generation unit 56 controls the state of the phase change memory layer 15 above the intersection of the Y electrode 30 and the X electrode 34 represented by coordinates (X, Y) to draw a pattern. Accordingly, the surface 12a of the surface electrode 12 is partitioned into a portion where electrons e are not emitted and a portion where electrons e are emitted.

After the amorphization is completed, all the Y electrodes are electrically connected by the first control unit 50, and all the X electrodes are electrically connected by the second control unit 52.
Then, a predetermined voltage is applied from the first power supply unit 18 with the Y electrode group, that is, all the Y electrodes are set to minus (negative) and the surface electrode 12 is set to plus (positive).
In this case, a sufficient amount of electrons are injected into each quantum wire 20 (see FIG. 2) from the region of the phase change memory layer 15 in the phase change memory layer 15 that is not amorphousized. In this case, electrons are injected only into the quantum wires directly above the phase change memory layer 15 that is not amorphized.

The electrons injected into the quantum wires are accelerated and emitted through the surface electrode 12 toward the resist film 82 in the vacuum chamber 62.
The emitted electron beam is emitted from the surface 12a of the surface electrode 12 in a reverse pattern of a two-dimensional pattern formed at the intersection of the X electrode and the Y electrode selected in the matrix electrode portion 14, and on the resist film 82. Thus, an electronic image of this reverse pattern is formed. That is, an electronic image of the pattern to be drawn is formed on the resist film 82.

In the present embodiment, the electron beam image formed on the resist film 82 indicates that the emission region of the electrons e in the phase change memory selection type electron source 10 is an X electrode and a Y electrode selected by the matrix electrode unit 14. It depends on the temperature distribution generated in the phase change memory layer 15 due to the heating of the resistance layer 32, not on the set of rectangular intersections.
Further, in the drawing device 60, as in the phase change memory selection type electron source 10, when electrons are emitted from the surface 12 a of the surface electrode 12 in a pattern to be drawn, the contour of this pattern is changed to a rectangular intersection. Can be connected smoothly rather than a set of.

  Furthermore, in the drawing apparatus 60, as described above, a part of the region of the crossing portion that is adjacent to the crossing portion that does not emit electrons and that emits electrons can be a region that does not emit electrons. The electron emission can be controlled for a small area. Thereby, higher resolution can be obtained than the conventional one using a rectangular intersection.

  Further, in the drawing apparatus 60, the resist film 82 of the substrate 80 on the stage 64 can be irradiated in a substantially vertical direction from the surface 12a (electron emission surface) of the surface electrode 12 in a substantially vertical direction. For this reason, it is possible to draw a predetermined pattern all at once with the same magnification. Furthermore, by changing the size of the surface electrode 12 (electron passage layer 16) of the phase change memory selection type electron source 10, even when the drawing area is large, pattern drawing can be performed at the same magnification.

  The phase change memory selection type electron source and drawing apparatus of this embodiment can be suitably used for manufacturing various semiconductor devices such as a memory, an optical disk master such as a DVD, a hard disk, or a micromachine.

  As described above, the phase change memory selection type electron source and the drawing apparatus of the present invention have been described in detail. However, the present invention is not limited to the above-described embodiment, and various modifications and improvements can be made without departing from the gist of the present invention. Of course, you may do this.

(A) is typical sectional drawing which shows the phase change memory selection type | mold electron source which concerns on embodiment of this invention, (b) takes the temperature of a phase change memory layer on a vertical axis | shaft, and positions on a horizontal axis. It is a graph for demonstrating the formation method of a drawing pattern. It is a typical sectional view showing a phase change memory selection type electron source concerning an embodiment of the present invention. It is a block diagram which shows the principal part of a structure of the phase change memory selection type electron source which concerns on embodiment of this invention. It is a typical sectional view showing a drawing device which has a phase change memory selection type electron source concerning an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Phase change memory selection type electron source 12 Surface electrode 12a Surface 14 Matrix electrode part 15 Phase change memory layer 16 Electron passage layer 18 First power supply part 20 Quantum wire 22 Quantum dot 30 Y electrode 32 Resistance layer 34 X electrode 50 1st Control unit 52 second control unit 54 second power supply unit 56 pattern generation unit 60 drawing device 62 vacuum chamber 64 stage 80 substrate 82 resist film s interval

Claims (4)

A phase change memory selective electron source that emits electrons in a predetermined pattern,
A first electrode group in which a first electrode extending in one direction is arranged on a plurality of planes, and a second electrode in which a second electrode extending in another direction orthogonal to the one direction is arranged on a plurality of planes. A plate-like matrix electrode portion comprising a resistance layer provided between the two electrode groups and the first electrode group and the second electrode group;
A phase change memory layer that is provided on a surface of the matrix electrode portion on the first electrode side, changes phase by heating, and a resistance value locally changes;
A surface electrode provided opposite the phase change memory layer;
An electron passage layer provided between the phase change memory layer and the surface electrode;
A first power supply for applying a voltage between the matrix electrode and the surface electrode;
A second power supply unit for applying a voltage to at least one first electrode of the first electrode group of the matrix electrode unit and at least one second electrode of the second electrode group;
Based on the pattern of emitting electrons, the first electrode of the first electrode group and the second electrode of the second electrode group are selected, and the selected first electrode and second electrode are selected. And a pattern generation unit for applying a voltage by a second power supply unit.   2. The phase change memory selection type electron source according to claim 1, wherein the electron passage layer is provided with a plurality of quantum wires extending in a first direction from the matrix electrode toward the surface electrode at a predetermined interval.   3. The phase change memory selection type electron source according to claim 1, wherein the phase change memory layer is made of a chalcogenide semiconductor. The phase change memory selective electron source according to any one of claims 1 to 3,
A drawing apparatus comprising: a stage provided opposite to the surface electrode of the phase change memory selection type electron source and on which a drawing object is placed.

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