JP2010171551A - Voltage-controlled oscillation circuit and clock-signal generation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve a voltage-controlled oscillation circuit which reduces phase noise by improving linearity of changes in capacitance value of a variable capacitance with respect to a control voltage. <P>SOLUTION: The voltage-controlled oscillation circuit outputs oscillation signals OUT, OUTX each in which an oscillation frequency varies according to a control voltage. The circuit includes: a plurality of variable capacitances VAC1-VAC4 each in which a capacitance value varies according to an applied voltage; and divided-voltage generating parts R1-R4 that divide the control voltage so as to generate divided voltages VT, VT1-VT3 to be applied to the plurality of variable capacitances. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a voltage controlled oscillation circuit used for a radio transceiver and the like.

  A voltage controlled oscillation circuit is widely used to generate a clock signal. For example, in a wireless transceiver, it is used to generate a reference clock signal by a PLL (Phase Locked Loop) circuit having a voltage controlled oscillation circuit.

  FIG. 1 is a diagram showing a basic configuration of a voltage controlled oscillation circuit. As shown in FIG. 1, the voltage controlled oscillation circuit includes two transistors T1 and T2 that are differentially connected (anti-parallel connection), and a constant current source SI that is commonly connected to one terminal of T1 and T2. Two inductance elements L1 and L2 having one end connected to the other terminal of T1 and T2, respectively, and the other end commonly grounded, and a variable capacitance VAC connected between the other terminals of T1 and T2 And having. Complementary oscillation signals OUT and OUTX are output from the other terminals of T1 and T2.

  The variable capacitance VAC is realized by, for example, a varactor diode, and the capacitance changes according to the applied voltage. Therefore, in the voltage controlled oscillation circuit of FIG. 1, the capacitance of the variable capacitor VAC changes according to the control voltage VT, and the oscillation frequency changes accordingly.

  Since the voltage controlled oscillation circuit of FIG. 1 is widely known, further detailed description is omitted.

  FIG. 2 is a diagram showing a change in the capacitance value of the variable capacitor VAC with respect to the control voltage VT. As shown in FIG. 2, the capacitance value of the variable capacitor VAC changes according to the change in the predetermined range of the control voltage VT.

JP 2000-236218 A JP 2005-102226 A JP 2005-318509 A JP 2006-33071 A

Behzad Razavi “A 1.8GHz CMOS Voltage-Controlled Oscillator” ISSCC97 / SESSION 23 / ANALOG TECHNIQUES / PAPER SP 23.6

An important characteristic of the voltage controlled oscillator circuit is a phase noise characteristic. To reduce the phase noise of a voltage controlled oscillator, the control voltage improving the linearity of the change in the capacitance of the variable capacitance VAC to changes in VT, and the gain of the oscillation frequency of the voltage controlled oscillator with respect to the control voltage (K _VCO (Hz / V)) needs to be reduced. Since this gain is proportional to the rate of change (K _C (F / V)) of the capacitance value of the variable capacitor of the voltage controlled oscillation circuit with respect to the control voltage, the rate of change K can be used to reduce the phase noise of the voltage controlled oscillation circuit. _It is necessary to reduce _C and improve linearity.

As described above, in the conventional voltage controlled oscillation circuit, the change in the capacitance value of the variable capacitor with respect to the control voltage has a large non-linearity and the rate of change K _C is large, which is an obstacle to reducing the phase noise of the voltage controlled oscillation circuit. It was.

  The voltage controlled oscillation circuit of the embodiment is a voltage controlled oscillation circuit that outputs an oscillation signal whose oscillation frequency changes according to the control voltage. The voltage controlled oscillation circuit divides the variable capacitor into a plurality of variable capacitors, and the divided voltage generation unit controls the control voltage. A divided voltage generated by dividing the voltage is applied to a plurality of variable capacitors.

  In the voltage controlled oscillation circuit of the embodiment, since the change characteristic of the capacitance value of the variable capacitor with respect to the control voltage is effectively used within a relatively linear range, the linearity of the change in the capacitance value of the variable capacitor with respect to the control voltage Will improve.

  Further, the combination of the capacitance value of each of the plurality of variable capacitors and the divided voltage makes it possible to precisely set the change range of the capacitance value of the variable capacitor with respect to the control voltage.

FIG. 1 is a diagram showing a basic configuration of a conventional voltage controlled oscillation circuit. FIG. 2 is a diagram illustrating a change in capacitance value with respect to a control voltage of a variable capacitor of a conventional voltage controlled oscillation circuit. FIG. 3 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the first embodiment. FIG. 4 is a diagram illustrating changes in capacitance values with respect to control voltages of a plurality of variable capacitors in the voltage controlled oscillation circuit according to the first embodiment. FIG. 5 is a diagram illustrating a differential value of a change in capacitance value with respect to control voltages of a plurality of variable capacitors in the voltage controlled oscillation circuit according to the first embodiment. FIG. 6 is a diagram illustrating a change of a combined capacitance value obtained by combining the capacitance values of a plurality of variable capacitors of the voltage controlled oscillation circuit according to the first embodiment with respect to the control voltage. FIG. 7 is a diagram illustrating a differential value of a change in the combined capacitance value with respect to the control voltage, in which the capacitance values of a plurality of variable capacitors of the voltage controlled oscillation circuit according to the first embodiment are combined. FIG. 8 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the second embodiment. FIG. 9 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the third embodiment. FIG. 10 is a diagram illustrating characteristics of the voltage controlled oscillation circuit according to the third embodiment. FIG. 11 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the fourth embodiment. FIG. 12 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the fifth embodiment. FIG. 13 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the sixth embodiment. FIG. 14 is a diagram illustrating a circuit configuration of the voltage controlled oscillation circuit according to the seventh embodiment. FIG. 15 is a diagram illustrating a configuration example of a PLL circuit to which the voltage controlled oscillation circuit of the embodiment is applied.

  FIG. 3 is a diagram illustrating a configuration of the voltage controlled oscillation circuit according to the first embodiment.

  As shown in FIG. 3, the voltage controlled oscillation circuit of the first embodiment is commonly used for two transistors T1 and T2 that are differentially connected (reverse parallel connection) so as to oscillate, and one terminal of T1 and T2. Constant current source SI to be connected, two inductance elements L1 and L2 having one end connected to the other terminal of T1 and T2 and the other end commonly grounded, and the other of T1 and T2 A plurality (four in this case) of variable capacitors VAC1, VAC2, VAC3, VAC4 connected between the terminals and a plurality (four in this case) connected in series between the input terminal of the control voltage VT and the ground voltage source. And divided voltage generators having resistors R1, R2, R3, and R4, the control voltage VT is applied to the variable capacitor VAC1, and the divided voltages VT1, VT2, generated by the divided voltage generators VT3 Each is applied to the variable capacity VAC2, VAC3, VAC4. Complementary oscillation signals OUT and OUTX are output from the other terminals of T1 and T2.

  In the voltage controlled oscillation circuit of the first embodiment, for example, the transistors T1 and T2 are NMOS transistors having a channel length of 0.12 μm and a channel width of 100 μm. The variable capacitors VAC2, VAC3, and VAC4 are varactor diodes, each having a center capacitance of 0.5 pF. Inductance elements L1 and L2 have an inductance of 1.2H. Resistors R1, R2, R3, R4 each have a resistance value of 100 k ohms. Therefore, VT1 is 3/4 VT, VT2 is 1/2 VT, and VT1 is 1/4 VT.

  FIG. 4 is a diagram illustrating changes in the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT. FIG. 5 shows differential values of changes in capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT. 4 and 5, A is the capacitance value of VAC1 and its differential value, BA is the capacitance value of VAC2 and its differential value, C is the capacitance value of VAC3 and its differential value, D is the capacitance value of VAC4 and The differential value is shown.

As shown in FIGS. 4 and 5, the linearity improves as the variable capacitance is applied with a small divided control voltage. 5, as the change in the differential value is smaller K _C show that small, indicating that it is a linear characteristic as is constant. It can be seen that as the smaller divided control voltage is applied, the full width at half maximum of the differential value becomes wider and the linearity improves.

  As shown in FIG. 3, the capacitance value in the voltage controlled oscillation circuit is obtained by adding the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4. FIG. 6 shows a change of the combined capacitance value obtained by adding the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT. In FIG. 6, the graph indicated by P shows the change in the combined capacitance value. In FIG. 6, Q indicates a change in capacitance value in the case of the conventional example shown in FIG. 2, that is, a change in capacitance value when the control voltage VT is applied as a reference example. FIG. 7 is a diagram showing a differential value of the change in the composite capacitance value with respect to the control voltage VT, and P shows a differential value of the change in the composite capacitance value. In FIG. 7, Q indicates a differential value of the change in the capacitance value in the case of the conventional example shown in FIG. 2, that is, a differential value of the change in the capacitance value when the control voltage VT is applied as a reference example.

  For example, in FIG. 7, the half value width which becomes a half value with respect to the peak of the differential value of change is 0.38 V from −0.14 V to +0.24 V in the conventional example to which the control voltage VT is applied. On the other hand, the half-value width of the differential value of the change in the combined capacitance value in the first embodiment extends from −0.43 V to 1.13 V from + 0.7V.

  In the above description, the variable capacitors VAC1, VAC2, VAC3, and VAC4 all have the same center capacitance, the resistors R1, R2, R3, and R4 all have the same resistance value, VT1 is 3 / 4VT, and VT2 is 1 / An example in which 2VT and VT1 are 1/4 VT has been described. In this case, the gain of the combined capacitance with respect to the control voltage is about 63% of the conventional example. The capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 and the resistance values of the resistors R1, R2, R3, and R4 are not limited to this example, and may be set to desired values.

  For example, the ratio of the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 is 4: 1: 8: 2. Since the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 are related to the channel width of the varactor diode, they can be realized by setting the channel width to the above ratio. When the resistors R1, R2, R3, and R4 all have the same resistance value, the gain of the combined capacitance with respect to the control voltage is about 62%.

  When the ratio of the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 is 8: 1: 2: 4 and the resistors R1, R2, R3, and R4 all have the same resistance value, the combined capacitance is controlled. The gain for the voltage is about 72%.

  Further, when the ratio of the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 is 1: 4: 8: 2, and the resistors R1, R2, R3, and R4 all have the same resistance value, the combined capacitance is controlled. The gain with respect to the voltage is about 57%.

  Thus, the gain to be reduced can be set to various values by appropriately setting the ratio of the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4. In the above example, the example in which the resistors R1, R2, R3, and R4 all have the same resistance value has been described. However, it is also possible to set different values. In this case, the variable capacitors VAC1, VAC2, VAC3, and VAC4 In combination with the capacitance value, the gain can be precisely reduced to a desired value.

  Here, when manufacturing the voltage controlled oscillation circuit in the IC, it is difficult to set the resistance value of the resistor or the capacitance value of the varactor diode to an arbitrary continuous value in order to suppress manufacturing variations. It will be set to an integer ratio. For example, in order to change the control voltage VT to a voltage of 49%, 100 resistance elements are made and connected so as to be 49:51. For this reason, it is necessary to manufacture a large number of resistors in order to set a precise control voltage, resulting in problems that the circuit area increases and the power consumption also increases.

  On the other hand, in the first embodiment, a plurality of variable capacitors are provided, a divided voltage is generated by a divided voltage generation circuit having a resistor string, and applied to the plurality of variable capacitors. Therefore, when the capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 are made different by an integer ratio and the resistors R1, R2, R3, and R4 are made different by an integer ratio, only a relatively small increase in circuit area and power consumption can be obtained. Many gain setting values can be selected.

  FIG. 8 is a diagram illustrating a configuration of the voltage controlled oscillation circuit according to the second embodiment, in which (A) shows an overall configuration and (B) shows a configuration example of a variable resistor.

  As shown in FIG. 8A, in the voltage controlled oscillation circuit of the second embodiment, the resistors R1, R2, R3, and R4 are variable resistors VR1, VR2, VR3, and VR4 in the first embodiment. The difference is that a controller 10 for controlling VR1, VR2, VR3 and VR4 is provided. Note that the number of variable capacitors is three. For example, as shown in FIG. 8B, the variable resistance can be realized by connecting transistors T5, T6, T7, and T8 that operate as switches in parallel with the resistance elements R11, R12, R13, and R14, respectively. . The controller 10 applies a control signal to the gates of the transistors T5, T6, T7, and T8. When each of the transistors T5, T6, T7, and T8 is in an off state, the corresponding resistance element functions as a resistor. When each of the transistors T5, T6, T7, and T8 is in an on state, the corresponding resistance element is bypassed. .

  In the voltage controlled oscillation circuit of the second embodiment, the gain reduction rate can be set to a desired value by setting the resistance values of the variable resistors VR1, VR2, VR3, and VR4, and a plurality of variable capacitors can be set. The gain can be set to a desired value by differentiating the capacitance values.

  FIG. 9 is a diagram illustrating a configuration of the voltage controlled oscillation circuit of the third embodiment.

  As shown in FIG. 9, the voltage controlled oscillation circuit of the third embodiment is different from the first embodiment in that the divided voltage generation unit is a circuit including a diode. The divided voltage generator of the third embodiment includes a plurality of (here, three) diodes D1, D2, D3 and a resistor R42 connected in series between the input terminal of the control voltage VT and the ground voltage source. A resistor R21 connected between the connection node of D1 and D2 and VAC2, a resistor R22 connected between the connection node of D1 and D2 and the ground voltage terminal, and a connection between the connection node of D2 and D3 and VAC3 Resistor R31, a resistor R32 connected between the connection node of D2 and D3 and the ground voltage terminal, and a resistor R41 connected between the connection node of D3 and resistor R42 and VAC4.

  The diode D1 shifts the control voltage VT by the threshold voltage. Therefore, the voltage applied to VAC2 is a voltage obtained by reducing the control voltage VT by the threshold voltage and cutting the low voltage portion. The diode D2 further shifts the control voltage VT shifted by the diode D1 by the threshold voltage, that is, twice the threshold voltage. Therefore, the voltage applied to VAC3 is a voltage obtained by reducing the control voltage VT by twice the threshold voltage and cutting the low voltage portion. The same applies to the voltage applied to VAC4.

  FIG. 10A is a diagram illustrating changes in capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT in the third embodiment. FIG. 10B shows differential values of changes in capacitance values of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT. In (A) and (B) of FIG. 10, A is the capacitance value of VAC1 and its differential value, BA is the capacitance value of VAC2 and its differential value, C is the capacitance value of VAC3 and its differential value, and D is The capacitance value of VAC4 and its differential value are shown. As shown in FIGS. 4 and 5, the change in the capacitance value and the change in the differential value with respect to the control voltage VT shift.

  FIG. 10C is a diagram illustrating a change in the combined capacitance value of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT in the third embodiment. FIG. 10D shows the differential value of the change in the combined capacitance value of the variable capacitors VAC1, VAC2, VAC3, and VAC4 with respect to the control voltage VT. In FIG. 10C, a graph indicated by P shows a change in the combined capacitance value, and Q shows a change in the capacitance value when the control voltage VT shown in FIG. 2 is applied. Similarly, in FIG. 10D, P indicates a differential value of the change in the combined capacitance value, and Q indicates a differential value of the change in the capacitance value when the control voltage VT is applied.

  As is apparent from FIG. 10, it can be seen that also in the third embodiment, the change in the combined capacitance value becomes loose, the half value width of the differential value becomes wide, and the linearity improves.

  FIG. 11 is a diagram illustrating a configuration of the voltage controlled oscillation circuit of the fourth embodiment.

  As shown in FIG. 11, the voltage-controlled oscillator circuit of the fourth embodiment can connect two sets of coarse adjustment capacitors in parallel with the plurality of variable capacitors VAC1, VAC2, and VAC3 in the first embodiment. Different. Note that the number of variable capacitors is three.

  In the first set of coarse adjustment capacitors, a transistor T41 operating as a switch is connected between the terminals of the capacitors C11 and C12, and the other terminals of the capacitors C11 and C12 are connected to a variable capacitor. When the transistor T41 is turned on by the signal B1, the capacitors C11 and C12 connected in series are connected in parallel to the variable capacitor, and the capacitance of the voltage controlled oscillation circuit is increased. When the transistor T41 is turned off by the signal B1, the capacitors C11 and C12 connected in series are not connected in parallel to the variable capacitor and do not increase the capacitance of the voltage controlled oscillation circuit.

  Similarly, the second set of coarse adjustment capacitors is a transistor T42 operating as a switch between the terminals of the capacitors C21 and C22, and the other terminals of the capacitors C21 and C22 are connected to a variable capacitor. When the transistor T41 is turned on by the signal B2, the capacitors C21 and C22 connected in series are connected in parallel to the variable capacitor, and the capacitance of the voltage controlled oscillation circuit is increased. When the transistor T42 is turned off by the signal B2, the capacitors C21 and C22 connected in series are not connected in parallel to the variable capacitor and do not increase the capacitance of the voltage controlled oscillation circuit.

  In the voltage controlled oscillation circuit of the fourth embodiment, the base capacitance of the voltage controlled oscillation circuit is changed stepwise by the signals B1 and B2, and the capacitance is changed based on the changed base capacitance, that is, the voltage controlled oscillation circuit. The output frequency can be changed. For example, in a wireless transceiver, the radio frequency band used for communication is switched. Even when the band is switched, it is required to generate a radio frequency reference clock signal with one PLL circuit. The voltage controlled oscillation circuit of the fourth embodiment is suitable for use in such a PLL circuit, and selects the base capacitance by the signals B1 and B2 according to the switching of the band.

  FIG. 12 is a diagram illustrating a configuration of the voltage controlled oscillation circuit according to the fifth embodiment.

  As shown in FIG. 12, in the voltage controlled oscillation circuit of the fifth embodiment, a plurality of variable capacitors VAC1, VAC2, and VAC3 are used as one set in the first embodiment, and three sets of variable capacitors are connected in parallel. Different. Note that the number of variable capacitors in each group is three.

  The first variable capacitor group has three variable capacitors VAC11, VAC12, and VAC13. The VAC 11 is connected to the input terminal of the control signal VT through the transistor T11 and is connected to the power supply voltage source through the transistor T10. The VAC 12 is connected to a connection node between R1 and R2 through the transistor T12, and is connected to a power supply voltage source through the transistor T10. The VAC 13 is connected to a connection node between R2 and R3 through the transistor T13, and is connected to a power supply voltage source through the transistor T10. The transistor T10 is an NMOS transistor, and the transistors T11 to T13 are PMOS transistors, and operate in reverse, that is, in a complementary manner in response to the signal B3.

  Therefore, when the signal B3 is L, the transistors T11 to T13 are turned on, and the control voltage VT and the divided voltages VT1 and VT2 are applied to the variable capacitors VAC11, VAC12, and VAC13. When the signal B3 is H, the transistor T10 is turned on, and the power supply voltage is applied to the variable capacitors VAC11, VAC12, and VAC13. As a result, the capacities of VAC11, VAC12, and VAC13 become saturation capacity values.

  The same applies to the other sets of the second and third variable capacitors, and a description thereof will be omitted.

  In the voltage controlled oscillation circuit of the fifth embodiment, as in the first embodiment, each variable capacitor set can have three variable capacitors, and the gain reduction rate can be increased by varying the capacitance value. It can be set to a desired value. Then, by appropriately setting the ratio of the capacitance values corresponding to each set and further appropriately setting the signals B3 to B5, the capacitance value is changed stepwise, that is, the output frequency of the voltage controlled oscillation circuit is stepwise. Can be changed.

  Here, in the voltage controlled oscillation circuit of the fourth embodiment, the base capacitance is changed stepwise, but the capacitance range changed by a plurality of variable capacitors is the same, and the gain for the control voltage VT is the same and does not change. . On the other hand, in the voltage controlled oscillation circuit of the fifth embodiment, the capacitance range can be changed by changing the number of sets of variable capacitors to be connected, and the gain with respect to the control voltage VT also changes. For example, the ratios of the capacitance values of the three variable capacitors in the first to third variable capacitor groups are made equal, and the capacitance values of the corresponding variable capacitors in the first to third variable capacitor groups are then set. The ratio is 1: 1: 2. When B3 is set to L and only the first variable capacitor pair is connected, the first state is set. When B3 and B4 are set to L and the first and second variable capacitor sets are set to the connected state, the second state is set. When the state, B3 to B5 are set to L, and the first to third variable capacitors are connected, the third state is set. The slope of the gain with respect to the base capacitance and the control voltage VT in each state in the first state, the second state, and the third state is 1: 2: 4. For example, the frequency range in which the voltage controlled oscillation circuit can respond varies in proportion to the base frequency of the selected band, but the voltage controlled oscillation circuit of the fifth embodiment is suitable for such an application. .

  FIG. 13 is a diagram illustrating a configuration of the voltage controlled oscillation circuit according to the sixth embodiment.

  In the voltage controlled oscillator circuit of the sixth embodiment, the features described in the second to fourth embodiments are collectively applied to the voltage controlled oscillator circuit of the first embodiment. The diodes D1 and D2 are connected to a connection node between the variable resistors VR1 and VR2 and a connection node between the VR2 and VR3. Further, n sets of coarse adjustment capacities are provided. Since the operation of other parts can be easily understood from the description in the second to fourth embodiments, the description is omitted.

  FIG. 14 is a diagram illustrating a configuration of the voltage controlled oscillation circuit of the seventh embodiment.

  In the voltage-controlled oscillation circuit of the seventh embodiment, each variable capacitor is formed by combining the P-type varactor diodes VAC1P, VAC2P, VAC3P and the N-type varactor diodes VAC1N, VAC2N, VAC3N in the first embodiment. Different. The same control voltage is applied to each pair of P-type and N-type varactor diodes.

  There are P-type and N-type varactor diodes, and P-type and N-type varactor diodes have opposite characteristics. Therefore, by connecting two P-type and N-type varactor diodes having a slight difference in the absolute value of the gain in parallel, the characteristics cancel each other and a characteristic with a very small gain can be obtained. So precise setting is possible. Note that not all variable capacitors need be a combination of P-type and N-type varactor diodes, and only some of the variable capacitors may be a combination of P-type and N-type varactor diodes.

  The embodiment of the voltage variable oscillation circuit has been described above. However, the voltage variable oscillation circuit of the embodiment can be applied to various parts. For example, FIG. 15 is a diagram showing a configuration of a widely known PLL (Phase Locked Loop). The PLL circuit includes a phase comparator 21, a charge pump 22, a loop filter 23, and a voltage controlled oscillation circuit (VCO) 24. The loop filter 23 has a resistance R and a capacitance C. Since the PLL circuit is widely known and will not be described, the voltage variable oscillation circuit of the above embodiment is used as the VCO 24. The voltage variable oscillation circuit of the above embodiment is particularly suitable for use in a PLL circuit that generates a reference clock signal in a wireless transceiver.

  The embodiments have been described above. However, it should be readily understood by those skilled in the art that the disclosed technology is not limited to the described embodiments, and various modifications are possible.

10 controller SI constant current source T1, T2, T5-T8 transistor L1, L2 inductance element R1-R4 resistance VAC1-VAC4 variable capacitance

Claims (10)

In a voltage controlled oscillation circuit that outputs an oscillation signal whose oscillation frequency changes according to the control voltage,
A plurality of variable capacitors whose capacitance values change according to the applied voltage,
A voltage-controlled oscillation circuit comprising: a divided voltage generation unit that divides the control voltage and generates a divided voltage to be applied to the plurality of variable capacitors.   The voltage controlled oscillation circuit according to claim 1, wherein one of the plurality of variable capacitors is controlled by the control voltage.   3. The voltage according to claim 1, wherein the divided voltage generation unit includes a resistor string having a plurality of resistors connected in series between a control voltage supply terminal and a ground voltage terminal. Control oscillator circuit.   The voltage controlled oscillation circuit according to claim 3, wherein the resistor string includes a variable resistor. The divided voltage generator is
A plurality of diodes and at least one resistor connected in series between the control voltage supply terminal and the ground voltage terminal;
An auxiliary resistor connected to the diode,
5. The voltage controlled oscillation circuit according to claim 3, wherein the divided voltage is supplied from a connection node between the diode and the auxiliary resistor. A plurality of sets of the plurality of variable capacitors,
A switching circuit is further provided for switching whether to apply a divided voltage generated by the divided voltage generation unit or to apply a predetermined voltage that saturates the plurality of variable capacitors to the plurality of variable capacitors of each set. The voltage controlled oscillation circuit according to claim 1.   6. The voltage controlled oscillation circuit according to claim 1, further comprising a coarse adjustment capacitor that controls whether the plurality of variable capacitors are connected in parallel by a control signal. 7. A first output unit that outputs the complementary oscillation signal, and a second output unit;
8. The voltage controlled oscillation circuit according to claim 1, wherein the plurality of variable capacitors are connected in parallel between the first output unit and the second output unit. 9.   9. The voltage controlled oscillation circuit according to claim 1, wherein the plurality of variable capacitors include a set of an n-well varactor diode and an n-well varactor diode connected in parallel. A phase comparison circuit that compares a reference clock signal and an oscillation clock signal and outputs a phase difference as a control voltage;
In a clock signal generation circuit comprising: a voltage controlled oscillation circuit that outputs the oscillation clock signal based on the control voltage;
The voltage controlled oscillation circuit is
A plurality of variable capacitors whose capacitance values change according to the applied voltage,
A clock signal generation circuit comprising: a divided voltage generation unit configured to divide the control voltage and generate a divided voltage to be applied to the plurality of variable capacitors.

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